sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *
  10  *  Authors:
  11  *                      Wu Fengguang <wfg@linux.intel.com>
  12  *
  13  *  Maintained by:
  14  *                      Wu Fengguang <wfg@linux.intel.com>
  15  *
  16  *  This program is free software; you can redistribute it and/or modify it
  17  *  under the terms of the GNU General Public License as published by the Free
  18  *  Software Foundation; either version 2 of the License, or (at your option)
  19  *  any later version.
  20  *
  21  *  This program is distributed in the hope that it will be useful, but
  22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  24  *  for more details.
  25  *
  26  *  You should have received a copy of the GNU General Public License
  27  *  along with this program; if not, write to the Free Software Foundation,
  28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/delay.h>
  33 #include <linux/slab.h>
  34 #include <linux/moduleparam.h>
  35 #include <sound/core.h>
  36 #include "hda_codec.h"
  37 #include "hda_local.h"
  38
  39 static bool static_hdmi_pcm;
  40 module_param(static_hdmi_pcm, bool, 0644);
  41 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  42
  43 /*
  44  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  45  * could support two independent pipes, each of them can be connected to one or
  46  * more ports (DVI, HDMI or DisplayPort).
  47  *
  48  * The HDA correspondence of pipes/ports are converter/pin nodes.
  49  */
  50 #define MAX_HDMI_CVTS   3
  51 #define MAX_HDMI_PINS   3
  52
  53 struct hdmi_spec {
  54         int num_cvts;
  55         int num_pins;
  56         hda_nid_t cvt[MAX_HDMI_CVTS+1];  /* audio sources */
  57         hda_nid_t pin[MAX_HDMI_PINS+1];  /* audio sinks */
  58
  59         /*
  60          * source connection for each pin
  61          */
  62         hda_nid_t pin_cvt[MAX_HDMI_PINS+1];
  63
  64         /*
  65          * HDMI sink attached to each pin
  66          */
  67         struct hdmi_eld sink_eld[MAX_HDMI_PINS];
  68
  69         /*
  70          * export one pcm per pipe
  71          */
  72         struct hda_pcm  pcm_rec[MAX_HDMI_CVTS];
  73         struct hda_pcm_stream codec_pcm_pars[MAX_HDMI_CVTS];
  74
  75         /*
  76          * ati/nvhdmi specific
  77          */
  78         struct hda_multi_out multiout;
  79         struct hda_pcm_stream *pcm_playback;
  80
  81         /* misc flags */
  82         /* PD bit indicates only the update, not the current state */
  83         unsigned int old_pin_detect:1;
  84 };
  85
  86
  87 struct hdmi_audio_infoframe {
  88         u8 type; /* 0x84 */
  89         u8 ver;  /* 0x01 */
  90         u8 len;  /* 0x0a */
  91
  92         u8 checksum;
  93
  94         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
  95         u8 SS01_SF24;
  96         u8 CXT04;
  97         u8 CA;
  98         u8 LFEPBL01_LSV36_DM_INH7;
  99 };
 100
 101 struct dp_audio_infoframe {
 102         u8 type; /* 0x84 */
 103         u8 len;  /* 0x1b */
 104         u8 ver;  /* 0x11 << 2 */
 105
 106         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 107         u8 SS01_SF24;
 108         u8 CXT04;
 109         u8 CA;
 110         u8 LFEPBL01_LSV36_DM_INH7;
 111 };
 112
 113 /*
 114  * CEA speaker placement:
 115  *
 116  *        FLH       FCH        FRH
 117  *  FLW    FL  FLC   FC   FRC   FR   FRW
 118  *
 119  *                                  LFE
 120  *                     TC
 121  *
 122  *          RL  RLC   RC   RRC   RR
 123  *
 124  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 125  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 126  */
 127 enum cea_speaker_placement {
 128         FL  = (1 <<  0),        /* Front Left           */
 129         FC  = (1 <<  1),        /* Front Center         */
 130         FR  = (1 <<  2),        /* Front Right          */
 131         FLC = (1 <<  3),        /* Front Left Center    */
 132         FRC = (1 <<  4),        /* Front Right Center   */
 133         RL  = (1 <<  5),        /* Rear Left            */
 134         RC  = (1 <<  6),        /* Rear Center          */
 135         RR  = (1 <<  7),        /* Rear Right           */
 136         RLC = (1 <<  8),        /* Rear Left Center     */
 137         RRC = (1 <<  9),        /* Rear Right Center    */
 138         LFE = (1 << 10),        /* Low Frequency Effect */
 139         FLW = (1 << 11),        /* Front Left Wide      */
 140         FRW = (1 << 12),        /* Front Right Wide     */
 141         FLH = (1 << 13),        /* Front Left High      */
 142         FCH = (1 << 14),        /* Front Center High    */
 143         FRH = (1 << 15),        /* Front Right High     */
 144         TC  = (1 << 16),        /* Top Center           */
 145 };
 146
 147 /*
 148  * ELD SA bits in the CEA Speaker Allocation data block
 149  */
 150 static int eld_speaker_allocation_bits[] = {
 151         [0] = FL | FR,
 152         [1] = LFE,
 153         [2] = FC,
 154         [3] = RL | RR,
 155         [4] = RC,
 156         [5] = FLC | FRC,
 157         [6] = RLC | RRC,
 158         /* the following are not defined in ELD yet */
 159         [7] = FLW | FRW,
 160         [8] = FLH | FRH,
 161         [9] = TC,
 162         [10] = FCH,
 163 };
 164
 165 struct cea_channel_speaker_allocation {
 166         int ca_index;
 167         int speakers[8];
 168
 169         /* derived values, just for convenience */
 170         int channels;
 171         int spk_mask;
 172 };
 173
 174 /*
 175  * ALSA sequence is:
 176  *
 177  *       surround40   surround41   surround50   surround51   surround71
 178  * ch0   front left   =            =            =            =
 179  * ch1   front right  =            =            =            =
 180  * ch2   rear left    =            =            =            =
 181  * ch3   rear right   =            =            =            =
 182  * ch4                LFE          center       center       center
 183  * ch5                                          LFE          LFE
 184  * ch6                                                       side left
 185  * ch7                                                       side right
 186  *
 187  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 188  */
 189 static int hdmi_channel_mapping[0x32][8] = {
 190         /* stereo */
 191         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 192         /* 2.1 */
 193         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 194         /* Dolby Surround */
 195         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 196         /* surround40 */
 197         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 198         /* 4ch */
 199         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 200         /* surround41 */
 201         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 202         /* surround50 */
 203         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 204         /* surround51 */
 205         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 206         /* 7.1 */
 207         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 208 };
 209
 210 /*
 211  * This is an ordered list!
 212  *
 213  * The preceding ones have better chances to be selected by
 214  * hdmi_channel_allocation().
 215  */
 216 static struct cea_channel_speaker_allocation channel_allocations[] = {
 217 /*                        channel:   7     6    5    4    3     2    1    0  */
 218 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 219                                  /* 2.1 */
 220 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 221                                  /* Dolby Surround */
 222 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 223                                  /* surround40 */
 224 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 225                                  /* surround41 */
 226 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 227                                  /* surround50 */
 228 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 229                                  /* surround51 */
 230 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 231                                  /* 6.1 */
 232 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 233                                  /* surround71 */
 234 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 235
 236 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 237 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 238 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 239 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 240 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 241 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 242 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 243 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 244 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 245 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 246 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 247 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 248 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 249 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 250 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 251 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 252 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 253 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 254 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 255 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 256 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 257 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 258 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 259 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 260 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 261 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 262 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 263 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 264 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 265 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 266 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 267 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 268 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 269 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 270 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 271 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 272 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 273 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 274 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 275 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 276 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 277 };
 278
 279
 280 /*
 281  * HDMI routines
 282  */
 283
 284 static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
 285 {
 286         int i;
 287
 288         for (i = 0; nids[i]; i++)
 289                 if (nids[i] == nid)
 290                         return i;
 291
 292         snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
 293         return -EINVAL;
 294 }
 295
 296 static void hdmi_get_show_eld(struct hda_codec *codec, hda_nid_t pin_nid,
 297                               struct hdmi_eld *eld)
 298 {
 299         if (!snd_hdmi_get_eld(eld, codec, pin_nid))
 300                 snd_hdmi_show_eld(eld);
 301 }
 302
 303 #ifdef BE_PARANOID
 304 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 305                                 int *packet_index, int *byte_index)
 306 {
 307         int val;
 308
 309         val = snd_hda_codec_read(codec, pin_nid, 0,
 310                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 311
 312         *packet_index = val >> 5;
 313         *byte_index = val & 0x1f;
 314 }
 315 #endif
 316
 317 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 318                                 int packet_index, int byte_index)
 319 {
 320         int val;
 321
 322         val = (packet_index << 5) | (byte_index & 0x1f);
 323
 324         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 325 }
 326
 327 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 328                                 unsigned char val)
 329 {
 330         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 331 }
 332
 333 static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
 334 {
 335         /* Unmute */
 336         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 337                 snd_hda_codec_write(codec, pin_nid, 0,
 338                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 339         /* Enable pin out */
 340         snd_hda_codec_write(codec, pin_nid, 0,
 341                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
 342 }
 343
 344 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
 345 {
 346         return 1 + snd_hda_codec_read(codec, nid, 0,
 347                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 348 }
 349
 350 static void hdmi_set_channel_count(struct hda_codec *codec,
 351                                    hda_nid_t nid, int chs)
 352 {
 353         if (chs != hdmi_get_channel_count(codec, nid))
 354                 snd_hda_codec_write(codec, nid, 0,
 355                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 356 }
 357
 358
 359 /*
 360  * Channel mapping routines
 361  */
 362
 363 /*
 364  * Compute derived values in channel_allocations[].
 365  */
 366 static void init_channel_allocations(void)
 367 {
 368         int i, j;
 369         struct cea_channel_speaker_allocation *p;
 370
 371         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 372                 p = channel_allocations + i;
 373                 p->channels = 0;
 374                 p->spk_mask = 0;
 375                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 376                         if (p->speakers[j]) {
 377                                 p->channels++;
 378                                 p->spk_mask |= p->speakers[j];
 379                         }
 380         }
 381 }
 382
 383 /*
 384  * The transformation takes two steps:
 385  *
 386  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 387  *            spk_mask => (channel_allocations[])         => ai->CA
 388  *
 389  * TODO: it could select the wrong CA from multiple candidates.
 390 */
 391 static int hdmi_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
 392                                    int channels)
 393 {
 394         struct hdmi_spec *spec = codec->spec;
 395         struct hdmi_eld *eld;
 396         int i;
 397         int ca = 0;
 398         int spk_mask = 0;
 399         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 400
 401         /*
 402          * CA defaults to 0 for basic stereo audio
 403          */
 404         if (channels <= 2)
 405                 return 0;
 406
 407         i = hda_node_index(spec->pin_cvt, nid);
 408         if (i < 0)
 409                 return 0;
 410         eld = &spec->sink_eld[i];
 411
 412         /*
 413          * HDMI sink's ELD info cannot always be retrieved for now, e.g.
 414          * in console or for audio devices. Assume the highest speakers
 415          * configuration, to _not_ prohibit multi-channel audio playback.
 416          */
 417         if (!eld->spk_alloc)
 418                 eld->spk_alloc = 0xffff;
 419
 420         /*
 421          * expand ELD's speaker allocation mask
 422          *
 423          * ELD tells the speaker mask in a compact(paired) form,
 424          * expand ELD's notions to match the ones used by Audio InfoFrame.
 425          */
 426         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 427                 if (eld->spk_alloc & (1 << i))
 428                         spk_mask |= eld_speaker_allocation_bits[i];
 429         }
 430
 431         /* search for the first working match in the CA table */
 432         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 433                 if (channels == channel_allocations[i].channels &&
 434                     (spk_mask & channel_allocations[i].spk_mask) ==
 435                                 channel_allocations[i].spk_mask) {
 436                         ca = channel_allocations[i].ca_index;
 437                         break;
 438                 }
 439         }
 440
 441         snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
 442         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 443                     ca, channels, buf);
 444
 445         return ca;
 446 }
 447
 448 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 449                                        hda_nid_t pin_nid)
 450 {
 451 #ifdef CONFIG_SND_DEBUG_VERBOSE
 452         int i;
 453         int slot;
 454
 455         for (i = 0; i < 8; i++) {
 456                 slot = snd_hda_codec_read(codec, pin_nid, 0,
 457                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
 458                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 459                                                 slot >> 4, slot & 0xf);
 460         }
 461 #endif
 462 }
 463
 464
 465 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 466                                        hda_nid_t pin_nid,
 467                                        int ca)
 468 {
 469         int i;
 470         int err;
 471
 472         if (hdmi_channel_mapping[ca][1] == 0) {
 473                 for (i = 0; i < channel_allocations[ca].channels; i++)
 474                         hdmi_channel_mapping[ca][i] = i | (i << 4);
 475                 for (; i < 8; i++)
 476                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
 477         }
 478
 479         for (i = 0; i < 8; i++) {
 480                 err = snd_hda_codec_write(codec, pin_nid, 0,
 481                                           AC_VERB_SET_HDMI_CHAN_SLOT,
 482                                           hdmi_channel_mapping[ca][i]);
 483                 if (err) {
 484                         snd_printdd(KERN_NOTICE
 485                                     "HDMI: channel mapping failed\n");
 486                         break;
 487                 }
 488         }
 489
 490         hdmi_debug_channel_mapping(codec, pin_nid);
 491 }
 492
 493
 494 /*
 495  * Audio InfoFrame routines
 496  */
 497
 498 /*
 499  * Enable Audio InfoFrame Transmission
 500  */
 501 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 502                                        hda_nid_t pin_nid)
 503 {
 504         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 505         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 506                                                 AC_DIPXMIT_BEST);
 507 }
 508
 509 /*
 510  * Disable Audio InfoFrame Transmission
 511  */
 512 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 513                                       hda_nid_t pin_nid)
 514 {
 515         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 516         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 517                                                 AC_DIPXMIT_DISABLE);
 518 }
 519
 520 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 521 {
 522 #ifdef CONFIG_SND_DEBUG_VERBOSE
 523         int i;
 524         int size;
 525
 526         size = snd_hdmi_get_eld_size(codec, pin_nid);
 527         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 528
 529         for (i = 0; i < 8; i++) {
 530                 size = snd_hda_codec_read(codec, pin_nid, 0,
 531                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 532                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 533         }
 534 #endif
 535 }
 536
 537 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 538 {
 539 #ifdef BE_PARANOID
 540         int i, j;
 541         int size;
 542         int pi, bi;
 543         for (i = 0; i < 8; i++) {
 544                 size = snd_hda_codec_read(codec, pin_nid, 0,
 545                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 546                 if (size == 0)
 547                         continue;
 548
 549                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 550                 for (j = 1; j < 1000; j++) {
 551                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 552                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 553                         if (pi != i)
 554                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 555                                                 bi, pi, i);
 556                         if (bi == 0) /* byte index wrapped around */
 557                                 break;
 558                 }
 559                 snd_printd(KERN_INFO
 560                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 561                         i, size, j);
 562         }
 563 #endif
 564 }
 565
 566 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 567 {
 568         u8 *bytes = (u8 *)hdmi_ai;
 569         u8 sum = 0;
 570         int i;
 571
 572         hdmi_ai->checksum = 0;
 573
 574         for (i = 0; i < sizeof(*hdmi_ai); i++)
 575                 sum += bytes[i];
 576
 577         hdmi_ai->checksum = -sum;
 578 }
 579
 580 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 581                                       hda_nid_t pin_nid,
 582                                       u8 *dip, int size)
 583 {
 584         int i;
 585
 586         hdmi_debug_dip_size(codec, pin_nid);
 587         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 588
 589         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 590         for (i = 0; i < size; i++)
 591                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 592 }
 593
 594 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 595                                     u8 *dip, int size)
 596 {
 597         u8 val;
 598         int i;
 599
 600         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 601                                                             != AC_DIPXMIT_BEST)
 602                 return false;
 603
 604         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 605         for (i = 0; i < size; i++) {
 606                 val = snd_hda_codec_read(codec, pin_nid, 0,
 607                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 608                 if (val != dip[i])
 609                         return false;
 610         }
 611
 612         return true;
 613 }
 614
 615 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
 616                                         struct snd_pcm_substream *substream)
 617 {
 618         struct hdmi_spec *spec = codec->spec;
 619         hda_nid_t pin_nid;
 620         int channels = substream->runtime->channels;
 621         int ca;
 622         int i;
 623         u8 ai[max(sizeof(struct hdmi_audio_infoframe),
 624                   sizeof(struct dp_audio_infoframe))];
 625
 626         ca = hdmi_channel_allocation(codec, nid, channels);
 627
 628         for (i = 0; i < spec->num_pins; i++) {
 629                 if (spec->pin_cvt[i] != nid)
 630                         continue;
 631                 if (!spec->sink_eld[i].monitor_present)
 632                         continue;
 633
 634                 pin_nid = spec->pin[i];
 635
 636                 memset(ai, 0, sizeof(ai));
 637                 if (spec->sink_eld[i].conn_type == 0) { /* HDMI */
 638                         struct hdmi_audio_infoframe *hdmi_ai;
 639
 640                         hdmi_ai = (struct hdmi_audio_infoframe *)ai;
 641                         hdmi_ai->type           = 0x84;
 642                         hdmi_ai->ver            = 0x01;
 643                         hdmi_ai->len            = 0x0a;
 644                         hdmi_ai->CC02_CT47      = channels - 1;
 645                         hdmi_checksum_audio_infoframe(hdmi_ai);
 646                 } else if (spec->sink_eld[i].conn_type == 1) { /* DisplayPort */
 647                         struct dp_audio_infoframe *dp_ai;
 648
 649                         dp_ai = (struct dp_audio_infoframe *)ai;
 650                         dp_ai->type             = 0x84;
 651                         dp_ai->len              = 0x1b;
 652                         dp_ai->ver              = 0x11 << 2;
 653                         dp_ai->CC02_CT47        = channels - 1;
 654                 } else {
 655                         snd_printd("HDMI: unknown connection type at pin %d\n",
 656                                    pin_nid);
 657                         continue;
 658                 }
 659
 660                 /*
 661                  * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 662                  * sizeof(*dp_ai) to avoid partial match/update problems when
 663                  * the user switches between HDMI/DP monitors.
 664                  */
 665                 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai, sizeof(ai))) {
 666                         snd_printdd("hdmi_setup_audio_infoframe: "
 667                                     "cvt=%d pin=%d channels=%d\n",
 668                                     nid, pin_nid,
 669                                     channels);
 670                         hdmi_setup_channel_mapping(codec, pin_nid, ca);
 671                         hdmi_stop_infoframe_trans(codec, pin_nid);
 672                         hdmi_fill_audio_infoframe(codec, pin_nid,
 673                                                   ai, sizeof(ai));
 674                         hdmi_start_infoframe_trans(codec, pin_nid);
 675                 }
 676         }
 677 }
 678
 679
 680 /*
 681  * Unsolicited events
 682  */
 683
 684 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
 685                                struct hdmi_eld *eld);
 686
 687 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 688 {
 689         struct hdmi_spec *spec = codec->spec;
 690         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 691         int pind = !!(res & AC_UNSOL_RES_PD);
 692         int eldv = !!(res & AC_UNSOL_RES_ELDV);
 693         int index;
 694
 695         printk(KERN_INFO
 696                 "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 697                 tag, pind, eldv);
 698
 699         index = hda_node_index(spec->pin, tag);
 700         if (index < 0)
 701                 return;
 702
 703         if (spec->old_pin_detect) {
 704                 if (pind)
 705                         hdmi_present_sense(codec, tag, &spec->sink_eld[index]);
 706                 pind = spec->sink_eld[index].monitor_present;
 707         }
 708
 709         spec->sink_eld[index].monitor_present = pind;
 710         spec->sink_eld[index].eld_valid = eldv;
 711
 712         if (pind && eldv) {
 713                 hdmi_get_show_eld(codec, spec->pin[index],
 714                                   &spec->sink_eld[index]);
 715                 /* TODO: do real things about ELD */
 716         }
 717 }
 718
 719 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 720 {
 721         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 722         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 723         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 724         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 725
 726         printk(KERN_INFO
 727                 "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 728                 tag,
 729                 subtag,
 730                 cp_state,
 731                 cp_ready);
 732
 733         /* TODO */
 734         if (cp_state)
 735                 ;
 736         if (cp_ready)
 737                 ;
 738 }
 739
 740
 741 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 742 {
 743         struct hdmi_spec *spec = codec->spec;
 744         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 745         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 746
 747         if (hda_node_index(spec->pin, tag) < 0) {
 748                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
 749                 return;
 750         }
 751
 752         if (subtag == 0)
 753                 hdmi_intrinsic_event(codec, res);
 754         else
 755                 hdmi_non_intrinsic_event(codec, res);
 756 }
 757
 758 /*
 759  * Callbacks
 760  */
 761
 762 /* HBR should be Non-PCM, 8 channels */
 763 #define is_hbr_format(format) \
 764         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 765
 766 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
 767                               u32 stream_tag, int format)
 768 {
 769         struct hdmi_spec *spec = codec->spec;
 770         int pinctl;
 771         int new_pinctl = 0;
 772         int i;
 773
 774         for (i = 0; i < spec->num_pins; i++) {
 775                 if (spec->pin_cvt[i] != nid)
 776                         continue;
 777                 if (!(snd_hda_query_pin_caps(codec, spec->pin[i]) & AC_PINCAP_HBR))
 778                         continue;
 779
 780                 pinctl = snd_hda_codec_read(codec, spec->pin[i], 0,
 781                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 782
 783                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 784                 if (is_hbr_format(format))
 785                         new_pinctl |= AC_PINCTL_EPT_HBR;
 786                 else
 787                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 788
 789                 snd_printdd("hdmi_setup_stream: "
 790                             "NID=0x%x, %spinctl=0x%x\n",
 791                             spec->pin[i],
 792                             pinctl == new_pinctl ? "" : "new-",
 793                             new_pinctl);
 794
 795                 if (pinctl != new_pinctl)
 796                         snd_hda_codec_write(codec, spec->pin[i], 0,
 797                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 798                                             new_pinctl);
 799         }
 800
 801         if (is_hbr_format(format) && !new_pinctl) {
 802                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
 803                 return -EINVAL;
 804         }
 805
 806         snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
 807         return 0;
 808 }
 809
 810 /*
 811  * HDA PCM callbacks
 812  */
 813 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
 814                          struct hda_codec *codec,
 815                          struct snd_pcm_substream *substream)
 816 {
 817         struct hdmi_spec *spec = codec->spec;
 818         struct hdmi_eld *eld;
 819         struct hda_pcm_stream *codec_pars;
 820         struct snd_pcm_runtime *runtime = substream->runtime;
 821         unsigned int idx;
 822
 823         for (idx = 0; idx < spec->num_cvts; idx++)
 824                 if (hinfo->nid == spec->cvt[idx])
 825                         break;
 826         if (snd_BUG_ON(idx >= spec->num_cvts) ||
 827             snd_BUG_ON(idx >= spec->num_pins))
 828                 return -EINVAL;
 829
 830         /* save the PCM info the codec provides */
 831         codec_pars = &spec->codec_pcm_pars[idx];
 832         if (!codec_pars->rates)
 833                 *codec_pars = *hinfo;
 834
 835         eld = &spec->sink_eld[idx];
 836         if (!static_hdmi_pcm && eld->eld_valid && eld->sad_count > 0) {
 837                 hdmi_eld_update_pcm_info(eld, hinfo, codec_pars);
 838                 if (hinfo->channels_min > hinfo->channels_max ||
 839                     !hinfo->rates || !hinfo->formats)
 840                         return -ENODEV;
 841         } else {
 842                 /* fallback to the codec default */
 843                 hinfo->channels_max = codec_pars->channels_max;
 844                 hinfo->rates = codec_pars->rates;
 845                 hinfo->formats = codec_pars->formats;
 846                 hinfo->maxbps = codec_pars->maxbps;
 847         }
 848         /* store the updated parameters */
 849         runtime->hw.channels_min = hinfo->channels_min;
 850         runtime->hw.channels_max = hinfo->channels_max;
 851         runtime->hw.formats = hinfo->formats;
 852         runtime->hw.rates = hinfo->rates;
 853
 854         snd_pcm_hw_constraint_step(substream->runtime, 0,
 855                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
 856         return 0;
 857 }
 858
 859 /*
 860  * HDA/HDMI auto parsing
 861  */
 862 static int hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
 863 {
 864         struct hdmi_spec *spec = codec->spec;
 865         hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
 866         int conn_len, curr;
 867         int index;
 868
 869         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
 870                 snd_printk(KERN_WARNING
 871                            "HDMI: pin %d wcaps %#x "
 872                            "does not support connection list\n",
 873                            pin_nid, get_wcaps(codec, pin_nid));
 874                 return -EINVAL;
 875         }
 876
 877         conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
 878                                            HDA_MAX_CONNECTIONS);
 879         if (conn_len > 1)
 880                 curr = snd_hda_codec_read(codec, pin_nid, 0,
 881                                           AC_VERB_GET_CONNECT_SEL, 0);
 882         else
 883                 curr = 0;
 884
 885         index = hda_node_index(spec->pin, pin_nid);
 886         if (index < 0)
 887                 return -EINVAL;
 888
 889         spec->pin_cvt[index] = conn_list[curr];
 890
 891         return 0;
 892 }
 893
 894 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
 895                                struct hdmi_eld *eld)
 896 {
 897         int present = snd_hda_pin_sense(codec, pin_nid);
 898
 899         eld->monitor_present    = !!(present & AC_PINSENSE_PRESENCE);
 900         eld->eld_valid          = !!(present & AC_PINSENSE_ELDV);
 901
 902         if (present & AC_PINSENSE_ELDV)
 903                 hdmi_get_show_eld(codec, pin_nid, eld);
 904 }
 905
 906 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 907 {
 908         struct hdmi_spec *spec = codec->spec;
 909
 910         if (spec->num_pins >= MAX_HDMI_PINS) {
 911                 snd_printk(KERN_WARNING
 912                            "HDMI: no space for pin %d\n", pin_nid);
 913                 return -E2BIG;
 914         }
 915
 916         hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
 917
 918         spec->pin[spec->num_pins] = pin_nid;
 919         spec->num_pins++;
 920
 921         return hdmi_read_pin_conn(codec, pin_nid);
 922 }
 923
 924 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
 925 {
 926         int i, found_pin = 0;
 927         struct hdmi_spec *spec = codec->spec;
 928
 929         for (i = 0; i < spec->num_pins; i++)
 930                 if (nid == spec->pin_cvt[i]) {
 931                         found_pin = 1;
 932                         break;
 933                 }
 934
 935         if (!found_pin) {
 936                 snd_printdd("HDMI: Skipping node %d (no connection)\n", nid);
 937                 return -EINVAL;
 938         }
 939
 940         if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
 941                 return -E2BIG;
 942
 943         spec->cvt[spec->num_cvts] = nid;
 944         spec->num_cvts++;
 945
 946         return 0;
 947 }
 948
 949 static int hdmi_parse_codec(struct hda_codec *codec)
 950 {
 951         hda_nid_t nid;
 952         int i, nodes;
 953         int num_tmp_cvts = 0;
 954         hda_nid_t tmp_cvt[MAX_HDMI_CVTS];
 955
 956         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
 957         if (!nid || nodes < 0) {
 958                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
 959                 return -EINVAL;
 960         }
 961
 962         for (i = 0; i < nodes; i++, nid++) {
 963                 unsigned int caps;
 964                 unsigned int type;
 965                 unsigned int config;
 966
 967                 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
 968                 type = get_wcaps_type(caps);
 969
 970                 if (!(caps & AC_WCAP_DIGITAL))
 971                         continue;
 972
 973                 switch (type) {
 974                 case AC_WID_AUD_OUT:
 975                         if (num_tmp_cvts >= MAX_HDMI_CVTS) {
 976                                 snd_printk(KERN_WARNING
 977                                            "HDMI: no space for converter %d\n", nid);
 978                                 continue;
 979                         }
 980                         tmp_cvt[num_tmp_cvts] = nid;
 981                         num_tmp_cvts++;
 982                         break;
 983                 case AC_WID_PIN:
 984                         caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
 985                         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
 986                                 continue;
 987
 988                         config = snd_hda_codec_read(codec, nid, 0,
 989                                              AC_VERB_GET_CONFIG_DEFAULT, 0);
 990                         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
 991                                 continue;
 992
 993                         hdmi_add_pin(codec, nid);
 994                         break;
 995                 }
 996         }
 997
 998         for (i = 0; i < num_tmp_cvts; i++)
 999                 hdmi_add_cvt(codec, tmp_cvt[i]);
1000
1001         /*
1002          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1003          * can be lost and presence sense verb will become inaccurate if the
1004          * HDA link is powered off at hot plug or hw initialization time.
1005          */
1006 #ifdef CONFIG_SND_HDA_POWER_SAVE
1007         if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1008               AC_PWRST_EPSS))
1009                 codec->bus->power_keep_link_on = 1;
1010 #endif
1011
1012         return 0;
1013 }
1014
1015 /*
1016  */
1017 static char *generic_hdmi_pcm_names[MAX_HDMI_CVTS] = {
1018         "HDMI 0",
1019         "HDMI 1",
1020         "HDMI 2",
1021 };
1022
1023 /*
1024  * HDMI callbacks
1025  */
1026
1027 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1028                                            struct hda_codec *codec,
1029                                            unsigned int stream_tag,
1030                                            unsigned int format,
1031                                            struct snd_pcm_substream *substream)
1032 {
1033         hdmi_set_channel_count(codec, hinfo->nid,
1034                                substream->runtime->channels);
1035
1036         hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
1037
1038         return hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
1039 }
1040
1041 static struct hda_pcm_stream generic_hdmi_pcm_playback = {
1042         .substreams = 1,
1043         .channels_min = 2,
1044         .ops = {
1045                 .open = hdmi_pcm_open,
1046                 .prepare = generic_hdmi_playback_pcm_prepare,
1047         },
1048 };
1049
1050 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1051 {
1052         struct hdmi_spec *spec = codec->spec;
1053         struct hda_pcm *info = spec->pcm_rec;
1054         int i;
1055
1056         codec->num_pcms = spec->num_cvts;
1057         codec->pcm_info = info;
1058
1059         for (i = 0; i < codec->num_pcms; i++, info++) {
1060                 unsigned int chans;
1061                 struct hda_pcm_stream *pstr;
1062
1063                 chans = get_wcaps(codec, spec->cvt[i]);
1064                 chans = get_wcaps_channels(chans);
1065
1066                 info->name = generic_hdmi_pcm_names[i];
1067                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1068                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1069                 if (spec->pcm_playback)
1070                         *pstr = *spec->pcm_playback;
1071                 else
1072                         *pstr = generic_hdmi_pcm_playback;
1073                 pstr->nid = spec->cvt[i];
1074                 if (pstr->channels_max <= 2 && chans && chans <= 16)
1075                         pstr->channels_max = chans;
1076         }
1077
1078         return 0;
1079 }
1080
1081 static int generic_hdmi_build_controls(struct hda_codec *codec)
1082 {
1083         struct hdmi_spec *spec = codec->spec;
1084         int err;
1085         int i;
1086
1087         for (i = 0; i < codec->num_pcms; i++) {
1088                 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
1089                 if (err < 0)
1090                         return err;
1091         }
1092
1093         return 0;
1094 }
1095
1096 static int generic_hdmi_init(struct hda_codec *codec)
1097 {
1098         struct hdmi_spec *spec = codec->spec;
1099         int i;
1100
1101         for (i = 0; spec->pin[i]; i++) {
1102                 hdmi_enable_output(codec, spec->pin[i]);
1103                 snd_hda_codec_write(codec, spec->pin[i], 0,
1104                                     AC_VERB_SET_UNSOLICITED_ENABLE,
1105                                     AC_USRSP_EN | spec->pin[i]);
1106         }
1107         return 0;
1108 }
1109
1110 static void generic_hdmi_free(struct hda_codec *codec)
1111 {
1112         struct hdmi_spec *spec = codec->spec;
1113         int i;
1114
1115         for (i = 0; i < spec->num_pins; i++)
1116                 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
1117
1118         kfree(spec);
1119 }
1120
1121 static struct hda_codec_ops generic_hdmi_patch_ops = {
1122         .init                   = generic_hdmi_init,
1123         .free                   = generic_hdmi_free,
1124         .build_pcms             = generic_hdmi_build_pcms,
1125         .build_controls         = generic_hdmi_build_controls,
1126         .unsol_event            = hdmi_unsol_event,
1127 };
1128
1129 static int patch_generic_hdmi(struct hda_codec *codec)
1130 {
1131         struct hdmi_spec *spec;
1132         int i;
1133
1134         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1135         if (spec == NULL)
1136                 return -ENOMEM;
1137
1138         codec->spec = spec;
1139         if (hdmi_parse_codec(codec) < 0) {
1140                 codec->spec = NULL;
1141                 kfree(spec);
1142                 return -EINVAL;
1143         }
1144         codec->patch_ops = generic_hdmi_patch_ops;
1145
1146         for (i = 0; i < spec->num_pins; i++)
1147                 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
1148
1149         init_channel_allocations();
1150
1151         return 0;
1152 }
1153
1154 /*
1155  * Nvidia specific implementations
1156  */
1157
1158 #define Nv_VERB_SET_Channel_Allocation          0xF79
1159 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
1160 #define Nv_VERB_SET_Audio_Protection_On         0xF98
1161 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
1162
1163 #define nvhdmi_master_con_nid_7x        0x04
1164 #define nvhdmi_master_pin_nid_7x        0x05
1165
1166 static hda_nid_t nvhdmi_con_nids_7x[4] = {
1167         /*front, rear, clfe, rear_surr */
1168         0x6, 0x8, 0xa, 0xc,
1169 };
1170
1171 static struct hda_verb nvhdmi_basic_init_7x[] = {
1172         /* set audio protect on */
1173         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1174         /* enable digital output on pin widget */
1175         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1176         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1177         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1178         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1179         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1180         {} /* terminator */
1181 };
1182
1183 #ifdef LIMITED_RATE_FMT_SUPPORT
1184 /* support only the safe format and rate */
1185 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
1186 #define SUPPORTED_MAXBPS        16
1187 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
1188 #else
1189 /* support all rates and formats */
1190 #define SUPPORTED_RATES \
1191         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1192         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1193          SNDRV_PCM_RATE_192000)
1194 #define SUPPORTED_MAXBPS        24
1195 #define SUPPORTED_FORMATS \
1196         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1197 #endif
1198
1199 static int nvhdmi_7x_init(struct hda_codec *codec)
1200 {
1201         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1202         return 0;
1203 }
1204
1205 static unsigned int channels_2_6_8[] = {
1206         2, 6, 8
1207 };
1208
1209 static unsigned int channels_2_8[] = {
1210         2, 8
1211 };
1212
1213 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1214         .count = ARRAY_SIZE(channels_2_6_8),
1215         .list = channels_2_6_8,
1216         .mask = 0,
1217 };
1218
1219 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1220         .count = ARRAY_SIZE(channels_2_8),
1221         .list = channels_2_8,
1222         .mask = 0,
1223 };
1224
1225 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1226                                     struct hda_codec *codec,
1227                                     struct snd_pcm_substream *substream)
1228 {
1229         struct hdmi_spec *spec = codec->spec;
1230         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1231
1232         switch (codec->preset->id) {
1233         case 0x10de0002:
1234         case 0x10de0003:
1235         case 0x10de0005:
1236         case 0x10de0006:
1237                 hw_constraints_channels = &hw_constraints_2_8_channels;
1238                 break;
1239         case 0x10de0007:
1240                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1241                 break;
1242         default:
1243                 break;
1244         }
1245
1246         if (hw_constraints_channels != NULL) {
1247                 snd_pcm_hw_constraint_list(substream->runtime, 0,
1248                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1249                                 hw_constraints_channels);
1250         } else {
1251                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1252                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1253         }
1254
1255         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1256 }
1257
1258 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1259                                      struct hda_codec *codec,
1260                                      struct snd_pcm_substream *substream)
1261 {
1262         struct hdmi_spec *spec = codec->spec;
1263         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1264 }
1265
1266 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1267                                        struct hda_codec *codec,
1268                                        unsigned int stream_tag,
1269                                        unsigned int format,
1270                                        struct snd_pcm_substream *substream)
1271 {
1272         struct hdmi_spec *spec = codec->spec;
1273         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1274                                              stream_tag, format, substream);
1275 }
1276
1277 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1278                                    struct hda_codec *codec,
1279                                    struct snd_pcm_substream *substream)
1280 {
1281         struct hdmi_spec *spec = codec->spec;
1282         int i;
1283
1284         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1285                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1286         for (i = 0; i < 4; i++) {
1287                 /* set the stream id */
1288                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1289                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
1290                 /* set the stream format */
1291                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1292                                 AC_VERB_SET_STREAM_FORMAT, 0);
1293         }
1294
1295         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1296 }
1297
1298 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1299                                      struct hda_codec *codec,
1300                                      unsigned int stream_tag,
1301                                      unsigned int format,
1302                                      struct snd_pcm_substream *substream)
1303 {
1304         int chs;
1305         unsigned int dataDCC1, dataDCC2, chan, chanmask, channel_id;
1306         int i;
1307
1308         mutex_lock(&codec->spdif_mutex);
1309
1310         chs = substream->runtime->channels;
1311         chan = chs ? (chs - 1) : 1;
1312
1313         switch (chs) {
1314         default:
1315         case 0:
1316         case 2:
1317                 chanmask = 0x00;
1318                 break;
1319         case 4:
1320                 chanmask = 0x08;
1321                 break;
1322         case 6:
1323                 chanmask = 0x0b;
1324                 break;
1325         case 8:
1326                 chanmask = 0x13;
1327                 break;
1328         }
1329         dataDCC1 = AC_DIG1_ENABLE | AC_DIG1_COPYRIGHT;
1330         dataDCC2 = 0x2;
1331
1332         /* set the Audio InforFrame Channel Allocation */
1333         snd_hda_codec_write(codec, 0x1, 0,
1334                         Nv_VERB_SET_Channel_Allocation, chanmask);
1335
1336         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1337         if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE))
1338                 snd_hda_codec_write(codec,
1339                                 nvhdmi_master_con_nid_7x,
1340                                 0,
1341                                 AC_VERB_SET_DIGI_CONVERT_1,
1342                                 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
1343
1344         /* set the stream id */
1345         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1346                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1347
1348         /* set the stream format */
1349         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1350                         AC_VERB_SET_STREAM_FORMAT, format);
1351
1352         /* turn on again (if needed) */
1353         /* enable and set the channel status audio/data flag */
1354         if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) {
1355                 snd_hda_codec_write(codec,
1356                                 nvhdmi_master_con_nid_7x,
1357                                 0,
1358                                 AC_VERB_SET_DIGI_CONVERT_1,
1359                                 codec->spdif_ctls & 0xff);
1360                 snd_hda_codec_write(codec,
1361                                 nvhdmi_master_con_nid_7x,
1362                                 0,
1363                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1364         }
1365
1366         for (i = 0; i < 4; i++) {
1367                 if (chs == 2)
1368                         channel_id = 0;
1369                 else
1370                         channel_id = i * 2;
1371
1372                 /* turn off SPDIF once;
1373                  *otherwise the IEC958 bits won't be updated
1374                  */
1375                 if (codec->spdif_status_reset &&
1376                 (codec->spdif_ctls & AC_DIG1_ENABLE))
1377                         snd_hda_codec_write(codec,
1378                                 nvhdmi_con_nids_7x[i],
1379                                 0,
1380                                 AC_VERB_SET_DIGI_CONVERT_1,
1381                                 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
1382                 /* set the stream id */
1383                 snd_hda_codec_write(codec,
1384                                 nvhdmi_con_nids_7x[i],
1385                                 0,
1386                                 AC_VERB_SET_CHANNEL_STREAMID,
1387                                 (stream_tag << 4) | channel_id);
1388                 /* set the stream format */
1389                 snd_hda_codec_write(codec,
1390                                 nvhdmi_con_nids_7x[i],
1391                                 0,
1392                                 AC_VERB_SET_STREAM_FORMAT,
1393                                 format);
1394                 /* turn on again (if needed) */
1395                 /* enable and set the channel status audio/data flag */
1396                 if (codec->spdif_status_reset &&
1397                 (codec->spdif_ctls & AC_DIG1_ENABLE)) {
1398                         snd_hda_codec_write(codec,
1399                                         nvhdmi_con_nids_7x[i],
1400                                         0,
1401                                         AC_VERB_SET_DIGI_CONVERT_1,
1402                                         codec->spdif_ctls & 0xff);
1403                         snd_hda_codec_write(codec,
1404                                         nvhdmi_con_nids_7x[i],
1405                                         0,
1406                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1407                 }
1408         }
1409
1410         /* set the Audio Info Frame Checksum */
1411         snd_hda_codec_write(codec, 0x1, 0,
1412                         Nv_VERB_SET_Info_Frame_Checksum,
1413                         (0x71 - chan - chanmask));
1414
1415         mutex_unlock(&codec->spdif_mutex);
1416         return 0;
1417 }
1418
1419 static struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1420         .substreams = 1,
1421         .channels_min = 2,
1422         .channels_max = 8,
1423         .nid = nvhdmi_master_con_nid_7x,
1424         .rates = SUPPORTED_RATES,
1425         .maxbps = SUPPORTED_MAXBPS,
1426         .formats = SUPPORTED_FORMATS,
1427         .ops = {
1428                 .open = simple_playback_pcm_open,
1429                 .close = nvhdmi_8ch_7x_pcm_close,
1430                 .prepare = nvhdmi_8ch_7x_pcm_prepare
1431         },
1432 };
1433
1434 static struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1435         .substreams = 1,
1436         .channels_min = 2,
1437         .channels_max = 2,
1438         .nid = nvhdmi_master_con_nid_7x,
1439         .rates = SUPPORTED_RATES,
1440         .maxbps = SUPPORTED_MAXBPS,
1441         .formats = SUPPORTED_FORMATS,
1442         .ops = {
1443                 .open = simple_playback_pcm_open,
1444                 .close = simple_playback_pcm_close,
1445                 .prepare = simple_playback_pcm_prepare
1446         },
1447 };
1448
1449 static struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1450         .build_controls = generic_hdmi_build_controls,
1451         .build_pcms = generic_hdmi_build_pcms,
1452         .init = nvhdmi_7x_init,
1453         .free = generic_hdmi_free,
1454 };
1455
1456 static struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1457         .build_controls = generic_hdmi_build_controls,
1458         .build_pcms = generic_hdmi_build_pcms,
1459         .init = nvhdmi_7x_init,
1460         .free = generic_hdmi_free,
1461 };
1462
1463 static int patch_nvhdmi_8ch_89(struct hda_codec *codec)
1464 {
1465         struct hdmi_spec *spec;
1466         int err = patch_generic_hdmi(codec);
1467
1468         if (err < 0)
1469                 return err;
1470         spec = codec->spec;
1471         spec->old_pin_detect = 1;
1472         return 0;
1473 }
1474
1475 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1476 {
1477         struct hdmi_spec *spec;
1478
1479         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1480         if (spec == NULL)
1481                 return -ENOMEM;
1482
1483         codec->spec = spec;
1484
1485         spec->multiout.num_dacs = 0;  /* no analog */
1486         spec->multiout.max_channels = 2;
1487         spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1488         spec->old_pin_detect = 1;
1489         spec->num_cvts = 1;
1490         spec->cvt[0] = nvhdmi_master_con_nid_7x;
1491         spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1492
1493         codec->patch_ops = nvhdmi_patch_ops_2ch;
1494
1495         return 0;
1496 }
1497
1498 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1499 {
1500         struct hdmi_spec *spec;
1501         int err = patch_nvhdmi_2ch(codec);
1502
1503         if (err < 0)
1504                 return err;
1505         spec = codec->spec;
1506         spec->multiout.max_channels = 8;
1507         spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1508         codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1509         return 0;
1510 }
1511
1512 /*
1513  * ATI-specific implementations
1514  *
1515  * FIXME: we may omit the whole this and use the generic code once after
1516  * it's confirmed to work.
1517  */
1518
1519 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
1520 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
1521
1522 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1523                                         struct hda_codec *codec,
1524                                         unsigned int stream_tag,
1525                                         unsigned int format,
1526                                         struct snd_pcm_substream *substream)
1527 {
1528         struct hdmi_spec *spec = codec->spec;
1529         int chans = substream->runtime->channels;
1530         int i, err;
1531
1532         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1533                                           substream);
1534         if (err < 0)
1535                 return err;
1536         snd_hda_codec_write(codec, spec->cvt[0], 0, AC_VERB_SET_CVT_CHAN_COUNT,
1537                             chans - 1);
1538         /* FIXME: XXX */
1539         for (i = 0; i < chans; i++) {
1540                 snd_hda_codec_write(codec, spec->cvt[0], 0,
1541                                     AC_VERB_SET_HDMI_CHAN_SLOT,
1542                                     (i << 4) | i);
1543         }
1544         return 0;
1545 }
1546
1547 static struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1548         .substreams = 1,
1549         .channels_min = 2,
1550         .channels_max = 2,
1551         .nid = ATIHDMI_CVT_NID,
1552         .ops = {
1553                 .open = simple_playback_pcm_open,
1554                 .close = simple_playback_pcm_close,
1555                 .prepare = atihdmi_playback_pcm_prepare
1556         },
1557 };
1558
1559 static struct hda_verb atihdmi_basic_init[] = {
1560         /* enable digital output on pin widget */
1561         { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1562         {} /* terminator */
1563 };
1564
1565 static int atihdmi_init(struct hda_codec *codec)
1566 {
1567         struct hdmi_spec *spec = codec->spec;
1568
1569         snd_hda_sequence_write(codec, atihdmi_basic_init);
1570         /* SI codec requires to unmute the pin */
1571         if (get_wcaps(codec, spec->pin[0]) & AC_WCAP_OUT_AMP)
1572                 snd_hda_codec_write(codec, spec->pin[0], 0,
1573                                     AC_VERB_SET_AMP_GAIN_MUTE,
1574                                     AMP_OUT_UNMUTE);
1575         return 0;
1576 }
1577
1578 static struct hda_codec_ops atihdmi_patch_ops = {
1579         .build_controls = generic_hdmi_build_controls,
1580         .build_pcms = generic_hdmi_build_pcms,
1581         .init = atihdmi_init,
1582         .free = generic_hdmi_free,
1583 };
1584
1585
1586 static int patch_atihdmi(struct hda_codec *codec)
1587 {
1588         struct hdmi_spec *spec;
1589
1590         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1591         if (spec == NULL)
1592                 return -ENOMEM;
1593
1594         codec->spec = spec;
1595
1596         spec->multiout.num_dacs = 0;      /* no analog */
1597         spec->multiout.max_channels = 2;
1598         spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1599         spec->num_cvts = 1;
1600         spec->cvt[0] = ATIHDMI_CVT_NID;
1601         spec->pin[0] = ATIHDMI_PIN_NID;
1602         spec->pcm_playback = &atihdmi_pcm_digital_playback;
1603
1604         codec->patch_ops = atihdmi_patch_ops;
1605
1606         return 0;
1607 }
1608
1609
1610 /*
1611  * patch entries
1612  */
1613 static struct hda_codec_preset snd_hda_preset_hdmi[] = {
1614 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1615 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1616 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
1617 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
1618 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
1619 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
1620 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
1621 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1622 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1623 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1624 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1625 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
1626 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1627 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1628 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi_8ch_89 },
1629 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1630 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1631 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1632 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1633 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1634 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1635 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1636 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1637 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1638 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1639 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1640 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1641 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1642 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1643 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1644 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1645 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
1646 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
1647 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1648 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
1649 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
1650 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
1651 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1652 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1653 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
1654 {} /* terminator */
1655 };
1656
1657 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1658 MODULE_ALIAS("snd-hda-codec-id:10027919");
1659 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1660 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1661 MODULE_ALIAS("snd-hda-codec-id:10951390");
1662 MODULE_ALIAS("snd-hda-codec-id:10951392");
1663 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1664 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1665 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1666 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1667 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1668 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1669 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1670 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1671 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1672 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1673 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1674 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1675 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1676 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1677 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1678 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1679 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1680 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1681 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1682 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1683 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1684 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1685 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1686 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1687 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1688 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1689 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1690 MODULE_ALIAS("snd-hda-codec-id:80860054");
1691 MODULE_ALIAS("snd-hda-codec-id:80862801");
1692 MODULE_ALIAS("snd-hda-codec-id:80862802");
1693 MODULE_ALIAS("snd-hda-codec-id:80862803");
1694 MODULE_ALIAS("snd-hda-codec-id:80862804");
1695 MODULE_ALIAS("snd-hda-codec-id:80862805");
1696 MODULE_ALIAS("snd-hda-codec-id:808629fb");
1697
1698 MODULE_LICENSE("GPL");
1699 MODULE_DESCRIPTION("HDMI HD-audio codec");
1700 MODULE_ALIAS("snd-hda-codec-intelhdmi");
1701 MODULE_ALIAS("snd-hda-codec-nvhdmi");
1702 MODULE_ALIAS("snd-hda-codec-atihdmi");
1703
1704 static struct hda_codec_preset_list intel_list = {
1705         .preset = snd_hda_preset_hdmi,
1706         .owner = THIS_MODULE,
1707 };
1708
1709 static int __init patch_hdmi_init(void)
1710 {
1711         return snd_hda_add_codec_preset(&intel_list);
1712 }
1713
1714 static void __exit patch_hdmi_exit(void)
1715 {
1716         snd_hda_delete_codec_preset(&intel_list);
1717 }
1718
1719 module_init(patch_hdmi_init)
1720 module_exit(patch_hdmi_exit)