pandora: defconfig: update
[pandora-kernel.git] / sound / pci / hda / patch_hdmi.c
1 /*
2  *
3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
4  *
5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6  *  Copyright (c) 2006 ATI Technologies Inc.
7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9  *
10  *  Authors:
11  *                      Wu Fengguang <wfg@linux.intel.com>
12  *
13  *  Maintained by:
14  *                      Wu Fengguang <wfg@linux.intel.com>
15  *
16  *  This program is free software; you can redistribute it and/or modify it
17  *  under the terms of the GNU General Public License as published by the Free
18  *  Software Foundation; either version 2 of the License, or (at your option)
19  *  any later version.
20  *
21  *  This program is distributed in the hope that it will be useful, but
22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
24  *  for more details.
25  *
26  *  You should have received a copy of the GNU General Public License
27  *  along with this program; if not, write to the Free Software Foundation,
28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
29  */
30
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include "hda_codec.h"
38 #include "hda_local.h"
39
40 static bool static_hdmi_pcm;
41 module_param(static_hdmi_pcm, bool, 0644);
42 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
43
44 /*
45  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
46  * could support N independent pipes, each of them can be connected to one or
47  * more ports (DVI, HDMI or DisplayPort).
48  *
49  * The HDA correspondence of pipes/ports are converter/pin nodes.
50  */
51 #define MAX_HDMI_CVTS   4
52 #define MAX_HDMI_PINS   4
53
54 struct hdmi_spec_per_cvt {
55         hda_nid_t cvt_nid;
56         int assigned;
57         unsigned int channels_min;
58         unsigned int channels_max;
59         u32 rates;
60         u64 formats;
61         unsigned int maxbps;
62 };
63
64 struct hdmi_spec_per_pin {
65         hda_nid_t pin_nid;
66         int num_mux_nids;
67         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
68
69         struct hda_codec *codec;
70         struct hdmi_eld sink_eld;
71         struct delayed_work work;
72         int repoll_count;
73 };
74
75 struct hdmi_spec {
76         int num_cvts;
77         struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
78
79         int num_pins;
80         struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
81         struct hda_pcm pcm_rec[MAX_HDMI_PINS];
82
83         /*
84          * Non-generic ATI/NVIDIA specific
85          */
86         struct hda_multi_out multiout;
87         const struct hda_pcm_stream *pcm_playback;
88 };
89
90
91 struct hdmi_audio_infoframe {
92         u8 type; /* 0x84 */
93         u8 ver;  /* 0x01 */
94         u8 len;  /* 0x0a */
95
96         u8 checksum;
97
98         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
99         u8 SS01_SF24;
100         u8 CXT04;
101         u8 CA;
102         u8 LFEPBL01_LSV36_DM_INH7;
103 };
104
105 struct dp_audio_infoframe {
106         u8 type; /* 0x84 */
107         u8 len;  /* 0x1b */
108         u8 ver;  /* 0x11 << 2 */
109
110         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
111         u8 SS01_SF24;
112         u8 CXT04;
113         u8 CA;
114         u8 LFEPBL01_LSV36_DM_INH7;
115 };
116
117 union audio_infoframe {
118         struct hdmi_audio_infoframe hdmi;
119         struct dp_audio_infoframe dp;
120         u8 bytes[0];
121 };
122
123 /*
124  * CEA speaker placement:
125  *
126  *        FLH       FCH        FRH
127  *  FLW    FL  FLC   FC   FRC   FR   FRW
128  *
129  *                                  LFE
130  *                     TC
131  *
132  *          RL  RLC   RC   RRC   RR
133  *
134  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
135  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
136  */
137 enum cea_speaker_placement {
138         FL  = (1 <<  0),        /* Front Left           */
139         FC  = (1 <<  1),        /* Front Center         */
140         FR  = (1 <<  2),        /* Front Right          */
141         FLC = (1 <<  3),        /* Front Left Center    */
142         FRC = (1 <<  4),        /* Front Right Center   */
143         RL  = (1 <<  5),        /* Rear Left            */
144         RC  = (1 <<  6),        /* Rear Center          */
145         RR  = (1 <<  7),        /* Rear Right           */
146         RLC = (1 <<  8),        /* Rear Left Center     */
147         RRC = (1 <<  9),        /* Rear Right Center    */
148         LFE = (1 << 10),        /* Low Frequency Effect */
149         FLW = (1 << 11),        /* Front Left Wide      */
150         FRW = (1 << 12),        /* Front Right Wide     */
151         FLH = (1 << 13),        /* Front Left High      */
152         FCH = (1 << 14),        /* Front Center High    */
153         FRH = (1 << 15),        /* Front Right High     */
154         TC  = (1 << 16),        /* Top Center           */
155 };
156
157 /*
158  * ELD SA bits in the CEA Speaker Allocation data block
159  */
160 static int eld_speaker_allocation_bits[] = {
161         [0] = FL | FR,
162         [1] = LFE,
163         [2] = FC,
164         [3] = RL | RR,
165         [4] = RC,
166         [5] = FLC | FRC,
167         [6] = RLC | RRC,
168         /* the following are not defined in ELD yet */
169         [7] = FLW | FRW,
170         [8] = FLH | FRH,
171         [9] = TC,
172         [10] = FCH,
173 };
174
175 struct cea_channel_speaker_allocation {
176         int ca_index;
177         int speakers[8];
178
179         /* derived values, just for convenience */
180         int channels;
181         int spk_mask;
182 };
183
184 /*
185  * ALSA sequence is:
186  *
187  *       surround40   surround41   surround50   surround51   surround71
188  * ch0   front left   =            =            =            =
189  * ch1   front right  =            =            =            =
190  * ch2   rear left    =            =            =            =
191  * ch3   rear right   =            =            =            =
192  * ch4                LFE          center       center       center
193  * ch5                                          LFE          LFE
194  * ch6                                                       side left
195  * ch7                                                       side right
196  *
197  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
198  */
199 static int hdmi_channel_mapping[0x32][8] = {
200         /* stereo */
201         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
202         /* 2.1 */
203         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
204         /* Dolby Surround */
205         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
206         /* surround40 */
207         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
208         /* 4ch */
209         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
210         /* surround41 */
211         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
212         /* surround50 */
213         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
214         /* surround51 */
215         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
216         /* 7.1 */
217         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
218 };
219
220 /*
221  * This is an ordered list!
222  *
223  * The preceding ones have better chances to be selected by
224  * hdmi_channel_allocation().
225  */
226 static struct cea_channel_speaker_allocation channel_allocations[] = {
227 /*                        channel:   7     6    5    4    3     2    1    0  */
228 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
229                                  /* 2.1 */
230 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
231                                  /* Dolby Surround */
232 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
233                                  /* surround40 */
234 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
235                                  /* surround41 */
236 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
237                                  /* surround50 */
238 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
239                                  /* surround51 */
240 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
241                                  /* 6.1 */
242 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
243                                  /* surround71 */
244 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
245
246 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
247 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
248 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
249 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
250 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
251 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
252 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
253 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
254 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
255 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
256 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
257 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
258 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
259 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
260 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
261 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
262 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
263 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
264 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
265 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
266 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
267 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
268 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
269 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
270 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
271 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
272 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
273 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
274 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
275 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
276 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
277 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
278 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
279 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
280 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
281 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
282 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
283 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
284 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
285 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
286 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
287 };
288
289
290 /*
291  * HDMI routines
292  */
293
294 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
295 {
296         int pin_idx;
297
298         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
299                 if (spec->pins[pin_idx].pin_nid == pin_nid)
300                         return pin_idx;
301
302         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
303         return -EINVAL;
304 }
305
306 static int hinfo_to_pin_index(struct hdmi_spec *spec,
307                               struct hda_pcm_stream *hinfo)
308 {
309         int pin_idx;
310
311         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
312                 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
313                         return pin_idx;
314
315         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
316         return -EINVAL;
317 }
318
319 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
320 {
321         int cvt_idx;
322
323         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
324                 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
325                         return cvt_idx;
326
327         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
328         return -EINVAL;
329 }
330
331 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
332                         struct snd_ctl_elem_info *uinfo)
333 {
334         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
335         struct hdmi_spec *spec;
336         int pin_idx;
337
338         spec = codec->spec;
339         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
340
341         pin_idx = kcontrol->private_value;
342         uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
343
344         return 0;
345 }
346
347 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
348                         struct snd_ctl_elem_value *ucontrol)
349 {
350         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
351         struct hdmi_spec *spec;
352         int pin_idx;
353
354         spec = codec->spec;
355         pin_idx = kcontrol->private_value;
356
357         memcpy(ucontrol->value.bytes.data,
358                 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
359
360         return 0;
361 }
362
363 static struct snd_kcontrol_new eld_bytes_ctl = {
364         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
365         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
366         .name = "ELD",
367         .info = hdmi_eld_ctl_info,
368         .get = hdmi_eld_ctl_get,
369 };
370
371 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
372                         int device)
373 {
374         struct snd_kcontrol *kctl;
375         struct hdmi_spec *spec = codec->spec;
376         int err;
377
378         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
379         if (!kctl)
380                 return -ENOMEM;
381         kctl->private_value = pin_idx;
382         kctl->id.device = device;
383
384         err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
385         if (err < 0)
386                 return err;
387
388         return 0;
389 }
390
391 #ifdef BE_PARANOID
392 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
393                                 int *packet_index, int *byte_index)
394 {
395         int val;
396
397         val = snd_hda_codec_read(codec, pin_nid, 0,
398                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
399
400         *packet_index = val >> 5;
401         *byte_index = val & 0x1f;
402 }
403 #endif
404
405 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
406                                 int packet_index, int byte_index)
407 {
408         int val;
409
410         val = (packet_index << 5) | (byte_index & 0x1f);
411
412         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
413 }
414
415 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
416                                 unsigned char val)
417 {
418         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
419 }
420
421 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
422 {
423         /* Unmute */
424         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
425                 snd_hda_codec_write(codec, pin_nid, 0,
426                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
427         /* Enable pin out: some machines with GM965 gets broken output when
428          * the pin is disabled or changed while using with HDMI
429          */
430         snd_hda_codec_write(codec, pin_nid, 0,
431                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
432 }
433
434 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
435 {
436         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
437                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
438 }
439
440 static void hdmi_set_channel_count(struct hda_codec *codec,
441                                    hda_nid_t cvt_nid, int chs)
442 {
443         if (chs != hdmi_get_channel_count(codec, cvt_nid))
444                 snd_hda_codec_write(codec, cvt_nid, 0,
445                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
446 }
447
448
449 /*
450  * Channel mapping routines
451  */
452
453 /*
454  * Compute derived values in channel_allocations[].
455  */
456 static void init_channel_allocations(void)
457 {
458         int i, j;
459         struct cea_channel_speaker_allocation *p;
460
461         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
462                 p = channel_allocations + i;
463                 p->channels = 0;
464                 p->spk_mask = 0;
465                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
466                         if (p->speakers[j]) {
467                                 p->channels++;
468                                 p->spk_mask |= p->speakers[j];
469                         }
470         }
471 }
472
473 /*
474  * The transformation takes two steps:
475  *
476  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
477  *            spk_mask => (channel_allocations[])         => ai->CA
478  *
479  * TODO: it could select the wrong CA from multiple candidates.
480 */
481 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
482 {
483         int i;
484         int ca = 0;
485         int spk_mask = 0;
486         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
487
488         /*
489          * CA defaults to 0 for basic stereo audio
490          */
491         if (channels <= 2)
492                 return 0;
493
494         /*
495          * expand ELD's speaker allocation mask
496          *
497          * ELD tells the speaker mask in a compact(paired) form,
498          * expand ELD's notions to match the ones used by Audio InfoFrame.
499          */
500         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
501                 if (eld->spk_alloc & (1 << i))
502                         spk_mask |= eld_speaker_allocation_bits[i];
503         }
504
505         /* search for the first working match in the CA table */
506         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
507                 if (channels == channel_allocations[i].channels &&
508                     (spk_mask & channel_allocations[i].spk_mask) ==
509                                 channel_allocations[i].spk_mask) {
510                         ca = channel_allocations[i].ca_index;
511                         break;
512                 }
513         }
514
515         if (!ca) {
516                 /* if there was no match, select the regular ALSA channel
517                  * allocation with the matching number of channels */
518                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
519                         if (channels == channel_allocations[i].channels) {
520                                 ca = channel_allocations[i].ca_index;
521                                 break;
522                         }
523                 }
524         }
525
526         snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
527         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
528                     ca, channels, buf);
529
530         return ca;
531 }
532
533 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
534                                        hda_nid_t pin_nid)
535 {
536 #ifdef CONFIG_SND_DEBUG_VERBOSE
537         int i;
538         int slot;
539
540         for (i = 0; i < 8; i++) {
541                 slot = snd_hda_codec_read(codec, pin_nid, 0,
542                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
543                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
544                                                 slot >> 4, slot & 0xf);
545         }
546 #endif
547 }
548
549
550 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
551                                        hda_nid_t pin_nid,
552                                        int ca)
553 {
554         int i;
555         int err;
556
557         if (hdmi_channel_mapping[ca][1] == 0) {
558                 for (i = 0; i < channel_allocations[ca].channels; i++)
559                         hdmi_channel_mapping[ca][i] = i | (i << 4);
560                 for (; i < 8; i++)
561                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
562         }
563
564         for (i = 0; i < 8; i++) {
565                 err = snd_hda_codec_write(codec, pin_nid, 0,
566                                           AC_VERB_SET_HDMI_CHAN_SLOT,
567                                           hdmi_channel_mapping[ca][i]);
568                 if (err) {
569                         snd_printdd(KERN_NOTICE
570                                     "HDMI: channel mapping failed\n");
571                         break;
572                 }
573         }
574
575         hdmi_debug_channel_mapping(codec, pin_nid);
576 }
577
578
579 /*
580  * Audio InfoFrame routines
581  */
582
583 /*
584  * Enable Audio InfoFrame Transmission
585  */
586 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
587                                        hda_nid_t pin_nid)
588 {
589         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
590         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
591                                                 AC_DIPXMIT_BEST);
592 }
593
594 /*
595  * Disable Audio InfoFrame Transmission
596  */
597 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
598                                       hda_nid_t pin_nid)
599 {
600         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
601         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
602                                                 AC_DIPXMIT_DISABLE);
603 }
604
605 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
606 {
607 #ifdef CONFIG_SND_DEBUG_VERBOSE
608         int i;
609         int size;
610
611         size = snd_hdmi_get_eld_size(codec, pin_nid);
612         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
613
614         for (i = 0; i < 8; i++) {
615                 size = snd_hda_codec_read(codec, pin_nid, 0,
616                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
617                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
618         }
619 #endif
620 }
621
622 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
623 {
624 #ifdef BE_PARANOID
625         int i, j;
626         int size;
627         int pi, bi;
628         for (i = 0; i < 8; i++) {
629                 size = snd_hda_codec_read(codec, pin_nid, 0,
630                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
631                 if (size == 0)
632                         continue;
633
634                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
635                 for (j = 1; j < 1000; j++) {
636                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
637                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
638                         if (pi != i)
639                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
640                                                 bi, pi, i);
641                         if (bi == 0) /* byte index wrapped around */
642                                 break;
643                 }
644                 snd_printd(KERN_INFO
645                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
646                         i, size, j);
647         }
648 #endif
649 }
650
651 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
652 {
653         u8 *bytes = (u8 *)hdmi_ai;
654         u8 sum = 0;
655         int i;
656
657         hdmi_ai->checksum = 0;
658
659         for (i = 0; i < sizeof(*hdmi_ai); i++)
660                 sum += bytes[i];
661
662         hdmi_ai->checksum = -sum;
663 }
664
665 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
666                                       hda_nid_t pin_nid,
667                                       u8 *dip, int size)
668 {
669         int i;
670
671         hdmi_debug_dip_size(codec, pin_nid);
672         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
673
674         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
675         for (i = 0; i < size; i++)
676                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
677 }
678
679 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
680                                     u8 *dip, int size)
681 {
682         u8 val;
683         int i;
684
685         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
686                                                             != AC_DIPXMIT_BEST)
687                 return false;
688
689         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
690         for (i = 0; i < size; i++) {
691                 val = snd_hda_codec_read(codec, pin_nid, 0,
692                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
693                 if (val != dip[i])
694                         return false;
695         }
696
697         return true;
698 }
699
700 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
701                                         struct snd_pcm_substream *substream)
702 {
703         struct hdmi_spec *spec = codec->spec;
704         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
705         hda_nid_t pin_nid = per_pin->pin_nid;
706         int channels = substream->runtime->channels;
707         struct hdmi_eld *eld;
708         int ca;
709         union audio_infoframe ai;
710
711         eld = &spec->pins[pin_idx].sink_eld;
712         if (!eld->monitor_present)
713                 return;
714
715         ca = hdmi_channel_allocation(eld, channels);
716
717         memset(&ai, 0, sizeof(ai));
718         if (eld->conn_type == 0) { /* HDMI */
719                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
720
721                 hdmi_ai->type           = 0x84;
722                 hdmi_ai->ver            = 0x01;
723                 hdmi_ai->len            = 0x0a;
724                 hdmi_ai->CC02_CT47      = channels - 1;
725                 hdmi_ai->CA             = ca;
726                 hdmi_checksum_audio_infoframe(hdmi_ai);
727         } else if (eld->conn_type == 1) { /* DisplayPort */
728                 struct dp_audio_infoframe *dp_ai = &ai.dp;
729
730                 dp_ai->type             = 0x84;
731                 dp_ai->len              = 0x1b;
732                 dp_ai->ver              = 0x11 << 2;
733                 dp_ai->CC02_CT47        = channels - 1;
734                 dp_ai->CA               = ca;
735         } else {
736                 snd_printd("HDMI: unknown connection type at pin %d\n",
737                             pin_nid);
738                 return;
739         }
740
741         /*
742          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
743          * sizeof(*dp_ai) to avoid partial match/update problems when
744          * the user switches between HDMI/DP monitors.
745          */
746         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
747                                         sizeof(ai))) {
748                 snd_printdd("hdmi_setup_audio_infoframe: "
749                             "pin=%d channels=%d\n",
750                             pin_nid,
751                             channels);
752                 hdmi_setup_channel_mapping(codec, pin_nid, ca);
753                 hdmi_stop_infoframe_trans(codec, pin_nid);
754                 hdmi_fill_audio_infoframe(codec, pin_nid,
755                                             ai.bytes, sizeof(ai));
756                 hdmi_start_infoframe_trans(codec, pin_nid);
757         }
758 }
759
760
761 /*
762  * Unsolicited events
763  */
764
765 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
766
767 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
768 {
769         struct hdmi_spec *spec = codec->spec;
770         int pin_nid = res >> AC_UNSOL_RES_TAG_SHIFT;
771         int pd = !!(res & AC_UNSOL_RES_PD);
772         int eldv = !!(res & AC_UNSOL_RES_ELDV);
773         int pin_idx;
774
775         printk(KERN_INFO
776                 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
777                 codec->addr, pin_nid, pd, eldv);
778
779         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
780         if (pin_idx < 0)
781                 return;
782
783         hdmi_present_sense(&spec->pins[pin_idx], 1);
784 }
785
786 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
787 {
788         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
789         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
790         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
791         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
792
793         printk(KERN_INFO
794                 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
795                 codec->addr,
796                 tag,
797                 subtag,
798                 cp_state,
799                 cp_ready);
800
801         /* TODO */
802         if (cp_state)
803                 ;
804         if (cp_ready)
805                 ;
806 }
807
808
809 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
810 {
811         struct hdmi_spec *spec = codec->spec;
812         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
813         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
814
815         if (pin_nid_to_pin_index(spec, tag) < 0) {
816                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
817                 return;
818         }
819
820         if (subtag == 0)
821                 hdmi_intrinsic_event(codec, res);
822         else
823                 hdmi_non_intrinsic_event(codec, res);
824 }
825
826 /*
827  * Callbacks
828  */
829
830 /* HBR should be Non-PCM, 8 channels */
831 #define is_hbr_format(format) \
832         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
833
834 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
835                               hda_nid_t pin_nid, u32 stream_tag, int format)
836 {
837         int pinctl;
838         int new_pinctl = 0;
839
840         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
841                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
842                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
843
844                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
845                 if (is_hbr_format(format))
846                         new_pinctl |= AC_PINCTL_EPT_HBR;
847                 else
848                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
849
850                 snd_printdd("hdmi_setup_stream: "
851                             "NID=0x%x, %spinctl=0x%x\n",
852                             pin_nid,
853                             pinctl == new_pinctl ? "" : "new-",
854                             new_pinctl);
855
856                 if (pinctl != new_pinctl)
857                         snd_hda_codec_write(codec, pin_nid, 0,
858                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
859                                             new_pinctl);
860
861         }
862         if (is_hbr_format(format) && !new_pinctl) {
863                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
864                 return -EINVAL;
865         }
866
867         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
868         return 0;
869 }
870
871 /*
872  * HDA PCM callbacks
873  */
874 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
875                          struct hda_codec *codec,
876                          struct snd_pcm_substream *substream)
877 {
878         struct hdmi_spec *spec = codec->spec;
879         struct snd_pcm_runtime *runtime = substream->runtime;
880         int pin_idx, cvt_idx, mux_idx = 0;
881         struct hdmi_spec_per_pin *per_pin;
882         struct hdmi_eld *eld;
883         struct hdmi_spec_per_cvt *per_cvt = NULL;
884
885         /* Validate hinfo */
886         pin_idx = hinfo_to_pin_index(spec, hinfo);
887         if (snd_BUG_ON(pin_idx < 0))
888                 return -EINVAL;
889         per_pin = &spec->pins[pin_idx];
890         eld = &per_pin->sink_eld;
891
892         /* Dynamically assign converter to stream */
893         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
894                 per_cvt = &spec->cvts[cvt_idx];
895
896                 /* Must not already be assigned */
897                 if (per_cvt->assigned)
898                         continue;
899                 /* Must be in pin's mux's list of converters */
900                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
901                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
902                                 break;
903                 /* Not in mux list */
904                 if (mux_idx == per_pin->num_mux_nids)
905                         continue;
906                 break;
907         }
908         /* No free converters */
909         if (cvt_idx == spec->num_cvts)
910                 return -ENODEV;
911
912         /* Claim converter */
913         per_cvt->assigned = 1;
914         hinfo->nid = per_cvt->cvt_nid;
915
916         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
917                             AC_VERB_SET_CONNECT_SEL,
918                             mux_idx);
919         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
920
921         /* Initially set the converter's capabilities */
922         hinfo->channels_min = per_cvt->channels_min;
923         hinfo->channels_max = per_cvt->channels_max;
924         hinfo->rates = per_cvt->rates;
925         hinfo->formats = per_cvt->formats;
926         hinfo->maxbps = per_cvt->maxbps;
927
928         /* Restrict capabilities by ELD if this isn't disabled */
929         if (!static_hdmi_pcm && eld->eld_valid) {
930                 snd_hdmi_eld_update_pcm_info(eld, hinfo);
931                 if (hinfo->channels_min > hinfo->channels_max ||
932                     !hinfo->rates || !hinfo->formats) {
933                         per_cvt->assigned = 0;
934                         hinfo->nid = 0;
935                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
936                         return -ENODEV;
937                 }
938         }
939
940         /* Store the updated parameters */
941         runtime->hw.channels_min = hinfo->channels_min;
942         runtime->hw.channels_max = hinfo->channels_max;
943         runtime->hw.formats = hinfo->formats;
944         runtime->hw.rates = hinfo->rates;
945
946         snd_pcm_hw_constraint_step(substream->runtime, 0,
947                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
948         return 0;
949 }
950
951 /*
952  * HDA/HDMI auto parsing
953  */
954 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
955 {
956         struct hdmi_spec *spec = codec->spec;
957         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
958         hda_nid_t pin_nid = per_pin->pin_nid;
959
960         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
961                 snd_printk(KERN_WARNING
962                            "HDMI: pin %d wcaps %#x "
963                            "does not support connection list\n",
964                            pin_nid, get_wcaps(codec, pin_nid));
965                 return -EINVAL;
966         }
967
968         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
969                                                         per_pin->mux_nids,
970                                                         HDA_MAX_CONNECTIONS);
971
972         return 0;
973 }
974
975 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
976 {
977         struct hda_codec *codec = per_pin->codec;
978         struct hdmi_eld *eld = &per_pin->sink_eld;
979         hda_nid_t pin_nid = per_pin->pin_nid;
980         /*
981          * Always execute a GetPinSense verb here, even when called from
982          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
983          * response's PD bit is not the real PD value, but indicates that
984          * the real PD value changed. An older version of the HD-audio
985          * specification worked this way. Hence, we just ignore the data in
986          * the unsolicited response to avoid custom WARs.
987          */
988         int present = snd_hda_pin_sense(codec, pin_nid);
989         bool eld_valid = false;
990
991         memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
992
993         eld->monitor_present    = !!(present & AC_PINSENSE_PRESENCE);
994         if (eld->monitor_present)
995                 eld_valid       = !!(present & AC_PINSENSE_ELDV);
996
997         printk(KERN_INFO
998                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
999                 codec->addr, pin_nid, eld->monitor_present, eld_valid);
1000
1001         eld->eld_valid = false;
1002         if (eld_valid) {
1003                 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1004                         snd_hdmi_show_eld(eld);
1005                 else if (repoll) {
1006                         queue_delayed_work(codec->bus->workq,
1007                                            &per_pin->work,
1008                                            msecs_to_jiffies(300));
1009                 }
1010         }
1011
1012         snd_hda_input_jack_report(codec, pin_nid);
1013 }
1014
1015 static void hdmi_repoll_eld(struct work_struct *work)
1016 {
1017         struct hdmi_spec_per_pin *per_pin =
1018         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1019
1020         if (per_pin->repoll_count++ > 6)
1021                 per_pin->repoll_count = 0;
1022
1023         hdmi_present_sense(per_pin, per_pin->repoll_count);
1024 }
1025
1026 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1027 {
1028         struct hdmi_spec *spec = codec->spec;
1029         unsigned int caps, config;
1030         int pin_idx;
1031         struct hdmi_spec_per_pin *per_pin;
1032         int err;
1033
1034         caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1035         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1036                 return 0;
1037
1038         config = snd_hda_codec_read(codec, pin_nid, 0,
1039                                 AC_VERB_GET_CONFIG_DEFAULT, 0);
1040         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1041                 return 0;
1042
1043         if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1044                 return -E2BIG;
1045
1046         pin_idx = spec->num_pins;
1047         per_pin = &spec->pins[pin_idx];
1048
1049         per_pin->pin_nid = pin_nid;
1050
1051         err = hdmi_read_pin_conn(codec, pin_idx);
1052         if (err < 0)
1053                 return err;
1054
1055         spec->num_pins++;
1056
1057         return 0;
1058 }
1059
1060 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1061 {
1062         struct hdmi_spec *spec = codec->spec;
1063         int cvt_idx;
1064         struct hdmi_spec_per_cvt *per_cvt;
1065         unsigned int chans;
1066         int err;
1067
1068         if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1069                 return -E2BIG;
1070
1071         chans = get_wcaps(codec, cvt_nid);
1072         chans = get_wcaps_channels(chans);
1073
1074         cvt_idx = spec->num_cvts;
1075         per_cvt = &spec->cvts[cvt_idx];
1076
1077         per_cvt->cvt_nid = cvt_nid;
1078         per_cvt->channels_min = 2;
1079         if (chans <= 16)
1080                 per_cvt->channels_max = chans;
1081
1082         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1083                                           &per_cvt->rates,
1084                                           &per_cvt->formats,
1085                                           &per_cvt->maxbps);
1086         if (err < 0)
1087                 return err;
1088
1089         spec->num_cvts++;
1090
1091         return 0;
1092 }
1093
1094 static int hdmi_parse_codec(struct hda_codec *codec)
1095 {
1096         hda_nid_t nid;
1097         int i, nodes;
1098
1099         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1100         if (!nid || nodes < 0) {
1101                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1102                 return -EINVAL;
1103         }
1104
1105         for (i = 0; i < nodes; i++, nid++) {
1106                 unsigned int caps;
1107                 unsigned int type;
1108
1109                 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1110                 type = get_wcaps_type(caps);
1111
1112                 if (!(caps & AC_WCAP_DIGITAL))
1113                         continue;
1114
1115                 switch (type) {
1116                 case AC_WID_AUD_OUT:
1117                         hdmi_add_cvt(codec, nid);
1118                         break;
1119                 case AC_WID_PIN:
1120                         hdmi_add_pin(codec, nid);
1121                         break;
1122                 }
1123         }
1124
1125         /*
1126          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1127          * can be lost and presence sense verb will become inaccurate if the
1128          * HDA link is powered off at hot plug or hw initialization time.
1129          */
1130 #ifdef CONFIG_SND_HDA_POWER_SAVE
1131         if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1132               AC_PWRST_EPSS))
1133                 codec->bus->power_keep_link_on = 1;
1134 #endif
1135
1136         return 0;
1137 }
1138
1139 /*
1140  */
1141 static char *generic_hdmi_pcm_names[MAX_HDMI_PINS] = {
1142         "HDMI 0",
1143         "HDMI 1",
1144         "HDMI 2",
1145         "HDMI 3",
1146 };
1147
1148 /*
1149  * HDMI callbacks
1150  */
1151
1152 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1153                                            struct hda_codec *codec,
1154                                            unsigned int stream_tag,
1155                                            unsigned int format,
1156                                            struct snd_pcm_substream *substream)
1157 {
1158         hda_nid_t cvt_nid = hinfo->nid;
1159         struct hdmi_spec *spec = codec->spec;
1160         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1161         hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1162
1163         hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1164
1165         hdmi_setup_audio_infoframe(codec, pin_idx, substream);
1166
1167         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1168 }
1169
1170 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1171                                              struct hda_codec *codec,
1172                                              struct snd_pcm_substream *substream)
1173 {
1174         struct hdmi_spec *spec = codec->spec;
1175         int cvt_idx, pin_idx;
1176         struct hdmi_spec_per_cvt *per_cvt;
1177         struct hdmi_spec_per_pin *per_pin;
1178
1179         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1180
1181         if (hinfo->nid) {
1182                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1183                 if (snd_BUG_ON(cvt_idx < 0))
1184                         return -EINVAL;
1185                 per_cvt = &spec->cvts[cvt_idx];
1186
1187                 snd_BUG_ON(!per_cvt->assigned);
1188                 per_cvt->assigned = 0;
1189                 hinfo->nid = 0;
1190
1191                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1192                 if (snd_BUG_ON(pin_idx < 0))
1193                         return -EINVAL;
1194                 per_pin = &spec->pins[pin_idx];
1195
1196                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1197         }
1198
1199         return 0;
1200 }
1201
1202 static const struct hda_pcm_ops generic_ops = {
1203         .open = hdmi_pcm_open,
1204         .prepare = generic_hdmi_playback_pcm_prepare,
1205         .cleanup = generic_hdmi_playback_pcm_cleanup,
1206 };
1207
1208 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1209 {
1210         struct hdmi_spec *spec = codec->spec;
1211         int pin_idx;
1212
1213         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1214                 struct hda_pcm *info;
1215                 struct hda_pcm_stream *pstr;
1216
1217                 info = &spec->pcm_rec[pin_idx];
1218                 info->name = generic_hdmi_pcm_names[pin_idx];
1219                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1220
1221                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1222                 pstr->substreams = 1;
1223                 pstr->ops = generic_ops;
1224                 /* other pstr fields are set in open */
1225         }
1226
1227         codec->num_pcms = spec->num_pins;
1228         codec->pcm_info = spec->pcm_rec;
1229
1230         return 0;
1231 }
1232
1233 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1234 {
1235         int err;
1236         char hdmi_str[32];
1237         struct hdmi_spec *spec = codec->spec;
1238         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1239         int pcmdev = spec->pcm_rec[pin_idx].device;
1240
1241         snprintf(hdmi_str, sizeof(hdmi_str), "HDMI/DP,pcm=%d", pcmdev);
1242
1243         err = snd_hda_input_jack_add(codec, per_pin->pin_nid,
1244                              SND_JACK_VIDEOOUT, pcmdev > 0 ? hdmi_str : NULL);
1245         if (err < 0)
1246                 return err;
1247
1248         hdmi_present_sense(per_pin, 0);
1249         return 0;
1250 }
1251
1252 static int generic_hdmi_build_controls(struct hda_codec *codec)
1253 {
1254         struct hdmi_spec *spec = codec->spec;
1255         int err;
1256         int pin_idx;
1257
1258         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1259                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1260
1261                 err = generic_hdmi_build_jack(codec, pin_idx);
1262                 if (err < 0)
1263                         return err;
1264
1265                 err = snd_hda_create_spdif_out_ctls(codec,
1266                                                     per_pin->pin_nid,
1267                                                     per_pin->mux_nids[0]);
1268                 if (err < 0)
1269                         return err;
1270                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1271
1272                 /* add control for ELD Bytes */
1273                 err = hdmi_create_eld_ctl(codec,
1274                                         pin_idx,
1275                                         spec->pcm_rec[pin_idx].device);
1276
1277                 if (err < 0)
1278                         return err;
1279         }
1280
1281         return 0;
1282 }
1283
1284 static int generic_hdmi_init(struct hda_codec *codec)
1285 {
1286         struct hdmi_spec *spec = codec->spec;
1287         int pin_idx;
1288
1289         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1290                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1291                 hda_nid_t pin_nid = per_pin->pin_nid;
1292                 struct hdmi_eld *eld = &per_pin->sink_eld;
1293
1294                 hdmi_init_pin(codec, pin_nid);
1295                 snd_hda_codec_write(codec, pin_nid, 0,
1296                                     AC_VERB_SET_UNSOLICITED_ENABLE,
1297                                     AC_USRSP_EN | pin_nid);
1298
1299                 per_pin->codec = codec;
1300                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1301                 snd_hda_eld_proc_new(codec, eld, pin_idx);
1302         }
1303         return 0;
1304 }
1305
1306 static void generic_hdmi_free(struct hda_codec *codec)
1307 {
1308         struct hdmi_spec *spec = codec->spec;
1309         int pin_idx;
1310
1311         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1312                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1313                 struct hdmi_eld *eld = &per_pin->sink_eld;
1314
1315                 cancel_delayed_work(&per_pin->work);
1316                 snd_hda_eld_proc_free(codec, eld);
1317         }
1318         snd_hda_input_jack_free(codec);
1319
1320         flush_workqueue(codec->bus->workq);
1321         kfree(spec);
1322 }
1323
1324 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1325         .init                   = generic_hdmi_init,
1326         .free                   = generic_hdmi_free,
1327         .build_pcms             = generic_hdmi_build_pcms,
1328         .build_controls         = generic_hdmi_build_controls,
1329         .unsol_event            = hdmi_unsol_event,
1330 };
1331
1332 static int patch_generic_hdmi(struct hda_codec *codec)
1333 {
1334         struct hdmi_spec *spec;
1335
1336         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1337         if (spec == NULL)
1338                 return -ENOMEM;
1339
1340         codec->spec = spec;
1341         if (hdmi_parse_codec(codec) < 0) {
1342                 codec->spec = NULL;
1343                 kfree(spec);
1344                 return -EINVAL;
1345         }
1346         codec->patch_ops = generic_hdmi_patch_ops;
1347
1348         init_channel_allocations();
1349
1350         return 0;
1351 }
1352
1353 /*
1354  * Shared non-generic implementations
1355  */
1356
1357 static int simple_playback_build_pcms(struct hda_codec *codec)
1358 {
1359         struct hdmi_spec *spec = codec->spec;
1360         struct hda_pcm *info = spec->pcm_rec;
1361         int i;
1362
1363         codec->num_pcms = spec->num_cvts;
1364         codec->pcm_info = info;
1365
1366         for (i = 0; i < codec->num_pcms; i++, info++) {
1367                 unsigned int chans;
1368                 struct hda_pcm_stream *pstr;
1369
1370                 chans = get_wcaps(codec, spec->cvts[i].cvt_nid);
1371                 chans = get_wcaps_channels(chans);
1372
1373                 info->name = generic_hdmi_pcm_names[i];
1374                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1375                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1376                 snd_BUG_ON(!spec->pcm_playback);
1377                 *pstr = *spec->pcm_playback;
1378                 pstr->nid = spec->cvts[i].cvt_nid;
1379                 if (pstr->channels_max <= 2 && chans && chans <= 16)
1380                         pstr->channels_max = chans;
1381         }
1382
1383         return 0;
1384 }
1385
1386 static int simple_playback_build_controls(struct hda_codec *codec)
1387 {
1388         struct hdmi_spec *spec = codec->spec;
1389         int err;
1390         int i;
1391
1392         for (i = 0; i < codec->num_pcms; i++) {
1393                 err = snd_hda_create_spdif_out_ctls(codec,
1394                                                     spec->cvts[i].cvt_nid,
1395                                                     spec->cvts[i].cvt_nid);
1396                 if (err < 0)
1397                         return err;
1398         }
1399
1400         return 0;
1401 }
1402
1403 static void simple_playback_free(struct hda_codec *codec)
1404 {
1405         struct hdmi_spec *spec = codec->spec;
1406
1407         kfree(spec);
1408 }
1409
1410 /*
1411  * Nvidia specific implementations
1412  */
1413
1414 #define Nv_VERB_SET_Channel_Allocation          0xF79
1415 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
1416 #define Nv_VERB_SET_Audio_Protection_On         0xF98
1417 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
1418
1419 #define nvhdmi_master_con_nid_7x        0x04
1420 #define nvhdmi_master_pin_nid_7x        0x05
1421
1422 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1423         /*front, rear, clfe, rear_surr */
1424         0x6, 0x8, 0xa, 0xc,
1425 };
1426
1427 static const struct hda_verb nvhdmi_basic_init_7x[] = {
1428         /* set audio protect on */
1429         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1430         /* enable digital output on pin widget */
1431         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1432         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1433         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1434         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1435         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1436         {} /* terminator */
1437 };
1438
1439 #ifdef LIMITED_RATE_FMT_SUPPORT
1440 /* support only the safe format and rate */
1441 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
1442 #define SUPPORTED_MAXBPS        16
1443 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
1444 #else
1445 /* support all rates and formats */
1446 #define SUPPORTED_RATES \
1447         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1448         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1449          SNDRV_PCM_RATE_192000)
1450 #define SUPPORTED_MAXBPS        24
1451 #define SUPPORTED_FORMATS \
1452         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1453 #endif
1454
1455 static int nvhdmi_7x_init(struct hda_codec *codec)
1456 {
1457         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1458         return 0;
1459 }
1460
1461 static unsigned int channels_2_6_8[] = {
1462         2, 6, 8
1463 };
1464
1465 static unsigned int channels_2_8[] = {
1466         2, 8
1467 };
1468
1469 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1470         .count = ARRAY_SIZE(channels_2_6_8),
1471         .list = channels_2_6_8,
1472         .mask = 0,
1473 };
1474
1475 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1476         .count = ARRAY_SIZE(channels_2_8),
1477         .list = channels_2_8,
1478         .mask = 0,
1479 };
1480
1481 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1482                                     struct hda_codec *codec,
1483                                     struct snd_pcm_substream *substream)
1484 {
1485         struct hdmi_spec *spec = codec->spec;
1486         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1487
1488         switch (codec->preset->id) {
1489         case 0x10de0002:
1490         case 0x10de0003:
1491         case 0x10de0005:
1492         case 0x10de0006:
1493                 hw_constraints_channels = &hw_constraints_2_8_channels;
1494                 break;
1495         case 0x10de0007:
1496                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1497                 break;
1498         default:
1499                 break;
1500         }
1501
1502         if (hw_constraints_channels != NULL) {
1503                 snd_pcm_hw_constraint_list(substream->runtime, 0,
1504                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1505                                 hw_constraints_channels);
1506         } else {
1507                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1508                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1509         }
1510
1511         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1512 }
1513
1514 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1515                                      struct hda_codec *codec,
1516                                      struct snd_pcm_substream *substream)
1517 {
1518         struct hdmi_spec *spec = codec->spec;
1519         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1520 }
1521
1522 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1523                                        struct hda_codec *codec,
1524                                        unsigned int stream_tag,
1525                                        unsigned int format,
1526                                        struct snd_pcm_substream *substream)
1527 {
1528         struct hdmi_spec *spec = codec->spec;
1529         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1530                                              stream_tag, format, substream);
1531 }
1532
1533 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1534                                                     int channels)
1535 {
1536         unsigned int chanmask;
1537         int chan = channels ? (channels - 1) : 1;
1538
1539         switch (channels) {
1540         default:
1541         case 0:
1542         case 2:
1543                 chanmask = 0x00;
1544                 break;
1545         case 4:
1546                 chanmask = 0x08;
1547                 break;
1548         case 6:
1549                 chanmask = 0x0b;
1550                 break;
1551         case 8:
1552                 chanmask = 0x13;
1553                 break;
1554         }
1555
1556         /* Set the audio infoframe channel allocation and checksum fields.  The
1557          * channel count is computed implicitly by the hardware. */
1558         snd_hda_codec_write(codec, 0x1, 0,
1559                         Nv_VERB_SET_Channel_Allocation, chanmask);
1560
1561         snd_hda_codec_write(codec, 0x1, 0,
1562                         Nv_VERB_SET_Info_Frame_Checksum,
1563                         (0x71 - chan - chanmask));
1564 }
1565
1566 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1567                                    struct hda_codec *codec,
1568                                    struct snd_pcm_substream *substream)
1569 {
1570         struct hdmi_spec *spec = codec->spec;
1571         int i;
1572
1573         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1574                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1575         for (i = 0; i < 4; i++) {
1576                 /* set the stream id */
1577                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1578                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
1579                 /* set the stream format */
1580                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1581                                 AC_VERB_SET_STREAM_FORMAT, 0);
1582         }
1583
1584         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1585          * streams are disabled. */
1586         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1587
1588         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1589 }
1590
1591 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1592                                      struct hda_codec *codec,
1593                                      unsigned int stream_tag,
1594                                      unsigned int format,
1595                                      struct snd_pcm_substream *substream)
1596 {
1597         int chs;
1598         unsigned int dataDCC2, channel_id;
1599         int i;
1600         struct hdmi_spec *spec = codec->spec;
1601         struct hda_spdif_out *spdif =
1602                 snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1603
1604         mutex_lock(&codec->spdif_mutex);
1605
1606         chs = substream->runtime->channels;
1607
1608         dataDCC2 = 0x2;
1609
1610         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1611         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1612                 snd_hda_codec_write(codec,
1613                                 nvhdmi_master_con_nid_7x,
1614                                 0,
1615                                 AC_VERB_SET_DIGI_CONVERT_1,
1616                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1617
1618         /* set the stream id */
1619         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1620                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1621
1622         /* set the stream format */
1623         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1624                         AC_VERB_SET_STREAM_FORMAT, format);
1625
1626         /* turn on again (if needed) */
1627         /* enable and set the channel status audio/data flag */
1628         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1629                 snd_hda_codec_write(codec,
1630                                 nvhdmi_master_con_nid_7x,
1631                                 0,
1632                                 AC_VERB_SET_DIGI_CONVERT_1,
1633                                 spdif->ctls & 0xff);
1634                 snd_hda_codec_write(codec,
1635                                 nvhdmi_master_con_nid_7x,
1636                                 0,
1637                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1638         }
1639
1640         for (i = 0; i < 4; i++) {
1641                 if (chs == 2)
1642                         channel_id = 0;
1643                 else
1644                         channel_id = i * 2;
1645
1646                 /* turn off SPDIF once;
1647                  *otherwise the IEC958 bits won't be updated
1648                  */
1649                 if (codec->spdif_status_reset &&
1650                 (spdif->ctls & AC_DIG1_ENABLE))
1651                         snd_hda_codec_write(codec,
1652                                 nvhdmi_con_nids_7x[i],
1653                                 0,
1654                                 AC_VERB_SET_DIGI_CONVERT_1,
1655                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1656                 /* set the stream id */
1657                 snd_hda_codec_write(codec,
1658                                 nvhdmi_con_nids_7x[i],
1659                                 0,
1660                                 AC_VERB_SET_CHANNEL_STREAMID,
1661                                 (stream_tag << 4) | channel_id);
1662                 /* set the stream format */
1663                 snd_hda_codec_write(codec,
1664                                 nvhdmi_con_nids_7x[i],
1665                                 0,
1666                                 AC_VERB_SET_STREAM_FORMAT,
1667                                 format);
1668                 /* turn on again (if needed) */
1669                 /* enable and set the channel status audio/data flag */
1670                 if (codec->spdif_status_reset &&
1671                 (spdif->ctls & AC_DIG1_ENABLE)) {
1672                         snd_hda_codec_write(codec,
1673                                         nvhdmi_con_nids_7x[i],
1674                                         0,
1675                                         AC_VERB_SET_DIGI_CONVERT_1,
1676                                         spdif->ctls & 0xff);
1677                         snd_hda_codec_write(codec,
1678                                         nvhdmi_con_nids_7x[i],
1679                                         0,
1680                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1681                 }
1682         }
1683
1684         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1685
1686         mutex_unlock(&codec->spdif_mutex);
1687         return 0;
1688 }
1689
1690 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1691         .substreams = 1,
1692         .channels_min = 2,
1693         .channels_max = 8,
1694         .nid = nvhdmi_master_con_nid_7x,
1695         .rates = SUPPORTED_RATES,
1696         .maxbps = SUPPORTED_MAXBPS,
1697         .formats = SUPPORTED_FORMATS,
1698         .ops = {
1699                 .open = simple_playback_pcm_open,
1700                 .close = nvhdmi_8ch_7x_pcm_close,
1701                 .prepare = nvhdmi_8ch_7x_pcm_prepare
1702         },
1703 };
1704
1705 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1706         .substreams = 1,
1707         .channels_min = 2,
1708         .channels_max = 2,
1709         .nid = nvhdmi_master_con_nid_7x,
1710         .rates = SUPPORTED_RATES,
1711         .maxbps = SUPPORTED_MAXBPS,
1712         .formats = SUPPORTED_FORMATS,
1713         .ops = {
1714                 .open = simple_playback_pcm_open,
1715                 .close = simple_playback_pcm_close,
1716                 .prepare = simple_playback_pcm_prepare
1717         },
1718 };
1719
1720 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1721         .build_controls = simple_playback_build_controls,
1722         .build_pcms = simple_playback_build_pcms,
1723         .init = nvhdmi_7x_init,
1724         .free = simple_playback_free,
1725 };
1726
1727 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1728         .build_controls = simple_playback_build_controls,
1729         .build_pcms = simple_playback_build_pcms,
1730         .init = nvhdmi_7x_init,
1731         .free = simple_playback_free,
1732 };
1733
1734 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1735 {
1736         struct hdmi_spec *spec;
1737
1738         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1739         if (spec == NULL)
1740                 return -ENOMEM;
1741
1742         codec->spec = spec;
1743
1744         spec->multiout.num_dacs = 0;  /* no analog */
1745         spec->multiout.max_channels = 2;
1746         spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1747         spec->num_cvts = 1;
1748         spec->cvts[0].cvt_nid = nvhdmi_master_con_nid_7x;
1749         spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1750
1751         codec->patch_ops = nvhdmi_patch_ops_2ch;
1752
1753         return 0;
1754 }
1755
1756 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1757 {
1758         struct hdmi_spec *spec;
1759         int err = patch_nvhdmi_2ch(codec);
1760
1761         if (err < 0)
1762                 return err;
1763         spec = codec->spec;
1764         spec->multiout.max_channels = 8;
1765         spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1766         codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1767
1768         /* Initialize the audio infoframe channel mask and checksum to something
1769          * valid */
1770         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1771
1772         return 0;
1773 }
1774
1775 /*
1776  * ATI-specific implementations
1777  *
1778  * FIXME: we may omit the whole this and use the generic code once after
1779  * it's confirmed to work.
1780  */
1781
1782 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
1783 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
1784
1785 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1786                                         struct hda_codec *codec,
1787                                         unsigned int stream_tag,
1788                                         unsigned int format,
1789                                         struct snd_pcm_substream *substream)
1790 {
1791         struct hdmi_spec *spec = codec->spec;
1792         int chans = substream->runtime->channels;
1793         int i, err;
1794
1795         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1796                                           substream);
1797         if (err < 0)
1798                 return err;
1799         snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1800                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1801         /* FIXME: XXX */
1802         for (i = 0; i < chans; i++) {
1803                 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1804                                     AC_VERB_SET_HDMI_CHAN_SLOT,
1805                                     (i << 4) | i);
1806         }
1807         return 0;
1808 }
1809
1810 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1811         .substreams = 1,
1812         .channels_min = 2,
1813         .channels_max = 2,
1814         .nid = ATIHDMI_CVT_NID,
1815         .ops = {
1816                 .open = simple_playback_pcm_open,
1817                 .close = simple_playback_pcm_close,
1818                 .prepare = atihdmi_playback_pcm_prepare
1819         },
1820 };
1821
1822 static const struct hda_verb atihdmi_basic_init[] = {
1823         /* enable digital output on pin widget */
1824         { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1825         {} /* terminator */
1826 };
1827
1828 static int atihdmi_init(struct hda_codec *codec)
1829 {
1830         struct hdmi_spec *spec = codec->spec;
1831
1832         snd_hda_sequence_write(codec, atihdmi_basic_init);
1833         /* SI codec requires to unmute the pin */
1834         if (get_wcaps(codec, spec->pins[0].pin_nid) & AC_WCAP_OUT_AMP)
1835                 snd_hda_codec_write(codec, spec->pins[0].pin_nid, 0,
1836                                     AC_VERB_SET_AMP_GAIN_MUTE,
1837                                     AMP_OUT_UNMUTE);
1838         return 0;
1839 }
1840
1841 static const struct hda_codec_ops atihdmi_patch_ops = {
1842         .build_controls = simple_playback_build_controls,
1843         .build_pcms = simple_playback_build_pcms,
1844         .init = atihdmi_init,
1845         .free = simple_playback_free,
1846 };
1847
1848
1849 static int patch_atihdmi(struct hda_codec *codec)
1850 {
1851         struct hdmi_spec *spec;
1852
1853         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1854         if (spec == NULL)
1855                 return -ENOMEM;
1856
1857         codec->spec = spec;
1858
1859         spec->multiout.num_dacs = 0;      /* no analog */
1860         spec->multiout.max_channels = 2;
1861         spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1862         spec->num_cvts = 1;
1863         spec->cvts[0].cvt_nid = ATIHDMI_CVT_NID;
1864         spec->pins[0].pin_nid = ATIHDMI_PIN_NID;
1865         spec->pcm_playback = &atihdmi_pcm_digital_playback;
1866
1867         codec->patch_ops = atihdmi_patch_ops;
1868
1869         return 0;
1870 }
1871
1872
1873 /*
1874  * patch entries
1875  */
1876 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1877 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1878 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1879 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
1880 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
1881 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
1882 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
1883 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
1884 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1885 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1886 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1887 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1888 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
1889 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
1890 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
1891 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
1892 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
1893 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
1894 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
1895 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
1896 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
1897 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
1898 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
1899 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
1900 /* 17 is known to be absent */
1901 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
1902 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
1903 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
1904 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
1905 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
1906 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
1907 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
1908 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
1909 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
1910 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
1911 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_generic_hdmi },
1912 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_generic_hdmi },
1913 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
1914 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
1915 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1916 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
1917 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
1918 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
1919 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1920 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1921 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1922 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
1923 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
1924 {} /* terminator */
1925 };
1926
1927 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1928 MODULE_ALIAS("snd-hda-codec-id:10027919");
1929 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1930 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1931 MODULE_ALIAS("snd-hda-codec-id:10951390");
1932 MODULE_ALIAS("snd-hda-codec-id:10951392");
1933 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1934 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1935 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1936 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1937 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1938 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1939 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1940 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1941 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1942 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1943 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1944 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1945 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1946 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1947 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1948 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1949 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1950 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1951 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1952 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1953 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1954 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1955 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1956 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1957 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1958 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1959 MODULE_ALIAS("snd-hda-codec-id:10de0051");
1960 MODULE_ALIAS("snd-hda-codec-id:10de0060");
1961 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1962 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1963 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1964 MODULE_ALIAS("snd-hda-codec-id:80860054");
1965 MODULE_ALIAS("snd-hda-codec-id:80862801");
1966 MODULE_ALIAS("snd-hda-codec-id:80862802");
1967 MODULE_ALIAS("snd-hda-codec-id:80862803");
1968 MODULE_ALIAS("snd-hda-codec-id:80862804");
1969 MODULE_ALIAS("snd-hda-codec-id:80862805");
1970 MODULE_ALIAS("snd-hda-codec-id:80862806");
1971 MODULE_ALIAS("snd-hda-codec-id:80862880");
1972 MODULE_ALIAS("snd-hda-codec-id:808629fb");
1973
1974 MODULE_LICENSE("GPL");
1975 MODULE_DESCRIPTION("HDMI HD-audio codec");
1976 MODULE_ALIAS("snd-hda-codec-intelhdmi");
1977 MODULE_ALIAS("snd-hda-codec-nvhdmi");
1978 MODULE_ALIAS("snd-hda-codec-atihdmi");
1979
1980 static struct hda_codec_preset_list intel_list = {
1981         .preset = snd_hda_preset_hdmi,
1982         .owner = THIS_MODULE,
1983 };
1984
1985 static int __init patch_hdmi_init(void)
1986 {
1987         return snd_hda_add_codec_preset(&intel_list);
1988 }
1989
1990 static void __exit patch_hdmi_exit(void)
1991 {
1992         snd_hda_delete_codec_preset(&intel_list);
1993 }
1994
1995 module_init(patch_hdmi_init)
1996 module_exit(patch_hdmi_exit)