sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *
  10  *  Authors:
  11  *                      Wu Fengguang <wfg@linux.intel.com>
  12  *
  13  *  Maintained by:
  14  *                      Wu Fengguang <wfg@linux.intel.com>
  15  *
  16  *  This program is free software; you can redistribute it and/or modify it
  17  *  under the terms of the GNU General Public License as published by the Free
  18  *  Software Foundation; either version 2 of the License, or (at your option)
  19  *  any later version.
  20  *
  21  *  This program is distributed in the hope that it will be useful, but
  22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  24  *  for more details.
  25  *
  26  *  You should have received a copy of the GNU General Public License
  27  *  along with this program; if not, write to the Free Software Foundation,
  28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/delay.h>
  33 #include <linux/slab.h>
  34 #include <linux/moduleparam.h>
  35 #include <sound/core.h>
  36 #include "hda_codec.h"
  37 #include "hda_local.h"
  38
  39 static bool static_hdmi_pcm;
  40 module_param(static_hdmi_pcm, bool, 0644);
  41 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  42
  43 /*
  44  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  45  * could support two independent pipes, each of them can be connected to one or
  46  * more ports (DVI, HDMI or DisplayPort).
  47  *
  48  * The HDA correspondence of pipes/ports are converter/pin nodes.
  49  */
  50 #define MAX_HDMI_CVTS   3
  51 #define MAX_HDMI_PINS   3
  52
  53 struct hdmi_spec {
  54         int num_cvts;
  55         int num_pins;
  56         hda_nid_t cvt[MAX_HDMI_CVTS+1];  /* audio sources */
  57         hda_nid_t pin[MAX_HDMI_PINS+1];  /* audio sinks */
  58
  59         /*
  60          * source connection for each pin
  61          */
  62         hda_nid_t pin_cvt[MAX_HDMI_PINS+1];
  63
  64         /*
  65          * HDMI sink attached to each pin
  66          */
  67         struct hdmi_eld sink_eld[MAX_HDMI_PINS];
  68
  69         /*
  70          * export one pcm per pipe
  71          */
  72         struct hda_pcm  pcm_rec[MAX_HDMI_CVTS];
  73         struct hda_pcm_stream codec_pcm_pars[MAX_HDMI_CVTS];
  74
  75         /*
  76          * ati/nvhdmi specific
  77          */
  78         struct hda_multi_out multiout;
  79         struct hda_pcm_stream *pcm_playback;
  80
  81         /* misc flags */
  82         /* PD bit indicates only the update, not the current state */
  83         unsigned int old_pin_detect:1;
  84 };
  85
  86
  87 struct hdmi_audio_infoframe {
  88         u8 type; /* 0x84 */
  89         u8 ver;  /* 0x01 */
  90         u8 len;  /* 0x0a */
  91
  92         u8 checksum;
  93
  94         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
  95         u8 SS01_SF24;
  96         u8 CXT04;
  97         u8 CA;
  98         u8 LFEPBL01_LSV36_DM_INH7;
  99 };
 100
 101 struct dp_audio_infoframe {
 102         u8 type; /* 0x84 */
 103         u8 len;  /* 0x1b */
 104         u8 ver;  /* 0x11 << 2 */
 105
 106         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 107         u8 SS01_SF24;
 108         u8 CXT04;
 109         u8 CA;
 110         u8 LFEPBL01_LSV36_DM_INH7;
 111 };
 112
 113 union audio_infoframe {
 114         struct hdmi_audio_infoframe hdmi;
 115         struct dp_audio_infoframe dp;
 116         u8 bytes[0];
 117 };
 118
 119 /*
 120  * CEA speaker placement:
 121  *
 122  *        FLH       FCH        FRH
 123  *  FLW    FL  FLC   FC   FRC   FR   FRW
 124  *
 125  *                                  LFE
 126  *                     TC
 127  *
 128  *          RL  RLC   RC   RRC   RR
 129  *
 130  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 131  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 132  */
 133 enum cea_speaker_placement {
 134         FL  = (1 <<  0),        /* Front Left           */
 135         FC  = (1 <<  1),        /* Front Center         */
 136         FR  = (1 <<  2),        /* Front Right          */
 137         FLC = (1 <<  3),        /* Front Left Center    */
 138         FRC = (1 <<  4),        /* Front Right Center   */
 139         RL  = (1 <<  5),        /* Rear Left            */
 140         RC  = (1 <<  6),        /* Rear Center          */
 141         RR  = (1 <<  7),        /* Rear Right           */
 142         RLC = (1 <<  8),        /* Rear Left Center     */
 143         RRC = (1 <<  9),        /* Rear Right Center    */
 144         LFE = (1 << 10),        /* Low Frequency Effect */
 145         FLW = (1 << 11),        /* Front Left Wide      */
 146         FRW = (1 << 12),        /* Front Right Wide     */
 147         FLH = (1 << 13),        /* Front Left High      */
 148         FCH = (1 << 14),        /* Front Center High    */
 149         FRH = (1 << 15),        /* Front Right High     */
 150         TC  = (1 << 16),        /* Top Center           */
 151 };
 152
 153 /*
 154  * ELD SA bits in the CEA Speaker Allocation data block
 155  */
 156 static int eld_speaker_allocation_bits[] = {
 157         [0] = FL | FR,
 158         [1] = LFE,
 159         [2] = FC,
 160         [3] = RL | RR,
 161         [4] = RC,
 162         [5] = FLC | FRC,
 163         [6] = RLC | RRC,
 164         /* the following are not defined in ELD yet */
 165         [7] = FLW | FRW,
 166         [8] = FLH | FRH,
 167         [9] = TC,
 168         [10] = FCH,
 169 };
 170
 171 struct cea_channel_speaker_allocation {
 172         int ca_index;
 173         int speakers[8];
 174
 175         /* derived values, just for convenience */
 176         int channels;
 177         int spk_mask;
 178 };
 179
 180 /*
 181  * ALSA sequence is:
 182  *
 183  *       surround40   surround41   surround50   surround51   surround71
 184  * ch0   front left   =            =            =            =
 185  * ch1   front right  =            =            =            =
 186  * ch2   rear left    =            =            =            =
 187  * ch3   rear right   =            =            =            =
 188  * ch4                LFE          center       center       center
 189  * ch5                                          LFE          LFE
 190  * ch6                                                       side left
 191  * ch7                                                       side right
 192  *
 193  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 194  */
 195 static int hdmi_channel_mapping[0x32][8] = {
 196         /* stereo */
 197         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 198         /* 2.1 */
 199         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 200         /* Dolby Surround */
 201         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 202         /* surround40 */
 203         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 204         /* 4ch */
 205         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 206         /* surround41 */
 207         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 208         /* surround50 */
 209         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 210         /* surround51 */
 211         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 212         /* 7.1 */
 213         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 214 };
 215
 216 /*
 217  * This is an ordered list!
 218  *
 219  * The preceding ones have better chances to be selected by
 220  * hdmi_channel_allocation().
 221  */
 222 static struct cea_channel_speaker_allocation channel_allocations[] = {
 223 /*                        channel:   7     6    5    4    3     2    1    0  */
 224 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 225                                  /* 2.1 */
 226 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 227                                  /* Dolby Surround */
 228 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 229                                  /* surround40 */
 230 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 231                                  /* surround41 */
 232 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 233                                  /* surround50 */
 234 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 235                                  /* surround51 */
 236 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 237                                  /* 6.1 */
 238 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 239                                  /* surround71 */
 240 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 241
 242 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 243 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 244 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 245 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 246 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 247 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 248 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 249 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 250 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 251 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 252 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 253 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 254 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 255 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 256 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 257 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 258 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 259 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 260 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 261 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 262 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 263 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 264 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 265 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 266 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 267 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 268 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 269 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 270 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 271 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 272 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 273 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 274 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 275 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 276 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 277 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 278 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 279 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 280 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 281 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 282 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 283 };
 284
 285
 286 /*
 287  * HDMI routines
 288  */
 289
 290 static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
 291 {
 292         int i;
 293
 294         for (i = 0; nids[i]; i++)
 295                 if (nids[i] == nid)
 296                         return i;
 297
 298         snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
 299         return -EINVAL;
 300 }
 301
 302 static void hdmi_get_show_eld(struct hda_codec *codec, hda_nid_t pin_nid,
 303                               struct hdmi_eld *eld)
 304 {
 305         if (!snd_hdmi_get_eld(eld, codec, pin_nid))
 306                 snd_hdmi_show_eld(eld);
 307 }
 308
 309 #ifdef BE_PARANOID
 310 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 311                                 int *packet_index, int *byte_index)
 312 {
 313         int val;
 314
 315         val = snd_hda_codec_read(codec, pin_nid, 0,
 316                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 317
 318         *packet_index = val >> 5;
 319         *byte_index = val & 0x1f;
 320 }
 321 #endif
 322
 323 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 324                                 int packet_index, int byte_index)
 325 {
 326         int val;
 327
 328         val = (packet_index << 5) | (byte_index & 0x1f);
 329
 330         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 331 }
 332
 333 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 334                                 unsigned char val)
 335 {
 336         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 337 }
 338
 339 static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
 340 {
 341         /* Unmute */
 342         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 343                 snd_hda_codec_write(codec, pin_nid, 0,
 344                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 345         /* Enable pin out */
 346         snd_hda_codec_write(codec, pin_nid, 0,
 347                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
 348 }
 349
 350 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
 351 {
 352         return 1 + snd_hda_codec_read(codec, nid, 0,
 353                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 354 }
 355
 356 static void hdmi_set_channel_count(struct hda_codec *codec,
 357                                    hda_nid_t nid, int chs)
 358 {
 359         if (chs != hdmi_get_channel_count(codec, nid))
 360                 snd_hda_codec_write(codec, nid, 0,
 361                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 362 }
 363
 364
 365 /*
 366  * Channel mapping routines
 367  */
 368
 369 /*
 370  * Compute derived values in channel_allocations[].
 371  */
 372 static void init_channel_allocations(void)
 373 {
 374         int i, j;
 375         struct cea_channel_speaker_allocation *p;
 376
 377         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 378                 p = channel_allocations + i;
 379                 p->channels = 0;
 380                 p->spk_mask = 0;
 381                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 382                         if (p->speakers[j]) {
 383                                 p->channels++;
 384                                 p->spk_mask |= p->speakers[j];
 385                         }
 386         }
 387 }
 388
 389 /*
 390  * The transformation takes two steps:
 391  *
 392  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 393  *            spk_mask => (channel_allocations[])         => ai->CA
 394  *
 395  * TODO: it could select the wrong CA from multiple candidates.
 396 */
 397 static int hdmi_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
 398                                    int channels)
 399 {
 400         struct hdmi_spec *spec = codec->spec;
 401         struct hdmi_eld *eld;
 402         int i;
 403         int ca = 0;
 404         int spk_mask = 0;
 405         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 406
 407         /*
 408          * CA defaults to 0 for basic stereo audio
 409          */
 410         if (channels <= 2)
 411                 return 0;
 412
 413         i = hda_node_index(spec->pin_cvt, nid);
 414         if (i < 0)
 415                 return 0;
 416         eld = &spec->sink_eld[i];
 417
 418         /*
 419          * HDMI sink's ELD info cannot always be retrieved for now, e.g.
 420          * in console or for audio devices. Assume the highest speakers
 421          * configuration, to _not_ prohibit multi-channel audio playback.
 422          */
 423         if (!eld->spk_alloc)
 424                 eld->spk_alloc = 0xffff;
 425
 426         /*
 427          * expand ELD's speaker allocation mask
 428          *
 429          * ELD tells the speaker mask in a compact(paired) form,
 430          * expand ELD's notions to match the ones used by Audio InfoFrame.
 431          */
 432         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 433                 if (eld->spk_alloc & (1 << i))
 434                         spk_mask |= eld_speaker_allocation_bits[i];
 435         }
 436
 437         /* search for the first working match in the CA table */
 438         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 439                 if (channels == channel_allocations[i].channels &&
 440                     (spk_mask & channel_allocations[i].spk_mask) ==
 441                                 channel_allocations[i].spk_mask) {
 442                         ca = channel_allocations[i].ca_index;
 443                         break;
 444                 }
 445         }
 446
 447         snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
 448         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 449                     ca, channels, buf);
 450
 451         return ca;
 452 }
 453
 454 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 455                                        hda_nid_t pin_nid)
 456 {
 457 #ifdef CONFIG_SND_DEBUG_VERBOSE
 458         int i;
 459         int slot;
 460
 461         for (i = 0; i < 8; i++) {
 462                 slot = snd_hda_codec_read(codec, pin_nid, 0,
 463                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
 464                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 465                                                 slot >> 4, slot & 0xf);
 466         }
 467 #endif
 468 }
 469
 470
 471 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 472                                        hda_nid_t pin_nid,
 473                                        int ca)
 474 {
 475         int i;
 476         int err;
 477
 478         if (hdmi_channel_mapping[ca][1] == 0) {
 479                 for (i = 0; i < channel_allocations[ca].channels; i++)
 480                         hdmi_channel_mapping[ca][i] = i | (i << 4);
 481                 for (; i < 8; i++)
 482                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
 483         }
 484
 485         for (i = 0; i < 8; i++) {
 486                 err = snd_hda_codec_write(codec, pin_nid, 0,
 487                                           AC_VERB_SET_HDMI_CHAN_SLOT,
 488                                           hdmi_channel_mapping[ca][i]);
 489                 if (err) {
 490                         snd_printdd(KERN_NOTICE
 491                                     "HDMI: channel mapping failed\n");
 492                         break;
 493                 }
 494         }
 495
 496         hdmi_debug_channel_mapping(codec, pin_nid);
 497 }
 498
 499
 500 /*
 501  * Audio InfoFrame routines
 502  */
 503
 504 /*
 505  * Enable Audio InfoFrame Transmission
 506  */
 507 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 508                                        hda_nid_t pin_nid)
 509 {
 510         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 511         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 512                                                 AC_DIPXMIT_BEST);
 513 }
 514
 515 /*
 516  * Disable Audio InfoFrame Transmission
 517  */
 518 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 519                                       hda_nid_t pin_nid)
 520 {
 521         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 522         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 523                                                 AC_DIPXMIT_DISABLE);
 524 }
 525
 526 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 527 {
 528 #ifdef CONFIG_SND_DEBUG_VERBOSE
 529         int i;
 530         int size;
 531
 532         size = snd_hdmi_get_eld_size(codec, pin_nid);
 533         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 534
 535         for (i = 0; i < 8; i++) {
 536                 size = snd_hda_codec_read(codec, pin_nid, 0,
 537                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 538                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 539         }
 540 #endif
 541 }
 542
 543 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 544 {
 545 #ifdef BE_PARANOID
 546         int i, j;
 547         int size;
 548         int pi, bi;
 549         for (i = 0; i < 8; i++) {
 550                 size = snd_hda_codec_read(codec, pin_nid, 0,
 551                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 552                 if (size == 0)
 553                         continue;
 554
 555                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 556                 for (j = 1; j < 1000; j++) {
 557                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 558                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 559                         if (pi != i)
 560                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 561                                                 bi, pi, i);
 562                         if (bi == 0) /* byte index wrapped around */
 563                                 break;
 564                 }
 565                 snd_printd(KERN_INFO
 566                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 567                         i, size, j);
 568         }
 569 #endif
 570 }
 571
 572 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 573 {
 574         u8 *bytes = (u8 *)hdmi_ai;
 575         u8 sum = 0;
 576         int i;
 577
 578         hdmi_ai->checksum = 0;
 579
 580         for (i = 0; i < sizeof(*hdmi_ai); i++)
 581                 sum += bytes[i];
 582
 583         hdmi_ai->checksum = -sum;
 584 }
 585
 586 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 587                                       hda_nid_t pin_nid,
 588                                       u8 *dip, int size)
 589 {
 590         int i;
 591
 592         hdmi_debug_dip_size(codec, pin_nid);
 593         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 594
 595         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 596         for (i = 0; i < size; i++)
 597                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 598 }
 599
 600 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 601                                     u8 *dip, int size)
 602 {
 603         u8 val;
 604         int i;
 605
 606         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 607                                                             != AC_DIPXMIT_BEST)
 608                 return false;
 609
 610         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 611         for (i = 0; i < size; i++) {
 612                 val = snd_hda_codec_read(codec, pin_nid, 0,
 613                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 614                 if (val != dip[i])
 615                         return false;
 616         }
 617
 618         return true;
 619 }
 620
 621 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
 622                                         struct snd_pcm_substream *substream)
 623 {
 624         struct hdmi_spec *spec = codec->spec;
 625         hda_nid_t pin_nid;
 626         int channels = substream->runtime->channels;
 627         int ca;
 628         int i;
 629         union audio_infoframe ai;
 630
 631         ca = hdmi_channel_allocation(codec, nid, channels);
 632
 633         for (i = 0; i < spec->num_pins; i++) {
 634                 if (spec->pin_cvt[i] != nid)
 635                         continue;
 636                 if (!spec->sink_eld[i].monitor_present)
 637                         continue;
 638
 639                 pin_nid = spec->pin[i];
 640
 641                 memset(&ai, 0, sizeof(ai));
 642                 if (spec->sink_eld[i].conn_type == 0) { /* HDMI */
 643                         struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 644
 645                         hdmi_ai->type           = 0x84;
 646                         hdmi_ai->ver            = 0x01;
 647                         hdmi_ai->len            = 0x0a;
 648                         hdmi_ai->CC02_CT47      = channels - 1;
 649                         hdmi_ai->CA             = ca;
 650                         hdmi_checksum_audio_infoframe(hdmi_ai);
 651                 } else if (spec->sink_eld[i].conn_type == 1) { /* DisplayPort */
 652                         struct dp_audio_infoframe *dp_ai = &ai.dp;
 653
 654                         dp_ai->type             = 0x84;
 655                         dp_ai->len              = 0x1b;
 656                         dp_ai->ver              = 0x11 << 2;
 657                         dp_ai->CC02_CT47        = channels - 1;
 658                         dp_ai->CA               = ca;
 659                 } else {
 660                         snd_printd("HDMI: unknown connection type at pin %d\n",
 661                                    pin_nid);
 662                         continue;
 663                 }
 664
 665                 /*
 666                  * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 667                  * sizeof(*dp_ai) to avoid partial match/update problems when
 668                  * the user switches between HDMI/DP monitors.
 669                  */
 670                 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 671                                              sizeof(ai))) {
 672                         snd_printdd("hdmi_setup_audio_infoframe: "
 673                                     "cvt=%d pin=%d channels=%d\n",
 674                                     nid, pin_nid,
 675                                     channels);
 676                         hdmi_setup_channel_mapping(codec, pin_nid, ca);
 677                         hdmi_stop_infoframe_trans(codec, pin_nid);
 678                         hdmi_fill_audio_infoframe(codec, pin_nid,
 679                                                   ai.bytes, sizeof(ai));
 680                         hdmi_start_infoframe_trans(codec, pin_nid);
 681                 }
 682         }
 683 }
 684
 685
 686 /*
 687  * Unsolicited events
 688  */
 689
 690 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
 691                                struct hdmi_eld *eld);
 692
 693 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 694 {
 695         struct hdmi_spec *spec = codec->spec;
 696         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 697         int pind = !!(res & AC_UNSOL_RES_PD);
 698         int eldv = !!(res & AC_UNSOL_RES_ELDV);
 699         int index;
 700
 701         printk(KERN_INFO
 702                 "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 703                 tag, pind, eldv);
 704
 705         index = hda_node_index(spec->pin, tag);
 706         if (index < 0)
 707                 return;
 708
 709         if (spec->old_pin_detect) {
 710                 if (pind)
 711                         hdmi_present_sense(codec, tag, &spec->sink_eld[index]);
 712                 pind = spec->sink_eld[index].monitor_present;
 713         }
 714
 715         spec->sink_eld[index].monitor_present = pind;
 716         spec->sink_eld[index].eld_valid = eldv;
 717
 718         if (pind && eldv) {
 719                 hdmi_get_show_eld(codec, spec->pin[index],
 720                                   &spec->sink_eld[index]);
 721                 /* TODO: do real things about ELD */
 722         }
 723 }
 724
 725 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 726 {
 727         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 728         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 729         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 730         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 731
 732         printk(KERN_INFO
 733                 "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 734                 tag,
 735                 subtag,
 736                 cp_state,
 737                 cp_ready);
 738
 739         /* TODO */
 740         if (cp_state)
 741                 ;
 742         if (cp_ready)
 743                 ;
 744 }
 745
 746
 747 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 748 {
 749         struct hdmi_spec *spec = codec->spec;
 750         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 751         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 752
 753         if (hda_node_index(spec->pin, tag) < 0) {
 754                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
 755                 return;
 756         }
 757
 758         if (subtag == 0)
 759                 hdmi_intrinsic_event(codec, res);
 760         else
 761                 hdmi_non_intrinsic_event(codec, res);
 762 }
 763
 764 /*
 765  * Callbacks
 766  */
 767
 768 /* HBR should be Non-PCM, 8 channels */
 769 #define is_hbr_format(format) \
 770         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 771
 772 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
 773                               u32 stream_tag, int format)
 774 {
 775         struct hdmi_spec *spec = codec->spec;
 776         int pinctl;
 777         int new_pinctl = 0;
 778         int i;
 779
 780         for (i = 0; i < spec->num_pins; i++) {
 781                 if (spec->pin_cvt[i] != nid)
 782                         continue;
 783                 if (!(snd_hda_query_pin_caps(codec, spec->pin[i]) & AC_PINCAP_HBR))
 784                         continue;
 785
 786                 pinctl = snd_hda_codec_read(codec, spec->pin[i], 0,
 787                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 788
 789                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 790                 if (is_hbr_format(format))
 791                         new_pinctl |= AC_PINCTL_EPT_HBR;
 792                 else
 793                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 794
 795                 snd_printdd("hdmi_setup_stream: "
 796                             "NID=0x%x, %spinctl=0x%x\n",
 797                             spec->pin[i],
 798                             pinctl == new_pinctl ? "" : "new-",
 799                             new_pinctl);
 800
 801                 if (pinctl != new_pinctl)
 802                         snd_hda_codec_write(codec, spec->pin[i], 0,
 803                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 804                                             new_pinctl);
 805         }
 806
 807         if (is_hbr_format(format) && !new_pinctl) {
 808                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
 809                 return -EINVAL;
 810         }
 811
 812         snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
 813         return 0;
 814 }
 815
 816 /*
 817  * HDA PCM callbacks
 818  */
 819 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
 820                          struct hda_codec *codec,
 821                          struct snd_pcm_substream *substream)
 822 {
 823         struct hdmi_spec *spec = codec->spec;
 824         struct hdmi_eld *eld;
 825         struct hda_pcm_stream *codec_pars;
 826         struct snd_pcm_runtime *runtime = substream->runtime;
 827         unsigned int idx;
 828
 829         for (idx = 0; idx < spec->num_cvts; idx++)
 830                 if (hinfo->nid == spec->cvt[idx])
 831                         break;
 832         if (snd_BUG_ON(idx >= spec->num_cvts) ||
 833             snd_BUG_ON(idx >= spec->num_pins))
 834                 return -EINVAL;
 835
 836         /* save the PCM info the codec provides */
 837         codec_pars = &spec->codec_pcm_pars[idx];
 838         if (!codec_pars->rates)
 839                 *codec_pars = *hinfo;
 840
 841         eld = &spec->sink_eld[idx];
 842         if (!static_hdmi_pcm && eld->eld_valid && eld->sad_count > 0) {
 843                 hdmi_eld_update_pcm_info(eld, hinfo, codec_pars);
 844                 if (hinfo->channels_min > hinfo->channels_max ||
 845                     !hinfo->rates || !hinfo->formats)
 846                         return -ENODEV;
 847         } else {
 848                 /* fallback to the codec default */
 849                 hinfo->channels_max = codec_pars->channels_max;
 850                 hinfo->rates = codec_pars->rates;
 851                 hinfo->formats = codec_pars->formats;
 852                 hinfo->maxbps = codec_pars->maxbps;
 853         }
 854         /* store the updated parameters */
 855         runtime->hw.channels_min = hinfo->channels_min;
 856         runtime->hw.channels_max = hinfo->channels_max;
 857         runtime->hw.formats = hinfo->formats;
 858         runtime->hw.rates = hinfo->rates;
 859
 860         snd_pcm_hw_constraint_step(substream->runtime, 0,
 861                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
 862         return 0;
 863 }
 864
 865 /*
 866  * HDA/HDMI auto parsing
 867  */
 868 static int hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
 869 {
 870         struct hdmi_spec *spec = codec->spec;
 871         hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
 872         int conn_len, curr;
 873         int index;
 874
 875         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
 876                 snd_printk(KERN_WARNING
 877                            "HDMI: pin %d wcaps %#x "
 878                            "does not support connection list\n",
 879                            pin_nid, get_wcaps(codec, pin_nid));
 880                 return -EINVAL;
 881         }
 882
 883         conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
 884                                            HDA_MAX_CONNECTIONS);
 885         if (conn_len > 1)
 886                 curr = snd_hda_codec_read(codec, pin_nid, 0,
 887                                           AC_VERB_GET_CONNECT_SEL, 0);
 888         else
 889                 curr = 0;
 890
 891         index = hda_node_index(spec->pin, pin_nid);
 892         if (index < 0)
 893                 return -EINVAL;
 894
 895         spec->pin_cvt[index] = conn_list[curr];
 896
 897         return 0;
 898 }
 899
 900 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
 901                                struct hdmi_eld *eld)
 902 {
 903         int present = snd_hda_pin_sense(codec, pin_nid);
 904
 905         eld->monitor_present    = !!(present & AC_PINSENSE_PRESENCE);
 906         eld->eld_valid          = !!(present & AC_PINSENSE_ELDV);
 907
 908         if (present & AC_PINSENSE_ELDV)
 909                 hdmi_get_show_eld(codec, pin_nid, eld);
 910 }
 911
 912 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 913 {
 914         struct hdmi_spec *spec = codec->spec;
 915
 916         if (spec->num_pins >= MAX_HDMI_PINS) {
 917                 snd_printk(KERN_WARNING
 918                            "HDMI: no space for pin %d\n", pin_nid);
 919                 return -E2BIG;
 920         }
 921
 922         hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
 923
 924         spec->pin[spec->num_pins] = pin_nid;
 925         spec->num_pins++;
 926
 927         return hdmi_read_pin_conn(codec, pin_nid);
 928 }
 929
 930 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
 931 {
 932         int i, found_pin = 0;
 933         struct hdmi_spec *spec = codec->spec;
 934
 935         for (i = 0; i < spec->num_pins; i++)
 936                 if (nid == spec->pin_cvt[i]) {
 937                         found_pin = 1;
 938                         break;
 939                 }
 940
 941         if (!found_pin) {
 942                 snd_printdd("HDMI: Skipping node %d (no connection)\n", nid);
 943                 return -EINVAL;
 944         }
 945
 946         if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
 947                 return -E2BIG;
 948
 949         spec->cvt[spec->num_cvts] = nid;
 950         spec->num_cvts++;
 951
 952         return 0;
 953 }
 954
 955 static int hdmi_parse_codec(struct hda_codec *codec)
 956 {
 957         hda_nid_t nid;
 958         int i, nodes;
 959         int num_tmp_cvts = 0;
 960         hda_nid_t tmp_cvt[MAX_HDMI_CVTS];
 961
 962         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
 963         if (!nid || nodes < 0) {
 964                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
 965                 return -EINVAL;
 966         }
 967
 968         for (i = 0; i < nodes; i++, nid++) {
 969                 unsigned int caps;
 970                 unsigned int type;
 971                 unsigned int config;
 972
 973                 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
 974                 type = get_wcaps_type(caps);
 975
 976                 if (!(caps & AC_WCAP_DIGITAL))
 977                         continue;
 978
 979                 switch (type) {
 980                 case AC_WID_AUD_OUT:
 981                         if (num_tmp_cvts >= MAX_HDMI_CVTS) {
 982                                 snd_printk(KERN_WARNING
 983                                            "HDMI: no space for converter %d\n", nid);
 984                                 continue;
 985                         }
 986                         tmp_cvt[num_tmp_cvts] = nid;
 987                         num_tmp_cvts++;
 988                         break;
 989                 case AC_WID_PIN:
 990                         caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
 991                         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
 992                                 continue;
 993
 994                         config = snd_hda_codec_read(codec, nid, 0,
 995                                              AC_VERB_GET_CONFIG_DEFAULT, 0);
 996                         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
 997                                 continue;
 998
 999                         hdmi_add_pin(codec, nid);
1000                         break;
1001                 }
1002         }
1003
1004         for (i = 0; i < num_tmp_cvts; i++)
1005                 hdmi_add_cvt(codec, tmp_cvt[i]);
1006
1007         /*
1008          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1009          * can be lost and presence sense verb will become inaccurate if the
1010          * HDA link is powered off at hot plug or hw initialization time.
1011          */
1012 #ifdef CONFIG_SND_HDA_POWER_SAVE
1013         if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1014               AC_PWRST_EPSS))
1015                 codec->bus->power_keep_link_on = 1;
1016 #endif
1017
1018         return 0;
1019 }
1020
1021 /*
1022  */
1023 static char *generic_hdmi_pcm_names[MAX_HDMI_CVTS] = {
1024         "HDMI 0",
1025         "HDMI 1",
1026         "HDMI 2",
1027 };
1028
1029 /*
1030  * HDMI callbacks
1031  */
1032
1033 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1034                                            struct hda_codec *codec,
1035                                            unsigned int stream_tag,
1036                                            unsigned int format,
1037                                            struct snd_pcm_substream *substream)
1038 {
1039         hdmi_set_channel_count(codec, hinfo->nid,
1040                                substream->runtime->channels);
1041
1042         hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
1043
1044         return hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
1045 }
1046
1047 static struct hda_pcm_stream generic_hdmi_pcm_playback = {
1048         .substreams = 1,
1049         .channels_min = 2,
1050         .ops = {
1051                 .open = hdmi_pcm_open,
1052                 .prepare = generic_hdmi_playback_pcm_prepare,
1053         },
1054 };
1055
1056 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1057 {
1058         struct hdmi_spec *spec = codec->spec;
1059         struct hda_pcm *info = spec->pcm_rec;
1060         int i;
1061
1062         codec->num_pcms = spec->num_cvts;
1063         codec->pcm_info = info;
1064
1065         for (i = 0; i < codec->num_pcms; i++, info++) {
1066                 unsigned int chans;
1067                 struct hda_pcm_stream *pstr;
1068
1069                 chans = get_wcaps(codec, spec->cvt[i]);
1070                 chans = get_wcaps_channels(chans);
1071
1072                 info->name = generic_hdmi_pcm_names[i];
1073                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1074                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1075                 if (spec->pcm_playback)
1076                         *pstr = *spec->pcm_playback;
1077                 else
1078                         *pstr = generic_hdmi_pcm_playback;
1079                 pstr->nid = spec->cvt[i];
1080                 if (pstr->channels_max <= 2 && chans && chans <= 16)
1081                         pstr->channels_max = chans;
1082         }
1083
1084         return 0;
1085 }
1086
1087 static int generic_hdmi_build_controls(struct hda_codec *codec)
1088 {
1089         struct hdmi_spec *spec = codec->spec;
1090         int err;
1091         int i;
1092
1093         for (i = 0; i < codec->num_pcms; i++) {
1094                 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
1095                 if (err < 0)
1096                         return err;
1097         }
1098
1099         return 0;
1100 }
1101
1102 static int generic_hdmi_init(struct hda_codec *codec)
1103 {
1104         struct hdmi_spec *spec = codec->spec;
1105         int i;
1106
1107         for (i = 0; spec->pin[i]; i++) {
1108                 hdmi_enable_output(codec, spec->pin[i]);
1109                 snd_hda_codec_write(codec, spec->pin[i], 0,
1110                                     AC_VERB_SET_UNSOLICITED_ENABLE,
1111                                     AC_USRSP_EN | spec->pin[i]);
1112         }
1113         return 0;
1114 }
1115
1116 static void generic_hdmi_free(struct hda_codec *codec)
1117 {
1118         struct hdmi_spec *spec = codec->spec;
1119         int i;
1120
1121         for (i = 0; i < spec->num_pins; i++)
1122                 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
1123
1124         kfree(spec);
1125 }
1126
1127 static struct hda_codec_ops generic_hdmi_patch_ops = {
1128         .init                   = generic_hdmi_init,
1129         .free                   = generic_hdmi_free,
1130         .build_pcms             = generic_hdmi_build_pcms,
1131         .build_controls         = generic_hdmi_build_controls,
1132         .unsol_event            = hdmi_unsol_event,
1133 };
1134
1135 static int patch_generic_hdmi(struct hda_codec *codec)
1136 {
1137         struct hdmi_spec *spec;
1138         int i;
1139
1140         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1141         if (spec == NULL)
1142                 return -ENOMEM;
1143
1144         codec->spec = spec;
1145         if (hdmi_parse_codec(codec) < 0) {
1146                 codec->spec = NULL;
1147                 kfree(spec);
1148                 return -EINVAL;
1149         }
1150         codec->patch_ops = generic_hdmi_patch_ops;
1151
1152         for (i = 0; i < spec->num_pins; i++)
1153                 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
1154
1155         init_channel_allocations();
1156
1157         return 0;
1158 }
1159
1160 /*
1161  * Nvidia specific implementations
1162  */
1163
1164 #define Nv_VERB_SET_Channel_Allocation          0xF79
1165 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
1166 #define Nv_VERB_SET_Audio_Protection_On         0xF98
1167 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
1168
1169 #define nvhdmi_master_con_nid_7x        0x04
1170 #define nvhdmi_master_pin_nid_7x        0x05
1171
1172 static hda_nid_t nvhdmi_con_nids_7x[4] = {
1173         /*front, rear, clfe, rear_surr */
1174         0x6, 0x8, 0xa, 0xc,
1175 };
1176
1177 static struct hda_verb nvhdmi_basic_init_7x[] = {
1178         /* set audio protect on */
1179         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1180         /* enable digital output on pin widget */
1181         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1182         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1183         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1184         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1185         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1186         {} /* terminator */
1187 };
1188
1189 #ifdef LIMITED_RATE_FMT_SUPPORT
1190 /* support only the safe format and rate */
1191 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
1192 #define SUPPORTED_MAXBPS        16
1193 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
1194 #else
1195 /* support all rates and formats */
1196 #define SUPPORTED_RATES \
1197         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1198         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1199          SNDRV_PCM_RATE_192000)
1200 #define SUPPORTED_MAXBPS        24
1201 #define SUPPORTED_FORMATS \
1202         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1203 #endif
1204
1205 static int nvhdmi_7x_init(struct hda_codec *codec)
1206 {
1207         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1208         return 0;
1209 }
1210
1211 static unsigned int channels_2_6_8[] = {
1212         2, 6, 8
1213 };
1214
1215 static unsigned int channels_2_8[] = {
1216         2, 8
1217 };
1218
1219 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1220         .count = ARRAY_SIZE(channels_2_6_8),
1221         .list = channels_2_6_8,
1222         .mask = 0,
1223 };
1224
1225 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1226         .count = ARRAY_SIZE(channels_2_8),
1227         .list = channels_2_8,
1228         .mask = 0,
1229 };
1230
1231 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1232                                     struct hda_codec *codec,
1233                                     struct snd_pcm_substream *substream)
1234 {
1235         struct hdmi_spec *spec = codec->spec;
1236         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1237
1238         switch (codec->preset->id) {
1239         case 0x10de0002:
1240         case 0x10de0003:
1241         case 0x10de0005:
1242         case 0x10de0006:
1243                 hw_constraints_channels = &hw_constraints_2_8_channels;
1244                 break;
1245         case 0x10de0007:
1246                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1247                 break;
1248         default:
1249                 break;
1250         }
1251
1252         if (hw_constraints_channels != NULL) {
1253                 snd_pcm_hw_constraint_list(substream->runtime, 0,
1254                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1255                                 hw_constraints_channels);
1256         } else {
1257                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1258                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1259         }
1260
1261         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1262 }
1263
1264 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1265                                      struct hda_codec *codec,
1266                                      struct snd_pcm_substream *substream)
1267 {
1268         struct hdmi_spec *spec = codec->spec;
1269         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1270 }
1271
1272 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1273                                        struct hda_codec *codec,
1274                                        unsigned int stream_tag,
1275                                        unsigned int format,
1276                                        struct snd_pcm_substream *substream)
1277 {
1278         struct hdmi_spec *spec = codec->spec;
1279         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1280                                              stream_tag, format, substream);
1281 }
1282
1283 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1284                                                     int channels)
1285 {
1286         unsigned int chanmask;
1287         int chan = channels ? (channels - 1) : 1;
1288
1289         switch (channels) {
1290         default:
1291         case 0:
1292         case 2:
1293                 chanmask = 0x00;
1294                 break;
1295         case 4:
1296                 chanmask = 0x08;
1297                 break;
1298         case 6:
1299                 chanmask = 0x0b;
1300                 break;
1301         case 8:
1302                 chanmask = 0x13;
1303                 break;
1304         }
1305
1306         /* Set the audio infoframe channel allocation and checksum fields.  The
1307          * channel count is computed implicitly by the hardware. */
1308         snd_hda_codec_write(codec, 0x1, 0,
1309                         Nv_VERB_SET_Channel_Allocation, chanmask);
1310
1311         snd_hda_codec_write(codec, 0x1, 0,
1312                         Nv_VERB_SET_Info_Frame_Checksum,
1313                         (0x71 - chan - chanmask));
1314 }
1315
1316 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1317                                    struct hda_codec *codec,
1318                                    struct snd_pcm_substream *substream)
1319 {
1320         struct hdmi_spec *spec = codec->spec;
1321         int i;
1322
1323         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1324                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1325         for (i = 0; i < 4; i++) {
1326                 /* set the stream id */
1327                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1328                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
1329                 /* set the stream format */
1330                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1331                                 AC_VERB_SET_STREAM_FORMAT, 0);
1332         }
1333
1334         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1335          * streams are disabled. */
1336         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1337
1338         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1339 }
1340
1341 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1342                                      struct hda_codec *codec,
1343                                      unsigned int stream_tag,
1344                                      unsigned int format,
1345                                      struct snd_pcm_substream *substream)
1346 {
1347         int chs;
1348         unsigned int dataDCC1, dataDCC2, channel_id;
1349         int i;
1350
1351         mutex_lock(&codec->spdif_mutex);
1352
1353         chs = substream->runtime->channels;
1354
1355         dataDCC1 = AC_DIG1_ENABLE | AC_DIG1_COPYRIGHT;
1356         dataDCC2 = 0x2;
1357
1358         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1359         if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE))
1360                 snd_hda_codec_write(codec,
1361                                 nvhdmi_master_con_nid_7x,
1362                                 0,
1363                                 AC_VERB_SET_DIGI_CONVERT_1,
1364                                 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
1365
1366         /* set the stream id */
1367         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1368                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1369
1370         /* set the stream format */
1371         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1372                         AC_VERB_SET_STREAM_FORMAT, format);
1373
1374         /* turn on again (if needed) */
1375         /* enable and set the channel status audio/data flag */
1376         if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) {
1377                 snd_hda_codec_write(codec,
1378                                 nvhdmi_master_con_nid_7x,
1379                                 0,
1380                                 AC_VERB_SET_DIGI_CONVERT_1,
1381                                 codec->spdif_ctls & 0xff);
1382                 snd_hda_codec_write(codec,
1383                                 nvhdmi_master_con_nid_7x,
1384                                 0,
1385                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1386         }
1387
1388         for (i = 0; i < 4; i++) {
1389                 if (chs == 2)
1390                         channel_id = 0;
1391                 else
1392                         channel_id = i * 2;
1393
1394                 /* turn off SPDIF once;
1395                  *otherwise the IEC958 bits won't be updated
1396                  */
1397                 if (codec->spdif_status_reset &&
1398                 (codec->spdif_ctls & AC_DIG1_ENABLE))
1399                         snd_hda_codec_write(codec,
1400                                 nvhdmi_con_nids_7x[i],
1401                                 0,
1402                                 AC_VERB_SET_DIGI_CONVERT_1,
1403                                 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
1404                 /* set the stream id */
1405                 snd_hda_codec_write(codec,
1406                                 nvhdmi_con_nids_7x[i],
1407                                 0,
1408                                 AC_VERB_SET_CHANNEL_STREAMID,
1409                                 (stream_tag << 4) | channel_id);
1410                 /* set the stream format */
1411                 snd_hda_codec_write(codec,
1412                                 nvhdmi_con_nids_7x[i],
1413                                 0,
1414                                 AC_VERB_SET_STREAM_FORMAT,
1415                                 format);
1416                 /* turn on again (if needed) */
1417                 /* enable and set the channel status audio/data flag */
1418                 if (codec->spdif_status_reset &&
1419                 (codec->spdif_ctls & AC_DIG1_ENABLE)) {
1420                         snd_hda_codec_write(codec,
1421                                         nvhdmi_con_nids_7x[i],
1422                                         0,
1423                                         AC_VERB_SET_DIGI_CONVERT_1,
1424                                         codec->spdif_ctls & 0xff);
1425                         snd_hda_codec_write(codec,
1426                                         nvhdmi_con_nids_7x[i],
1427                                         0,
1428                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1429                 }
1430         }
1431
1432         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1433
1434         mutex_unlock(&codec->spdif_mutex);
1435         return 0;
1436 }
1437
1438 static struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1439         .substreams = 1,
1440         .channels_min = 2,
1441         .channels_max = 8,
1442         .nid = nvhdmi_master_con_nid_7x,
1443         .rates = SUPPORTED_RATES,
1444         .maxbps = SUPPORTED_MAXBPS,
1445         .formats = SUPPORTED_FORMATS,
1446         .ops = {
1447                 .open = simple_playback_pcm_open,
1448                 .close = nvhdmi_8ch_7x_pcm_close,
1449                 .prepare = nvhdmi_8ch_7x_pcm_prepare
1450         },
1451 };
1452
1453 static struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1454         .substreams = 1,
1455         .channels_min = 2,
1456         .channels_max = 2,
1457         .nid = nvhdmi_master_con_nid_7x,
1458         .rates = SUPPORTED_RATES,
1459         .maxbps = SUPPORTED_MAXBPS,
1460         .formats = SUPPORTED_FORMATS,
1461         .ops = {
1462                 .open = simple_playback_pcm_open,
1463                 .close = simple_playback_pcm_close,
1464                 .prepare = simple_playback_pcm_prepare
1465         },
1466 };
1467
1468 static struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1469         .build_controls = generic_hdmi_build_controls,
1470         .build_pcms = generic_hdmi_build_pcms,
1471         .init = nvhdmi_7x_init,
1472         .free = generic_hdmi_free,
1473 };
1474
1475 static struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1476         .build_controls = generic_hdmi_build_controls,
1477         .build_pcms = generic_hdmi_build_pcms,
1478         .init = nvhdmi_7x_init,
1479         .free = generic_hdmi_free,
1480 };
1481
1482 static int patch_nvhdmi_8ch_89(struct hda_codec *codec)
1483 {
1484         struct hdmi_spec *spec;
1485         int err = patch_generic_hdmi(codec);
1486
1487         if (err < 0)
1488                 return err;
1489         spec = codec->spec;
1490         spec->old_pin_detect = 1;
1491         return 0;
1492 }
1493
1494 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1495 {
1496         struct hdmi_spec *spec;
1497
1498         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1499         if (spec == NULL)
1500                 return -ENOMEM;
1501
1502         codec->spec = spec;
1503
1504         spec->multiout.num_dacs = 0;  /* no analog */
1505         spec->multiout.max_channels = 2;
1506         spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1507         spec->old_pin_detect = 1;
1508         spec->num_cvts = 1;
1509         spec->cvt[0] = nvhdmi_master_con_nid_7x;
1510         spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1511
1512         codec->patch_ops = nvhdmi_patch_ops_2ch;
1513
1514         return 0;
1515 }
1516
1517 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1518 {
1519         struct hdmi_spec *spec;
1520         int err = patch_nvhdmi_2ch(codec);
1521
1522         if (err < 0)
1523                 return err;
1524         spec = codec->spec;
1525         spec->multiout.max_channels = 8;
1526         spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1527         codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1528
1529         /* Initialize the audio infoframe channel mask and checksum to something
1530          * valid */
1531         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1532
1533         return 0;
1534 }
1535
1536 /*
1537  * ATI-specific implementations
1538  *
1539  * FIXME: we may omit the whole this and use the generic code once after
1540  * it's confirmed to work.
1541  */
1542
1543 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
1544 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
1545
1546 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1547                                         struct hda_codec *codec,
1548                                         unsigned int stream_tag,
1549                                         unsigned int format,
1550                                         struct snd_pcm_substream *substream)
1551 {
1552         struct hdmi_spec *spec = codec->spec;
1553         int chans = substream->runtime->channels;
1554         int i, err;
1555
1556         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1557                                           substream);
1558         if (err < 0)
1559                 return err;
1560         snd_hda_codec_write(codec, spec->cvt[0], 0, AC_VERB_SET_CVT_CHAN_COUNT,
1561                             chans - 1);
1562         /* FIXME: XXX */
1563         for (i = 0; i < chans; i++) {
1564                 snd_hda_codec_write(codec, spec->cvt[0], 0,
1565                                     AC_VERB_SET_HDMI_CHAN_SLOT,
1566                                     (i << 4) | i);
1567         }
1568         return 0;
1569 }
1570
1571 static struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1572         .substreams = 1,
1573         .channels_min = 2,
1574         .channels_max = 2,
1575         .nid = ATIHDMI_CVT_NID,
1576         .ops = {
1577                 .open = simple_playback_pcm_open,
1578                 .close = simple_playback_pcm_close,
1579                 .prepare = atihdmi_playback_pcm_prepare
1580         },
1581 };
1582
1583 static struct hda_verb atihdmi_basic_init[] = {
1584         /* enable digital output on pin widget */
1585         { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1586         {} /* terminator */
1587 };
1588
1589 static int atihdmi_init(struct hda_codec *codec)
1590 {
1591         struct hdmi_spec *spec = codec->spec;
1592
1593         snd_hda_sequence_write(codec, atihdmi_basic_init);
1594         /* SI codec requires to unmute the pin */
1595         if (get_wcaps(codec, spec->pin[0]) & AC_WCAP_OUT_AMP)
1596                 snd_hda_codec_write(codec, spec->pin[0], 0,
1597                                     AC_VERB_SET_AMP_GAIN_MUTE,
1598                                     AMP_OUT_UNMUTE);
1599         return 0;
1600 }
1601
1602 static struct hda_codec_ops atihdmi_patch_ops = {
1603         .build_controls = generic_hdmi_build_controls,
1604         .build_pcms = generic_hdmi_build_pcms,
1605         .init = atihdmi_init,
1606         .free = generic_hdmi_free,
1607 };
1608
1609
1610 static int patch_atihdmi(struct hda_codec *codec)
1611 {
1612         struct hdmi_spec *spec;
1613
1614         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1615         if (spec == NULL)
1616                 return -ENOMEM;
1617
1618         codec->spec = spec;
1619
1620         spec->multiout.num_dacs = 0;      /* no analog */
1621         spec->multiout.max_channels = 2;
1622         spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1623         spec->num_cvts = 1;
1624         spec->cvt[0] = ATIHDMI_CVT_NID;
1625         spec->pin[0] = ATIHDMI_PIN_NID;
1626         spec->pcm_playback = &atihdmi_pcm_digital_playback;
1627
1628         codec->patch_ops = atihdmi_patch_ops;
1629
1630         return 0;
1631 }
1632
1633
1634 /*
1635  * patch entries
1636  */
1637 static struct hda_codec_preset snd_hda_preset_hdmi[] = {
1638 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1639 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1640 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
1641 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
1642 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
1643 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
1644 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
1645 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1646 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1647 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1648 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1649 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
1650 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1651 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1652 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi_8ch_89 },
1653 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1654 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1655 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1656 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1657 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1658 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1659 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1660 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1661 /* 17 is known to be absent */
1662 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1663 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1664 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1665 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1666 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1667 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1668 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1669 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1670 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1671 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi_8ch_89 },
1672 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
1673 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
1674 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1675 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
1676 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
1677 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
1678 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1679 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1680 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
1681 {} /* terminator */
1682 };
1683
1684 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1685 MODULE_ALIAS("snd-hda-codec-id:10027919");
1686 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1687 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1688 MODULE_ALIAS("snd-hda-codec-id:10951390");
1689 MODULE_ALIAS("snd-hda-codec-id:10951392");
1690 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1691 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1692 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1693 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1694 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1695 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1696 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1697 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1698 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1699 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1700 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1701 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1702 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1703 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1704 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1705 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1706 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1707 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1708 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1709 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1710 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1711 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1712 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1713 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1714 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1715 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1716 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1717 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1718 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1719 MODULE_ALIAS("snd-hda-codec-id:80860054");
1720 MODULE_ALIAS("snd-hda-codec-id:80862801");
1721 MODULE_ALIAS("snd-hda-codec-id:80862802");
1722 MODULE_ALIAS("snd-hda-codec-id:80862803");
1723 MODULE_ALIAS("snd-hda-codec-id:80862804");
1724 MODULE_ALIAS("snd-hda-codec-id:80862805");
1725 MODULE_ALIAS("snd-hda-codec-id:808629fb");
1726
1727 MODULE_LICENSE("GPL");
1728 MODULE_DESCRIPTION("HDMI HD-audio codec");
1729 MODULE_ALIAS("snd-hda-codec-intelhdmi");
1730 MODULE_ALIAS("snd-hda-codec-nvhdmi");
1731 MODULE_ALIAS("snd-hda-codec-atihdmi");
1732
1733 static struct hda_codec_preset_list intel_list = {
1734         .preset = snd_hda_preset_hdmi,
1735         .owner = THIS_MODULE,
1736 };
1737
1738 static int __init patch_hdmi_init(void)
1739 {
1740         return snd_hda_add_codec_preset(&intel_list);
1741 }
1742
1743 static void __exit patch_hdmi_exit(void)
1744 {
1745         snd_hda_delete_codec_preset(&intel_list);
1746 }
1747
1748 module_init(patch_hdmi_init)
1749 module_exit(patch_hdmi_exit)