drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2010  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 struct dig_t dm_digtable;
  31 static struct ps_t dm_pstable;
  32
  33 static const u32 ofdmswing_table[OFDM_TABLE_SIZE] = {
  34         0x7f8001fe,
  35         0x788001e2,
  36         0x71c001c7,
  37         0x6b8001ae,
  38         0x65400195,
  39         0x5fc0017f,
  40         0x5a400169,
  41         0x55400155,
  42         0x50800142,
  43         0x4c000130,
  44         0x47c0011f,
  45         0x43c0010f,
  46         0x40000100,
  47         0x3c8000f2,
  48         0x390000e4,
  49         0x35c000d7,
  50         0x32c000cb,
  51         0x300000c0,
  52         0x2d4000b5,
  53         0x2ac000ab,
  54         0x288000a2,
  55         0x26000098,
  56         0x24000090,
  57         0x22000088,
  58         0x20000080,
  59         0x1e400079,
  60         0x1c800072,
  61         0x1b00006c,
  62         0x19800066,
  63         0x18000060,
  64         0x16c0005b,
  65         0x15800056,
  66         0x14400051,
  67         0x1300004c,
  68         0x12000048,
  69         0x11000044,
  70         0x10000040,
  71 };
  72
  73 static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
  74         {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
  75         {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
  76         {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
  77         {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
  78         {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
  79         {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
  80         {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
  81         {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
  82         {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
  83         {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
  84         {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
  85         {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
  86         {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
  87         {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
  88         {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
  89         {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
  90         {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
  91         {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
  92         {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
  93         {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
  94         {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
  95         {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
  96         {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
  97         {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
  98         {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
  99         {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
 100         {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
 101         {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
 102         {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
 103         {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
 104         {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
 105         {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
 106         {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
 107 };
 108
 109 static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
 110         {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
 111         {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
 112         {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
 113         {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
 114         {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
 115         {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
 116         {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
 117         {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
 118         {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
 119         {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
 120         {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
 121         {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
 122         {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
 123         {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
 124         {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
 125         {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
 126         {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
 127         {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
 128         {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
 129         {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 130         {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 131         {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
 132         {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
 133         {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
 134         {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
 135         {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
 136         {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
 137         {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
 138         {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
 139         {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
 140         {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
 141         {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
 142         {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
 143 };
 144
 145 static void rtl92c_dm_diginit(struct ieee80211_hw *hw)
 146 {
 147         dm_digtable.dig_enable_flag = true;
 148         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 149         dm_digtable.cur_igvalue = 0x20;
 150         dm_digtable.pre_igvalue = 0x0;
 151         dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
 152         dm_digtable.presta_connectstate = DIG_STA_DISCONNECT;
 153         dm_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
 154         dm_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;
 155         dm_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;
 156         dm_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
 157         dm_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
 158         dm_digtable.rx_gain_range_max = DM_DIG_MAX;
 159         dm_digtable.rx_gain_range_min = DM_DIG_MIN;
 160         dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
 161         dm_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;
 162         dm_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;
 163         dm_digtable.pre_cck_pd_state = CCK_PD_STAGE_MAX;
 164         dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
 165 }
 166
 167 static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw)
 168 {
 169         struct rtl_priv *rtlpriv = rtl_priv(hw);
 170         long rssi_val_min = 0;
 171
 172         if ((dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) &&
 173             (dm_digtable.cursta_connectctate == DIG_STA_CONNECT)) {
 174                 if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb != 0)
 175                         rssi_val_min =
 176                             (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb >
 177                              rtlpriv->dm.undecorated_smoothed_pwdb) ?
 178                             rtlpriv->dm.undecorated_smoothed_pwdb :
 179                             rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 180                 else
 181                         rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
 182         } else if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT ||
 183                    dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT) {
 184                 rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
 185         } else if (dm_digtable.curmultista_connectstate ==
 186                    DIG_MULTISTA_CONNECT) {
 187                 rssi_val_min = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 188         }
 189
 190         return (u8) rssi_val_min;
 191 }
 192
 193 static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
 194 {
 195         u32 ret_value;
 196         struct rtl_priv *rtlpriv = rtl_priv(hw);
 197         struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
 198
 199         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD);
 200         falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
 201
 202         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD);
 203         falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
 204         falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
 205
 206         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD);
 207         falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
 208         falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
 209             falsealm_cnt->cnt_rate_illegal +
 210             falsealm_cnt->cnt_crc8_fail + falsealm_cnt->cnt_mcs_fail;
 211
 212         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, BIT(14), 1);
 213         ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, MASKBYTE0);
 214         falsealm_cnt->cnt_cck_fail = ret_value;
 215
 216         ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, MASKBYTE3);
 217         falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
 218         falsealm_cnt->cnt_all = (falsealm_cnt->cnt_parity_fail +
 219                                  falsealm_cnt->cnt_rate_illegal +
 220                                  falsealm_cnt->cnt_crc8_fail +
 221                                  falsealm_cnt->cnt_mcs_fail +
 222                                  falsealm_cnt->cnt_cck_fail);
 223
 224         rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
 225         rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
 226         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
 227         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
 228
 229         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 230                  ("cnt_parity_fail = %d, cnt_rate_illegal = %d, "
 231                   "cnt_crc8_fail = %d, cnt_mcs_fail = %d\n",
 232                   falsealm_cnt->cnt_parity_fail,
 233                   falsealm_cnt->cnt_rate_illegal,
 234                   falsealm_cnt->cnt_crc8_fail, falsealm_cnt->cnt_mcs_fail));
 235
 236         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 237                  ("cnt_ofdm_fail = %x, cnt_cck_fail = %x, cnt_all = %x\n",
 238                   falsealm_cnt->cnt_ofdm_fail,
 239                   falsealm_cnt->cnt_cck_fail, falsealm_cnt->cnt_all));
 240 }
 241
 242 static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw)
 243 {
 244         struct rtl_priv *rtlpriv = rtl_priv(hw);
 245         u8 value_igi = dm_digtable.cur_igvalue;
 246
 247         if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH0)
 248                 value_igi--;
 249         else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH1)
 250                 value_igi += 0;
 251         else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH2)
 252                 value_igi++;
 253         else if (rtlpriv->falsealm_cnt.cnt_all >= DM_DIG_FA_TH2)
 254                 value_igi += 2;
 255         if (value_igi > DM_DIG_FA_UPPER)
 256                 value_igi = DM_DIG_FA_UPPER;
 257         else if (value_igi < DM_DIG_FA_LOWER)
 258                 value_igi = DM_DIG_FA_LOWER;
 259         if (rtlpriv->falsealm_cnt.cnt_all > 10000)
 260                 value_igi = 0x32;
 261
 262         dm_digtable.cur_igvalue = value_igi;
 263         rtl92c_dm_write_dig(hw);
 264 }
 265
 266 static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw)
 267 {
 268         struct rtl_priv *rtlpriv = rtl_priv(hw);
 269
 270         if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable.fa_highthresh) {
 271                 if ((dm_digtable.backoff_val - 2) <
 272                     dm_digtable.backoff_val_range_min)
 273                         dm_digtable.backoff_val =
 274                             dm_digtable.backoff_val_range_min;
 275                 else
 276                         dm_digtable.backoff_val -= 2;
 277         } else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable.fa_lowthresh) {
 278                 if ((dm_digtable.backoff_val + 2) >
 279                     dm_digtable.backoff_val_range_max)
 280                         dm_digtable.backoff_val =
 281                             dm_digtable.backoff_val_range_max;
 282                 else
 283                         dm_digtable.backoff_val += 2;
 284         }
 285
 286         if ((dm_digtable.rssi_val_min + 10 - dm_digtable.backoff_val) >
 287             dm_digtable.rx_gain_range_max)
 288                 dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_max;
 289         else if ((dm_digtable.rssi_val_min + 10 -
 290                   dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
 291                 dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_min;
 292         else
 293                 dm_digtable.cur_igvalue = dm_digtable.rssi_val_min + 10 -
 294                     dm_digtable.backoff_val;
 295
 296         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 297                  ("rssi_val_min = %x backoff_val %x\n",
 298                   dm_digtable.rssi_val_min, dm_digtable.backoff_val));
 299
 300         rtl92c_dm_write_dig(hw);
 301 }
 302
 303 static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
 304 {
 305         static u8 binitialized; /* initialized to false */
 306         struct rtl_priv *rtlpriv = rtl_priv(hw);
 307         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 308         long rssi_strength = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 309         bool b_multi_sta = false;
 310
 311         if (mac->opmode == NL80211_IFTYPE_ADHOC)
 312                 b_multi_sta = true;
 313
 314         if ((b_multi_sta == false) || (dm_digtable.cursta_connectctate !=
 315                                        DIG_STA_DISCONNECT)) {
 316                 binitialized = false;
 317                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 318                 return;
 319         } else if (binitialized == false) {
 320                 binitialized = true;
 321                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
 322                 dm_digtable.cur_igvalue = 0x20;
 323                 rtl92c_dm_write_dig(hw);
 324         }
 325
 326         if (dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) {
 327                 if ((rssi_strength < dm_digtable.rssi_lowthresh) &&
 328                     (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) {
 329
 330                         if (dm_digtable.dig_ext_port_stage ==
 331                             DIG_EXT_PORT_STAGE_2) {
 332                                 dm_digtable.cur_igvalue = 0x20;
 333                                 rtl92c_dm_write_dig(hw);
 334                         }
 335
 336                         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_1;
 337                 } else if (rssi_strength > dm_digtable.rssi_highthresh) {
 338                         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_2;
 339                         rtl92c_dm_ctrl_initgain_by_fa(hw);
 340                 }
 341         } else if (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) {
 342                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
 343                 dm_digtable.cur_igvalue = 0x20;
 344                 rtl92c_dm_write_dig(hw);
 345         }
 346
 347         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 348                  ("curmultista_connectstate = "
 349                   "%x dig_ext_port_stage %x\n",
 350                   dm_digtable.curmultista_connectstate,
 351                   dm_digtable.dig_ext_port_stage));
 352 }
 353
 354 static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw)
 355 {
 356         struct rtl_priv *rtlpriv = rtl_priv(hw);
 357
 358         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 359                  ("presta_connectstate = %x,"
 360                   " cursta_connectctate = %x\n",
 361                   dm_digtable.presta_connectstate,
 362                   dm_digtable.cursta_connectctate));
 363
 364         if (dm_digtable.presta_connectstate == dm_digtable.cursta_connectctate
 365             || dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT
 366             || dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
 367
 368                 if (dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {
 369                         dm_digtable.rssi_val_min =
 370                             rtl92c_dm_initial_gain_min_pwdb(hw);
 371                         rtl92c_dm_ctrl_initgain_by_rssi(hw);
 372                 }
 373         } else {
 374                 dm_digtable.rssi_val_min = 0;
 375                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 376                 dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
 377                 dm_digtable.cur_igvalue = 0x20;
 378                 dm_digtable.pre_igvalue = 0;
 379                 rtl92c_dm_write_dig(hw);
 380         }
 381 }
 382
 383 static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
 384 {
 385         struct rtl_priv *rtlpriv = rtl_priv(hw);
 386         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 387
 388         if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
 389                 dm_digtable.rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw);
 390
 391                 if (dm_digtable.pre_cck_pd_state == CCK_PD_STAGE_LowRssi) {
 392                         if (dm_digtable.rssi_val_min <= 25)
 393                                 dm_digtable.cur_cck_pd_state =
 394                                     CCK_PD_STAGE_LowRssi;
 395                         else
 396                                 dm_digtable.cur_cck_pd_state =
 397                                     CCK_PD_STAGE_HighRssi;
 398                 } else {
 399                         if (dm_digtable.rssi_val_min <= 20)
 400                                 dm_digtable.cur_cck_pd_state =
 401                                     CCK_PD_STAGE_LowRssi;
 402                         else
 403                                 dm_digtable.cur_cck_pd_state =
 404                                     CCK_PD_STAGE_HighRssi;
 405                 }
 406         } else {
 407                 dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
 408         }
 409
 410         if (dm_digtable.pre_cck_pd_state != dm_digtable.cur_cck_pd_state) {
 411                 if (dm_digtable.cur_cck_pd_state == CCK_PD_STAGE_LowRssi) {
 412                         if (rtlpriv->falsealm_cnt.cnt_cck_fail > 800)
 413                                 dm_digtable.cur_cck_fa_state =
 414                                     CCK_FA_STAGE_High;
 415                         else
 416                                 dm_digtable.cur_cck_fa_state = CCK_FA_STAGE_Low;
 417
 418                         if (dm_digtable.pre_cck_fa_state !=
 419                             dm_digtable.cur_cck_fa_state) {
 420                                 if (dm_digtable.cur_cck_fa_state ==
 421                                     CCK_FA_STAGE_Low)
 422                                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
 423                                                       0x83);
 424                                 else
 425                                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
 426                                                       0xcd);
 427
 428                                 dm_digtable.pre_cck_fa_state =
 429                                     dm_digtable.cur_cck_fa_state;
 430                         }
 431
 432                         rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40);
 433
 434                         if (IS_92C_SERIAL(rtlhal->version))
 435                                 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
 436                                               MASKBYTE2, 0xd7);
 437                 } else {
 438                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);
 439                         rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47);
 440
 441                         if (IS_92C_SERIAL(rtlhal->version))
 442                                 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
 443                                               MASKBYTE2, 0xd3);
 444                 }
 445                 dm_digtable.pre_cck_pd_state = dm_digtable.cur_cck_pd_state;
 446         }
 447
 448         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 449                  ("CCKPDStage=%x\n", dm_digtable.cur_cck_pd_state));
 450
 451         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 452                  ("is92C=%x\n", IS_92C_SERIAL(rtlhal->version)));
 453 }
 454
 455 static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw *hw)
 456 {
 457         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 458
 459         if (mac->act_scanning == true)
 460                 return;
 461
 462         if ((mac->link_state > MAC80211_NOLINK) &&
 463             (mac->link_state < MAC80211_LINKED))
 464                 dm_digtable.cursta_connectctate = DIG_STA_BEFORE_CONNECT;
 465         else if (mac->link_state >= MAC80211_LINKED)
 466                 dm_digtable.cursta_connectctate = DIG_STA_CONNECT;
 467         else
 468                 dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
 469
 470         rtl92c_dm_initial_gain_sta(hw);
 471         rtl92c_dm_initial_gain_multi_sta(hw);
 472         rtl92c_dm_cck_packet_detection_thresh(hw);
 473
 474         dm_digtable.presta_connectstate = dm_digtable.cursta_connectctate;
 475
 476 }
 477
 478 static void rtl92c_dm_dig(struct ieee80211_hw *hw)
 479 {
 480         struct rtl_priv *rtlpriv = rtl_priv(hw);
 481
 482         if (rtlpriv->dm.b_dm_initialgain_enable == false)
 483                 return;
 484         if (dm_digtable.dig_enable_flag == false)
 485                 return;
 486
 487         rtl92c_dm_ctrl_initgain_by_twoport(hw);
 488
 489 }
 490
 491 static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
 492 {
 493         struct rtl_priv *rtlpriv = rtl_priv(hw);
 494
 495         rtlpriv->dm.bdynamic_txpower_enable = false;
 496
 497         rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
 498         rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
 499 }
 500
 501 void rtl92c_dm_write_dig(struct ieee80211_hw *hw)
 502 {
 503         struct rtl_priv *rtlpriv = rtl_priv(hw);
 504
 505         RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
 506                  ("cur_igvalue = 0x%x, "
 507                   "pre_igvalue = 0x%x, backoff_val = %d\n",
 508                   dm_digtable.cur_igvalue, dm_digtable.pre_igvalue,
 509                   dm_digtable.backoff_val));
 510
 511         if (dm_digtable.pre_igvalue != dm_digtable.cur_igvalue) {
 512                 rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
 513                               dm_digtable.cur_igvalue);
 514                 rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
 515                               dm_digtable.cur_igvalue);
 516
 517                 dm_digtable.pre_igvalue = dm_digtable.cur_igvalue;
 518         }
 519 }
 520
 521 static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw *hw)
 522 {
 523         struct rtl_priv *rtlpriv = rtl_priv(hw);
 524         long tmpentry_max_pwdb = 0, tmpentry_min_pwdb = 0xff;
 525
 526         u8 h2c_parameter[3] = { 0 };
 527
 528         return;
 529
 530         if (tmpentry_max_pwdb != 0) {
 531                 rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb =
 532                     tmpentry_max_pwdb;
 533         } else {
 534                 rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = 0;
 535         }
 536
 537         if (tmpentry_min_pwdb != 0xff) {
 538                 rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb =
 539                     tmpentry_min_pwdb;
 540         } else {
 541                 rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = 0;
 542         }
 543
 544         h2c_parameter[2] = (u8) (rtlpriv->dm.undecorated_smoothed_pwdb & 0xFF);
 545         h2c_parameter[0] = 0;
 546
 547         rtl92c_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, h2c_parameter);
 548 }
 549
 550 void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw)
 551 {
 552         struct rtl_priv *rtlpriv = rtl_priv(hw);
 553         rtlpriv->dm.bcurrent_turbo_edca = false;
 554         rtlpriv->dm.bis_any_nonbepkts = false;
 555         rtlpriv->dm.bis_cur_rdlstate = false;
 556 }
 557
 558 static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw *hw)
 559 {
 560         struct rtl_priv *rtlpriv = rtl_priv(hw);
 561         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 562         static u64 last_txok_cnt;
 563         static u64 last_rxok_cnt;
 564         u64 cur_txok_cnt;
 565         u64 cur_rxok_cnt;
 566         u32 edca_be_ul = 0x5ea42b;
 567         u32 edca_be_dl = 0x5ea42b;
 568
 569         if (mac->opmode == NL80211_IFTYPE_ADHOC)
 570                 goto dm_checkedcaturbo_exit;
 571
 572         if (mac->link_state != MAC80211_LINKED) {
 573                 rtlpriv->dm.bcurrent_turbo_edca = false;
 574                 return;
 575         }
 576
 577         if (!mac->ht_enable) {  /*FIX MERGE */
 578                 if (!(edca_be_ul & 0xffff0000))
 579                         edca_be_ul |= 0x005e0000;
 580
 581                 if (!(edca_be_dl & 0xffff0000))
 582                         edca_be_dl |= 0x005e0000;
 583         }
 584
 585         if ((!rtlpriv->dm.bis_any_nonbepkts) &&
 586             (!rtlpriv->dm.b_disable_framebursting)) {
 587                 cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
 588                 cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
 589                 if (cur_rxok_cnt > 4 * cur_txok_cnt) {
 590                         if (!rtlpriv->dm.bis_cur_rdlstate ||
 591                             !rtlpriv->dm.bcurrent_turbo_edca) {
 592                                 rtl_write_dword(rtlpriv,
 593                                                 REG_EDCA_BE_PARAM,
 594                                                 edca_be_dl);
 595                                 rtlpriv->dm.bis_cur_rdlstate = true;
 596                         }
 597                 } else {
 598                         if (rtlpriv->dm.bis_cur_rdlstate ||
 599                             !rtlpriv->dm.bcurrent_turbo_edca) {
 600                                 rtl_write_dword(rtlpriv,
 601                                                 REG_EDCA_BE_PARAM,
 602                                                 edca_be_ul);
 603                                 rtlpriv->dm.bis_cur_rdlstate = false;
 604                         }
 605                 }
 606                 rtlpriv->dm.bcurrent_turbo_edca = true;
 607         } else {
 608                 if (rtlpriv->dm.bcurrent_turbo_edca) {
 609                         u8 tmp = AC0_BE;
 610                         rtlpriv->cfg->ops->set_hw_reg(hw,
 611                                                       HW_VAR_AC_PARAM,
 612                                                       (u8 *) (&tmp));
 613                         rtlpriv->dm.bcurrent_turbo_edca = false;
 614                 }
 615         }
 616
 617 dm_checkedcaturbo_exit:
 618         rtlpriv->dm.bis_any_nonbepkts = false;
 619         last_txok_cnt = rtlpriv->stats.txbytesunicast;
 620         last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
 621 }
 622
 623 static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw
 624                                                              *hw)
 625 {
 626         struct rtl_priv *rtlpriv = rtl_priv(hw);
 627         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 628         struct rtl_phy *rtlphy = &(rtlpriv->phy);
 629         struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
 630         u8 thermalvalue, delta, delta_lck, delta_iqk;
 631         long ele_a, ele_d, temp_cck, val_x, value32;
 632         long val_y, ele_c;
 633         u8 ofdm_index[2], cck_index, ofdm_index_old[2], cck_index_old;
 634         int i;
 635         bool is2t = IS_92C_SERIAL(rtlhal->version);
 636         u8 txpwr_level[2] = {0, 0};
 637         u8 ofdm_min_index = 6, rf;
 638
 639         rtlpriv->dm.btxpower_trackingInit = true;
 640         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 641                  ("rtl92c_dm_txpower_tracking_callback_thermalmeter\n"));
 642
 643         thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0x1f);
 644
 645         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 646                  ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
 647                   "eeprom_thermalmeter 0x%x\n",
 648                   thermalvalue, rtlpriv->dm.thermalvalue,
 649                   rtlefuse->eeprom_thermalmeter));
 650
 651         rtl92c_phy_ap_calibrate(hw, (thermalvalue -
 652                                      rtlefuse->eeprom_thermalmeter));
 653         if (is2t)
 654                 rf = 2;
 655         else
 656                 rf = 1;
 657
 658         if (thermalvalue) {
 659                 ele_d = rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
 660                                       MASKDWORD) & MASKOFDM_D;
 661
 662                 for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
 663                         if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
 664                                 ofdm_index_old[0] = (u8) i;
 665
 666                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 667                                         ("Initial pathA ele_d reg0x%x = 0x%lx, "
 668                                          "ofdm_index=0x%x\n",
 669                                          ROFDM0_XATXIQIMBALANCE,
 670                                          ele_d, ofdm_index_old[0]));
 671                                 break;
 672                         }
 673                 }
 674
 675                 if (is2t) {
 676                         ele_d = rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,
 677                                               MASKDWORD) & MASKOFDM_D;
 678
 679                         for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
 680                                 if (ele_d == (ofdmswing_table[i] &
 681                                     MASKOFDM_D)) {
 682                                         ofdm_index_old[1] = (u8) i;
 683
 684                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 685                                            DBG_LOUD,
 686                                            ("Initial pathB ele_d reg0x%x = "
 687                                            "0x%lx, ofdm_index=0x%x\n",
 688                                            ROFDM0_XBTXIQIMBALANCE, ele_d,
 689                                            ofdm_index_old[1]));
 690                                         break;
 691                                 }
 692                         }
 693                 }
 694
 695                 temp_cck =
 696                     rtl_get_bbreg(hw, RCCK0_TXFILTER2, MASKDWORD) & MASKCCK;
 697
 698                 for (i = 0; i < CCK_TABLE_LENGTH; i++) {
 699                         if (rtlpriv->dm.b_cck_inch14) {
 700                                 if (memcmp((void *)&temp_cck,
 701                                            (void *)&cckswing_table_ch14[i][2],
 702                                            4) == 0) {
 703                                         cck_index_old = (u8) i;
 704
 705                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 706                                                  DBG_LOUD,
 707                                                  ("Initial reg0x%x = 0x%lx, "
 708                                                   "cck_index=0x%x, ch 14 %d\n",
 709                                                   RCCK0_TXFILTER2, temp_cck,
 710                                                   cck_index_old,
 711                                                   rtlpriv->dm.b_cck_inch14));
 712                                         break;
 713                                 }
 714                         } else {
 715                                 if (memcmp((void *)&temp_cck,
 716                                            (void *)
 717                                            &cckswing_table_ch1ch13[i][2],
 718                                            4) == 0) {
 719                                         cck_index_old = (u8) i;
 720
 721                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 722                                                  DBG_LOUD,
 723                                                  ("Initial reg0x%x = 0x%lx, "
 724                                                   "cck_index=0x%x, ch14 %d\n",
 725                                                   RCCK0_TXFILTER2, temp_cck,
 726                                                   cck_index_old,
 727                                                   rtlpriv->dm.b_cck_inch14));
 728                                         break;
 729                                 }
 730                         }
 731                 }
 732
 733                 if (!rtlpriv->dm.thermalvalue) {
 734                         rtlpriv->dm.thermalvalue =
 735                             rtlefuse->eeprom_thermalmeter;
 736                         rtlpriv->dm.thermalvalue_lck = thermalvalue;
 737                         rtlpriv->dm.thermalvalue_iqk = thermalvalue;
 738                         for (i = 0; i < rf; i++)
 739                                 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
 740                         rtlpriv->dm.cck_index = cck_index_old;
 741                 }
 742
 743                 delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
 744                     (thermalvalue - rtlpriv->dm.thermalvalue) :
 745                     (rtlpriv->dm.thermalvalue - thermalvalue);
 746
 747                 delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
 748                     (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
 749                     (rtlpriv->dm.thermalvalue_lck - thermalvalue);
 750
 751                 delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
 752                     (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
 753                     (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
 754
 755                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 756                         ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
 757                          "eeprom_thermalmeter 0x%x delta 0x%x "
 758                          "delta_lck 0x%x delta_iqk 0x%x\n",
 759                          thermalvalue, rtlpriv->dm.thermalvalue,
 760                          rtlefuse->eeprom_thermalmeter, delta, delta_lck,
 761                          delta_iqk));
 762
 763                 if (delta_lck > 1) {
 764                         rtlpriv->dm.thermalvalue_lck = thermalvalue;
 765                         rtl92c_phy_lc_calibrate(hw);
 766                 }
 767
 768                 if (delta > 0 && rtlpriv->dm.txpower_track_control) {
 769                         if (thermalvalue > rtlpriv->dm.thermalvalue) {
 770                                 for (i = 0; i < rf; i++)
 771                                         rtlpriv->dm.ofdm_index[i] -= delta;
 772                                 rtlpriv->dm.cck_index -= delta;
 773                         } else {
 774                                 for (i = 0; i < rf; i++)
 775                                         rtlpriv->dm.ofdm_index[i] += delta;
 776                                 rtlpriv->dm.cck_index += delta;
 777                         }
 778
 779                         if (is2t) {
 780                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 781                                          ("temp OFDM_A_index=0x%x, "
 782                                           "OFDM_B_index=0x%x,"
 783                                           "cck_index=0x%x\n",
 784                                           rtlpriv->dm.ofdm_index[0],
 785                                           rtlpriv->dm.ofdm_index[1],
 786                                           rtlpriv->dm.cck_index));
 787                         } else {
 788                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 789                                          ("temp OFDM_A_index=0x%x,"
 790                                           "cck_index=0x%x\n",
 791                                           rtlpriv->dm.ofdm_index[0],
 792                                           rtlpriv->dm.cck_index));
 793                         }
 794
 795                         if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
 796                                 for (i = 0; i < rf; i++)
 797                                         ofdm_index[i] =
 798                                             rtlpriv->dm.ofdm_index[i]
 799                                             + 1;
 800                                 cck_index = rtlpriv->dm.cck_index + 1;
 801                         } else {
 802                                 for (i = 0; i < rf; i++)
 803                                         ofdm_index[i] =
 804                                             rtlpriv->dm.ofdm_index[i];
 805                                 cck_index = rtlpriv->dm.cck_index;
 806                         }
 807
 808                         for (i = 0; i < rf; i++) {
 809                                 if (txpwr_level[i] >= 0 &&
 810                                     txpwr_level[i] <= 26) {
 811                                         if (thermalvalue >
 812                                             rtlefuse->eeprom_thermalmeter) {
 813                                                 if (delta < 5)
 814                                                         ofdm_index[i] -= 1;
 815
 816                                                 else
 817                                                         ofdm_index[i] -= 2;
 818                                         } else if (delta > 5 && thermalvalue <
 819                                                    rtlefuse->
 820                                                    eeprom_thermalmeter) {
 821                                                 ofdm_index[i] += 1;
 822                                         }
 823                                 } else if (txpwr_level[i] >= 27 &&
 824                                            txpwr_level[i] <= 32
 825                                            && thermalvalue >
 826                                            rtlefuse->eeprom_thermalmeter) {
 827                                         if (delta < 5)
 828                                                 ofdm_index[i] -= 1;
 829
 830                                         else
 831                                                 ofdm_index[i] -= 2;
 832                                 } else if (txpwr_level[i] >= 32 &&
 833                                            txpwr_level[i] <= 38 &&
 834                                            thermalvalue >
 835                                            rtlefuse->eeprom_thermalmeter
 836                                            && delta > 5) {
 837                                         ofdm_index[i] -= 1;
 838                                 }
 839                         }
 840
 841                         if (txpwr_level[i] >= 0 && txpwr_level[i] <= 26) {
 842                                 if (thermalvalue >
 843                                     rtlefuse->eeprom_thermalmeter) {
 844                                         if (delta < 5)
 845                                                 cck_index -= 1;
 846
 847                                         else
 848                                                 cck_index -= 2;
 849                                 } else if (delta > 5 && thermalvalue <
 850                                            rtlefuse->eeprom_thermalmeter) {
 851                                         cck_index += 1;
 852                                 }
 853                         } else if (txpwr_level[i] >= 27 &&
 854                                    txpwr_level[i] <= 32 &&
 855                                    thermalvalue >
 856                                    rtlefuse->eeprom_thermalmeter) {
 857                                 if (delta < 5)
 858                                         cck_index -= 1;
 859
 860                                 else
 861                                         cck_index -= 2;
 862                         } else if (txpwr_level[i] >= 32 &&
 863                                    txpwr_level[i] <= 38 &&
 864                                    thermalvalue > rtlefuse->eeprom_thermalmeter
 865                                    && delta > 5) {
 866                                 cck_index -= 1;
 867                         }
 868
 869                         for (i = 0; i < rf; i++) {
 870                                 if (ofdm_index[i] > OFDM_TABLE_SIZE - 1)
 871                                         ofdm_index[i] = OFDM_TABLE_SIZE - 1;
 872
 873                                 else if (ofdm_index[i] < ofdm_min_index)
 874                                         ofdm_index[i] = ofdm_min_index;
 875                         }
 876
 877                         if (cck_index > CCK_TABLE_SIZE - 1)
 878                                 cck_index = CCK_TABLE_SIZE - 1;
 879                         else if (cck_index < 0)
 880                                 cck_index = 0;
 881
 882                         if (is2t) {
 883                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 884                                          ("new OFDM_A_index=0x%x, "
 885                                           "OFDM_B_index=0x%x,"
 886                                           "cck_index=0x%x\n",
 887                                           ofdm_index[0], ofdm_index[1],
 888                                           cck_index));
 889                         } else {
 890                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 891                                          ("new OFDM_A_index=0x%x,"
 892                                           "cck_index=0x%x\n",
 893                                           ofdm_index[0], cck_index));
 894                         }
 895                 }
 896
 897                 if (rtlpriv->dm.txpower_track_control && delta != 0) {
 898                         ele_d =
 899                             (ofdmswing_table[ofdm_index[0]] & 0xFFC00000) >> 22;
 900                         val_x = rtlphy->reg_e94;
 901                         val_y = rtlphy->reg_e9c;
 902
 903                         if (val_x != 0) {
 904                                 if ((val_x & 0x00000200) != 0)
 905                                         val_x = val_x | 0xFFFFFC00;
 906                                 ele_a = ((val_x * ele_d) >> 8) & 0x000003FF;
 907
 908                                 if ((val_y & 0x00000200) != 0)
 909                                         val_y = val_y | 0xFFFFFC00;
 910                                 ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
 911
 912                                 value32 = (ele_d << 22) |
 913                                     ((ele_c & 0x3F) << 16) | ele_a;
 914
 915                                 rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
 916                                               MASKDWORD, value32);
 917
 918                                 value32 = (ele_c & 0x000003C0) >> 6;
 919                                 rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
 920                                               value32);
 921
 922                                 value32 = ((val_x * ele_d) >> 7) & 0x01;
 923                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
 924                                               BIT(31), value32);
 925
 926                                 value32 = ((val_y * ele_d) >> 7) & 0x01;
 927                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
 928                                               BIT(29), value32);
 929                         } else {
 930                                 rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
 931                                               MASKDWORD,
 932                                               ofdmswing_table[ofdm_index[0]]);
 933
 934                                 rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
 935                                               0x00);
 936                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
 937                                               BIT(31) | BIT(29), 0x00);
 938                         }
 939
 940                         if (!rtlpriv->dm.b_cck_inch14) {
 941                                 rtl_write_byte(rtlpriv, 0xa22,
 942                                                cckswing_table_ch1ch13[cck_index]
 943                                                [0]);
 944                                 rtl_write_byte(rtlpriv, 0xa23,
 945                                                cckswing_table_ch1ch13[cck_index]
 946                                                [1]);
 947                                 rtl_write_byte(rtlpriv, 0xa24,
 948                                                cckswing_table_ch1ch13[cck_index]
 949                                                [2]);
 950                                 rtl_write_byte(rtlpriv, 0xa25,
 951                                                cckswing_table_ch1ch13[cck_index]
 952                                                [3]);
 953                                 rtl_write_byte(rtlpriv, 0xa26,
 954                                                cckswing_table_ch1ch13[cck_index]
 955                                                [4]);
 956                                 rtl_write_byte(rtlpriv, 0xa27,
 957                                                cckswing_table_ch1ch13[cck_index]
 958                                                [5]);
 959                                 rtl_write_byte(rtlpriv, 0xa28,
 960                                                cckswing_table_ch1ch13[cck_index]
 961                                                [6]);
 962                                 rtl_write_byte(rtlpriv, 0xa29,
 963                                                cckswing_table_ch1ch13[cck_index]
 964                                                [7]);
 965                         } else {
 966                                 rtl_write_byte(rtlpriv, 0xa22,
 967                                                cckswing_table_ch14[cck_index]
 968                                                [0]);
 969                                 rtl_write_byte(rtlpriv, 0xa23,
 970                                                cckswing_table_ch14[cck_index]
 971                                                [1]);
 972                                 rtl_write_byte(rtlpriv, 0xa24,
 973                                                cckswing_table_ch14[cck_index]
 974                                                [2]);
 975                                 rtl_write_byte(rtlpriv, 0xa25,
 976                                                cckswing_table_ch14[cck_index]
 977                                                [3]);
 978                                 rtl_write_byte(rtlpriv, 0xa26,
 979                                                cckswing_table_ch14[cck_index]
 980                                                [4]);
 981                                 rtl_write_byte(rtlpriv, 0xa27,
 982                                                cckswing_table_ch14[cck_index]
 983                                                [5]);
 984                                 rtl_write_byte(rtlpriv, 0xa28,
 985                                                cckswing_table_ch14[cck_index]
 986                                                [6]);
 987                                 rtl_write_byte(rtlpriv, 0xa29,
 988                                                cckswing_table_ch14[cck_index]
 989                                                [7]);
 990                         }
 991
 992                         if (is2t) {
 993                                 ele_d = (ofdmswing_table[ofdm_index[1]] &
 994                                          0xFFC00000) >> 22;
 995
 996                                 val_x = rtlphy->reg_eb4;
 997                                 val_y = rtlphy->reg_ebc;
 998
 999                                 if (val_x != 0) {
1000                                         if ((val_x & 0x00000200) != 0)
1001                                                 val_x = val_x | 0xFFFFFC00;
1002                                         ele_a = ((val_x * ele_d) >> 8) &
1003                                             0x000003FF;
1004
1005                                         if ((val_y & 0x00000200) != 0)
1006                                                 val_y = val_y | 0xFFFFFC00;
1007                                         ele_c = ((val_y * ele_d) >> 8) &
1008                                             0x00003FF;
1009
1010                                         value32 = (ele_d << 22) |
1011                                             ((ele_c & 0x3F) << 16) | ele_a;
1012                                         rtl_set_bbreg(hw,
1013                                                       ROFDM0_XBTXIQIMBALANCE,
1014                                                       MASKDWORD, value32);
1015
1016                                         value32 = (ele_c & 0x000003C0) >> 6;
1017                                         rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
1018                                                       MASKH4BITS, value32);
1019
1020                                         value32 = ((val_x * ele_d) >> 7) & 0x01;
1021                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1022                                                       BIT(27), value32);
1023
1024                                         value32 = ((val_y * ele_d) >> 7) & 0x01;
1025                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1026                                                       BIT(25), value32);
1027                                 } else {
1028                                         rtl_set_bbreg(hw,
1029                                                       ROFDM0_XBTXIQIMBALANCE,
1030                                                       MASKDWORD,
1031                                                       ofdmswing_table[ofdm_index
1032                                                                       [1]]);
1033                                         rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
1034                                                       MASKH4BITS, 0x00);
1035                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1036                                                       BIT(27) | BIT(25), 0x00);
1037                                 }
1038
1039                         }
1040                 }
1041
1042                 if (delta_iqk > 3) {
1043                         rtlpriv->dm.thermalvalue_iqk = thermalvalue;
1044                         rtl92c_phy_iq_calibrate(hw, false);
1045                 }
1046
1047                 if (rtlpriv->dm.txpower_track_control)
1048                         rtlpriv->dm.thermalvalue = thermalvalue;
1049         }
1050
1051         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, ("<===\n"));
1052
1053 }
1054
1055 static void rtl92c_dm_initialize_txpower_tracking_thermalmeter(
1056                                                 struct ieee80211_hw *hw)
1057 {
1058         struct rtl_priv *rtlpriv = rtl_priv(hw);
1059
1060         rtlpriv->dm.btxpower_tracking = true;
1061         rtlpriv->dm.btxpower_trackingInit = false;
1062
1063         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1064                  ("pMgntInfo->btxpower_tracking = %d\n",
1065                   rtlpriv->dm.btxpower_tracking));
1066 }
1067
1068 static void rtl92c_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
1069 {
1070         rtl92c_dm_initialize_txpower_tracking_thermalmeter(hw);
1071 }
1072
1073 static void rtl92c_dm_txpower_tracking_directcall(struct ieee80211_hw *hw)
1074 {
1075         rtl92c_dm_txpower_tracking_callback_thermalmeter(hw);
1076 }
1077
1078 static void rtl92c_dm_check_txpower_tracking_thermal_meter(
1079                                                 struct ieee80211_hw *hw)
1080 {
1081         struct rtl_priv *rtlpriv = rtl_priv(hw);
1082         static u8 tm_trigger;
1083
1084         if (!rtlpriv->dm.btxpower_tracking)
1085                 return;
1086
1087         if (!tm_trigger) {
1088                 rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, RFREG_OFFSET_MASK,
1089                               0x60);
1090                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1091                          ("Trigger 92S Thermal Meter!!\n"));
1092                 tm_trigger = 1;
1093                 return;
1094         } else {
1095                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1096                          ("Schedule TxPowerTracking direct call!!\n"));
1097                 rtl92c_dm_txpower_tracking_directcall(hw);
1098                 tm_trigger = 0;
1099         }
1100 }
1101
1102 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw)
1103 {
1104         rtl92c_dm_check_txpower_tracking_thermal_meter(hw);
1105 }
1106
1107 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
1108 {
1109         struct rtl_priv *rtlpriv = rtl_priv(hw);
1110         struct rate_adaptive *p_ra = &(rtlpriv->ra);
1111
1112         p_ra->ratr_state = DM_RATR_STA_INIT;
1113         p_ra->pre_ratr_state = DM_RATR_STA_INIT;
1114
1115         if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
1116                 rtlpriv->dm.b_useramask = true;
1117         else
1118                 rtlpriv->dm.b_useramask = false;
1119
1120 }
1121
1122 static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw)
1123 {
1124         struct rtl_priv *rtlpriv = rtl_priv(hw);
1125         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1126         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1127         struct rate_adaptive *p_ra = &(rtlpriv->ra);
1128         u32 low_rssithresh_for_ra, high_rssithresh_for_ra;
1129
1130         if (is_hal_stop(rtlhal)) {
1131                 RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1132                          ("<---- driver is going to unload\n"));
1133                 return;
1134         }
1135
1136         if (!rtlpriv->dm.b_useramask) {
1137                 RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1138                         ("<---- driver does not control rate adaptive mask\n"));
1139                 return;
1140         }
1141
1142         if (mac->link_state == MAC80211_LINKED) {
1143
1144                 switch (p_ra->pre_ratr_state) {
1145                 case DM_RATR_STA_HIGH:
1146                         high_rssithresh_for_ra = 50;
1147                         low_rssithresh_for_ra = 20;
1148                         break;
1149                 case DM_RATR_STA_MIDDLE:
1150                         high_rssithresh_for_ra = 55;
1151                         low_rssithresh_for_ra = 20;
1152                         break;
1153                 case DM_RATR_STA_LOW:
1154                         high_rssithresh_for_ra = 50;
1155                         low_rssithresh_for_ra = 25;
1156                         break;
1157                 default:
1158                         high_rssithresh_for_ra = 50;
1159                         low_rssithresh_for_ra = 20;
1160                         break;
1161                 }
1162
1163                 if (rtlpriv->dm.undecorated_smoothed_pwdb >
1164                     (long)high_rssithresh_for_ra)
1165                         p_ra->ratr_state = DM_RATR_STA_HIGH;
1166                 else if (rtlpriv->dm.undecorated_smoothed_pwdb >
1167                          (long)low_rssithresh_for_ra)
1168                         p_ra->ratr_state = DM_RATR_STA_MIDDLE;
1169                 else
1170                         p_ra->ratr_state = DM_RATR_STA_LOW;
1171
1172                 if (p_ra->pre_ratr_state != p_ra->ratr_state) {
1173                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1174                                  ("RSSI = %ld\n",
1175                                   rtlpriv->dm.undecorated_smoothed_pwdb));
1176                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1177                                  ("RSSI_LEVEL = %d\n", p_ra->ratr_state));
1178                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1179                                  ("PreState = %d, CurState = %d\n",
1180                                   p_ra->pre_ratr_state, p_ra->ratr_state));
1181
1182                         rtlpriv->cfg->ops->update_rate_mask(hw,
1183                                         p_ra->ratr_state);
1184
1185                         p_ra->pre_ratr_state = p_ra->ratr_state;
1186                 }
1187         }
1188 }
1189
1190 static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw *hw)
1191 {
1192         dm_pstable.pre_ccastate = CCA_MAX;
1193         dm_pstable.cur_ccasate = CCA_MAX;
1194         dm_pstable.pre_rfstate = RF_MAX;
1195         dm_pstable.cur_rfstate = RF_MAX;
1196         dm_pstable.rssi_val_min = 0;
1197 }
1198
1199 static void rtl92c_dm_1r_cca(struct ieee80211_hw *hw)
1200 {
1201         struct rtl_priv *rtlpriv = rtl_priv(hw);
1202         struct rtl_phy *rtlphy = &(rtlpriv->phy);
1203
1204         if (dm_pstable.rssi_val_min != 0) {
1205                 if (dm_pstable.pre_ccastate == CCA_2R) {
1206                         if (dm_pstable.rssi_val_min >= 35)
1207                                 dm_pstable.cur_ccasate = CCA_1R;
1208                         else
1209                                 dm_pstable.cur_ccasate = CCA_2R;
1210                 } else {
1211                         if (dm_pstable.rssi_val_min <= 30)
1212                                 dm_pstable.cur_ccasate = CCA_2R;
1213                         else
1214                                 dm_pstable.cur_ccasate = CCA_1R;
1215                 }
1216         } else {
1217                 dm_pstable.cur_ccasate = CCA_MAX;
1218         }
1219
1220         if (dm_pstable.pre_ccastate != dm_pstable.cur_ccasate) {
1221                 if (dm_pstable.cur_ccasate == CCA_1R) {
1222                         if (get_rf_type(rtlphy) == RF_2T2R) {
1223                                 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE,
1224                                               MASKBYTE0, 0x13);
1225                                 rtl_set_bbreg(hw, 0xe70, MASKBYTE3, 0x20);
1226                         } else {
1227                                 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE,
1228                                               MASKBYTE0, 0x23);
1229                                 rtl_set_bbreg(hw, 0xe70, 0x7fc00000, 0x10c);
1230                         }
1231                 } else {
1232                         rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0,
1233                                       0x33);
1234                         rtl_set_bbreg(hw, 0xe70, MASKBYTE3, 0x63);
1235                 }
1236                 dm_pstable.pre_ccastate = dm_pstable.cur_ccasate;
1237         }
1238
1239         RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, ("CCAStage = %s\n",
1240                                                (dm_pstable.cur_ccasate ==
1241                                                 0) ? "1RCCA" : "2RCCA"));
1242 }
1243
1244 void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal)
1245 {
1246         static u8 initialize;
1247         static u32 reg_874, reg_c70, reg_85c, reg_a74;
1248
1249         if (initialize == 0) {
1250                 reg_874 = (rtl_get_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1251                                          MASKDWORD) & 0x1CC000) >> 14;
1252
1253                 reg_c70 = (rtl_get_bbreg(hw, ROFDM0_AGCPARAMETER1,
1254                                          MASKDWORD) & BIT(3)) >> 3;
1255
1256                 reg_85c = (rtl_get_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
1257                                          MASKDWORD) & 0xFF000000) >> 24;
1258
1259                 reg_a74 = (rtl_get_bbreg(hw, 0xa74, MASKDWORD) & 0xF000) >> 12;
1260
1261                 initialize = 1;
1262         }
1263
1264         if (!bforce_in_normal) {
1265                 if (dm_pstable.rssi_val_min != 0) {
1266                         if (dm_pstable.pre_rfstate == RF_NORMAL) {
1267                                 if (dm_pstable.rssi_val_min >= 30)
1268                                         dm_pstable.cur_rfstate = RF_SAVE;
1269                                 else
1270                                         dm_pstable.cur_rfstate = RF_NORMAL;
1271                         } else {
1272                                 if (dm_pstable.rssi_val_min <= 25)
1273                                         dm_pstable.cur_rfstate = RF_NORMAL;
1274                                 else
1275                                         dm_pstable.cur_rfstate = RF_SAVE;
1276                         }
1277                 } else {
1278                         dm_pstable.cur_rfstate = RF_MAX;
1279                 }
1280         } else {
1281                 dm_pstable.cur_rfstate = RF_NORMAL;
1282         }
1283
1284         if (dm_pstable.pre_rfstate != dm_pstable.cur_rfstate) {
1285                 if (dm_pstable.cur_rfstate == RF_SAVE) {
1286                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1287                                       0x1C0000, 0x2);
1288                         rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), 0);
1289                         rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
1290                                       0xFF000000, 0x63);
1291                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1292                                       0xC000, 0x2);
1293                         rtl_set_bbreg(hw, 0xa74, 0xF000, 0x3);
1294                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
1295                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x1);
1296                 } else {
1297                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1298                                       0x1CC000, reg_874);
1299                         rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3),
1300                                       reg_c70);
1301                         rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, 0xFF000000,
1302                                       reg_85c);
1303                         rtl_set_bbreg(hw, 0xa74, 0xF000, reg_a74);
1304                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
1305                 }
1306
1307                 dm_pstable.pre_rfstate = dm_pstable.cur_rfstate;
1308         }
1309 }
1310
1311 static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw)
1312 {
1313         struct rtl_priv *rtlpriv = rtl_priv(hw);
1314         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1315         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1316
1317         if (((mac->link_state == MAC80211_NOLINK)) &&
1318             (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
1319                 dm_pstable.rssi_val_min = 0;
1320                 RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1321                          ("Not connected to any\n"));
1322         }
1323
1324         if (mac->link_state == MAC80211_LINKED) {
1325                 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
1326                         dm_pstable.rssi_val_min =
1327                             rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1328                         RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1329                                  ("AP Client PWDB = 0x%lx\n",
1330                                   dm_pstable.rssi_val_min));
1331                 } else {
1332                         dm_pstable.rssi_val_min =
1333                             rtlpriv->dm.undecorated_smoothed_pwdb;
1334                         RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1335                                  ("STA Default Port PWDB = 0x%lx\n",
1336                                   dm_pstable.rssi_val_min));
1337                 }
1338         } else {
1339                 dm_pstable.rssi_val_min =
1340                     rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1341
1342                 RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1343                          ("AP Ext Port PWDB = 0x%lx\n",
1344                           dm_pstable.rssi_val_min));
1345         }
1346
1347         if (IS_92C_SERIAL(rtlhal->version))
1348                 rtl92c_dm_1r_cca(hw);
1349 }
1350
1351 void rtl92c_dm_init(struct ieee80211_hw *hw)
1352 {
1353         struct rtl_priv *rtlpriv = rtl_priv(hw);
1354
1355         rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
1356         rtl92c_dm_diginit(hw);
1357         rtl92c_dm_init_dynamic_txpower(hw);
1358         rtl92c_dm_init_edca_turbo(hw);
1359         rtl92c_dm_init_rate_adaptive_mask(hw);
1360         rtl92c_dm_initialize_txpower_tracking(hw);
1361         rtl92c_dm_init_dynamic_bb_powersaving(hw);
1362 }
1363
1364 void rtl92c_dm_watchdog(struct ieee80211_hw *hw)
1365 {
1366         struct rtl_priv *rtlpriv = rtl_priv(hw);
1367         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1368         bool b_fw_current_inpsmode = false;
1369         bool b_fw_ps_awake = true;
1370
1371         rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS,
1372                                       (u8 *) (&b_fw_current_inpsmode));
1373         rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FWLPS_RF_ON,
1374                                       (u8 *) (&b_fw_ps_awake));
1375
1376         if ((ppsc->rfpwr_state == ERFON) && ((!b_fw_current_inpsmode) &&
1377                                              b_fw_ps_awake)
1378             && (!ppsc->rfchange_inprogress)) {
1379                 rtl92c_dm_pwdb_monitor(hw);
1380                 rtl92c_dm_dig(hw);
1381                 rtl92c_dm_false_alarm_counter_statistics(hw);
1382                 rtl92c_dm_dynamic_bb_powersaving(hw);
1383                 rtl92c_dm_dynamic_txpower(hw);
1384                 rtl92c_dm_check_txpower_tracking(hw);
1385                 rtl92c_dm_refresh_rate_adaptive_mask(hw);
1386                 rtl92c_dm_check_edca_turbo(hw);
1387         }
1388 }