drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2010  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/export.h>
  31 #include "dm_common.h"
  32 #include "phy_common.h"
  33 #include "../pci.h"
  34 #include "../base.h"
  35
  36 struct dig_t dm_digtable;
  37 static struct ps_t dm_pstable;
  38
  39 #define BT_RSSI_STATE_NORMAL_POWER      BIT_OFFSET_LEN_MASK_32(0, 1)
  40 #define BT_RSSI_STATE_AMDPU_OFF         BIT_OFFSET_LEN_MASK_32(1, 1)
  41 #define BT_RSSI_STATE_SPECIAL_LOW       BIT_OFFSET_LEN_MASK_32(2, 1)
  42 #define BT_RSSI_STATE_BG_EDCA_LOW       BIT_OFFSET_LEN_MASK_32(3, 1)
  43 #define BT_RSSI_STATE_TXPOWER_LOW       BIT_OFFSET_LEN_MASK_32(4, 1)
  44
  45 #define RTLPRIV                 (struct rtl_priv *)
  46 #define GET_UNDECORATED_AVERAGE_RSSI(_priv)     \
  47         ((RTLPRIV(_priv))->mac80211.opmode == \
  48                              NL80211_IFTYPE_ADHOC) ?    \
  49         ((RTLPRIV(_priv))->dm.entry_min_undecoratedsmoothed_pwdb) : \
  50         ((RTLPRIV(_priv))->dm.undecorated_smoothed_pwdb)
  51
  52 static const u32 ofdmswing_table[OFDM_TABLE_SIZE] = {
  53         0x7f8001fe,
  54         0x788001e2,
  55         0x71c001c7,
  56         0x6b8001ae,
  57         0x65400195,
  58         0x5fc0017f,
  59         0x5a400169,
  60         0x55400155,
  61         0x50800142,
  62         0x4c000130,
  63         0x47c0011f,
  64         0x43c0010f,
  65         0x40000100,
  66         0x3c8000f2,
  67         0x390000e4,
  68         0x35c000d7,
  69         0x32c000cb,
  70         0x300000c0,
  71         0x2d4000b5,
  72         0x2ac000ab,
  73         0x288000a2,
  74         0x26000098,
  75         0x24000090,
  76         0x22000088,
  77         0x20000080,
  78         0x1e400079,
  79         0x1c800072,
  80         0x1b00006c,
  81         0x19800066,
  82         0x18000060,
  83         0x16c0005b,
  84         0x15800056,
  85         0x14400051,
  86         0x1300004c,
  87         0x12000048,
  88         0x11000044,
  89         0x10000040,
  90 };
  91
  92 static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
  93         {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
  94         {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
  95         {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
  96         {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
  97         {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
  98         {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
  99         {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
 100         {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
 101         {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
 102         {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
 103         {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
 104         {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
 105         {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
 106         {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
 107         {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
 108         {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
 109         {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
 110         {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
 111         {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
 112         {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 113         {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 114         {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
 115         {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
 116         {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
 117         {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
 118         {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
 119         {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
 120         {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
 121         {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
 122         {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
 123         {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
 124         {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
 125         {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
 126 };
 127
 128 static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
 129         {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
 130         {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
 131         {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
 132         {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
 133         {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
 134         {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
 135         {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
 136         {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
 137         {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
 138         {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
 139         {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
 140         {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
 141         {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
 142         {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
 143         {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
 144         {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
 145         {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
 146         {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
 147         {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
 148         {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 149         {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 150         {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
 151         {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
 152         {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
 153         {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
 154         {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
 155         {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
 156         {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
 157         {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
 158         {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
 159         {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
 160         {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
 161         {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
 162 };
 163
 164 static void rtl92c_dm_diginit(struct ieee80211_hw *hw)
 165 {
 166         dm_digtable.dig_enable_flag = true;
 167         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 168         dm_digtable.cur_igvalue = 0x20;
 169         dm_digtable.pre_igvalue = 0x0;
 170         dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
 171         dm_digtable.presta_connectstate = DIG_STA_DISCONNECT;
 172         dm_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
 173         dm_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;
 174         dm_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;
 175         dm_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
 176         dm_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
 177         dm_digtable.rx_gain_range_max = DM_DIG_MAX;
 178         dm_digtable.rx_gain_range_min = DM_DIG_MIN;
 179         dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
 180         dm_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;
 181         dm_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;
 182         dm_digtable.pre_cck_pd_state = CCK_PD_STAGE_MAX;
 183         dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
 184 }
 185
 186 static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw)
 187 {
 188         struct rtl_priv *rtlpriv = rtl_priv(hw);
 189         long rssi_val_min = 0;
 190
 191         if ((dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) &&
 192             (dm_digtable.cursta_connectctate == DIG_STA_CONNECT)) {
 193                 if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb != 0)
 194                         rssi_val_min =
 195                             (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb >
 196                              rtlpriv->dm.undecorated_smoothed_pwdb) ?
 197                             rtlpriv->dm.undecorated_smoothed_pwdb :
 198                             rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 199                 else
 200                         rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
 201         } else if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT ||
 202                    dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT) {
 203                 rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
 204         } else if (dm_digtable.curmultista_connectstate ==
 205                    DIG_MULTISTA_CONNECT) {
 206                 rssi_val_min = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 207         }
 208
 209         return (u8) rssi_val_min;
 210 }
 211
 212 static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
 213 {
 214         u32 ret_value;
 215         struct rtl_priv *rtlpriv = rtl_priv(hw);
 216         struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
 217
 218         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD);
 219         falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
 220
 221         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD);
 222         falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
 223         falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
 224
 225         ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD);
 226         falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
 227         falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
 228             falsealm_cnt->cnt_rate_illegal +
 229             falsealm_cnt->cnt_crc8_fail + falsealm_cnt->cnt_mcs_fail;
 230
 231         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, BIT(14), 1);
 232         ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, MASKBYTE0);
 233         falsealm_cnt->cnt_cck_fail = ret_value;
 234
 235         ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, MASKBYTE3);
 236         falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
 237         falsealm_cnt->cnt_all = (falsealm_cnt->cnt_parity_fail +
 238                                  falsealm_cnt->cnt_rate_illegal +
 239                                  falsealm_cnt->cnt_crc8_fail +
 240                                  falsealm_cnt->cnt_mcs_fail +
 241                                  falsealm_cnt->cnt_cck_fail);
 242
 243         rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
 244         rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
 245         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
 246         rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
 247
 248         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 249                  ("cnt_parity_fail = %d, cnt_rate_illegal = %d, "
 250                   "cnt_crc8_fail = %d, cnt_mcs_fail = %d\n",
 251                   falsealm_cnt->cnt_parity_fail,
 252                   falsealm_cnt->cnt_rate_illegal,
 253                   falsealm_cnt->cnt_crc8_fail, falsealm_cnt->cnt_mcs_fail));
 254
 255         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 256                  ("cnt_ofdm_fail = %x, cnt_cck_fail = %x, cnt_all = %x\n",
 257                   falsealm_cnt->cnt_ofdm_fail,
 258                   falsealm_cnt->cnt_cck_fail, falsealm_cnt->cnt_all));
 259 }
 260
 261 static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw)
 262 {
 263         struct rtl_priv *rtlpriv = rtl_priv(hw);
 264         u8 value_igi = dm_digtable.cur_igvalue;
 265
 266         if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH0)
 267                 value_igi--;
 268         else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH1)
 269                 value_igi += 0;
 270         else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH2)
 271                 value_igi++;
 272         else if (rtlpriv->falsealm_cnt.cnt_all >= DM_DIG_FA_TH2)
 273                 value_igi += 2;
 274         if (value_igi > DM_DIG_FA_UPPER)
 275                 value_igi = DM_DIG_FA_UPPER;
 276         else if (value_igi < DM_DIG_FA_LOWER)
 277                 value_igi = DM_DIG_FA_LOWER;
 278         if (rtlpriv->falsealm_cnt.cnt_all > 10000)
 279                 value_igi = 0x32;
 280
 281         dm_digtable.cur_igvalue = value_igi;
 282         rtl92c_dm_write_dig(hw);
 283 }
 284
 285 static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw)
 286 {
 287         struct rtl_priv *rtlpriv = rtl_priv(hw);
 288
 289         if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable.fa_highthresh) {
 290                 if ((dm_digtable.backoff_val - 2) <
 291                     dm_digtable.backoff_val_range_min)
 292                         dm_digtable.backoff_val =
 293                             dm_digtable.backoff_val_range_min;
 294                 else
 295                         dm_digtable.backoff_val -= 2;
 296         } else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable.fa_lowthresh) {
 297                 if ((dm_digtable.backoff_val + 2) >
 298                     dm_digtable.backoff_val_range_max)
 299                         dm_digtable.backoff_val =
 300                             dm_digtable.backoff_val_range_max;
 301                 else
 302                         dm_digtable.backoff_val += 2;
 303         }
 304
 305         if ((dm_digtable.rssi_val_min + 10 - dm_digtable.backoff_val) >
 306             dm_digtable.rx_gain_range_max)
 307                 dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_max;
 308         else if ((dm_digtable.rssi_val_min + 10 -
 309                   dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
 310                 dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_min;
 311         else
 312                 dm_digtable.cur_igvalue = dm_digtable.rssi_val_min + 10 -
 313                     dm_digtable.backoff_val;
 314
 315         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 316                  ("rssi_val_min = %x backoff_val %x\n",
 317                   dm_digtable.rssi_val_min, dm_digtable.backoff_val));
 318
 319         rtl92c_dm_write_dig(hw);
 320 }
 321
 322 static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
 323 {
 324         static u8 initialized; /* initialized to false */
 325         struct rtl_priv *rtlpriv = rtl_priv(hw);
 326         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 327         long rssi_strength = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
 328         bool multi_sta = false;
 329
 330         if (mac->opmode == NL80211_IFTYPE_ADHOC)
 331                 multi_sta = true;
 332
 333         if ((multi_sta == false) || (dm_digtable.cursta_connectctate !=
 334                                      DIG_STA_DISCONNECT)) {
 335                 initialized = false;
 336                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 337                 return;
 338         } else if (initialized == false) {
 339                 initialized = true;
 340                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
 341                 dm_digtable.cur_igvalue = 0x20;
 342                 rtl92c_dm_write_dig(hw);
 343         }
 344
 345         if (dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) {
 346                 if ((rssi_strength < dm_digtable.rssi_lowthresh) &&
 347                     (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) {
 348
 349                         if (dm_digtable.dig_ext_port_stage ==
 350                             DIG_EXT_PORT_STAGE_2) {
 351                                 dm_digtable.cur_igvalue = 0x20;
 352                                 rtl92c_dm_write_dig(hw);
 353                         }
 354
 355                         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_1;
 356                 } else if (rssi_strength > dm_digtable.rssi_highthresh) {
 357                         dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_2;
 358                         rtl92c_dm_ctrl_initgain_by_fa(hw);
 359                 }
 360         } else if (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) {
 361                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
 362                 dm_digtable.cur_igvalue = 0x20;
 363                 rtl92c_dm_write_dig(hw);
 364         }
 365
 366         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 367                  ("curmultista_connectstate = "
 368                   "%x dig_ext_port_stage %x\n",
 369                   dm_digtable.curmultista_connectstate,
 370                   dm_digtable.dig_ext_port_stage));
 371 }
 372
 373 static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw)
 374 {
 375         struct rtl_priv *rtlpriv = rtl_priv(hw);
 376
 377         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 378                  ("presta_connectstate = %x,"
 379                   " cursta_connectctate = %x\n",
 380                   dm_digtable.presta_connectstate,
 381                   dm_digtable.cursta_connectctate));
 382
 383         if (dm_digtable.presta_connectstate == dm_digtable.cursta_connectctate
 384             || dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT
 385             || dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
 386
 387                 if (dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {
 388                         dm_digtable.rssi_val_min =
 389                             rtl92c_dm_initial_gain_min_pwdb(hw);
 390                         rtl92c_dm_ctrl_initgain_by_rssi(hw);
 391                 }
 392         } else {
 393                 dm_digtable.rssi_val_min = 0;
 394                 dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
 395                 dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
 396                 dm_digtable.cur_igvalue = 0x20;
 397                 dm_digtable.pre_igvalue = 0;
 398                 rtl92c_dm_write_dig(hw);
 399         }
 400 }
 401
 402 static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
 403 {
 404         struct rtl_priv *rtlpriv = rtl_priv(hw);
 405         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 406
 407         if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
 408                 dm_digtable.rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw);
 409
 410                 if (dm_digtable.pre_cck_pd_state == CCK_PD_STAGE_LowRssi) {
 411                         if (dm_digtable.rssi_val_min <= 25)
 412                                 dm_digtable.cur_cck_pd_state =
 413                                     CCK_PD_STAGE_LowRssi;
 414                         else
 415                                 dm_digtable.cur_cck_pd_state =
 416                                     CCK_PD_STAGE_HighRssi;
 417                 } else {
 418                         if (dm_digtable.rssi_val_min <= 20)
 419                                 dm_digtable.cur_cck_pd_state =
 420                                     CCK_PD_STAGE_LowRssi;
 421                         else
 422                                 dm_digtable.cur_cck_pd_state =
 423                                     CCK_PD_STAGE_HighRssi;
 424                 }
 425         } else {
 426                 dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
 427         }
 428
 429         if (dm_digtable.pre_cck_pd_state != dm_digtable.cur_cck_pd_state) {
 430                 if (dm_digtable.cur_cck_pd_state == CCK_PD_STAGE_LowRssi) {
 431                         if (rtlpriv->falsealm_cnt.cnt_cck_fail > 800)
 432                                 dm_digtable.cur_cck_fa_state =
 433                                     CCK_FA_STAGE_High;
 434                         else
 435                                 dm_digtable.cur_cck_fa_state = CCK_FA_STAGE_Low;
 436
 437                         if (dm_digtable.pre_cck_fa_state !=
 438                             dm_digtable.cur_cck_fa_state) {
 439                                 if (dm_digtable.cur_cck_fa_state ==
 440                                     CCK_FA_STAGE_Low)
 441                                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
 442                                                       0x83);
 443                                 else
 444                                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,
 445                                                       0xcd);
 446
 447                                 dm_digtable.pre_cck_fa_state =
 448                                     dm_digtable.cur_cck_fa_state;
 449                         }
 450
 451                         rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40);
 452
 453                         if (IS_92C_SERIAL(rtlhal->version))
 454                                 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
 455                                               MASKBYTE2, 0xd7);
 456                 } else {
 457                         rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);
 458                         rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47);
 459
 460                         if (IS_92C_SERIAL(rtlhal->version))
 461                                 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,
 462                                               MASKBYTE2, 0xd3);
 463                 }
 464                 dm_digtable.pre_cck_pd_state = dm_digtable.cur_cck_pd_state;
 465         }
 466
 467         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 468                  ("CCKPDStage=%x\n", dm_digtable.cur_cck_pd_state));
 469
 470         RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
 471                  ("is92C=%x\n", IS_92C_SERIAL(rtlhal->version)));
 472 }
 473
 474 static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw *hw)
 475 {
 476         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 477
 478         if (mac->act_scanning)
 479                 return;
 480
 481         if (mac->link_state >= MAC80211_LINKED)
 482                 dm_digtable.cursta_connectctate = DIG_STA_CONNECT;
 483         else
 484                 dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
 485
 486         rtl92c_dm_initial_gain_sta(hw);
 487         rtl92c_dm_initial_gain_multi_sta(hw);
 488         rtl92c_dm_cck_packet_detection_thresh(hw);
 489
 490         dm_digtable.presta_connectstate = dm_digtable.cursta_connectctate;
 491
 492 }
 493
 494 static void rtl92c_dm_dig(struct ieee80211_hw *hw)
 495 {
 496         struct rtl_priv *rtlpriv = rtl_priv(hw);
 497
 498         if (rtlpriv->dm.dm_initialgain_enable == false)
 499                 return;
 500         if (dm_digtable.dig_enable_flag == false)
 501                 return;
 502
 503         rtl92c_dm_ctrl_initgain_by_twoport(hw);
 504
 505 }
 506
 507 static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
 508 {
 509         struct rtl_priv *rtlpriv = rtl_priv(hw);
 510
 511         rtlpriv->dm.dynamic_txpower_enable = false;
 512
 513         rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
 514         rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
 515 }
 516
 517 void rtl92c_dm_write_dig(struct ieee80211_hw *hw)
 518 {
 519         struct rtl_priv *rtlpriv = rtl_priv(hw);
 520
 521         RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
 522                  ("cur_igvalue = 0x%x, "
 523                   "pre_igvalue = 0x%x, backoff_val = %d\n",
 524                   dm_digtable.cur_igvalue, dm_digtable.pre_igvalue,
 525                   dm_digtable.backoff_val));
 526
 527         dm_digtable.cur_igvalue += 2;
 528         if (dm_digtable.cur_igvalue > 0x3f)
 529                 dm_digtable.cur_igvalue = 0x3f;
 530
 531         if (dm_digtable.pre_igvalue != dm_digtable.cur_igvalue) {
 532                 rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
 533                               dm_digtable.cur_igvalue);
 534                 rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
 535                               dm_digtable.cur_igvalue);
 536
 537                 dm_digtable.pre_igvalue = dm_digtable.cur_igvalue;
 538         }
 539 }
 540 EXPORT_SYMBOL(rtl92c_dm_write_dig);
 541
 542 static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw *hw)
 543 {
 544         struct rtl_priv *rtlpriv = rtl_priv(hw);
 545         long tmpentry_max_pwdb = 0, tmpentry_min_pwdb = 0xff;
 546
 547         u8 h2c_parameter[3] = { 0 };
 548
 549         return;
 550
 551         if (tmpentry_max_pwdb != 0) {
 552                 rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb =
 553                     tmpentry_max_pwdb;
 554         } else {
 555                 rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = 0;
 556         }
 557
 558         if (tmpentry_min_pwdb != 0xff) {
 559                 rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb =
 560                     tmpentry_min_pwdb;
 561         } else {
 562                 rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = 0;
 563         }
 564
 565         h2c_parameter[2] = (u8) (rtlpriv->dm.undecorated_smoothed_pwdb & 0xFF);
 566         h2c_parameter[0] = 0;
 567
 568         rtl92c_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, h2c_parameter);
 569 }
 570
 571 void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw)
 572 {
 573         struct rtl_priv *rtlpriv = rtl_priv(hw);
 574         rtlpriv->dm.current_turbo_edca = false;
 575         rtlpriv->dm.is_any_nonbepkts = false;
 576         rtlpriv->dm.is_cur_rdlstate = false;
 577 }
 578 EXPORT_SYMBOL(rtl92c_dm_init_edca_turbo);
 579
 580 static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw *hw)
 581 {
 582         struct rtl_priv *rtlpriv = rtl_priv(hw);
 583         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
 584         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 585
 586         static u64 last_txok_cnt;
 587         static u64 last_rxok_cnt;
 588         static u32 last_bt_edca_ul;
 589         static u32 last_bt_edca_dl;
 590         u64 cur_txok_cnt = 0;
 591         u64 cur_rxok_cnt = 0;
 592         u32 edca_be_ul = 0x5ea42b;
 593         u32 edca_be_dl = 0x5ea42b;
 594         bool bt_change_edca = false;
 595
 596         if ((last_bt_edca_ul != rtlpcipriv->bt_coexist.bt_edca_ul) ||
 597             (last_bt_edca_dl != rtlpcipriv->bt_coexist.bt_edca_dl)) {
 598                 rtlpriv->dm.current_turbo_edca = false;
 599                 last_bt_edca_ul = rtlpcipriv->bt_coexist.bt_edca_ul;
 600                 last_bt_edca_dl = rtlpcipriv->bt_coexist.bt_edca_dl;
 601         }
 602
 603         if (rtlpcipriv->bt_coexist.bt_edca_ul != 0) {
 604                 edca_be_ul = rtlpcipriv->bt_coexist.bt_edca_ul;
 605                 bt_change_edca = true;
 606         }
 607
 608         if (rtlpcipriv->bt_coexist.bt_edca_dl != 0) {
 609                 edca_be_ul = rtlpcipriv->bt_coexist.bt_edca_dl;
 610                 bt_change_edca = true;
 611         }
 612
 613         if (mac->link_state != MAC80211_LINKED) {
 614                 rtlpriv->dm.current_turbo_edca = false;
 615                 return;
 616         }
 617
 618         if ((!mac->ht_enable) && (!rtlpcipriv->bt_coexist.bt_coexistence)) {
 619                 if (!(edca_be_ul & 0xffff0000))
 620                         edca_be_ul |= 0x005e0000;
 621
 622                 if (!(edca_be_dl & 0xffff0000))
 623                         edca_be_dl |= 0x005e0000;
 624         }
 625
 626         if ((bt_change_edca) || ((!rtlpriv->dm.is_any_nonbepkts) &&
 627              (!rtlpriv->dm.disable_framebursting))) {
 628
 629                 cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
 630                 cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
 631
 632                 if (cur_rxok_cnt > 4 * cur_txok_cnt) {
 633                         if (!rtlpriv->dm.is_cur_rdlstate ||
 634                             !rtlpriv->dm.current_turbo_edca) {
 635                                 rtl_write_dword(rtlpriv,
 636                                                 REG_EDCA_BE_PARAM,
 637                                                 edca_be_dl);
 638                                 rtlpriv->dm.is_cur_rdlstate = true;
 639                         }
 640                 } else {
 641                         if (rtlpriv->dm.is_cur_rdlstate ||
 642                             !rtlpriv->dm.current_turbo_edca) {
 643                                 rtl_write_dword(rtlpriv,
 644                                                 REG_EDCA_BE_PARAM,
 645                                                 edca_be_ul);
 646                                 rtlpriv->dm.is_cur_rdlstate = false;
 647                         }
 648                 }
 649                 rtlpriv->dm.current_turbo_edca = true;
 650         } else {
 651                 if (rtlpriv->dm.current_turbo_edca) {
 652                         u8 tmp = AC0_BE;
 653                         rtlpriv->cfg->ops->set_hw_reg(hw,
 654                                                       HW_VAR_AC_PARAM,
 655                                                       (u8 *) (&tmp));
 656                         rtlpriv->dm.current_turbo_edca = false;
 657                 }
 658         }
 659
 660         rtlpriv->dm.is_any_nonbepkts = false;
 661         last_txok_cnt = rtlpriv->stats.txbytesunicast;
 662         last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
 663 }
 664
 665 static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw
 666                                                              *hw)
 667 {
 668         struct rtl_priv *rtlpriv = rtl_priv(hw);
 669         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 670         struct rtl_phy *rtlphy = &(rtlpriv->phy);
 671         struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
 672         u8 thermalvalue, delta, delta_lck, delta_iqk;
 673         long ele_a, ele_d, temp_cck, val_x, value32;
 674         long val_y, ele_c = 0;
 675         u8 ofdm_index[2], ofdm_index_old[2] = {0, 0}, cck_index_old = 0;
 676         s8 cck_index = 0;
 677         int i;
 678         bool is2t = IS_92C_SERIAL(rtlhal->version);
 679         s8 txpwr_level[2] = {0, 0};
 680         u8 ofdm_min_index = 6, rf;
 681
 682         rtlpriv->dm.txpower_trackinginit = true;
 683         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 684                  ("rtl92c_dm_txpower_tracking_callback_thermalmeter\n"));
 685
 686         thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0x1f);
 687
 688         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 689                  ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
 690                   "eeprom_thermalmeter 0x%x\n",
 691                   thermalvalue, rtlpriv->dm.thermalvalue,
 692                   rtlefuse->eeprom_thermalmeter));
 693
 694         rtl92c_phy_ap_calibrate(hw, (thermalvalue -
 695                                      rtlefuse->eeprom_thermalmeter));
 696         if (is2t)
 697                 rf = 2;
 698         else
 699                 rf = 1;
 700
 701         if (thermalvalue) {
 702                 ele_d = rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
 703                                       MASKDWORD) & MASKOFDM_D;
 704
 705                 for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
 706                         if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
 707                                 ofdm_index_old[0] = (u8) i;
 708
 709                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 710                                         ("Initial pathA ele_d reg0x%x = 0x%lx, "
 711                                          "ofdm_index=0x%x\n",
 712                                          ROFDM0_XATXIQIMBALANCE,
 713                                          ele_d, ofdm_index_old[0]));
 714                                 break;
 715                         }
 716                 }
 717
 718                 if (is2t) {
 719                         ele_d = rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,
 720                                               MASKDWORD) & MASKOFDM_D;
 721
 722                         for (i = 0; i < OFDM_TABLE_LENGTH; i++) {
 723                                 if (ele_d == (ofdmswing_table[i] &
 724                                     MASKOFDM_D)) {
 725                                         ofdm_index_old[1] = (u8) i;
 726                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 727                                            DBG_LOUD,
 728                                            ("Initial pathB ele_d reg0x%x = "
 729                                            "0x%lx, ofdm_index=0x%x\n",
 730                                            ROFDM0_XBTXIQIMBALANCE, ele_d,
 731                                            ofdm_index_old[1]));
 732                                         break;
 733                                 }
 734                         }
 735                 }
 736
 737                 temp_cck =
 738                     rtl_get_bbreg(hw, RCCK0_TXFILTER2, MASKDWORD) & MASKCCK;
 739
 740                 for (i = 0; i < CCK_TABLE_LENGTH; i++) {
 741                         if (rtlpriv->dm.cck_inch14) {
 742                                 if (memcmp((void *)&temp_cck,
 743                                            (void *)&cckswing_table_ch14[i][2],
 744                                            4) == 0) {
 745                                         cck_index_old = (u8) i;
 746
 747                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 748                                                  DBG_LOUD,
 749                                                  ("Initial reg0x%x = 0x%lx, "
 750                                                   "cck_index=0x%x, ch 14 %d\n",
 751                                                   RCCK0_TXFILTER2, temp_cck,
 752                                                   cck_index_old,
 753                                                   rtlpriv->dm.cck_inch14));
 754                                         break;
 755                                 }
 756                         } else {
 757                                 if (memcmp((void *)&temp_cck,
 758                                            (void *)
 759                                            &cckswing_table_ch1ch13[i][2],
 760                                            4) == 0) {
 761                                         cck_index_old = (u8) i;
 762
 763                                         RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
 764                                                  DBG_LOUD,
 765                                                  ("Initial reg0x%x = 0x%lx, "
 766                                                   "cck_index=0x%x, ch14 %d\n",
 767                                                   RCCK0_TXFILTER2, temp_cck,
 768                                                   cck_index_old,
 769                                                   rtlpriv->dm.cck_inch14));
 770                                         break;
 771                                 }
 772                         }
 773                 }
 774
 775                 if (!rtlpriv->dm.thermalvalue) {
 776                         rtlpriv->dm.thermalvalue =
 777                             rtlefuse->eeprom_thermalmeter;
 778                         rtlpriv->dm.thermalvalue_lck = thermalvalue;
 779                         rtlpriv->dm.thermalvalue_iqk = thermalvalue;
 780                         for (i = 0; i < rf; i++)
 781                                 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
 782                         rtlpriv->dm.cck_index = cck_index_old;
 783                 }
 784
 785                 delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
 786                     (thermalvalue - rtlpriv->dm.thermalvalue) :
 787                     (rtlpriv->dm.thermalvalue - thermalvalue);
 788
 789                 delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
 790                     (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
 791                     (rtlpriv->dm.thermalvalue_lck - thermalvalue);
 792
 793                 delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
 794                     (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
 795                     (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
 796
 797                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 798                         ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
 799                          "eeprom_thermalmeter 0x%x delta 0x%x "
 800                          "delta_lck 0x%x delta_iqk 0x%x\n",
 801                          thermalvalue, rtlpriv->dm.thermalvalue,
 802                          rtlefuse->eeprom_thermalmeter, delta, delta_lck,
 803                          delta_iqk));
 804
 805                 if (delta_lck > 1) {
 806                         rtlpriv->dm.thermalvalue_lck = thermalvalue;
 807                         rtl92c_phy_lc_calibrate(hw);
 808                 }
 809
 810                 if (delta > 0 && rtlpriv->dm.txpower_track_control) {
 811                         if (thermalvalue > rtlpriv->dm.thermalvalue) {
 812                                 for (i = 0; i < rf; i++)
 813                                         rtlpriv->dm.ofdm_index[i] -= delta;
 814                                 rtlpriv->dm.cck_index -= delta;
 815                         } else {
 816                                 for (i = 0; i < rf; i++)
 817                                         rtlpriv->dm.ofdm_index[i] += delta;
 818                                 rtlpriv->dm.cck_index += delta;
 819                         }
 820
 821                         if (is2t) {
 822                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 823                                          ("temp OFDM_A_index=0x%x, "
 824                                           "OFDM_B_index=0x%x,"
 825                                           "cck_index=0x%x\n",
 826                                           rtlpriv->dm.ofdm_index[0],
 827                                           rtlpriv->dm.ofdm_index[1],
 828                                           rtlpriv->dm.cck_index));
 829                         } else {
 830                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 831                                          ("temp OFDM_A_index=0x%x,"
 832                                           "cck_index=0x%x\n",
 833                                           rtlpriv->dm.ofdm_index[0],
 834                                           rtlpriv->dm.cck_index));
 835                         }
 836
 837                         if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
 838                                 for (i = 0; i < rf; i++)
 839                                         ofdm_index[i] =
 840                                             rtlpriv->dm.ofdm_index[i]
 841                                             + 1;
 842                                 cck_index = rtlpriv->dm.cck_index + 1;
 843                         } else {
 844                                 for (i = 0; i < rf; i++)
 845                                         ofdm_index[i] =
 846                                             rtlpriv->dm.ofdm_index[i];
 847                                 cck_index = rtlpriv->dm.cck_index;
 848                         }
 849
 850                         for (i = 0; i < rf; i++) {
 851                                 if (txpwr_level[i] >= 0 &&
 852                                     txpwr_level[i] <= 26) {
 853                                         if (thermalvalue >
 854                                             rtlefuse->eeprom_thermalmeter) {
 855                                                 if (delta < 5)
 856                                                         ofdm_index[i] -= 1;
 857
 858                                                 else
 859                                                         ofdm_index[i] -= 2;
 860                                         } else if (delta > 5 && thermalvalue <
 861                                                    rtlefuse->
 862                                                    eeprom_thermalmeter) {
 863                                                 ofdm_index[i] += 1;
 864                                         }
 865                                 } else if (txpwr_level[i] >= 27 &&
 866                                            txpwr_level[i] <= 32
 867                                            && thermalvalue >
 868                                            rtlefuse->eeprom_thermalmeter) {
 869                                         if (delta < 5)
 870                                                 ofdm_index[i] -= 1;
 871
 872                                         else
 873                                                 ofdm_index[i] -= 2;
 874                                 } else if (txpwr_level[i] >= 32 &&
 875                                            txpwr_level[i] <= 38 &&
 876                                            thermalvalue >
 877                                            rtlefuse->eeprom_thermalmeter
 878                                            && delta > 5) {
 879                                         ofdm_index[i] -= 1;
 880                                 }
 881                         }
 882
 883                         if (txpwr_level[i] >= 0 && txpwr_level[i] <= 26) {
 884                                 if (thermalvalue >
 885                                     rtlefuse->eeprom_thermalmeter) {
 886                                         if (delta < 5)
 887                                                 cck_index -= 1;
 888
 889                                         else
 890                                                 cck_index -= 2;
 891                                 } else if (delta > 5 && thermalvalue <
 892                                            rtlefuse->eeprom_thermalmeter) {
 893                                         cck_index += 1;
 894                                 }
 895                         } else if (txpwr_level[i] >= 27 &&
 896                                    txpwr_level[i] <= 32 &&
 897                                    thermalvalue >
 898                                    rtlefuse->eeprom_thermalmeter) {
 899                                 if (delta < 5)
 900                                         cck_index -= 1;
 901
 902                                 else
 903                                         cck_index -= 2;
 904                         } else if (txpwr_level[i] >= 32 &&
 905                                    txpwr_level[i] <= 38 &&
 906                                    thermalvalue > rtlefuse->eeprom_thermalmeter
 907                                    && delta > 5) {
 908                                 cck_index -= 1;
 909                         }
 910
 911                         for (i = 0; i < rf; i++) {
 912                                 if (ofdm_index[i] > OFDM_TABLE_SIZE - 1)
 913                                         ofdm_index[i] = OFDM_TABLE_SIZE - 1;
 914
 915                                 else if (ofdm_index[i] < ofdm_min_index)
 916                                         ofdm_index[i] = ofdm_min_index;
 917                         }
 918
 919                         if (cck_index > CCK_TABLE_SIZE - 1)
 920                                 cck_index = CCK_TABLE_SIZE - 1;
 921                         else if (cck_index < 0)
 922                                 cck_index = 0;
 923
 924                         if (is2t) {
 925                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 926                                          ("new OFDM_A_index=0x%x, "
 927                                           "OFDM_B_index=0x%x,"
 928                                           "cck_index=0x%x\n",
 929                                           ofdm_index[0], ofdm_index[1],
 930                                           cck_index));
 931                         } else {
 932                                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
 933                                          ("new OFDM_A_index=0x%x,"
 934                                           "cck_index=0x%x\n",
 935                                           ofdm_index[0], cck_index));
 936                         }
 937                 }
 938
 939                 if (rtlpriv->dm.txpower_track_control && delta != 0) {
 940                         ele_d =
 941                             (ofdmswing_table[ofdm_index[0]] & 0xFFC00000) >> 22;
 942                         val_x = rtlphy->reg_e94;
 943                         val_y = rtlphy->reg_e9c;
 944
 945                         if (val_x != 0) {
 946                                 if ((val_x & 0x00000200) != 0)
 947                                         val_x = val_x | 0xFFFFFC00;
 948                                 ele_a = ((val_x * ele_d) >> 8) & 0x000003FF;
 949
 950                                 if ((val_y & 0x00000200) != 0)
 951                                         val_y = val_y | 0xFFFFFC00;
 952                                 ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
 953
 954                                 value32 = (ele_d << 22) |
 955                                     ((ele_c & 0x3F) << 16) | ele_a;
 956
 957                                 rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
 958                                               MASKDWORD, value32);
 959
 960                                 value32 = (ele_c & 0x000003C0) >> 6;
 961                                 rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
 962                                               value32);
 963
 964                                 value32 = ((val_x * ele_d) >> 7) & 0x01;
 965                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
 966                                               BIT(31), value32);
 967
 968                                 value32 = ((val_y * ele_d) >> 7) & 0x01;
 969                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
 970                                               BIT(29), value32);
 971                         } else {
 972                                 rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
 973                                               MASKDWORD,
 974                                               ofdmswing_table[ofdm_index[0]]);
 975
 976                                 rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
 977                                               0x00);
 978                                 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
 979                                               BIT(31) | BIT(29), 0x00);
 980                         }
 981
 982                         if (!rtlpriv->dm.cck_inch14) {
 983                                 rtl_write_byte(rtlpriv, 0xa22,
 984                                                cckswing_table_ch1ch13[cck_index]
 985                                                [0]);
 986                                 rtl_write_byte(rtlpriv, 0xa23,
 987                                                cckswing_table_ch1ch13[cck_index]
 988                                                [1]);
 989                                 rtl_write_byte(rtlpriv, 0xa24,
 990                                                cckswing_table_ch1ch13[cck_index]
 991                                                [2]);
 992                                 rtl_write_byte(rtlpriv, 0xa25,
 993                                                cckswing_table_ch1ch13[cck_index]
 994                                                [3]);
 995                                 rtl_write_byte(rtlpriv, 0xa26,
 996                                                cckswing_table_ch1ch13[cck_index]
 997                                                [4]);
 998                                 rtl_write_byte(rtlpriv, 0xa27,
 999                                                cckswing_table_ch1ch13[cck_index]
1000                                                [5]);
1001                                 rtl_write_byte(rtlpriv, 0xa28,
1002                                                cckswing_table_ch1ch13[cck_index]
1003                                                [6]);
1004                                 rtl_write_byte(rtlpriv, 0xa29,
1005                                                cckswing_table_ch1ch13[cck_index]
1006                                                [7]);
1007                         } else {
1008                                 rtl_write_byte(rtlpriv, 0xa22,
1009                                                cckswing_table_ch14[cck_index]
1010                                                [0]);
1011                                 rtl_write_byte(rtlpriv, 0xa23,
1012                                                cckswing_table_ch14[cck_index]
1013                                                [1]);
1014                                 rtl_write_byte(rtlpriv, 0xa24,
1015                                                cckswing_table_ch14[cck_index]
1016                                                [2]);
1017                                 rtl_write_byte(rtlpriv, 0xa25,
1018                                                cckswing_table_ch14[cck_index]
1019                                                [3]);
1020                                 rtl_write_byte(rtlpriv, 0xa26,
1021                                                cckswing_table_ch14[cck_index]
1022                                                [4]);
1023                                 rtl_write_byte(rtlpriv, 0xa27,
1024                                                cckswing_table_ch14[cck_index]
1025                                                [5]);
1026                                 rtl_write_byte(rtlpriv, 0xa28,
1027                                                cckswing_table_ch14[cck_index]
1028                                                [6]);
1029                                 rtl_write_byte(rtlpriv, 0xa29,
1030                                                cckswing_table_ch14[cck_index]
1031                                                [7]);
1032                         }
1033
1034                         if (is2t) {
1035                                 ele_d = (ofdmswing_table[ofdm_index[1]] &
1036                                          0xFFC00000) >> 22;
1037
1038                                 val_x = rtlphy->reg_eb4;
1039                                 val_y = rtlphy->reg_ebc;
1040
1041                                 if (val_x != 0) {
1042                                         if ((val_x & 0x00000200) != 0)
1043                                                 val_x = val_x | 0xFFFFFC00;
1044                                         ele_a = ((val_x * ele_d) >> 8) &
1045                                             0x000003FF;
1046
1047                                         if ((val_y & 0x00000200) != 0)
1048                                                 val_y = val_y | 0xFFFFFC00;
1049                                         ele_c = ((val_y * ele_d) >> 8) &
1050                                             0x00003FF;
1051
1052                                         value32 = (ele_d << 22) |
1053                                             ((ele_c & 0x3F) << 16) | ele_a;
1054                                         rtl_set_bbreg(hw,
1055                                                       ROFDM0_XBTXIQIMBALANCE,
1056                                                       MASKDWORD, value32);
1057
1058                                         value32 = (ele_c & 0x000003C0) >> 6;
1059                                         rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
1060                                                       MASKH4BITS, value32);
1061
1062                                         value32 = ((val_x * ele_d) >> 7) & 0x01;
1063                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1064                                                       BIT(27), value32);
1065
1066                                         value32 = ((val_y * ele_d) >> 7) & 0x01;
1067                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1068                                                       BIT(25), value32);
1069                                 } else {
1070                                         rtl_set_bbreg(hw,
1071                                                       ROFDM0_XBTXIQIMBALANCE,
1072                                                       MASKDWORD,
1073                                                       ofdmswing_table[ofdm_index
1074                                                                       [1]]);
1075                                         rtl_set_bbreg(hw, ROFDM0_XDTXAFE,
1076                                                       MASKH4BITS, 0x00);
1077                                         rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1078                                                       BIT(27) | BIT(25), 0x00);
1079                                 }
1080
1081                         }
1082                 }
1083
1084                 if (delta_iqk > 3) {
1085                         rtlpriv->dm.thermalvalue_iqk = thermalvalue;
1086                         rtl92c_phy_iq_calibrate(hw, false);
1087                 }
1088
1089                 if (rtlpriv->dm.txpower_track_control)
1090                         rtlpriv->dm.thermalvalue = thermalvalue;
1091         }
1092
1093         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, ("<===\n"));
1094
1095 }
1096
1097 static void rtl92c_dm_initialize_txpower_tracking_thermalmeter(
1098                                                 struct ieee80211_hw *hw)
1099 {
1100         struct rtl_priv *rtlpriv = rtl_priv(hw);
1101
1102         rtlpriv->dm.txpower_tracking = true;
1103         rtlpriv->dm.txpower_trackinginit = false;
1104
1105         RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1106                  ("pMgntInfo->txpower_tracking = %d\n",
1107                   rtlpriv->dm.txpower_tracking));
1108 }
1109
1110 static void rtl92c_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
1111 {
1112         rtl92c_dm_initialize_txpower_tracking_thermalmeter(hw);
1113 }
1114
1115 static void rtl92c_dm_txpower_tracking_directcall(struct ieee80211_hw *hw)
1116 {
1117         rtl92c_dm_txpower_tracking_callback_thermalmeter(hw);
1118 }
1119
1120 static void rtl92c_dm_check_txpower_tracking_thermal_meter(
1121                                                 struct ieee80211_hw *hw)
1122 {
1123         struct rtl_priv *rtlpriv = rtl_priv(hw);
1124         static u8 tm_trigger;
1125
1126         if (!rtlpriv->dm.txpower_tracking)
1127                 return;
1128
1129         if (!tm_trigger) {
1130                 rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, RFREG_OFFSET_MASK,
1131                               0x60);
1132                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1133                          ("Trigger 92S Thermal Meter!!\n"));
1134                 tm_trigger = 1;
1135                 return;
1136         } else {
1137                 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1138                          ("Schedule TxPowerTracking direct call!!\n"));
1139                 rtl92c_dm_txpower_tracking_directcall(hw);
1140                 tm_trigger = 0;
1141         }
1142 }
1143
1144 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw)
1145 {
1146         rtl92c_dm_check_txpower_tracking_thermal_meter(hw);
1147 }
1148 EXPORT_SYMBOL(rtl92c_dm_check_txpower_tracking);
1149
1150 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
1151 {
1152         struct rtl_priv *rtlpriv = rtl_priv(hw);
1153         struct rate_adaptive *p_ra = &(rtlpriv->ra);
1154
1155         p_ra->ratr_state = DM_RATR_STA_INIT;
1156         p_ra->pre_ratr_state = DM_RATR_STA_INIT;
1157
1158         if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
1159                 rtlpriv->dm.useramask = true;
1160         else
1161                 rtlpriv->dm.useramask = false;
1162
1163 }
1164 EXPORT_SYMBOL(rtl92c_dm_init_rate_adaptive_mask);
1165
1166 static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw)
1167 {
1168         struct rtl_priv *rtlpriv = rtl_priv(hw);
1169         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1170         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1171         struct rate_adaptive *p_ra = &(rtlpriv->ra);
1172         u32 low_rssithresh_for_ra, high_rssithresh_for_ra;
1173         struct ieee80211_sta *sta = NULL;
1174
1175         if (is_hal_stop(rtlhal)) {
1176                 RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1177                          ("<---- driver is going to unload\n"));
1178                 return;
1179         }
1180
1181         if (!rtlpriv->dm.useramask) {
1182                 RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1183                         ("<---- driver does not control rate adaptive mask\n"));
1184                 return;
1185         }
1186
1187         if (mac->link_state == MAC80211_LINKED &&
1188             mac->opmode == NL80211_IFTYPE_STATION) {
1189                 switch (p_ra->pre_ratr_state) {
1190                 case DM_RATR_STA_HIGH:
1191                         high_rssithresh_for_ra = 50;
1192                         low_rssithresh_for_ra = 20;
1193                         break;
1194                 case DM_RATR_STA_MIDDLE:
1195                         high_rssithresh_for_ra = 55;
1196                         low_rssithresh_for_ra = 20;
1197                         break;
1198                 case DM_RATR_STA_LOW:
1199                         high_rssithresh_for_ra = 50;
1200                         low_rssithresh_for_ra = 25;
1201                         break;
1202                 default:
1203                         high_rssithresh_for_ra = 50;
1204                         low_rssithresh_for_ra = 20;
1205                         break;
1206                 }
1207
1208                 if (rtlpriv->dm.undecorated_smoothed_pwdb >
1209                     (long)high_rssithresh_for_ra)
1210                         p_ra->ratr_state = DM_RATR_STA_HIGH;
1211                 else if (rtlpriv->dm.undecorated_smoothed_pwdb >
1212                          (long)low_rssithresh_for_ra)
1213                         p_ra->ratr_state = DM_RATR_STA_MIDDLE;
1214                 else
1215                         p_ra->ratr_state = DM_RATR_STA_LOW;
1216
1217                 if (p_ra->pre_ratr_state != p_ra->ratr_state) {
1218                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1219                                  ("RSSI = %ld\n",
1220                                   rtlpriv->dm.undecorated_smoothed_pwdb));
1221                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1222                                  ("RSSI_LEVEL = %d\n", p_ra->ratr_state));
1223                         RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
1224                                  ("PreState = %d, CurState = %d\n",
1225                                   p_ra->pre_ratr_state, p_ra->ratr_state));
1226
1227                         /* Only the PCI card uses sta in the update rate table
1228                          * callback routine */
1229                         if (rtlhal->interface == INTF_PCI) {
1230                                 rcu_read_lock();
1231                                 sta = ieee80211_find_sta(mac->vif, mac->bssid);
1232                                 if (!sta)
1233                                         goto out_unlock;
1234                         }
1235                         rtlpriv->cfg->ops->update_rate_tbl(hw, sta,
1236                                         p_ra->ratr_state);
1237
1238                         p_ra->pre_ratr_state = p_ra->ratr_state;
1239                 out_unlock:
1240                         if (rtlhal->interface == INTF_PCI)
1241                                 rcu_read_unlock();
1242                 }
1243         }
1244 }
1245
1246 static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw *hw)
1247 {
1248         dm_pstable.pre_ccastate = CCA_MAX;
1249         dm_pstable.cur_ccasate = CCA_MAX;
1250         dm_pstable.pre_rfstate = RF_MAX;
1251         dm_pstable.cur_rfstate = RF_MAX;
1252         dm_pstable.rssi_val_min = 0;
1253 }
1254
1255 void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal)
1256 {
1257         static u8 initialize;
1258         static u32 reg_874, reg_c70, reg_85c, reg_a74;
1259
1260         if (initialize == 0) {
1261                 reg_874 = (rtl_get_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1262                                          MASKDWORD) & 0x1CC000) >> 14;
1263
1264                 reg_c70 = (rtl_get_bbreg(hw, ROFDM0_AGCPARAMETER1,
1265                                          MASKDWORD) & BIT(3)) >> 3;
1266
1267                 reg_85c = (rtl_get_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
1268                                          MASKDWORD) & 0xFF000000) >> 24;
1269
1270                 reg_a74 = (rtl_get_bbreg(hw, 0xa74, MASKDWORD) & 0xF000) >> 12;
1271
1272                 initialize = 1;
1273         }
1274
1275         if (!bforce_in_normal) {
1276                 if (dm_pstable.rssi_val_min != 0) {
1277                         if (dm_pstable.pre_rfstate == RF_NORMAL) {
1278                                 if (dm_pstable.rssi_val_min >= 30)
1279                                         dm_pstable.cur_rfstate = RF_SAVE;
1280                                 else
1281                                         dm_pstable.cur_rfstate = RF_NORMAL;
1282                         } else {
1283                                 if (dm_pstable.rssi_val_min <= 25)
1284                                         dm_pstable.cur_rfstate = RF_NORMAL;
1285                                 else
1286                                         dm_pstable.cur_rfstate = RF_SAVE;
1287                         }
1288                 } else {
1289                         dm_pstable.cur_rfstate = RF_MAX;
1290                 }
1291         } else {
1292                 dm_pstable.cur_rfstate = RF_NORMAL;
1293         }
1294
1295         if (dm_pstable.pre_rfstate != dm_pstable.cur_rfstate) {
1296                 if (dm_pstable.cur_rfstate == RF_SAVE) {
1297                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1298                                       0x1C0000, 0x2);
1299                         rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), 0);
1300                         rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
1301                                       0xFF000000, 0x63);
1302                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1303                                       0xC000, 0x2);
1304                         rtl_set_bbreg(hw, 0xa74, 0xF000, 0x3);
1305                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
1306                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x1);
1307                 } else {
1308                         rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
1309                                       0x1CC000, reg_874);
1310                         rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3),
1311                                       reg_c70);
1312                         rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, 0xFF000000,
1313                                       reg_85c);
1314                         rtl_set_bbreg(hw, 0xa74, 0xF000, reg_a74);
1315                         rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);
1316                 }
1317
1318                 dm_pstable.pre_rfstate = dm_pstable.cur_rfstate;
1319         }
1320 }
1321 EXPORT_SYMBOL(rtl92c_dm_rf_saving);
1322
1323 static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw)
1324 {
1325         struct rtl_priv *rtlpriv = rtl_priv(hw);
1326         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1327         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1328
1329         if (((mac->link_state == MAC80211_NOLINK)) &&
1330             (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
1331                 dm_pstable.rssi_val_min = 0;
1332                 RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1333                          ("Not connected to any\n"));
1334         }
1335
1336         if (mac->link_state == MAC80211_LINKED) {
1337                 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
1338                         dm_pstable.rssi_val_min =
1339                             rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1340                         RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1341                                  ("AP Client PWDB = 0x%lx\n",
1342                                   dm_pstable.rssi_val_min));
1343                 } else {
1344                         dm_pstable.rssi_val_min =
1345                             rtlpriv->dm.undecorated_smoothed_pwdb;
1346                         RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1347                                  ("STA Default Port PWDB = 0x%lx\n",
1348                                   dm_pstable.rssi_val_min));
1349                 }
1350         } else {
1351                 dm_pstable.rssi_val_min =
1352                     rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1353
1354                 RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
1355                          ("AP Ext Port PWDB = 0x%lx\n",
1356                           dm_pstable.rssi_val_min));
1357         }
1358
1359         if (IS_92C_SERIAL(rtlhal->version))
1360                 ;/* rtl92c_dm_1r_cca(hw); */
1361         else
1362                 rtl92c_dm_rf_saving(hw, false);
1363 }
1364
1365 void rtl92c_dm_init(struct ieee80211_hw *hw)
1366 {
1367         struct rtl_priv *rtlpriv = rtl_priv(hw);
1368
1369         rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
1370         rtl92c_dm_diginit(hw);
1371         rtl92c_dm_init_dynamic_txpower(hw);
1372         rtl92c_dm_init_edca_turbo(hw);
1373         rtl92c_dm_init_rate_adaptive_mask(hw);
1374         rtl92c_dm_initialize_txpower_tracking(hw);
1375         rtl92c_dm_init_dynamic_bb_powersaving(hw);
1376 }
1377 EXPORT_SYMBOL(rtl92c_dm_init);
1378
1379 void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw)
1380 {
1381         struct rtl_priv *rtlpriv = rtl_priv(hw);
1382         struct rtl_phy *rtlphy = &(rtlpriv->phy);
1383         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1384         long undecorated_smoothed_pwdb;
1385
1386         if (!rtlpriv->dm.dynamic_txpower_enable)
1387                 return;
1388
1389         if (rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
1390                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
1391                 return;
1392         }
1393
1394         if ((mac->link_state < MAC80211_LINKED) &&
1395             (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
1396                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
1397                          ("Not connected to any\n"));
1398
1399                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
1400
1401                 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
1402                 return;
1403         }
1404
1405         if (mac->link_state >= MAC80211_LINKED) {
1406                 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
1407                         undecorated_smoothed_pwdb =
1408                             rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1409                         RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1410                                  ("AP Client PWDB = 0x%lx\n",
1411                                   undecorated_smoothed_pwdb));
1412                 } else {
1413                         undecorated_smoothed_pwdb =
1414                             rtlpriv->dm.undecorated_smoothed_pwdb;
1415                         RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1416                                  ("STA Default Port PWDB = 0x%lx\n",
1417                                   undecorated_smoothed_pwdb));
1418                 }
1419         } else {
1420                 undecorated_smoothed_pwdb =
1421                     rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1422
1423                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1424                          ("AP Ext Port PWDB = 0x%lx\n",
1425                           undecorated_smoothed_pwdb));
1426         }
1427
1428         if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
1429                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
1430                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1431                          ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"));
1432         } else if ((undecorated_smoothed_pwdb <
1433                     (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) &&
1434                    (undecorated_smoothed_pwdb >=
1435                     TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
1436
1437                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
1438                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1439                          ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"));
1440         } else if (undecorated_smoothed_pwdb <
1441                    (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
1442                 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
1443                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1444                          ("TXHIGHPWRLEVEL_NORMAL\n"));
1445         }
1446
1447         if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
1448                 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1449                          ("PHY_SetTxPowerLevel8192S() Channel = %d\n",
1450                           rtlphy->current_channel));
1451                 rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
1452         }
1453
1454         rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
1455 }
1456
1457 void rtl92c_dm_watchdog(struct ieee80211_hw *hw)
1458 {
1459         struct rtl_priv *rtlpriv = rtl_priv(hw);
1460         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1461         bool fw_current_inpsmode = false;
1462         bool fw_ps_awake = true;
1463
1464         rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS,
1465                                       (u8 *) (&fw_current_inpsmode));
1466         rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FWLPS_RF_ON,
1467                                       (u8 *) (&fw_ps_awake));
1468
1469         if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
1470                                              fw_ps_awake)
1471             && (!ppsc->rfchange_inprogress)) {
1472                 rtl92c_dm_pwdb_monitor(hw);
1473                 rtl92c_dm_dig(hw);
1474                 rtl92c_dm_false_alarm_counter_statistics(hw);
1475                 rtl92c_dm_dynamic_bb_powersaving(hw);
1476                 rtl92c_dm_dynamic_txpower(hw);
1477                 rtl92c_dm_check_txpower_tracking(hw);
1478                 rtl92c_dm_refresh_rate_adaptive_mask(hw);
1479                 rtl92c_dm_bt_coexist(hw);
1480                 rtl92c_dm_check_edca_turbo(hw);
1481         }
1482 }
1483 EXPORT_SYMBOL(rtl92c_dm_watchdog);
1484
1485 u8 rtl92c_bt_rssi_state_change(struct ieee80211_hw *hw)
1486 {
1487         struct rtl_priv *rtlpriv = rtl_priv(hw);
1488         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1489         long undecorated_smoothed_pwdb;
1490         u8 curr_bt_rssi_state = 0x00;
1491
1492         if (rtlpriv->mac80211.link_state == MAC80211_LINKED) {
1493                 undecorated_smoothed_pwdb =
1494                                  GET_UNDECORATED_AVERAGE_RSSI(rtlpriv);
1495         } else {
1496                 if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)
1497                         undecorated_smoothed_pwdb = 100;
1498                 else
1499                         undecorated_smoothed_pwdb =
1500                                 rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
1501         }
1502
1503         /* Check RSSI to determine HighPower/NormalPower state for
1504          * BT coexistence. */
1505         if (undecorated_smoothed_pwdb >= 67)
1506                 curr_bt_rssi_state &= (~BT_RSSI_STATE_NORMAL_POWER);
1507         else if (undecorated_smoothed_pwdb < 62)
1508                 curr_bt_rssi_state |= BT_RSSI_STATE_NORMAL_POWER;
1509
1510         /* Check RSSI to determine AMPDU setting for BT coexistence. */
1511         if (undecorated_smoothed_pwdb >= 40)
1512                 curr_bt_rssi_state &= (~BT_RSSI_STATE_AMDPU_OFF);
1513         else if (undecorated_smoothed_pwdb <= 32)
1514                 curr_bt_rssi_state |= BT_RSSI_STATE_AMDPU_OFF;
1515
1516         /* Marked RSSI state. It will be used to determine BT coexistence
1517          * setting later. */
1518         if (undecorated_smoothed_pwdb < 35)
1519                 curr_bt_rssi_state |=  BT_RSSI_STATE_SPECIAL_LOW;
1520         else
1521                 curr_bt_rssi_state &= (~BT_RSSI_STATE_SPECIAL_LOW);
1522
1523         /* Set Tx Power according to BT status. */
1524         if (undecorated_smoothed_pwdb >= 30)
1525                 curr_bt_rssi_state |=  BT_RSSI_STATE_TXPOWER_LOW;
1526         else if (undecorated_smoothed_pwdb < 25)
1527                 curr_bt_rssi_state &= (~BT_RSSI_STATE_TXPOWER_LOW);
1528
1529         /* Check BT state related to BT_Idle in B/G mode. */
1530         if (undecorated_smoothed_pwdb < 15)
1531                 curr_bt_rssi_state |=  BT_RSSI_STATE_BG_EDCA_LOW;
1532         else
1533                 curr_bt_rssi_state &= (~BT_RSSI_STATE_BG_EDCA_LOW);
1534
1535         if (curr_bt_rssi_state != rtlpcipriv->bt_coexist.bt_rssi_state) {
1536                 rtlpcipriv->bt_coexist.bt_rssi_state = curr_bt_rssi_state;
1537                 return true;
1538         } else {
1539                 return false;
1540         }
1541 }
1542 EXPORT_SYMBOL(rtl92c_bt_rssi_state_change);
1543
1544 static bool rtl92c_bt_state_change(struct ieee80211_hw *hw)
1545 {
1546         struct rtl_priv *rtlpriv = rtl_priv(hw);
1547         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1548
1549         u32 polling, ratio_tx, ratio_pri;
1550         u32 bt_tx, bt_pri;
1551         u8 bt_state;
1552         u8 cur_service_type;
1553
1554         if (rtlpriv->mac80211.link_state < MAC80211_LINKED)
1555                 return false;
1556
1557         bt_state = rtl_read_byte(rtlpriv, 0x4fd);
1558         bt_tx = rtl_read_dword(rtlpriv, 0x488);
1559         bt_tx = bt_tx & 0x00ffffff;
1560         bt_pri = rtl_read_dword(rtlpriv, 0x48c);
1561         bt_pri = bt_pri & 0x00ffffff;
1562         polling = rtl_read_dword(rtlpriv, 0x490);
1563
1564         if (bt_tx == 0xffffffff && bt_pri == 0xffffffff &&
1565             polling == 0xffffffff && bt_state == 0xff)
1566                 return false;
1567
1568         bt_state &= BIT_OFFSET_LEN_MASK_32(0, 1);
1569         if (bt_state != rtlpcipriv->bt_coexist.bt_cur_state) {
1570                 rtlpcipriv->bt_coexist.bt_cur_state = bt_state;
1571
1572                 if (rtlpcipriv->bt_coexist.reg_bt_sco == 3) {
1573                         rtlpcipriv->bt_coexist.bt_service = BT_IDLE;
1574
1575                         bt_state = bt_state |
1576                           ((rtlpcipriv->bt_coexist.bt_ant_isolation == 1) ?
1577                           0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
1578                           BIT_OFFSET_LEN_MASK_32(2, 1);
1579                         rtl_write_byte(rtlpriv, 0x4fd, bt_state);
1580                 }
1581                 return true;
1582         }
1583
1584         ratio_tx = bt_tx * 1000 / polling;
1585         ratio_pri = bt_pri * 1000 / polling;
1586         rtlpcipriv->bt_coexist.ratio_tx = ratio_tx;
1587         rtlpcipriv->bt_coexist.ratio_pri = ratio_pri;
1588
1589         if (bt_state && rtlpcipriv->bt_coexist.reg_bt_sco == 3) {
1590
1591                 if ((ratio_tx < 30)  && (ratio_pri < 30))
1592                         cur_service_type = BT_IDLE;
1593                 else if ((ratio_pri > 110) && (ratio_pri < 250))
1594                         cur_service_type = BT_SCO;
1595                 else if ((ratio_tx >= 200) && (ratio_pri >= 200))
1596                         cur_service_type = BT_BUSY;
1597                 else if ((ratio_tx >= 350) && (ratio_tx < 500))
1598                         cur_service_type = BT_OTHERBUSY;
1599                 else if (ratio_tx >= 500)
1600                         cur_service_type = BT_PAN;
1601                 else
1602                         cur_service_type = BT_OTHER_ACTION;
1603
1604                 if (cur_service_type != rtlpcipriv->bt_coexist.bt_service) {
1605                         rtlpcipriv->bt_coexist.bt_service = cur_service_type;
1606                         bt_state = bt_state |
1607                            ((rtlpcipriv->bt_coexist.bt_ant_isolation == 1) ?
1608                            0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
1609                            ((rtlpcipriv->bt_coexist.bt_service != BT_IDLE) ?
1610                            0 : BIT_OFFSET_LEN_MASK_32(2, 1));
1611
1612                         /* Add interrupt migration when bt is not ini
1613                          * idle state (no traffic). */
1614                         if (rtlpcipriv->bt_coexist.bt_service != BT_IDLE) {
1615                                 rtl_write_word(rtlpriv, 0x504, 0x0ccc);
1616                                 rtl_write_byte(rtlpriv, 0x506, 0x54);
1617                                 rtl_write_byte(rtlpriv, 0x507, 0x54);
1618                         } else {
1619                                 rtl_write_byte(rtlpriv, 0x506, 0x00);
1620                                 rtl_write_byte(rtlpriv, 0x507, 0x00);
1621                         }
1622
1623                         rtl_write_byte(rtlpriv, 0x4fd, bt_state);
1624                         return true;
1625                 }
1626         }
1627
1628         return false;
1629
1630 }
1631
1632 static bool rtl92c_bt_wifi_connect_change(struct ieee80211_hw *hw)
1633 {
1634         struct rtl_priv *rtlpriv = rtl_priv(hw);
1635         static bool media_connect;
1636
1637         if (rtlpriv->mac80211.link_state < MAC80211_LINKED) {
1638                 media_connect = false;
1639         } else {
1640                 if (!media_connect) {
1641                         media_connect = true;
1642                         return true;
1643                 }
1644                 media_connect = true;
1645         }
1646
1647         return false;
1648 }
1649
1650 static void rtl92c_bt_set_normal(struct ieee80211_hw *hw)
1651 {
1652         struct rtl_priv *rtlpriv = rtl_priv(hw);
1653         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1654
1655
1656         if (rtlpcipriv->bt_coexist.bt_service == BT_OTHERBUSY) {
1657                 rtlpcipriv->bt_coexist.bt_edca_ul = 0x5ea72b;
1658                 rtlpcipriv->bt_coexist.bt_edca_dl = 0x5ea72b;
1659         } else if (rtlpcipriv->bt_coexist.bt_service == BT_BUSY) {
1660                 rtlpcipriv->bt_coexist.bt_edca_ul = 0x5eb82f;
1661                 rtlpcipriv->bt_coexist.bt_edca_dl = 0x5eb82f;
1662         } else if (rtlpcipriv->bt_coexist.bt_service == BT_SCO) {
1663                 if (rtlpcipriv->bt_coexist.ratio_tx > 160) {
1664                         rtlpcipriv->bt_coexist.bt_edca_ul = 0x5ea72f;
1665                         rtlpcipriv->bt_coexist.bt_edca_dl = 0x5ea72f;
1666                 } else {
1667                         rtlpcipriv->bt_coexist.bt_edca_ul = 0x5ea32b;
1668                         rtlpcipriv->bt_coexist.bt_edca_dl = 0x5ea42b;
1669                 }
1670         } else {
1671                 rtlpcipriv->bt_coexist.bt_edca_ul = 0;
1672                 rtlpcipriv->bt_coexist.bt_edca_dl = 0;
1673         }
1674
1675         if ((rtlpcipriv->bt_coexist.bt_service != BT_IDLE) &&
1676              (rtlpriv->mac80211.mode == WIRELESS_MODE_G ||
1677              (rtlpriv->mac80211.mode == (WIRELESS_MODE_G | WIRELESS_MODE_B))) &&
1678              (rtlpcipriv->bt_coexist.bt_rssi_state &
1679              BT_RSSI_STATE_BG_EDCA_LOW)) {
1680                 rtlpcipriv->bt_coexist.bt_edca_ul = 0x5eb82b;
1681                 rtlpcipriv->bt_coexist.bt_edca_dl = 0x5eb82b;
1682         }
1683 }
1684
1685 static void rtl92c_bt_ant_isolation(struct ieee80211_hw *hw)
1686 {
1687         struct rtl_priv *rtlpriv = rtl_priv(hw);
1688         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1689
1690
1691         /* Only enable HW BT coexist when BT in "Busy" state. */
1692         if (rtlpriv->mac80211.vendor == PEER_CISCO &&
1693             rtlpcipriv->bt_coexist.bt_service == BT_OTHER_ACTION) {
1694                 rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0);
1695         } else {
1696                 if ((rtlpcipriv->bt_coexist.bt_service == BT_BUSY) &&
1697                     (rtlpcipriv->bt_coexist.bt_rssi_state &
1698                      BT_RSSI_STATE_NORMAL_POWER)) {
1699                         rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0);
1700                 } else if ((rtlpcipriv->bt_coexist.bt_service ==
1701                             BT_OTHER_ACTION) && (rtlpriv->mac80211.mode <
1702                             WIRELESS_MODE_N_24G) &&
1703                             (rtlpcipriv->bt_coexist.bt_rssi_state &
1704                             BT_RSSI_STATE_SPECIAL_LOW)) {
1705                         rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0);
1706                 } else if (rtlpcipriv->bt_coexist.bt_service == BT_PAN) {
1707                         rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0x00);
1708                 } else {
1709                         rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0x00);
1710                 }
1711         }
1712
1713         if (rtlpcipriv->bt_coexist.bt_service == BT_PAN)
1714                 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x10100);
1715         else
1716                 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x0);
1717
1718         if (rtlpcipriv->bt_coexist.bt_rssi_state &
1719             BT_RSSI_STATE_NORMAL_POWER) {
1720                 rtl92c_bt_set_normal(hw);
1721         } else {
1722                 rtlpcipriv->bt_coexist.bt_edca_ul = 0;
1723                 rtlpcipriv->bt_coexist.bt_edca_dl = 0;
1724         }
1725
1726         if (rtlpcipriv->bt_coexist.bt_service != BT_IDLE) {
1727                 rtlpriv->cfg->ops->set_rfreg(hw,
1728                                  RF90_PATH_A,
1729                                  0x1e,
1730                                  0xf0, 0xf);
1731         } else {
1732                 rtlpriv->cfg->ops->set_rfreg(hw,
1733                      RF90_PATH_A, 0x1e, 0xf0,
1734                      rtlpcipriv->bt_coexist.bt_rfreg_origin_1e);
1735         }
1736
1737         if (!rtlpriv->dm.dynamic_txpower_enable) {
1738                 if (rtlpcipriv->bt_coexist.bt_service != BT_IDLE) {
1739                         if (rtlpcipriv->bt_coexist.bt_rssi_state &
1740                                 BT_RSSI_STATE_TXPOWER_LOW) {
1741                                 rtlpriv->dm.dynamic_txhighpower_lvl =
1742                                                         TXHIGHPWRLEVEL_BT2;
1743                         } else {
1744                                 rtlpriv->dm.dynamic_txhighpower_lvl =
1745                                         TXHIGHPWRLEVEL_BT1;
1746                         }
1747                 } else {
1748                         rtlpriv->dm.dynamic_txhighpower_lvl =
1749                                 TXHIGHPWRLEVEL_NORMAL;
1750                 }
1751                 rtl92c_phy_set_txpower_level(hw,
1752                         rtlpriv->phy.current_channel);
1753         }
1754 }
1755
1756 static void rtl92c_check_bt_change(struct ieee80211_hw *hw)
1757 {
1758         struct rtl_priv *rtlpriv = rtl_priv(hw);
1759         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1760
1761         if (rtlpcipriv->bt_coexist.bt_cur_state) {
1762                 if (rtlpcipriv->bt_coexist.bt_ant_isolation)
1763                         rtl92c_bt_ant_isolation(hw);
1764         } else {
1765                 rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0x00);
1766                 rtlpriv->cfg->ops->set_rfreg(hw, RF90_PATH_A, 0x1e, 0xf0,
1767                                 rtlpcipriv->bt_coexist.bt_rfreg_origin_1e);
1768
1769                 rtlpcipriv->bt_coexist.bt_edca_ul = 0;
1770                 rtlpcipriv->bt_coexist.bt_edca_dl = 0;
1771         }
1772 }
1773
1774 void rtl92c_dm_bt_coexist(struct ieee80211_hw *hw)
1775 {
1776         struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
1777
1778         bool wifi_connect_change;
1779         bool bt_state_change;
1780         bool rssi_state_change;
1781
1782         if ((rtlpcipriv->bt_coexist.bt_coexistence) &&
1783              (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4)) {
1784
1785                 wifi_connect_change = rtl92c_bt_wifi_connect_change(hw);
1786                 bt_state_change = rtl92c_bt_state_change(hw);
1787                 rssi_state_change = rtl92c_bt_rssi_state_change(hw);
1788
1789                 if (wifi_connect_change || bt_state_change || rssi_state_change)
1790                         rtl92c_check_bt_change(hw);
1791         }
1792 }
1793 EXPORT_SYMBOL(rtl92c_dm_bt_coexist);