2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/leds.h>
23 #include <linux/completion.h>
29 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
30 * should rely on this file or its contents.
35 /* Macro to expand scalars to 64-bit objects */
37 #define ito64(x) (sizeof(x) == 1) ? \
38 (((unsigned long long int)(x)) & (0xff)) : \
40 (((unsigned long long int)(x)) & 0xffff) : \
42 (((unsigned long long int)(x)) & 0xffffffff) : \
43 (unsigned long long int)(x))
45 /* increment with wrap-around */
46 #define INCR(_l, _sz) do { \
48 (_l) &= ((_sz) - 1); \
51 /* decrement with wrap-around */
52 #define DECR(_l, _sz) do { \
54 (_l) &= ((_sz) - 1); \
57 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
59 #define TSF_TO_TU(_h,_l) \
60 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
62 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
70 /*************************/
71 /* Descriptor Management */
72 /*************************/
74 #define ATH_TXBUF_RESET(_bf) do { \
75 (_bf)->bf_stale = false; \
76 (_bf)->bf_lastbf = NULL; \
77 (_bf)->bf_next = NULL; \
78 memset(&((_bf)->bf_state), 0, \
79 sizeof(struct ath_buf_state)); \
82 #define ATH_RXBUF_RESET(_bf) do { \
83 (_bf)->bf_stale = false; \
87 * enum buffer_type - Buffer type flags
89 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
90 * @BUF_AGGR: Indicates whether the buffer can be aggregated
91 * (used in aggregation scheduling)
92 * @BUF_XRETRY: To denote excessive retries of the buffer
100 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
101 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
102 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
104 #define ATH_TXSTATUS_RING_SIZE 64
108 dma_addr_t dd_desc_paddr;
110 struct ath_buf *dd_bufptr;
113 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
114 struct list_head *head, const char *name,
115 int nbuf, int ndesc, bool is_tx);
116 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
117 struct list_head *head);
123 #define ATH_MAX_ANTENNA 3
124 #define ATH_RXBUF 512
125 #define ATH_TXBUF 512
126 #define ATH_TXBUF_RESERVE 5
127 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
128 #define ATH_TXMAXTRY 13
129 #define ATH_MGT_TXMAXTRY 4
131 #define TID_TO_WME_AC(_tid) \
132 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
133 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
134 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
137 #define ATH_AGGR_DELIM_SZ 4
138 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
139 /* number of delimiters for encryption padding */
140 #define ATH_AGGR_ENCRYPTDELIM 10
141 /* minimum h/w qdepth to be sustained to maximize aggregation */
142 #define ATH_AGGR_MIN_QDEPTH 2
143 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
145 #define IEEE80211_SEQ_SEQ_SHIFT 4
146 #define IEEE80211_SEQ_MAX 4096
147 #define IEEE80211_WEP_IVLEN 3
148 #define IEEE80211_WEP_KIDLEN 1
149 #define IEEE80211_WEP_CRCLEN 4
150 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
151 (IEEE80211_WEP_IVLEN + \
152 IEEE80211_WEP_KIDLEN + \
153 IEEE80211_WEP_CRCLEN))
155 /* return whether a bit at index _n in bitmap _bm is set
156 * _sz is the size of the bitmap */
157 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
158 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
160 /* return block-ack bitmap index given sequence and starting sequence */
161 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
163 /* returns delimiter padding required given the packet length */
164 #define ATH_AGGR_GET_NDELIM(_len) \
165 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
166 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
168 #define BAW_WITHIN(_start, _bawsz, _seqno) \
169 ((((_seqno) - (_start)) & 4095) < (_bawsz))
171 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
173 #define ATH_TX_COMPLETE_POLL_INT 1000
175 enum ATH_AGGR_STATUS {
181 #define ATH_TXFIFO_DEPTH 8
183 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
184 u32 axq_qnum; /* ath9k hardware queue number */
186 struct list_head axq_q;
191 bool axq_tx_inprogress;
192 bool txq_flush_inprogress;
193 struct list_head axq_acq;
194 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
195 struct list_head txq_fifo_pending;
204 struct list_head list;
205 struct list_head tid_q;
208 struct ath_frame_info {
211 enum ath9k_key_type keytype;
216 struct ath_buf_state {
219 unsigned long bfs_paprd_timestamp;
220 enum ath9k_internal_frame_type bfs_ftype;
224 struct list_head list;
225 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
227 struct ath_buf *bf_next; /* next subframe in the aggregate */
228 struct sk_buff *bf_mpdu; /* enclosing frame structure */
229 void *bf_desc; /* virtual addr of desc */
230 dma_addr_t bf_daddr; /* physical addr of desc */
231 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
234 struct ath_buf_state bf_state;
238 struct list_head list;
239 struct list_head buf_q;
241 struct ath_atx_ac *ac;
242 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
247 int baw_head; /* first un-acked tx buffer */
248 int baw_tail; /* next unused tx buffer slot */
255 #ifdef CONFIG_ATH9K_DEBUGFS
256 struct list_head list; /* for sc->nodes */
257 struct ieee80211_sta *sta; /* station struct we're part of */
259 struct ath_atx_tid tid[WME_NUM_TID];
260 struct ath_atx_ac ac[WME_NUM_AC];
265 #define AGGR_CLEANUP BIT(1)
266 #define AGGR_ADDBA_COMPLETE BIT(2)
267 #define AGGR_ADDBA_PROGRESS BIT(3)
269 struct ath_tx_control {
273 enum ath9k_internal_frame_type frame_type;
277 #define ATH_TX_ERROR 0x01
278 #define ATH_TX_XRETRY 0x02
279 #define ATH_TX_BAR 0x04
282 * @txq_map: Index is mac80211 queue number. This is
283 * not necessarily the same as the hardware queue number
289 spinlock_t txbuflock;
290 struct list_head txbuf;
291 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
292 struct ath_descdma txdma;
293 struct ath_txq *txq_map[WME_NUM_AC];
297 struct sk_buff_head rx_fifo;
298 struct sk_buff_head rx_buffers;
306 unsigned int rxfilter;
307 spinlock_t rxbuflock;
308 struct list_head rxbuf;
309 struct ath_descdma rxdma;
310 struct ath_buf *rx_bufptr;
311 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
313 struct sk_buff *frag;
316 int ath_startrecv(struct ath_softc *sc);
317 bool ath_stoprecv(struct ath_softc *sc);
318 void ath_flushrecv(struct ath_softc *sc);
319 u32 ath_calcrxfilter(struct ath_softc *sc);
320 int ath_rx_init(struct ath_softc *sc, int nbufs);
321 void ath_rx_cleanup(struct ath_softc *sc);
322 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
323 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
324 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
325 bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
326 void ath_draintxq(struct ath_softc *sc,
327 struct ath_txq *txq, bool retry_tx);
328 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
329 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
330 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
331 int ath_tx_init(struct ath_softc *sc, int nbufs);
332 void ath_tx_cleanup(struct ath_softc *sc);
333 int ath_txq_update(struct ath_softc *sc, int qnum,
334 struct ath9k_tx_queue_info *q);
335 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
336 struct ath_tx_control *txctl);
337 void ath_tx_tasklet(struct ath_softc *sc);
338 void ath_tx_edma_tasklet(struct ath_softc *sc);
339 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
341 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
342 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
350 bool is_bslot_active;
351 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
352 enum nl80211_iftype av_opmode;
353 struct ath_buf *av_bcbuf;
354 u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */
357 /*******************/
358 /* Beacon Handling */
359 /*******************/
362 * Regardless of the number of beacons we stagger, (i.e. regardless of the
363 * number of BSSIDs) if a given beacon does not go out even after waiting this
364 * number of beacon intervals, the game's up.
366 #define BSTUCK_THRESH (9 * ATH_BCBUF)
368 #define ATH_DEFAULT_BINTVAL 100 /* TU */
369 #define ATH_DEFAULT_BMISS_LIMIT 10
370 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
372 struct ath_beacon_config {
382 OK, /* no change needed */
383 UPDATE, /* update pending */
384 COMMIT /* beacon sent, commit change */
385 } updateslot; /* slot time update fsm */
391 struct ieee80211_vif *bslot[ATH_BCBUF];
394 struct ath9k_tx_queue_info beacon_qi;
395 struct ath_descdma bdma;
396 struct ath_txq *cabq;
397 struct list_head bbuf;
400 void ath_beacon_tasklet(unsigned long data);
401 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
402 int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif);
403 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
404 int ath_beaconq_config(struct ath_softc *sc);
405 void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);
411 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
412 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
413 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
414 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
415 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
416 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
417 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
419 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
421 void ath_hw_check(struct work_struct *work);
422 void ath_paprd_calibrate(struct work_struct *work);
423 void ath_ani_calibrate(unsigned long data);
430 bool hw_timer_enabled;
431 spinlock_t btcoex_lock;
432 struct timer_list period_timer; /* Timer for BT period */
434 unsigned long bt_priority_time;
435 int bt_stomp_type; /* Types of BT stomping */
436 u32 btcoex_no_stomp; /* in usec */
437 u32 btcoex_period; /* in usec */
438 u32 btscan_no_stomp; /* in usec */
439 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
442 int ath_init_btcoex_timer(struct ath_softc *sc);
443 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
444 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
446 /********************/
448 /********************/
450 #define ATH_LED_PIN_DEF 1
451 #define ATH_LED_PIN_9287 8
452 #define ATH_LED_PIN_9485 6
454 #ifdef CONFIG_MAC80211_LEDS
455 void ath_init_leds(struct ath_softc *sc);
456 void ath_deinit_leds(struct ath_softc *sc);
458 static inline void ath_init_leds(struct ath_softc *sc)
462 static inline void ath_deinit_leds(struct ath_softc *sc)
468 /* Antenna diversity/combining */
469 #define ATH_ANT_RX_CURRENT_SHIFT 4
470 #define ATH_ANT_RX_MAIN_SHIFT 2
471 #define ATH_ANT_RX_MASK 0x3
473 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
474 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
475 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
476 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
477 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
478 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
479 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
481 #define ATH_ANT_DIV_COMB_LNA1_LNA2_DELTA -3
482 #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1
483 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
484 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
485 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
487 enum ath9k_ant_div_comb_lna_conf {
488 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
489 ATH_ANT_DIV_COMB_LNA2,
490 ATH_ANT_DIV_COMB_LNA1,
491 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2,
494 struct ath_ant_comb {
513 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
514 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
519 unsigned long scan_start_time;
522 /********************/
523 /* Main driver core */
524 /********************/
527 * Default cache line size, in bytes.
528 * Used when PCI device not fully initialized by bootrom/BIOS
530 #define DEFAULT_CACHELINE 32
531 #define ATH_REGCLASSIDS_MAX 10
532 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
533 #define ATH_MAX_SW_RETRIES 10
534 #define ATH_CHAN_MAX 255
536 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
537 #define ATH_RATE_DUMMY_MARKER 0
539 #define SC_OP_INVALID BIT(0)
540 #define SC_OP_BEACONS BIT(1)
541 #define SC_OP_RXAGGR BIT(2)
542 #define SC_OP_TXAGGR BIT(3)
543 #define SC_OP_OFFCHANNEL BIT(4)
544 #define SC_OP_PREAMBLE_SHORT BIT(5)
545 #define SC_OP_PROTECT_ENABLE BIT(6)
546 #define SC_OP_RXFLUSH BIT(7)
547 #define SC_OP_LED_ASSOCIATED BIT(8)
548 #define SC_OP_LED_ON BIT(9)
549 #define SC_OP_TSF_RESET BIT(11)
550 #define SC_OP_BT_PRIORITY_DETECTED BIT(12)
551 #define SC_OP_BT_SCAN BIT(13)
552 #define SC_OP_ANI_RUN BIT(14)
553 #define SC_OP_ENABLE_APM BIT(15)
555 /* Powersave flags */
556 #define PS_WAIT_FOR_BEACON BIT(0)
557 #define PS_WAIT_FOR_CAB BIT(1)
558 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
559 #define PS_WAIT_FOR_TX_ACK BIT(3)
560 #define PS_BEACON_SYNC BIT(4)
562 struct ath_rate_table;
564 struct ath9k_vif_iter_data {
565 const u8 *hw_macaddr; /* phy's hardware address, set
566 * before starting iteration for
569 u8 mask[ETH_ALEN]; /* bssid mask */
570 int naps; /* number of AP vifs */
571 int nmeshes; /* number of mesh vifs */
572 int nstations; /* number of station vifs */
573 int nwds; /* number of nwd vifs */
574 int nadhocs; /* number of adhoc vifs */
575 int nothers; /* number of vifs not specified above. */
579 struct ieee80211_hw *hw;
584 struct survey_info *cur_survey;
585 struct survey_info survey[ATH9K_NUM_CHANNELS];
587 struct tasklet_struct intr_tq;
588 struct tasklet_struct bcon_tasklet;
589 struct ath_hw *sc_ah;
592 spinlock_t sc_serial_rw;
593 spinlock_t sc_pm_lock;
594 spinlock_t sc_pcu_lock;
596 struct work_struct paprd_work;
597 struct work_struct hw_check_work;
598 struct completion paprd_complete;
600 unsigned int hw_busy_count;
603 u32 sc_flags; /* SC_OP_* */
604 u16 ps_flags; /* PS_* */
610 unsigned long ps_usecount;
612 struct ath_config config;
615 struct ath_beacon beacon;
616 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
618 #ifdef CONFIG_MAC80211_LEDS
621 struct led_classdev led_cdev;
624 struct ath9k_hw_cal_data caldata;
627 #ifdef CONFIG_ATH9K_DEBUGFS
628 struct ath9k_debug debug;
629 spinlock_t nodes_lock;
630 struct list_head nodes; /* basically, stations */
631 unsigned int tx_complete_poll_work_seen;
633 struct ath_beacon_config cur_beacon_conf;
634 struct delayed_work tx_complete_work;
635 struct delayed_work hw_pll_work;
636 struct ath_btcoex btcoex;
638 struct ath_descdma txsdma;
640 struct ath_ant_comb ant_comb;
643 void ath9k_tasklet(unsigned long data);
644 int ath_reset(struct ath_softc *sc, bool retry_tx);
645 int ath_cabq_update(struct ath_softc *);
647 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
649 common->bus_ops->read_cachesize(common, csz);
652 extern struct ieee80211_ops ath9k_ops;
653 extern int ath9k_modparam_nohwcrypt;
654 extern int led_blink;
655 extern bool is_ath9k_unloaded;
657 irqreturn_t ath_isr(int irq, void *dev);
658 void ath9k_init_crypto(struct ath_softc *sc);
659 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
660 const struct ath_bus_ops *bus_ops);
661 void ath9k_deinit_device(struct ath_softc *sc);
662 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
663 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
664 struct ath9k_channel *hchan);
666 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
667 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
668 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
669 bool ath9k_uses_beacons(int type);
672 int ath_pci_init(void);
673 void ath_pci_exit(void);
675 static inline int ath_pci_init(void) { return 0; };
676 static inline void ath_pci_exit(void) {};
679 #ifdef CONFIG_ATHEROS_AR71XX
680 int ath_ahb_init(void);
681 void ath_ahb_exit(void);
683 static inline int ath_ahb_init(void) { return 0; };
684 static inline void ath_ahb_exit(void) {};
687 void ath9k_ps_wakeup(struct ath_softc *sc);
688 void ath9k_ps_restore(struct ath_softc *sc);
690 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
692 void ath9k_set_bssid_mask(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
694 void ath_start_rfkill_poll(struct ath_softc *sc);
695 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
696 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
697 struct ieee80211_vif *vif,
698 struct ath9k_vif_iter_data *iter_data);