2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/interrupt.h>
23 #include <linux/leds.h>
24 #include <linux/completion.h>
30 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
31 * should rely on this file or its contents.
36 /* Macro to expand scalars to 64-bit objects */
38 #define ito64(x) (sizeof(x) == 1) ? \
39 (((unsigned long long int)(x)) & (0xff)) : \
41 (((unsigned long long int)(x)) & 0xffff) : \
43 (((unsigned long long int)(x)) & 0xffffffff) : \
44 (unsigned long long int)(x))
46 /* increment with wrap-around */
47 #define INCR(_l, _sz) do { \
49 (_l) &= ((_sz) - 1); \
52 /* decrement with wrap-around */
53 #define DECR(_l, _sz) do { \
55 (_l) &= ((_sz) - 1); \
58 #define TSF_TO_TU(_h,_l) \
59 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
61 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
68 /*************************/
69 /* Descriptor Management */
70 /*************************/
72 #define ATH_TXBUF_RESET(_bf) do { \
73 (_bf)->bf_stale = false; \
74 (_bf)->bf_lastbf = NULL; \
75 (_bf)->bf_next = NULL; \
76 memset(&((_bf)->bf_state), 0, \
77 sizeof(struct ath_buf_state)); \
81 * enum buffer_type - Buffer type flags
83 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
84 * @BUF_AGGR: Indicates whether the buffer can be aggregated
85 * (used in aggregation scheduling)
92 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
93 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
95 #define ATH_TXSTATUS_RING_SIZE 64
97 #define DS2PHYS(_dd, _ds) \
98 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
99 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
100 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
104 dma_addr_t dd_desc_paddr;
106 struct ath_buf *dd_bufptr;
109 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
110 struct list_head *head, const char *name,
111 int nbuf, int ndesc, bool is_tx);
112 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
113 struct list_head *head);
119 #define ATH_RXBUF 512
120 #define ATH_TXBUF 512
121 #define ATH_TXBUF_RESERVE 5
122 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
123 #define ATH_TXMAXTRY 13
125 #define TID_TO_WME_AC(_tid) \
126 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
127 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
128 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
131 #define ATH_AGGR_DELIM_SZ 4
132 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
133 /* number of delimiters for encryption padding */
134 #define ATH_AGGR_ENCRYPTDELIM 10
135 /* minimum h/w qdepth to be sustained to maximize aggregation */
136 #define ATH_AGGR_MIN_QDEPTH 2
137 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
139 #define IEEE80211_SEQ_SEQ_SHIFT 4
140 #define IEEE80211_SEQ_MAX 4096
141 #define IEEE80211_WEP_IVLEN 3
142 #define IEEE80211_WEP_KIDLEN 1
143 #define IEEE80211_WEP_CRCLEN 4
144 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
145 (IEEE80211_WEP_IVLEN + \
146 IEEE80211_WEP_KIDLEN + \
147 IEEE80211_WEP_CRCLEN))
149 /* return whether a bit at index _n in bitmap _bm is set
150 * _sz is the size of the bitmap */
151 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
152 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
154 /* return block-ack bitmap index given sequence and starting sequence */
155 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
157 /* returns delimiter padding required given the packet length */
158 #define ATH_AGGR_GET_NDELIM(_len) \
159 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
160 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
162 #define BAW_WITHIN(_start, _bawsz, _seqno) \
163 ((((_seqno) - (_start)) & 4095) < (_bawsz))
165 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
167 #define ATH_TX_COMPLETE_POLL_INT 1000
169 enum ATH_AGGR_STATUS {
175 #define ATH_TXFIFO_DEPTH 8
177 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
178 u32 axq_qnum; /* ath9k hardware queue number */
180 struct list_head axq_q;
185 bool axq_tx_inprogress;
186 struct list_head axq_acq;
187 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
196 struct list_head list;
197 struct list_head tid_q;
198 bool clear_ps_filter;
201 struct ath_frame_info {
204 enum ath9k_key_type keytype;
209 struct ath_buf_state {
214 unsigned long bfs_paprd_timestamp;
218 struct list_head list;
219 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
221 struct ath_buf *bf_next; /* next subframe in the aggregate */
222 struct sk_buff *bf_mpdu; /* enclosing frame structure */
223 void *bf_desc; /* virtual addr of desc */
224 dma_addr_t bf_daddr; /* physical addr of desc */
225 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
227 struct ath_buf_state bf_state;
231 struct list_head list;
232 struct sk_buff_head buf_q;
234 struct ath_atx_ac *ac;
235 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
240 int baw_head; /* first un-acked tx buffer */
241 int baw_tail; /* next unused tx buffer slot */
248 #ifdef CONFIG_ATH9K_DEBUGFS
249 struct list_head list; /* for sc->nodes */
250 struct ieee80211_sta *sta; /* station struct we're part of */
252 struct ath_atx_tid tid[WME_NUM_TID];
253 struct ath_atx_ac ac[WME_NUM_AC];
262 #define AGGR_CLEANUP BIT(1)
263 #define AGGR_ADDBA_COMPLETE BIT(2)
264 #define AGGR_ADDBA_PROGRESS BIT(3)
266 struct ath_tx_control {
272 #define ATH_TX_ERROR 0x01
273 #define ATH_TX_BAR 0x02
276 * @txq_map: Index is mac80211 queue number. This is
277 * not necessarily the same as the hardware queue number
283 spinlock_t txbuflock;
284 struct list_head txbuf;
285 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
286 struct ath_descdma txdma;
287 struct ath_txq *txq_map[WME_NUM_AC];
291 struct sk_buff_head rx_fifo;
292 struct sk_buff_head rx_buffers;
300 unsigned int rxfilter;
301 spinlock_t rxbuflock;
302 struct list_head rxbuf;
303 struct ath_descdma rxdma;
304 struct ath_buf *rx_bufptr;
305 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
307 struct ath_buf *buf_hold;
308 struct sk_buff *frag;
311 int ath_startrecv(struct ath_softc *sc);
312 bool ath_stoprecv(struct ath_softc *sc);
313 void ath_flushrecv(struct ath_softc *sc);
314 u32 ath_calcrxfilter(struct ath_softc *sc);
315 int ath_rx_init(struct ath_softc *sc, int nbufs);
316 void ath_rx_cleanup(struct ath_softc *sc);
317 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
318 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
319 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
320 bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
321 void ath_draintxq(struct ath_softc *sc,
322 struct ath_txq *txq, bool retry_tx);
323 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
324 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
325 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
326 int ath_tx_init(struct ath_softc *sc, int nbufs);
327 void ath_tx_cleanup(struct ath_softc *sc);
328 int ath_txq_update(struct ath_softc *sc, int qnum,
329 struct ath9k_tx_queue_info *q);
330 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
331 struct ath_tx_control *txctl);
332 void ath_tx_tasklet(struct ath_softc *sc);
333 void ath_tx_edma_tasklet(struct ath_softc *sc);
334 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
336 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
337 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
339 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
340 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
341 struct ath_node *an);
349 bool is_bslot_active, primary_sta_vif;
350 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
351 struct ath_buf *av_bcbuf;
354 /*******************/
355 /* Beacon Handling */
356 /*******************/
359 * Regardless of the number of beacons we stagger, (i.e. regardless of the
360 * number of BSSIDs) if a given beacon does not go out even after waiting this
361 * number of beacon intervals, the game's up.
363 #define BSTUCK_THRESH 9
365 #define ATH_DEFAULT_BINTVAL 100 /* TU */
366 #define ATH_DEFAULT_BMISS_LIMIT 10
367 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
369 struct ath_beacon_config {
379 OK, /* no change needed */
380 UPDATE, /* update pending */
381 COMMIT /* beacon sent, commit change */
382 } updateslot; /* slot time update fsm */
388 struct ieee80211_vif *bslot[ATH_BCBUF];
391 struct ath9k_tx_queue_info beacon_qi;
392 struct ath_descdma bdma;
393 struct ath_txq *cabq;
394 struct list_head bbuf;
400 void ath_beacon_tasklet(unsigned long data);
401 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
402 int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif);
403 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
404 int ath_beaconq_config(struct ath_softc *sc);
405 void ath_set_beacon(struct ath_softc *sc);
406 void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);
412 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
413 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
414 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
415 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
416 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
417 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
418 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
420 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
422 void ath_reset_work(struct work_struct *work);
423 void ath_hw_check(struct work_struct *work);
424 void ath_hw_pll_work(struct work_struct *work);
425 void ath_paprd_calibrate(struct work_struct *work);
426 void ath_ani_calibrate(unsigned long data);
427 void ath_start_ani(struct ath_common *common);
434 bool hw_timer_enabled;
435 spinlock_t btcoex_lock;
436 struct timer_list period_timer; /* Timer for BT period */
438 unsigned long bt_priority_time;
439 int bt_stomp_type; /* Types of BT stomping */
440 u32 btcoex_no_stomp; /* in usec */
441 u32 btcoex_period; /* in usec */
442 u32 btscan_no_stomp; /* in usec */
443 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
446 int ath_init_btcoex_timer(struct ath_softc *sc);
447 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
448 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
450 /********************/
452 /********************/
454 #define ATH_LED_PIN_DEF 1
455 #define ATH_LED_PIN_9287 8
456 #define ATH_LED_PIN_9300 10
457 #define ATH_LED_PIN_9485 6
458 #define ATH_LED_PIN_9462 0
460 #ifdef CONFIG_MAC80211_LEDS
461 void ath_init_leds(struct ath_softc *sc);
462 void ath_deinit_leds(struct ath_softc *sc);
464 static inline void ath_init_leds(struct ath_softc *sc)
468 static inline void ath_deinit_leds(struct ath_softc *sc)
474 /* Antenna diversity/combining */
475 #define ATH_ANT_RX_CURRENT_SHIFT 4
476 #define ATH_ANT_RX_MAIN_SHIFT 2
477 #define ATH_ANT_RX_MASK 0x3
479 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
480 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
481 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
482 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
483 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
484 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
485 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
487 #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1
488 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
489 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
490 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
492 enum ath9k_ant_div_comb_lna_conf {
493 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
494 ATH_ANT_DIV_COMB_LNA2,
495 ATH_ANT_DIV_COMB_LNA1,
496 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2,
499 struct ath_ant_comb {
518 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
519 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
524 unsigned long scan_start_time;
527 /********************/
528 /* Main driver core */
529 /********************/
532 * Default cache line size, in bytes.
533 * Used when PCI device not fully initialized by bootrom/BIOS
535 #define DEFAULT_CACHELINE 32
536 #define ATH_REGCLASSIDS_MAX 10
537 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
538 #define ATH_MAX_SW_RETRIES 10
539 #define ATH_CHAN_MAX 255
541 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
542 #define ATH_RATE_DUMMY_MARKER 0
544 #define SC_OP_INVALID BIT(0)
545 #define SC_OP_BEACONS BIT(1)
546 #define SC_OP_RXAGGR BIT(2)
547 #define SC_OP_TXAGGR BIT(3)
548 #define SC_OP_OFFCHANNEL BIT(4)
549 #define SC_OP_PREAMBLE_SHORT BIT(5)
550 #define SC_OP_PROTECT_ENABLE BIT(6)
551 #define SC_OP_RXFLUSH BIT(7)
552 #define SC_OP_LED_ASSOCIATED BIT(8)
553 #define SC_OP_LED_ON BIT(9)
554 #define SC_OP_TSF_RESET BIT(11)
555 #define SC_OP_BT_PRIORITY_DETECTED BIT(12)
556 #define SC_OP_BT_SCAN BIT(13)
557 #define SC_OP_ANI_RUN BIT(14)
558 #define SC_OP_PRIM_STA_VIF BIT(15)
560 /* Powersave flags */
561 #define PS_WAIT_FOR_BEACON BIT(0)
562 #define PS_WAIT_FOR_CAB BIT(1)
563 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
564 #define PS_WAIT_FOR_TX_ACK BIT(3)
565 #define PS_BEACON_SYNC BIT(4)
567 struct ath_rate_table;
569 struct ath9k_vif_iter_data {
570 const u8 *hw_macaddr; /* phy's hardware address, set
571 * before starting iteration for
574 u8 mask[ETH_ALEN]; /* bssid mask */
575 int naps; /* number of AP vifs */
576 int nmeshes; /* number of mesh vifs */
577 int nstations; /* number of station vifs */
578 int nwds; /* number of WDS vifs */
579 int nadhocs; /* number of adhoc vifs */
580 int nothers; /* number of vifs not specified above. */
584 struct ieee80211_hw *hw;
589 struct survey_info *cur_survey;
590 struct survey_info survey[ATH9K_NUM_CHANNELS];
592 struct tasklet_struct intr_tq;
593 struct tasklet_struct bcon_tasklet;
594 struct ath_hw *sc_ah;
597 spinlock_t sc_serial_rw;
598 spinlock_t sc_pm_lock;
599 spinlock_t sc_pcu_lock;
601 struct work_struct paprd_work;
602 struct work_struct hw_check_work;
603 struct work_struct hw_reset_work;
604 struct completion paprd_complete;
606 unsigned int hw_busy_count;
609 u32 sc_flags; /* SC_OP_* */
610 u16 ps_flags; /* PS_* */
616 unsigned long ps_usecount;
618 struct ath_config config;
621 struct ath_beacon beacon;
622 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
624 #ifdef CONFIG_MAC80211_LEDS
627 struct led_classdev led_cdev;
630 struct ath9k_hw_cal_data caldata;
633 #ifdef CONFIG_ATH9K_DEBUGFS
634 struct ath9k_debug debug;
635 spinlock_t nodes_lock;
636 struct list_head nodes; /* basically, stations */
637 unsigned int tx_complete_poll_work_seen;
639 struct ath_beacon_config cur_beacon_conf;
640 struct delayed_work tx_complete_work;
641 struct delayed_work hw_pll_work;
642 struct ath_btcoex btcoex;
644 struct ath_descdma txsdma;
646 struct ath_ant_comb ant_comb;
650 void ath9k_tasklet(unsigned long data);
651 int ath_cabq_update(struct ath_softc *);
653 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
655 common->bus_ops->read_cachesize(common, csz);
658 extern struct ieee80211_ops ath9k_ops;
659 extern int ath9k_modparam_nohwcrypt;
660 extern int led_blink;
661 extern bool is_ath9k_unloaded;
663 irqreturn_t ath_isr(int irq, void *dev);
664 int ath9k_init_device(u16 devid, struct ath_softc *sc,
665 const struct ath_bus_ops *bus_ops);
666 void ath9k_deinit_device(struct ath_softc *sc);
667 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
668 void ath9k_reload_chainmask_settings(struct ath_softc *sc);
670 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
671 bool ath9k_uses_beacons(int type);
673 #ifdef CONFIG_ATH9K_PCI
674 int ath_pci_init(void);
675 void ath_pci_exit(void);
677 static inline int ath_pci_init(void) { return 0; };
678 static inline void ath_pci_exit(void) {};
681 #ifdef CONFIG_ATH9K_AHB
682 int ath_ahb_init(void);
683 void ath_ahb_exit(void);
685 static inline int ath_ahb_init(void) { return 0; };
686 static inline void ath_ahb_exit(void) {};
689 void ath9k_ps_wakeup(struct ath_softc *sc);
690 void ath9k_ps_restore(struct ath_softc *sc);
692 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
694 void ath_start_rfkill_poll(struct ath_softc *sc);
695 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
696 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
697 struct ieee80211_vif *vif,
698 struct ath9k_vif_iter_data *iter_data);