2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/leds.h>
23 #include <linux/completion.h>
24 #include <linux/pm_qos_params.h>
30 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
31 * should rely on this file or its contents.
36 /* Macro to expand scalars to 64-bit objects */
38 #define ito64(x) (sizeof(x) == 1) ? \
39 (((unsigned long long int)(x)) & (0xff)) : \
41 (((unsigned long long int)(x)) & 0xffff) : \
43 (((unsigned long long int)(x)) & 0xffffffff) : \
44 (unsigned long long int)(x))
46 /* increment with wrap-around */
47 #define INCR(_l, _sz) do { \
49 (_l) &= ((_sz) - 1); \
52 /* decrement with wrap-around */
53 #define DECR(_l, _sz) do { \
55 (_l) &= ((_sz) - 1); \
58 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
60 #define ATH9K_PM_QOS_DEFAULT_VALUE 55
62 #define TSF_TO_TU(_h,_l) \
63 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
65 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
73 /*************************/
74 /* Descriptor Management */
75 /*************************/
77 #define ATH_TXBUF_RESET(_bf) do { \
78 (_bf)->bf_stale = false; \
79 (_bf)->bf_lastbf = NULL; \
80 (_bf)->bf_next = NULL; \
81 memset(&((_bf)->bf_state), 0, \
82 sizeof(struct ath_buf_state)); \
85 #define ATH_RXBUF_RESET(_bf) do { \
86 (_bf)->bf_stale = false; \
90 * enum buffer_type - Buffer type flags
92 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
93 * @BUF_AGGR: Indicates whether the buffer can be aggregated
94 * (used in aggregation scheduling)
95 * @BUF_XRETRY: To denote excessive retries of the buffer
103 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
104 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
105 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
107 #define ATH_TXSTATUS_RING_SIZE 64
111 dma_addr_t dd_desc_paddr;
113 struct ath_buf *dd_bufptr;
116 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
117 struct list_head *head, const char *name,
118 int nbuf, int ndesc, bool is_tx);
119 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
120 struct list_head *head);
126 #define ATH_MAX_ANTENNA 3
127 #define ATH_RXBUF 512
128 #define ATH_TXBUF 512
129 #define ATH_TXBUF_RESERVE 5
130 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
131 #define ATH_TXMAXTRY 13
132 #define ATH_MGT_TXMAXTRY 4
134 #define TID_TO_WME_AC(_tid) \
135 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
136 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
137 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
140 #define ATH_AGGR_DELIM_SZ 4
141 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
142 /* number of delimiters for encryption padding */
143 #define ATH_AGGR_ENCRYPTDELIM 10
144 /* minimum h/w qdepth to be sustained to maximize aggregation */
145 #define ATH_AGGR_MIN_QDEPTH 2
146 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
148 #define IEEE80211_SEQ_SEQ_SHIFT 4
149 #define IEEE80211_SEQ_MAX 4096
150 #define IEEE80211_WEP_IVLEN 3
151 #define IEEE80211_WEP_KIDLEN 1
152 #define IEEE80211_WEP_CRCLEN 4
153 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
154 (IEEE80211_WEP_IVLEN + \
155 IEEE80211_WEP_KIDLEN + \
156 IEEE80211_WEP_CRCLEN))
158 /* return whether a bit at index _n in bitmap _bm is set
159 * _sz is the size of the bitmap */
160 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
161 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
163 /* return block-ack bitmap index given sequence and starting sequence */
164 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
166 /* returns delimiter padding required given the packet length */
167 #define ATH_AGGR_GET_NDELIM(_len) \
168 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
169 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
171 #define BAW_WITHIN(_start, _bawsz, _seqno) \
172 ((((_seqno) - (_start)) & 4095) < (_bawsz))
174 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
176 #define ATH_TX_COMPLETE_POLL_INT 1000
178 enum ATH_AGGR_STATUS {
184 #define ATH_TXFIFO_DEPTH 8
186 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
187 u32 axq_qnum; /* ath9k hardware queue number */
189 struct list_head axq_q;
194 bool axq_tx_inprogress;
195 struct list_head axq_acq;
196 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
197 struct list_head txq_fifo_pending;
206 struct list_head list;
207 struct list_head tid_q;
210 struct ath_frame_info {
213 enum ath9k_key_type keytype;
218 struct ath_buf_state {
221 unsigned long bfs_paprd_timestamp;
222 enum ath9k_internal_frame_type bfs_ftype;
226 struct list_head list;
227 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
229 struct ath_buf *bf_next; /* next subframe in the aggregate */
230 struct sk_buff *bf_mpdu; /* enclosing frame structure */
231 void *bf_desc; /* virtual addr of desc */
232 dma_addr_t bf_daddr; /* physical addr of desc */
233 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
236 struct ath_buf_state bf_state;
240 struct list_head list;
241 struct list_head buf_q;
243 struct ath_atx_ac *ac;
244 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
249 int baw_head; /* first un-acked tx buffer */
250 int baw_tail; /* next unused tx buffer slot */
257 #ifdef CONFIG_ATH9K_DEBUGFS
258 struct list_head list; /* for sc->nodes */
259 struct ieee80211_sta *sta; /* station struct we're part of */
261 struct ath_atx_tid tid[WME_NUM_TID];
262 struct ath_atx_ac ac[WME_NUM_AC];
267 #define AGGR_CLEANUP BIT(1)
268 #define AGGR_ADDBA_COMPLETE BIT(2)
269 #define AGGR_ADDBA_PROGRESS BIT(3)
271 struct ath_tx_control {
275 enum ath9k_internal_frame_type frame_type;
279 #define ATH_TX_ERROR 0x01
280 #define ATH_TX_XRETRY 0x02
281 #define ATH_TX_BAR 0x04
284 * @txq_map: Index is mac80211 queue number. This is
285 * not necessarily the same as the hardware queue number
291 spinlock_t txbuflock;
292 struct list_head txbuf;
293 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
294 struct ath_descdma txdma;
295 struct ath_txq *txq_map[WME_NUM_AC];
299 struct sk_buff_head rx_fifo;
300 struct sk_buff_head rx_buffers;
308 unsigned int rxfilter;
309 spinlock_t rxbuflock;
310 struct list_head rxbuf;
311 struct ath_descdma rxdma;
312 struct ath_buf *rx_bufptr;
313 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
315 struct sk_buff *frag;
318 int ath_startrecv(struct ath_softc *sc);
319 bool ath_stoprecv(struct ath_softc *sc);
320 void ath_flushrecv(struct ath_softc *sc);
321 u32 ath_calcrxfilter(struct ath_softc *sc);
322 int ath_rx_init(struct ath_softc *sc, int nbufs);
323 void ath_rx_cleanup(struct ath_softc *sc);
324 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
325 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
326 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
327 bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
328 void ath_draintxq(struct ath_softc *sc,
329 struct ath_txq *txq, bool retry_tx);
330 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
331 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
332 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
333 int ath_tx_init(struct ath_softc *sc, int nbufs);
334 void ath_tx_cleanup(struct ath_softc *sc);
335 int ath_txq_update(struct ath_softc *sc, int qnum,
336 struct ath9k_tx_queue_info *q);
337 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
338 struct ath_tx_control *txctl);
339 void ath_tx_tasklet(struct ath_softc *sc);
340 void ath_tx_edma_tasklet(struct ath_softc *sc);
341 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
343 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
344 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
352 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
353 enum nl80211_iftype av_opmode;
354 struct ath_buf *av_bcbuf;
355 u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */
358 /*******************/
359 /* Beacon Handling */
360 /*******************/
363 * Regardless of the number of beacons we stagger, (i.e. regardless of the
364 * number of BSSIDs) if a given beacon does not go out even after waiting this
365 * number of beacon intervals, the game's up.
367 #define BSTUCK_THRESH (9 * ATH_BCBUF)
369 #define ATH_DEFAULT_BINTVAL 100 /* TU */
370 #define ATH_DEFAULT_BMISS_LIMIT 10
371 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
373 struct ath_beacon_config {
383 OK, /* no change needed */
384 UPDATE, /* update pending */
385 COMMIT /* beacon sent, commit change */
386 } updateslot; /* slot time update fsm */
392 struct ieee80211_vif *bslot[ATH_BCBUF];
395 struct ath9k_tx_queue_info beacon_qi;
396 struct ath_descdma bdma;
397 struct ath_txq *cabq;
398 struct list_head bbuf;
401 void ath_beacon_tasklet(unsigned long data);
402 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
403 int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif);
404 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
405 int ath_beaconq_config(struct ath_softc *sc);
411 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
412 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
413 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
414 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
415 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
416 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
417 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
419 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
421 void ath_hw_check(struct work_struct *work);
422 void ath_paprd_calibrate(struct work_struct *work);
423 void ath_ani_calibrate(unsigned long data);
430 bool hw_timer_enabled;
431 spinlock_t btcoex_lock;
432 struct timer_list period_timer; /* Timer for BT period */
434 unsigned long bt_priority_time;
435 int bt_stomp_type; /* Types of BT stomping */
436 u32 btcoex_no_stomp; /* in usec */
437 u32 btcoex_period; /* in usec */
438 u32 btscan_no_stomp; /* in usec */
439 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
442 int ath_init_btcoex_timer(struct ath_softc *sc);
443 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
444 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
446 /********************/
448 /********************/
450 #define ATH_LED_PIN_DEF 1
451 #define ATH_LED_PIN_9287 8
452 #define ATH_LED_ON_DURATION_IDLE 350 /* in msecs */
453 #define ATH_LED_OFF_DURATION_IDLE 250 /* in msecs */
463 struct ath_softc *sc;
464 struct led_classdev led_cdev;
465 enum ath_led_type led_type;
470 void ath_init_leds(struct ath_softc *sc);
471 void ath_deinit_leds(struct ath_softc *sc);
473 /* Antenna diversity/combining */
474 #define ATH_ANT_RX_CURRENT_SHIFT 4
475 #define ATH_ANT_RX_MAIN_SHIFT 2
476 #define ATH_ANT_RX_MASK 0x3
478 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
479 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
480 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
481 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
482 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
483 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
484 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
486 #define ATH_ANT_DIV_COMB_LNA1_LNA2_DELTA -3
487 #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1
488 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
489 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
490 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
492 enum ath9k_ant_div_comb_lna_conf {
493 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
494 ATH_ANT_DIV_COMB_LNA2,
495 ATH_ANT_DIV_COMB_LNA1,
496 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2,
499 struct ath_ant_comb {
518 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
519 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
524 unsigned long scan_start_time;
527 /********************/
528 /* Main driver core */
529 /********************/
532 * Default cache line size, in bytes.
533 * Used when PCI device not fully initialized by bootrom/BIOS
535 #define DEFAULT_CACHELINE 32
536 #define ATH_REGCLASSIDS_MAX 10
537 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
538 #define ATH_MAX_SW_RETRIES 10
539 #define ATH_CHAN_MAX 255
541 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
542 #define ATH_RATE_DUMMY_MARKER 0
544 #define SC_OP_INVALID BIT(0)
545 #define SC_OP_BEACONS BIT(1)
546 #define SC_OP_RXAGGR BIT(2)
547 #define SC_OP_TXAGGR BIT(3)
548 #define SC_OP_OFFCHANNEL BIT(4)
549 #define SC_OP_PREAMBLE_SHORT BIT(5)
550 #define SC_OP_PROTECT_ENABLE BIT(6)
551 #define SC_OP_RXFLUSH BIT(7)
552 #define SC_OP_LED_ASSOCIATED BIT(8)
553 #define SC_OP_LED_ON BIT(9)
554 #define SC_OP_TSF_RESET BIT(11)
555 #define SC_OP_BT_PRIORITY_DETECTED BIT(12)
556 #define SC_OP_BT_SCAN BIT(13)
557 #define SC_OP_ANI_RUN BIT(14)
558 #define SC_OP_ENABLE_APM BIT(15)
560 /* Powersave flags */
561 #define PS_WAIT_FOR_BEACON BIT(0)
562 #define PS_WAIT_FOR_CAB BIT(1)
563 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
564 #define PS_WAIT_FOR_TX_ACK BIT(3)
565 #define PS_BEACON_SYNC BIT(4)
567 struct ath_rate_table;
569 struct ath9k_vif_iter_data {
570 const u8 *hw_macaddr; /* phy's hardware address, set
571 * before starting iteration for
574 u8 mask[ETH_ALEN]; /* bssid mask */
575 int naps; /* number of AP vifs */
576 int nmeshes; /* number of mesh vifs */
577 int nstations; /* number of station vifs */
578 int nwds; /* number of nwd vifs */
579 int nadhocs; /* number of adhoc vifs */
580 int nothers; /* number of vifs not specified above. */
584 struct ieee80211_hw *hw;
589 struct survey_info *cur_survey;
590 struct survey_info survey[ATH9K_NUM_CHANNELS];
592 struct tasklet_struct intr_tq;
593 struct tasklet_struct bcon_tasklet;
594 struct ath_hw *sc_ah;
597 spinlock_t sc_serial_rw;
598 spinlock_t sc_pm_lock;
599 spinlock_t sc_pcu_lock;
601 struct work_struct paprd_work;
602 struct work_struct hw_check_work;
603 struct completion paprd_complete;
605 unsigned int hw_busy_count;
608 u32 sc_flags; /* SC_OP_* */
609 u16 ps_flags; /* PS_* */
615 unsigned long ps_usecount;
617 struct ath_config config;
620 struct ath_beacon beacon;
621 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
623 struct ath_led radio_led;
624 struct ath_led assoc_led;
625 struct ath_led tx_led;
626 struct ath_led rx_led;
627 struct delayed_work ath_led_blink_work;
629 int led_off_duration;
633 struct ath9k_hw_cal_data caldata;
638 #ifdef CONFIG_ATH9K_DEBUGFS
639 struct ath9k_debug debug;
640 spinlock_t nodes_lock;
641 struct list_head nodes; /* basically, stations */
642 unsigned int tx_complete_poll_work_seen;
644 struct ath_beacon_config cur_beacon_conf;
645 struct delayed_work tx_complete_work;
646 struct delayed_work hw_pll_work;
647 struct ath_btcoex btcoex;
649 struct ath_descdma txsdma;
651 struct ath_ant_comb ant_comb;
653 struct pm_qos_request_list pm_qos_req;
656 void ath9k_tasklet(unsigned long data);
657 int ath_reset(struct ath_softc *sc, bool retry_tx);
658 int ath_cabq_update(struct ath_softc *);
660 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
662 common->bus_ops->read_cachesize(common, csz);
665 extern struct ieee80211_ops ath9k_ops;
666 extern int ath9k_modparam_nohwcrypt;
667 extern int led_blink;
668 extern int ath9k_pm_qos_value;
669 extern bool is_ath9k_unloaded;
671 irqreturn_t ath_isr(int irq, void *dev);
672 void ath9k_init_crypto(struct ath_softc *sc);
673 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
674 const struct ath_bus_ops *bus_ops);
675 void ath9k_deinit_device(struct ath_softc *sc);
676 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
677 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
678 struct ath9k_channel *hchan);
680 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
681 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
682 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
683 bool ath9k_uses_beacons(int type);
686 int ath_pci_init(void);
687 void ath_pci_exit(void);
689 static inline int ath_pci_init(void) { return 0; };
690 static inline void ath_pci_exit(void) {};
693 #ifdef CONFIG_ATHEROS_AR71XX
694 int ath_ahb_init(void);
695 void ath_ahb_exit(void);
697 static inline int ath_ahb_init(void) { return 0; };
698 static inline void ath_ahb_exit(void) {};
701 void ath9k_ps_wakeup(struct ath_softc *sc);
702 void ath9k_ps_restore(struct ath_softc *sc);
704 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
706 void ath9k_set_bssid_mask(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
708 void ath_start_rfkill_poll(struct ath_softc *sc);
709 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
710 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
711 struct ieee80211_vif *vif,
712 struct ath9k_vif_iter_data *iter_data);