drivers/mmc/host/sdhci.c

   1 /*
   2  *  linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or (at
   9  * your option) any later version.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/highmem.h>
  14 #include <linux/pci.h>
  15 #include <linux/dma-mapping.h>
  16
  17 #include <linux/mmc/host.h>
  18
  19 #include <asm/scatterlist.h>
  20
  21 #include "sdhci.h"
  22
  23 #define DRIVER_NAME "sdhci"
  24
  25 #define DBG(f, x...) \
  26         pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
  27
  28 static unsigned int debug_nodma = 0;
  29 static unsigned int debug_forcedma = 0;
  30 static unsigned int debug_quirks = 0;
  31
  32 #define SDHCI_QUIRK_CLOCK_BEFORE_RESET                  (1<<0)
  33 #define SDHCI_QUIRK_FORCE_DMA                           (1<<1)
  34 /* Controller doesn't like some resets when there is no card inserted. */
  35 #define SDHCI_QUIRK_NO_CARD_NO_RESET                    (1<<2)
  36 #define SDHCI_QUIRK_SINGLE_POWER_WRITE                  (1<<3)
  37 #define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS               (1<<4)
  38
  39 static const struct pci_device_id pci_ids[] __devinitdata = {
  40         {
  41                 .vendor         = PCI_VENDOR_ID_RICOH,
  42                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
  43                 .subvendor      = PCI_VENDOR_ID_IBM,
  44                 .subdevice      = PCI_ANY_ID,
  45                 .driver_data    = SDHCI_QUIRK_CLOCK_BEFORE_RESET |
  46                                   SDHCI_QUIRK_FORCE_DMA,
  47         },
  48
  49         {
  50                 .vendor         = PCI_VENDOR_ID_RICOH,
  51                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
  52                 .subvendor      = PCI_ANY_ID,
  53                 .subdevice      = PCI_ANY_ID,
  54                 .driver_data    = SDHCI_QUIRK_FORCE_DMA |
  55                                   SDHCI_QUIRK_NO_CARD_NO_RESET,
  56         },
  57
  58         {
  59                 .vendor         = PCI_VENDOR_ID_TI,
  60                 .device         = PCI_DEVICE_ID_TI_XX21_XX11_SD,
  61                 .subvendor      = PCI_ANY_ID,
  62                 .subdevice      = PCI_ANY_ID,
  63                 .driver_data    = SDHCI_QUIRK_FORCE_DMA,
  64         },
  65
  66         {
  67                 .vendor         = PCI_VENDOR_ID_ENE,
  68                 .device         = PCI_DEVICE_ID_ENE_CB712_SD,
  69                 .subvendor      = PCI_ANY_ID,
  70                 .subdevice      = PCI_ANY_ID,
  71                 .driver_data    = SDHCI_QUIRK_SINGLE_POWER_WRITE,
  72         },
  73
  74         {
  75                 .vendor         = PCI_VENDOR_ID_ENE,
  76                 .device         = PCI_DEVICE_ID_ENE_CB712_SD_2,
  77                 .subvendor      = PCI_ANY_ID,
  78                 .subdevice      = PCI_ANY_ID,
  79                 .driver_data    = SDHCI_QUIRK_SINGLE_POWER_WRITE,
  80         },
  81
  82         {
  83                 .vendor         = PCI_VENDOR_ID_ENE,
  84                 .device         = PCI_DEVICE_ID_ENE_CB714_SD,
  85                 .subvendor      = PCI_ANY_ID,
  86                 .subdevice      = PCI_ANY_ID,
  87                 .driver_data    = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  88                                   SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS,
  89         },
  90
  91         {
  92                 .vendor         = PCI_VENDOR_ID_ENE,
  93                 .device         = PCI_DEVICE_ID_ENE_CB714_SD_2,
  94                 .subvendor      = PCI_ANY_ID,
  95                 .subdevice      = PCI_ANY_ID,
  96                 .driver_data    = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  97                                   SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS,
  98         },
  99
 100         {       /* Generic SD host controller */
 101                 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
 102         },
 103
 104         { /* end: all zeroes */ },
 105 };
 106
 107 MODULE_DEVICE_TABLE(pci, pci_ids);
 108
 109 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
 110 static void sdhci_finish_data(struct sdhci_host *);
 111
 112 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
 113 static void sdhci_finish_command(struct sdhci_host *);
 114
 115 static void sdhci_dumpregs(struct sdhci_host *host)
 116 {
 117         printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
 118
 119         printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
 120                 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
 121                 readw(host->ioaddr + SDHCI_HOST_VERSION));
 122         printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
 123                 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
 124                 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
 125         printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
 126                 readl(host->ioaddr + SDHCI_ARGUMENT),
 127                 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
 128         printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
 129                 readl(host->ioaddr + SDHCI_PRESENT_STATE),
 130                 readb(host->ioaddr + SDHCI_HOST_CONTROL));
 131         printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
 132                 readb(host->ioaddr + SDHCI_POWER_CONTROL),
 133                 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
 134         printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
 135                 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
 136                 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
 137         printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
 138                 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
 139                 readl(host->ioaddr + SDHCI_INT_STATUS));
 140         printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
 141                 readl(host->ioaddr + SDHCI_INT_ENABLE),
 142                 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
 143         printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
 144                 readw(host->ioaddr + SDHCI_ACMD12_ERR),
 145                 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
 146         printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
 147                 readl(host->ioaddr + SDHCI_CAPABILITIES),
 148                 readl(host->ioaddr + SDHCI_MAX_CURRENT));
 149
 150         printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
 151 }
 152
 153 /*****************************************************************************\
 154  *                                                                           *
 155  * Low level functions                                                       *
 156  *                                                                           *
 157 \*****************************************************************************/
 158
 159 static void sdhci_reset(struct sdhci_host *host, u8 mask)
 160 {
 161         unsigned long timeout;
 162
 163         if (host->chip->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
 164                 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
 165                         SDHCI_CARD_PRESENT))
 166                         return;
 167         }
 168
 169         writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
 170
 171         if (mask & SDHCI_RESET_ALL)
 172                 host->clock = 0;
 173
 174         /* Wait max 100 ms */
 175         timeout = 100;
 176
 177         /* hw clears the bit when it's done */
 178         while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
 179                 if (timeout == 0) {
 180                         printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
 181                                 mmc_hostname(host->mmc), (int)mask);
 182                         sdhci_dumpregs(host);
 183                         return;
 184                 }
 185                 timeout--;
 186                 mdelay(1);
 187         }
 188 }
 189
 190 static void sdhci_init(struct sdhci_host *host)
 191 {
 192         u32 intmask;
 193
 194         sdhci_reset(host, SDHCI_RESET_ALL);
 195
 196         intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
 197                 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
 198                 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
 199                 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
 200                 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
 201                 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
 202
 203         writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
 204         writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 205 }
 206
 207 static void sdhci_activate_led(struct sdhci_host *host)
 208 {
 209         u8 ctrl;
 210
 211         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 212         ctrl |= SDHCI_CTRL_LED;
 213         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 214 }
 215
 216 static void sdhci_deactivate_led(struct sdhci_host *host)
 217 {
 218         u8 ctrl;
 219
 220         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 221         ctrl &= ~SDHCI_CTRL_LED;
 222         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 223 }
 224
 225 /*****************************************************************************\
 226  *                                                                           *
 227  * Core functions                                                            *
 228  *                                                                           *
 229 \*****************************************************************************/
 230
 231 static inline char* sdhci_sg_to_buffer(struct sdhci_host* host)
 232 {
 233         return page_address(host->cur_sg->page) + host->cur_sg->offset;
 234 }
 235
 236 static inline int sdhci_next_sg(struct sdhci_host* host)
 237 {
 238         /*
 239          * Skip to next SG entry.
 240          */
 241         host->cur_sg++;
 242         host->num_sg--;
 243
 244         /*
 245          * Any entries left?
 246          */
 247         if (host->num_sg > 0) {
 248                 host->offset = 0;
 249                 host->remain = host->cur_sg->length;
 250         }
 251
 252         return host->num_sg;
 253 }
 254
 255 static void sdhci_read_block_pio(struct sdhci_host *host)
 256 {
 257         int blksize, chunk_remain;
 258         u32 data;
 259         char *buffer;
 260         int size;
 261
 262         DBG("PIO reading\n");
 263
 264         blksize = host->data->blksz;
 265         chunk_remain = 0;
 266         data = 0;
 267
 268         buffer = sdhci_sg_to_buffer(host) + host->offset;
 269
 270         while (blksize) {
 271                 if (chunk_remain == 0) {
 272                         data = readl(host->ioaddr + SDHCI_BUFFER);
 273                         chunk_remain = min(blksize, 4);
 274                 }
 275
 276                 size = min(host->remain, chunk_remain);
 277
 278                 chunk_remain -= size;
 279                 blksize -= size;
 280                 host->offset += size;
 281                 host->remain -= size;
 282
 283                 while (size) {
 284                         *buffer = data & 0xFF;
 285                         buffer++;
 286                         data >>= 8;
 287                         size--;
 288                 }
 289
 290                 if (host->remain == 0) {
 291                         if (sdhci_next_sg(host) == 0) {
 292                                 BUG_ON(blksize != 0);
 293                                 return;
 294                         }
 295                         buffer = sdhci_sg_to_buffer(host);
 296                 }
 297         }
 298 }
 299
 300 static void sdhci_write_block_pio(struct sdhci_host *host)
 301 {
 302         int blksize, chunk_remain;
 303         u32 data;
 304         char *buffer;
 305         int bytes, size;
 306
 307         DBG("PIO writing\n");
 308
 309         blksize = host->data->blksz;
 310         chunk_remain = 4;
 311         data = 0;
 312
 313         bytes = 0;
 314         buffer = sdhci_sg_to_buffer(host) + host->offset;
 315
 316         while (blksize) {
 317                 size = min(host->remain, chunk_remain);
 318
 319                 chunk_remain -= size;
 320                 blksize -= size;
 321                 host->offset += size;
 322                 host->remain -= size;
 323
 324                 while (size) {
 325                         data >>= 8;
 326                         data |= (u32)*buffer << 24;
 327                         buffer++;
 328                         size--;
 329                 }
 330
 331                 if (chunk_remain == 0) {
 332                         writel(data, host->ioaddr + SDHCI_BUFFER);
 333                         chunk_remain = min(blksize, 4);
 334                 }
 335
 336                 if (host->remain == 0) {
 337                         if (sdhci_next_sg(host) == 0) {
 338                                 BUG_ON(blksize != 0);
 339                                 return;
 340                         }
 341                         buffer = sdhci_sg_to_buffer(host);
 342                 }
 343         }
 344 }
 345
 346 static void sdhci_transfer_pio(struct sdhci_host *host)
 347 {
 348         u32 mask;
 349
 350         BUG_ON(!host->data);
 351
 352         if (host->num_sg == 0)
 353                 return;
 354
 355         if (host->data->flags & MMC_DATA_READ)
 356                 mask = SDHCI_DATA_AVAILABLE;
 357         else
 358                 mask = SDHCI_SPACE_AVAILABLE;
 359
 360         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
 361                 if (host->data->flags & MMC_DATA_READ)
 362                         sdhci_read_block_pio(host);
 363                 else
 364                         sdhci_write_block_pio(host);
 365
 366                 if (host->num_sg == 0)
 367                         break;
 368         }
 369
 370         DBG("PIO transfer complete.\n");
 371 }
 372
 373 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
 374 {
 375         u8 count;
 376         unsigned target_timeout, current_timeout;
 377
 378         WARN_ON(host->data);
 379
 380         if (data == NULL)
 381                 return;
 382
 383         /* Sanity checks */
 384         BUG_ON(data->blksz * data->blocks > 524288);
 385         BUG_ON(data->blksz > host->mmc->max_blk_size);
 386         BUG_ON(data->blocks > 65535);
 387
 388         host->data = data;
 389         host->data_early = 0;
 390
 391         /* timeout in us */
 392         target_timeout = data->timeout_ns / 1000 +
 393                 data->timeout_clks / host->clock;
 394
 395         /*
 396          * Figure out needed cycles.
 397          * We do this in steps in order to fit inside a 32 bit int.
 398          * The first step is the minimum timeout, which will have a
 399          * minimum resolution of 6 bits:
 400          * (1) 2^13*1000 > 2^22,
 401          * (2) host->timeout_clk < 2^16
 402          *     =>
 403          *     (1) / (2) > 2^6
 404          */
 405         count = 0;
 406         current_timeout = (1 << 13) * 1000 / host->timeout_clk;
 407         while (current_timeout < target_timeout) {
 408                 count++;
 409                 current_timeout <<= 1;
 410                 if (count >= 0xF)
 411                         break;
 412         }
 413
 414         if (count >= 0xF) {
 415                 printk(KERN_WARNING "%s: Too large timeout requested!\n",
 416                         mmc_hostname(host->mmc));
 417                 count = 0xE;
 418         }
 419
 420         writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
 421
 422         if (host->flags & SDHCI_USE_DMA) {
 423                 int count;
 424
 425                 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
 426                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 427                 BUG_ON(count != 1);
 428
 429                 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
 430         } else {
 431                 host->cur_sg = data->sg;
 432                 host->num_sg = data->sg_len;
 433
 434                 host->offset = 0;
 435                 host->remain = host->cur_sg->length;
 436         }
 437
 438         /* We do not handle DMA boundaries, so set it to max (512 KiB) */
 439         writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
 440                 host->ioaddr + SDHCI_BLOCK_SIZE);
 441         writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
 442 }
 443
 444 static void sdhci_set_transfer_mode(struct sdhci_host *host,
 445         struct mmc_data *data)
 446 {
 447         u16 mode;
 448
 449         if (data == NULL)
 450                 return;
 451
 452         WARN_ON(!host->data);
 453
 454         mode = SDHCI_TRNS_BLK_CNT_EN;
 455         if (data->blocks > 1)
 456                 mode |= SDHCI_TRNS_MULTI;
 457         if (data->flags & MMC_DATA_READ)
 458                 mode |= SDHCI_TRNS_READ;
 459         if (host->flags & SDHCI_USE_DMA)
 460                 mode |= SDHCI_TRNS_DMA;
 461
 462         writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
 463 }
 464
 465 static void sdhci_finish_data(struct sdhci_host *host)
 466 {
 467         struct mmc_data *data;
 468         u16 blocks;
 469
 470         BUG_ON(!host->data);
 471
 472         data = host->data;
 473         host->data = NULL;
 474
 475         if (host->flags & SDHCI_USE_DMA) {
 476                 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
 477                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 478         }
 479
 480         /*
 481          * Controller doesn't count down when in single block mode.
 482          */
 483         if (data->blocks == 1)
 484                 blocks = (data->error == 0) ? 0 : 1;
 485         else
 486                 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
 487         data->bytes_xfered = data->blksz * (data->blocks - blocks);
 488
 489         if (!data->error && blocks) {
 490                 printk(KERN_ERR "%s: Controller signalled completion even "
 491                         "though there were blocks left.\n",
 492                         mmc_hostname(host->mmc));
 493                 data->error = -EIO;
 494         }
 495
 496         if (data->stop) {
 497                 /*
 498                  * The controller needs a reset of internal state machines
 499                  * upon error conditions.
 500                  */
 501                 if (data->error) {
 502                         sdhci_reset(host, SDHCI_RESET_CMD);
 503                         sdhci_reset(host, SDHCI_RESET_DATA);
 504                 }
 505
 506                 sdhci_send_command(host, data->stop);
 507         } else
 508                 tasklet_schedule(&host->finish_tasklet);
 509 }
 510
 511 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
 512 {
 513         int flags;
 514         u32 mask;
 515         unsigned long timeout;
 516
 517         WARN_ON(host->cmd);
 518
 519         /* Wait max 10 ms */
 520         timeout = 10;
 521
 522         mask = SDHCI_CMD_INHIBIT;
 523         if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
 524                 mask |= SDHCI_DATA_INHIBIT;
 525
 526         /* We shouldn't wait for data inihibit for stop commands, even
 527            though they might use busy signaling */
 528         if (host->mrq->data && (cmd == host->mrq->data->stop))
 529                 mask &= ~SDHCI_DATA_INHIBIT;
 530
 531         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
 532                 if (timeout == 0) {
 533                         printk(KERN_ERR "%s: Controller never released "
 534                                 "inhibit bit(s).\n", mmc_hostname(host->mmc));
 535                         sdhci_dumpregs(host);
 536                         cmd->error = -EIO;
 537                         tasklet_schedule(&host->finish_tasklet);
 538                         return;
 539                 }
 540                 timeout--;
 541                 mdelay(1);
 542         }
 543
 544         mod_timer(&host->timer, jiffies + 10 * HZ);
 545
 546         host->cmd = cmd;
 547
 548         sdhci_prepare_data(host, cmd->data);
 549
 550         writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
 551
 552         sdhci_set_transfer_mode(host, cmd->data);
 553
 554         if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 555                 printk(KERN_ERR "%s: Unsupported response type!\n",
 556                         mmc_hostname(host->mmc));
 557                 cmd->error = -EINVAL;
 558                 tasklet_schedule(&host->finish_tasklet);
 559                 return;
 560         }
 561
 562         if (!(cmd->flags & MMC_RSP_PRESENT))
 563                 flags = SDHCI_CMD_RESP_NONE;
 564         else if (cmd->flags & MMC_RSP_136)
 565                 flags = SDHCI_CMD_RESP_LONG;
 566         else if (cmd->flags & MMC_RSP_BUSY)
 567                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
 568         else
 569                 flags = SDHCI_CMD_RESP_SHORT;
 570
 571         if (cmd->flags & MMC_RSP_CRC)
 572                 flags |= SDHCI_CMD_CRC;
 573         if (cmd->flags & MMC_RSP_OPCODE)
 574                 flags |= SDHCI_CMD_INDEX;
 575         if (cmd->data)
 576                 flags |= SDHCI_CMD_DATA;
 577
 578         writew(SDHCI_MAKE_CMD(cmd->opcode, flags),
 579                 host->ioaddr + SDHCI_COMMAND);
 580 }
 581
 582 static void sdhci_finish_command(struct sdhci_host *host)
 583 {
 584         int i;
 585
 586         BUG_ON(host->cmd == NULL);
 587
 588         if (host->cmd->flags & MMC_RSP_PRESENT) {
 589                 if (host->cmd->flags & MMC_RSP_136) {
 590                         /* CRC is stripped so we need to do some shifting. */
 591                         for (i = 0;i < 4;i++) {
 592                                 host->cmd->resp[i] = readl(host->ioaddr +
 593                                         SDHCI_RESPONSE + (3-i)*4) << 8;
 594                                 if (i != 3)
 595                                         host->cmd->resp[i] |=
 596                                                 readb(host->ioaddr +
 597                                                 SDHCI_RESPONSE + (3-i)*4-1);
 598                         }
 599                 } else {
 600                         host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
 601                 }
 602         }
 603
 604         host->cmd->error = 0;
 605
 606         if (host->data && host->data_early)
 607                 sdhci_finish_data(host);
 608
 609         if (!host->cmd->data)
 610                 tasklet_schedule(&host->finish_tasklet);
 611
 612         host->cmd = NULL;
 613 }
 614
 615 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 616 {
 617         int div;
 618         u16 clk;
 619         unsigned long timeout;
 620
 621         if (clock == host->clock)
 622                 return;
 623
 624         writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
 625
 626         if (clock == 0)
 627                 goto out;
 628
 629         for (div = 1;div < 256;div *= 2) {
 630                 if ((host->max_clk / div) <= clock)
 631                         break;
 632         }
 633         div >>= 1;
 634
 635         clk = div << SDHCI_DIVIDER_SHIFT;
 636         clk |= SDHCI_CLOCK_INT_EN;
 637         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 638
 639         /* Wait max 10 ms */
 640         timeout = 10;
 641         while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
 642                 & SDHCI_CLOCK_INT_STABLE)) {
 643                 if (timeout == 0) {
 644                         printk(KERN_ERR "%s: Internal clock never "
 645                                 "stabilised.\n", mmc_hostname(host->mmc));
 646                         sdhci_dumpregs(host);
 647                         return;
 648                 }
 649                 timeout--;
 650                 mdelay(1);
 651         }
 652
 653         clk |= SDHCI_CLOCK_CARD_EN;
 654         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 655
 656 out:
 657         host->clock = clock;
 658 }
 659
 660 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 661 {
 662         u8 pwr;
 663
 664         if (host->power == power)
 665                 return;
 666
 667         if (power == (unsigned short)-1) {
 668                 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
 669                 goto out;
 670         }
 671
 672         /*
 673          * Spec says that we should clear the power reg before setting
 674          * a new value. Some controllers don't seem to like this though.
 675          */
 676         if (!(host->chip->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
 677                 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
 678
 679         pwr = SDHCI_POWER_ON;
 680
 681         switch (1 << power) {
 682         case MMC_VDD_165_195:
 683                 pwr |= SDHCI_POWER_180;
 684                 break;
 685         case MMC_VDD_29_30:
 686         case MMC_VDD_30_31:
 687                 pwr |= SDHCI_POWER_300;
 688                 break;
 689         case MMC_VDD_32_33:
 690         case MMC_VDD_33_34:
 691                 pwr |= SDHCI_POWER_330;
 692                 break;
 693         default:
 694                 BUG();
 695         }
 696
 697         writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
 698
 699 out:
 700         host->power = power;
 701 }
 702
 703 /*****************************************************************************\
 704  *                                                                           *
 705  * MMC callbacks                                                             *
 706  *                                                                           *
 707 \*****************************************************************************/
 708
 709 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
 710 {
 711         struct sdhci_host *host;
 712         unsigned long flags;
 713
 714         host = mmc_priv(mmc);
 715
 716         spin_lock_irqsave(&host->lock, flags);
 717
 718         WARN_ON(host->mrq != NULL);
 719
 720         sdhci_activate_led(host);
 721
 722         host->mrq = mrq;
 723
 724         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 725                 host->mrq->cmd->error = -ENOMEDIUM;
 726                 tasklet_schedule(&host->finish_tasklet);
 727         } else
 728                 sdhci_send_command(host, mrq->cmd);
 729
 730         mmiowb();
 731         spin_unlock_irqrestore(&host->lock, flags);
 732 }
 733
 734 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 735 {
 736         struct sdhci_host *host;
 737         unsigned long flags;
 738         u8 ctrl;
 739
 740         host = mmc_priv(mmc);
 741
 742         spin_lock_irqsave(&host->lock, flags);
 743
 744         /*
 745          * Reset the chip on each power off.
 746          * Should clear out any weird states.
 747          */
 748         if (ios->power_mode == MMC_POWER_OFF) {
 749                 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 750                 sdhci_init(host);
 751         }
 752
 753         sdhci_set_clock(host, ios->clock);
 754
 755         if (ios->power_mode == MMC_POWER_OFF)
 756                 sdhci_set_power(host, -1);
 757         else
 758                 sdhci_set_power(host, ios->vdd);
 759
 760         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 761
 762         if (ios->bus_width == MMC_BUS_WIDTH_4)
 763                 ctrl |= SDHCI_CTRL_4BITBUS;
 764         else
 765                 ctrl &= ~SDHCI_CTRL_4BITBUS;
 766
 767         if (ios->timing == MMC_TIMING_SD_HS)
 768                 ctrl |= SDHCI_CTRL_HISPD;
 769         else
 770                 ctrl &= ~SDHCI_CTRL_HISPD;
 771
 772         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 773
 774         /*
 775          * Some (ENE) controllers go apeshit on some ios operation,
 776          * signalling timeout and CRC errors even on CMD0. Resetting
 777          * it on each ios seems to solve the problem.
 778          */
 779         if(host->chip->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
 780                 sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
 781
 782         mmiowb();
 783         spin_unlock_irqrestore(&host->lock, flags);
 784 }
 785
 786 static int sdhci_get_ro(struct mmc_host *mmc)
 787 {
 788         struct sdhci_host *host;
 789         unsigned long flags;
 790         int present;
 791
 792         host = mmc_priv(mmc);
 793
 794         spin_lock_irqsave(&host->lock, flags);
 795
 796         present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
 797
 798         spin_unlock_irqrestore(&host->lock, flags);
 799
 800         return !(present & SDHCI_WRITE_PROTECT);
 801 }
 802
 803 static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
 804 {
 805         struct sdhci_host *host;
 806         unsigned long flags;
 807         u32 ier;
 808
 809         host = mmc_priv(mmc);
 810
 811         spin_lock_irqsave(&host->lock, flags);
 812
 813         ier = readl(host->ioaddr + SDHCI_INT_ENABLE);
 814
 815         ier &= ~SDHCI_INT_CARD_INT;
 816         if (enable)
 817                 ier |= SDHCI_INT_CARD_INT;
 818
 819         writel(ier, host->ioaddr + SDHCI_INT_ENABLE);
 820         writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 821
 822         mmiowb();
 823
 824         spin_unlock_irqrestore(&host->lock, flags);
 825 }
 826
 827 static const struct mmc_host_ops sdhci_ops = {
 828         .request        = sdhci_request,
 829         .set_ios        = sdhci_set_ios,
 830         .get_ro         = sdhci_get_ro,
 831         .enable_sdio_irq = sdhci_enable_sdio_irq,
 832 };
 833
 834 /*****************************************************************************\
 835  *                                                                           *
 836  * Tasklets                                                                  *
 837  *                                                                           *
 838 \*****************************************************************************/
 839
 840 static void sdhci_tasklet_card(unsigned long param)
 841 {
 842         struct sdhci_host *host;
 843         unsigned long flags;
 844
 845         host = (struct sdhci_host*)param;
 846
 847         spin_lock_irqsave(&host->lock, flags);
 848
 849         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 850                 if (host->mrq) {
 851                         printk(KERN_ERR "%s: Card removed during transfer!\n",
 852                                 mmc_hostname(host->mmc));
 853                         printk(KERN_ERR "%s: Resetting controller.\n",
 854                                 mmc_hostname(host->mmc));
 855
 856                         sdhci_reset(host, SDHCI_RESET_CMD);
 857                         sdhci_reset(host, SDHCI_RESET_DATA);
 858
 859                         host->mrq->cmd->error = -ENOMEDIUM;
 860                         tasklet_schedule(&host->finish_tasklet);
 861                 }
 862         }
 863
 864         spin_unlock_irqrestore(&host->lock, flags);
 865
 866         mmc_detect_change(host->mmc, msecs_to_jiffies(500));
 867 }
 868
 869 static void sdhci_tasklet_finish(unsigned long param)
 870 {
 871         struct sdhci_host *host;
 872         unsigned long flags;
 873         struct mmc_request *mrq;
 874
 875         host = (struct sdhci_host*)param;
 876
 877         spin_lock_irqsave(&host->lock, flags);
 878
 879         del_timer(&host->timer);
 880
 881         mrq = host->mrq;
 882
 883         /*
 884          * The controller needs a reset of internal state machines
 885          * upon error conditions.
 886          */
 887         if (mrq->cmd->error ||
 888                 (mrq->data && (mrq->data->error ||
 889                 (mrq->data->stop && mrq->data->stop->error)))) {
 890
 891                 /* Some controllers need this kick or reset won't work here */
 892                 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
 893                         unsigned int clock;
 894
 895                         /* This is to force an update */
 896                         clock = host->clock;
 897                         host->clock = 0;
 898                         sdhci_set_clock(host, clock);
 899                 }
 900
 901                 /* Spec says we should do both at the same time, but Ricoh
 902                    controllers do not like that. */
 903                 sdhci_reset(host, SDHCI_RESET_CMD);
 904                 sdhci_reset(host, SDHCI_RESET_DATA);
 905         }
 906
 907         host->mrq = NULL;
 908         host->cmd = NULL;
 909         host->data = NULL;
 910
 911         sdhci_deactivate_led(host);
 912
 913         mmiowb();
 914         spin_unlock_irqrestore(&host->lock, flags);
 915
 916         mmc_request_done(host->mmc, mrq);
 917 }
 918
 919 static void sdhci_timeout_timer(unsigned long data)
 920 {
 921         struct sdhci_host *host;
 922         unsigned long flags;
 923
 924         host = (struct sdhci_host*)data;
 925
 926         spin_lock_irqsave(&host->lock, flags);
 927
 928         if (host->mrq) {
 929                 printk(KERN_ERR "%s: Timeout waiting for hardware "
 930                         "interrupt.\n", mmc_hostname(host->mmc));
 931                 sdhci_dumpregs(host);
 932
 933                 if (host->data) {
 934                         host->data->error = -ETIMEDOUT;
 935                         sdhci_finish_data(host);
 936                 } else {
 937                         if (host->cmd)
 938                                 host->cmd->error = -ETIMEDOUT;
 939                         else
 940                                 host->mrq->cmd->error = -ETIMEDOUT;
 941
 942                         tasklet_schedule(&host->finish_tasklet);
 943                 }
 944         }
 945
 946         mmiowb();
 947         spin_unlock_irqrestore(&host->lock, flags);
 948 }
 949
 950 /*****************************************************************************\
 951  *                                                                           *
 952  * Interrupt handling                                                        *
 953  *                                                                           *
 954 \*****************************************************************************/
 955
 956 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
 957 {
 958         BUG_ON(intmask == 0);
 959
 960         if (!host->cmd) {
 961                 printk(KERN_ERR "%s: Got command interrupt 0x%08x even "
 962                         "though no command operation was in progress.\n",
 963                         mmc_hostname(host->mmc), (unsigned)intmask);
 964                 sdhci_dumpregs(host);
 965                 return;
 966         }
 967
 968         if (intmask & SDHCI_INT_TIMEOUT)
 969                 host->cmd->error = -ETIMEDOUT;
 970         else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
 971                         SDHCI_INT_INDEX))
 972                 host->cmd->error = -EILSEQ;
 973
 974         if (host->cmd->error)
 975                 tasklet_schedule(&host->finish_tasklet);
 976         else if (intmask & SDHCI_INT_RESPONSE)
 977                 sdhci_finish_command(host);
 978 }
 979
 980 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
 981 {
 982         BUG_ON(intmask == 0);
 983
 984         if (!host->data) {
 985                 /*
 986                  * A data end interrupt is sent together with the response
 987                  * for the stop command.
 988                  */
 989                 if (intmask & SDHCI_INT_DATA_END)
 990                         return;
 991
 992                 printk(KERN_ERR "%s: Got data interrupt 0x%08x even "
 993                         "though no data operation was in progress.\n",
 994                         mmc_hostname(host->mmc), (unsigned)intmask);
 995                 sdhci_dumpregs(host);
 996
 997                 return;
 998         }
 999
1000         if (intmask & SDHCI_INT_DATA_TIMEOUT)
1001                 host->data->error = -ETIMEDOUT;
1002         else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
1003                 host->data->error = -EILSEQ;
1004
1005         if (host->data->error)
1006                 sdhci_finish_data(host);
1007         else {
1008                 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1009                         sdhci_transfer_pio(host);
1010
1011                 /*
1012                  * We currently don't do anything fancy with DMA
1013                  * boundaries, but as we can't disable the feature
1014                  * we need to at least restart the transfer.
1015                  */
1016                 if (intmask & SDHCI_INT_DMA_END)
1017                         writel(readl(host->ioaddr + SDHCI_DMA_ADDRESS),
1018                                 host->ioaddr + SDHCI_DMA_ADDRESS);
1019
1020                 if (intmask & SDHCI_INT_DATA_END) {
1021                         if (host->cmd) {
1022                                 /*
1023                                  * Data managed to finish before the
1024                                  * command completed. Make sure we do
1025                                  * things in the proper order.
1026                                  */
1027                                 host->data_early = 1;
1028                         } else {
1029                                 sdhci_finish_data(host);
1030                         }
1031                 }
1032         }
1033 }
1034
1035 static irqreturn_t sdhci_irq(int irq, void *dev_id)
1036 {
1037         irqreturn_t result;
1038         struct sdhci_host* host = dev_id;
1039         u32 intmask;
1040         int cardint = 0;
1041
1042         spin_lock(&host->lock);
1043
1044         intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
1045
1046         if (!intmask || intmask == 0xffffffff) {
1047                 result = IRQ_NONE;
1048                 goto out;
1049         }
1050
1051         DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
1052
1053         if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1054                 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
1055                         host->ioaddr + SDHCI_INT_STATUS);
1056                 tasklet_schedule(&host->card_tasklet);
1057         }
1058
1059         intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1060
1061         if (intmask & SDHCI_INT_CMD_MASK) {
1062                 writel(intmask & SDHCI_INT_CMD_MASK,
1063                         host->ioaddr + SDHCI_INT_STATUS);
1064                 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1065         }
1066
1067         if (intmask & SDHCI_INT_DATA_MASK) {
1068                 writel(intmask & SDHCI_INT_DATA_MASK,
1069                         host->ioaddr + SDHCI_INT_STATUS);
1070                 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1071         }
1072
1073         intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1074
1075         intmask &= ~SDHCI_INT_ERROR;
1076
1077         if (intmask & SDHCI_INT_BUS_POWER) {
1078                 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1079                         mmc_hostname(host->mmc));
1080                 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
1081         }
1082
1083         intmask &= ~SDHCI_INT_BUS_POWER;
1084
1085         if (intmask & SDHCI_INT_CARD_INT)
1086                 cardint = 1;
1087
1088         intmask &= ~SDHCI_INT_CARD_INT;
1089
1090         if (intmask) {
1091                 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1092                         mmc_hostname(host->mmc), intmask);
1093                 sdhci_dumpregs(host);
1094
1095                 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
1096         }
1097
1098         result = IRQ_HANDLED;
1099
1100         mmiowb();
1101 out:
1102         spin_unlock(&host->lock);
1103
1104         /*
1105          * We have to delay this as it calls back into the driver.
1106          */
1107         if (cardint)
1108                 mmc_signal_sdio_irq(host->mmc);
1109
1110         return result;
1111 }
1112
1113 /*****************************************************************************\
1114  *                                                                           *
1115  * Suspend/resume                                                            *
1116  *                                                                           *
1117 \*****************************************************************************/
1118
1119 #ifdef CONFIG_PM
1120
1121 static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1122 {
1123         struct sdhci_chip *chip;
1124         int i, ret;
1125
1126         chip = pci_get_drvdata(pdev);
1127         if (!chip)
1128                 return 0;
1129
1130         DBG("Suspending...\n");
1131
1132         for (i = 0;i < chip->num_slots;i++) {
1133                 if (!chip->hosts[i])
1134                         continue;
1135                 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1136                 if (ret) {
1137                         for (i--;i >= 0;i--)
1138                                 mmc_resume_host(chip->hosts[i]->mmc);
1139                         return ret;
1140                 }
1141         }
1142
1143         pci_save_state(pdev);
1144         pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1145
1146         for (i = 0;i < chip->num_slots;i++) {
1147                 if (!chip->hosts[i])
1148                         continue;
1149                 free_irq(chip->hosts[i]->irq, chip->hosts[i]);
1150         }
1151
1152         pci_disable_device(pdev);
1153         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1154
1155         return 0;
1156 }
1157
1158 static int sdhci_resume (struct pci_dev *pdev)
1159 {
1160         struct sdhci_chip *chip;
1161         int i, ret;
1162
1163         chip = pci_get_drvdata(pdev);
1164         if (!chip)
1165                 return 0;
1166
1167         DBG("Resuming...\n");
1168
1169         pci_set_power_state(pdev, PCI_D0);
1170         pci_restore_state(pdev);
1171         ret = pci_enable_device(pdev);
1172         if (ret)
1173                 return ret;
1174
1175         for (i = 0;i < chip->num_slots;i++) {
1176                 if (!chip->hosts[i])
1177                         continue;
1178                 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1179                         pci_set_master(pdev);
1180                 ret = request_irq(chip->hosts[i]->irq, sdhci_irq,
1181                         IRQF_SHARED, chip->hosts[i]->slot_descr,
1182                         chip->hosts[i]);
1183                 if (ret)
1184                         return ret;
1185                 sdhci_init(chip->hosts[i]);
1186                 mmiowb();
1187                 ret = mmc_resume_host(chip->hosts[i]->mmc);
1188                 if (ret)
1189                         return ret;
1190         }
1191
1192         return 0;
1193 }
1194
1195 #else /* CONFIG_PM */
1196
1197 #define sdhci_suspend NULL
1198 #define sdhci_resume NULL
1199
1200 #endif /* CONFIG_PM */
1201
1202 /*****************************************************************************\
1203  *                                                                           *
1204  * Device probing/removal                                                    *
1205  *                                                                           *
1206 \*****************************************************************************/
1207
1208 static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1209 {
1210         int ret;
1211         unsigned int version;
1212         struct sdhci_chip *chip;
1213         struct mmc_host *mmc;
1214         struct sdhci_host *host;
1215
1216         u8 first_bar;
1217         unsigned int caps;
1218
1219         chip = pci_get_drvdata(pdev);
1220         BUG_ON(!chip);
1221
1222         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1223         if (ret)
1224                 return ret;
1225
1226         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1227
1228         if (first_bar > 5) {
1229                 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1230                 return -ENODEV;
1231         }
1232
1233         if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1234                 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1235                 return -ENODEV;
1236         }
1237
1238         if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1239                 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. "
1240                         "You may experience problems.\n");
1241         }
1242
1243         if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1244                 printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n");
1245                 return -ENODEV;
1246         }
1247
1248         if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1249                 printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n");
1250                 return -ENODEV;
1251         }
1252
1253         mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1254         if (!mmc)
1255                 return -ENOMEM;
1256
1257         host = mmc_priv(mmc);
1258         host->mmc = mmc;
1259
1260         host->chip = chip;
1261         chip->hosts[slot] = host;
1262
1263         host->bar = first_bar + slot;
1264
1265         host->addr = pci_resource_start(pdev, host->bar);
1266         host->irq = pdev->irq;
1267
1268         DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1269
1270         snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1271
1272         ret = pci_request_region(pdev, host->bar, host->slot_descr);
1273         if (ret)
1274                 goto free;
1275
1276         host->ioaddr = ioremap_nocache(host->addr,
1277                 pci_resource_len(pdev, host->bar));
1278         if (!host->ioaddr) {
1279                 ret = -ENOMEM;
1280                 goto release;
1281         }
1282
1283         sdhci_reset(host, SDHCI_RESET_ALL);
1284
1285         version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1286         version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1287         if (version != 0) {
1288                 printk(KERN_ERR "%s: Unknown controller version (%d). "
1289                         "You may experience problems.\n", host->slot_descr,
1290                         version);
1291         }
1292
1293         caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1294
1295         if (debug_nodma)
1296                 DBG("DMA forced off\n");
1297         else if (debug_forcedma) {
1298                 DBG("DMA forced on\n");
1299                 host->flags |= SDHCI_USE_DMA;
1300         } else if (chip->quirks & SDHCI_QUIRK_FORCE_DMA)
1301                 host->flags |= SDHCI_USE_DMA;
1302         else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
1303                 DBG("Controller doesn't have DMA interface\n");
1304         else if (!(caps & SDHCI_CAN_DO_DMA))
1305                 DBG("Controller doesn't have DMA capability\n");
1306         else
1307                 host->flags |= SDHCI_USE_DMA;
1308
1309         if (host->flags & SDHCI_USE_DMA) {
1310                 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1311                         printk(KERN_WARNING "%s: No suitable DMA available. "
1312                                 "Falling back to PIO.\n", host->slot_descr);
1313                         host->flags &= ~SDHCI_USE_DMA;
1314                 }
1315         }
1316
1317         if (host->flags & SDHCI_USE_DMA)
1318                 pci_set_master(pdev);
1319         else /* XXX: Hack to get MMC layer to avoid highmem */
1320                 pdev->dma_mask = 0;
1321
1322         host->max_clk =
1323                 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1324         if (host->max_clk == 0) {
1325                 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1326                         "frequency.\n", host->slot_descr);
1327                 ret = -ENODEV;
1328                 goto unmap;
1329         }
1330         host->max_clk *= 1000000;
1331
1332         host->timeout_clk =
1333                 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1334         if (host->timeout_clk == 0) {
1335                 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1336                         "frequency.\n", host->slot_descr);
1337                 ret = -ENODEV;
1338                 goto unmap;
1339         }
1340         if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1341                 host->timeout_clk *= 1000;
1342
1343         /*
1344          * Set host parameters.
1345          */
1346         mmc->ops = &sdhci_ops;
1347         mmc->f_min = host->max_clk / 256;
1348         mmc->f_max = host->max_clk;
1349         mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_SDIO_IRQ;
1350
1351         if (caps & SDHCI_CAN_DO_HISPD)
1352                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1353
1354         mmc->ocr_avail = 0;
1355         if (caps & SDHCI_CAN_VDD_330)
1356                 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1357         if (caps & SDHCI_CAN_VDD_300)
1358                 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1359         if (caps & SDHCI_CAN_VDD_180)
1360                 mmc->ocr_avail |= MMC_VDD_165_195;
1361
1362         if (mmc->ocr_avail == 0) {
1363                 printk(KERN_ERR "%s: Hardware doesn't report any "
1364                         "support voltages.\n", host->slot_descr);
1365                 ret = -ENODEV;
1366                 goto unmap;
1367         }
1368
1369         spin_lock_init(&host->lock);
1370
1371         /*
1372          * Maximum number of segments. Hardware cannot do scatter lists.
1373          */
1374         if (host->flags & SDHCI_USE_DMA)
1375                 mmc->max_hw_segs = 1;
1376         else
1377                 mmc->max_hw_segs = 16;
1378         mmc->max_phys_segs = 16;
1379
1380         /*
1381          * Maximum number of sectors in one transfer. Limited by DMA boundary
1382          * size (512KiB).
1383          */
1384         mmc->max_req_size = 524288;
1385
1386         /*
1387          * Maximum segment size. Could be one segment with the maximum number
1388          * of bytes.
1389          */
1390         mmc->max_seg_size = mmc->max_req_size;
1391
1392         /*
1393          * Maximum block size. This varies from controller to controller and
1394          * is specified in the capabilities register.
1395          */
1396         mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1397         if (mmc->max_blk_size >= 3) {
1398                 printk(KERN_WARNING "%s: Invalid maximum block size, assuming 512\n",
1399                         host->slot_descr);
1400                 mmc->max_blk_size = 512;
1401         } else
1402                 mmc->max_blk_size = 512 << mmc->max_blk_size;
1403
1404         /*
1405          * Maximum block count.
1406          */
1407         mmc->max_blk_count = 65535;
1408
1409         /*
1410          * Init tasklets.
1411          */
1412         tasklet_init(&host->card_tasklet,
1413                 sdhci_tasklet_card, (unsigned long)host);
1414         tasklet_init(&host->finish_tasklet,
1415                 sdhci_tasklet_finish, (unsigned long)host);
1416
1417         setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1418
1419         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1420                 host->slot_descr, host);
1421         if (ret)
1422                 goto untasklet;
1423
1424         sdhci_init(host);
1425
1426 #ifdef CONFIG_MMC_DEBUG
1427         sdhci_dumpregs(host);
1428 #endif
1429
1430         mmiowb();
1431
1432         mmc_add_host(mmc);
1433
1434         printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1435                 host->addr, host->irq,
1436                 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1437
1438         return 0;
1439
1440 untasklet:
1441         tasklet_kill(&host->card_tasklet);
1442         tasklet_kill(&host->finish_tasklet);
1443 unmap:
1444         iounmap(host->ioaddr);
1445 release:
1446         pci_release_region(pdev, host->bar);
1447 free:
1448         mmc_free_host(mmc);
1449
1450         return ret;
1451 }
1452
1453 static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1454 {
1455         struct sdhci_chip *chip;
1456         struct mmc_host *mmc;
1457         struct sdhci_host *host;
1458
1459         chip = pci_get_drvdata(pdev);
1460         host = chip->hosts[slot];
1461         mmc = host->mmc;
1462
1463         chip->hosts[slot] = NULL;
1464
1465         mmc_remove_host(mmc);
1466
1467         sdhci_reset(host, SDHCI_RESET_ALL);
1468
1469         free_irq(host->irq, host);
1470
1471         del_timer_sync(&host->timer);
1472
1473         tasklet_kill(&host->card_tasklet);
1474         tasklet_kill(&host->finish_tasklet);
1475
1476         iounmap(host->ioaddr);
1477
1478         pci_release_region(pdev, host->bar);
1479
1480         mmc_free_host(mmc);
1481 }
1482
1483 static int __devinit sdhci_probe(struct pci_dev *pdev,
1484         const struct pci_device_id *ent)
1485 {
1486         int ret, i;
1487         u8 slots, rev;
1488         struct sdhci_chip *chip;
1489
1490         BUG_ON(pdev == NULL);
1491         BUG_ON(ent == NULL);
1492
1493         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1494
1495         printk(KERN_INFO DRIVER_NAME
1496                 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1497                 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1498                 (int)rev);
1499
1500         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1501         if (ret)
1502                 return ret;
1503
1504         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1505         DBG("found %d slot(s)\n", slots);
1506         if (slots == 0)
1507                 return -ENODEV;
1508
1509         ret = pci_enable_device(pdev);
1510         if (ret)
1511                 return ret;
1512
1513         chip = kzalloc(sizeof(struct sdhci_chip) +
1514                 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1515         if (!chip) {
1516                 ret = -ENOMEM;
1517                 goto err;
1518         }
1519
1520         chip->pdev = pdev;
1521         chip->quirks = ent->driver_data;
1522
1523         if (debug_quirks)
1524                 chip->quirks = debug_quirks;
1525
1526         chip->num_slots = slots;
1527         pci_set_drvdata(pdev, chip);
1528
1529         for (i = 0;i < slots;i++) {
1530                 ret = sdhci_probe_slot(pdev, i);
1531                 if (ret) {
1532                         for (i--;i >= 0;i--)
1533                                 sdhci_remove_slot(pdev, i);
1534                         goto free;
1535                 }
1536         }
1537
1538         return 0;
1539
1540 free:
1541         pci_set_drvdata(pdev, NULL);
1542         kfree(chip);
1543
1544 err:
1545         pci_disable_device(pdev);
1546         return ret;
1547 }
1548
1549 static void __devexit sdhci_remove(struct pci_dev *pdev)
1550 {
1551         int i;
1552         struct sdhci_chip *chip;
1553
1554         chip = pci_get_drvdata(pdev);
1555
1556         if (chip) {
1557                 for (i = 0;i < chip->num_slots;i++)
1558                         sdhci_remove_slot(pdev, i);
1559
1560                 pci_set_drvdata(pdev, NULL);
1561
1562                 kfree(chip);
1563         }
1564
1565         pci_disable_device(pdev);
1566 }
1567
1568 static struct pci_driver sdhci_driver = {
1569         .name =         DRIVER_NAME,
1570         .id_table =     pci_ids,
1571         .probe =        sdhci_probe,
1572         .remove =       __devexit_p(sdhci_remove),
1573         .suspend =      sdhci_suspend,
1574         .resume =       sdhci_resume,
1575 };
1576
1577 /*****************************************************************************\
1578  *                                                                           *
1579  * Driver init/exit                                                          *
1580  *                                                                           *
1581 \*****************************************************************************/
1582
1583 static int __init sdhci_drv_init(void)
1584 {
1585         printk(KERN_INFO DRIVER_NAME
1586                 ": Secure Digital Host Controller Interface driver\n");
1587         printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1588
1589         return pci_register_driver(&sdhci_driver);
1590 }
1591
1592 static void __exit sdhci_drv_exit(void)
1593 {
1594         DBG("Exiting\n");
1595
1596         pci_unregister_driver(&sdhci_driver);
1597 }
1598
1599 module_init(sdhci_drv_init);
1600 module_exit(sdhci_drv_exit);
1601
1602 module_param(debug_nodma, uint, 0444);
1603 module_param(debug_forcedma, uint, 0444);
1604 module_param(debug_quirks, uint, 0444);
1605
1606 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1607 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1608 MODULE_LICENSE("GPL");
1609
1610 MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1611 MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
1612 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");