drivers/gpu/drm/radeon/radeon_kms.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include "drmP.h"
  29 #include "drm_sarea.h"
  30 #include "radeon.h"
  31 #include "radeon_drm.h"
  32
  33
  34 /*
  35  * Driver load/unload
  36  */
  37 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
  38 {
  39         struct radeon_device *rdev;
  40         int r;
  41
  42         rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL);
  43         if (rdev == NULL) {
  44                 return -ENOMEM;
  45         }
  46         dev->dev_private = (void *)rdev;
  47
  48         /* update BUS flag */
  49         if (drm_device_is_agp(dev)) {
  50                 flags |= RADEON_IS_AGP;
  51         } else if (drm_device_is_pcie(dev)) {
  52                 flags |= RADEON_IS_PCIE;
  53         } else {
  54                 flags |= RADEON_IS_PCI;
  55         }
  56
  57         r = radeon_device_init(rdev, dev, dev->pdev, flags);
  58         if (r) {
  59                 DRM_ERROR("Failed to initialize radeon, disabling IOCTL\n");
  60                 radeon_device_fini(rdev);
  61                 kfree(rdev);
  62                 dev->dev_private = NULL;
  63                 return r;
  64         }
  65         return 0;
  66 }
  67
  68 int radeon_driver_unload_kms(struct drm_device *dev)
  69 {
  70         struct radeon_device *rdev = dev->dev_private;
  71
  72         radeon_device_fini(rdev);
  73         kfree(rdev);
  74         dev->dev_private = NULL;
  75         return 0;
  76 }
  77
  78
  79 /*
  80  * Userspace get informations ioctl
  81  */
  82 int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
  83 {
  84         struct radeon_device *rdev = dev->dev_private;
  85         struct drm_radeon_info *info;
  86         uint32_t *value_ptr;
  87         uint32_t value;
  88
  89         info = data;
  90         value_ptr = (uint32_t *)((unsigned long)info->value);
  91         switch (info->request) {
  92         case RADEON_INFO_DEVICE_ID:
  93                 value = dev->pci_device;
  94                 break;
  95         case RADEON_INFO_NUM_GB_PIPES:
  96                 value = rdev->num_gb_pipes;
  97                 break;
  98         default:
  99                 DRM_DEBUG("Invalid request %d\n", info->request);
 100                 return -EINVAL;
 101         }
 102         if (DRM_COPY_TO_USER(value_ptr, &value, sizeof(uint32_t))) {
 103                 DRM_ERROR("copy_to_user\n");
 104                 return -EFAULT;
 105         }
 106         return 0;
 107 }
 108
 109
 110 /*
 111  * Outdated mess for old drm with Xorg being in charge (void function now).
 112  */
 113 int radeon_driver_firstopen_kms(struct drm_device *dev)
 114 {
 115         return 0;
 116 }
 117
 118
 119 void radeon_driver_lastclose_kms(struct drm_device *dev)
 120 {
 121 }
 122
 123 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
 124 {
 125         return 0;
 126 }
 127
 128 void radeon_driver_postclose_kms(struct drm_device *dev,
 129                                  struct drm_file *file_priv)
 130 {
 131 }
 132
 133 void radeon_driver_preclose_kms(struct drm_device *dev,
 134                                 struct drm_file *file_priv)
 135 {
 136 }
 137
 138
 139 /*
 140  * VBlank related functions.
 141  */
 142 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc)
 143 {
 144         /* FIXME: implement */
 145         return 0;
 146 }
 147
 148 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc)
 149 {
 150         /* FIXME: implement */
 151         return 0;
 152 }
 153
 154 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc)
 155 {
 156         /* FIXME: implement */
 157 }
 158
 159
 160 /*
 161  * For multiple master (like multiple X).
 162  */
 163 struct drm_radeon_master_private {
 164         drm_local_map_t *sarea;
 165         drm_radeon_sarea_t *sarea_priv;
 166 };
 167
 168 int radeon_master_create_kms(struct drm_device *dev, struct drm_master *master)
 169 {
 170         struct drm_radeon_master_private *master_priv;
 171         unsigned long sareapage;
 172         int ret;
 173
 174         master_priv = kzalloc(sizeof(*master_priv), GFP_KERNEL);
 175         if (master_priv == NULL) {
 176                 return -ENOMEM;
 177         }
 178         /* prebuild the SAREA */
 179         sareapage = max_t(unsigned long, SAREA_MAX, PAGE_SIZE);
 180         ret = drm_addmap(dev, 0, sareapage, _DRM_SHM,
 181                          _DRM_CONTAINS_LOCK,
 182                          &master_priv->sarea);
 183         if (ret) {
 184                 DRM_ERROR("SAREA setup failed\n");
 185                 return ret;
 186         }
 187         master_priv->sarea_priv = master_priv->sarea->handle + sizeof(struct drm_sarea);
 188         master_priv->sarea_priv->pfCurrentPage = 0;
 189         master->driver_priv = master_priv;
 190         return 0;
 191 }
 192
 193 void radeon_master_destroy_kms(struct drm_device *dev,
 194                                struct drm_master *master)
 195 {
 196         struct drm_radeon_master_private *master_priv = master->driver_priv;
 197
 198         if (master_priv == NULL) {
 199                 return;
 200         }
 201         if (master_priv->sarea) {
 202                 drm_rmmap_locked(dev, master_priv->sarea);
 203         }
 204         kfree(master_priv);
 205         master->driver_priv = NULL;
 206 }
 207
 208
 209 /*
 210  * IOCTL.
 211  */
 212 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
 213                          struct drm_file *file_priv)
 214 {
 215         /* Not valid in KMS. */
 216         return -EINVAL;
 217 }
 218
 219 #define KMS_INVALID_IOCTL(name)                                         \
 220 int name(struct drm_device *dev, void *data, struct drm_file *file_priv)\
 221 {                                                                       \
 222         DRM_ERROR("invalid ioctl with kms %s\n", __func__);             \
 223         return -EINVAL;                                                 \
 224 }
 225
 226 /*
 227  * All these ioctls are invalid in kms world.
 228  */
 229 KMS_INVALID_IOCTL(radeon_cp_init_kms)
 230 KMS_INVALID_IOCTL(radeon_cp_start_kms)
 231 KMS_INVALID_IOCTL(radeon_cp_stop_kms)
 232 KMS_INVALID_IOCTL(radeon_cp_reset_kms)
 233 KMS_INVALID_IOCTL(radeon_cp_idle_kms)
 234 KMS_INVALID_IOCTL(radeon_cp_resume_kms)
 235 KMS_INVALID_IOCTL(radeon_engine_reset_kms)
 236 KMS_INVALID_IOCTL(radeon_fullscreen_kms)
 237 KMS_INVALID_IOCTL(radeon_cp_swap_kms)
 238 KMS_INVALID_IOCTL(radeon_cp_clear_kms)
 239 KMS_INVALID_IOCTL(radeon_cp_vertex_kms)
 240 KMS_INVALID_IOCTL(radeon_cp_indices_kms)
 241 KMS_INVALID_IOCTL(radeon_cp_texture_kms)
 242 KMS_INVALID_IOCTL(radeon_cp_stipple_kms)
 243 KMS_INVALID_IOCTL(radeon_cp_indirect_kms)
 244 KMS_INVALID_IOCTL(radeon_cp_vertex2_kms)
 245 KMS_INVALID_IOCTL(radeon_cp_cmdbuf_kms)
 246 KMS_INVALID_IOCTL(radeon_cp_getparam_kms)
 247 KMS_INVALID_IOCTL(radeon_cp_flip_kms)
 248 KMS_INVALID_IOCTL(radeon_mem_alloc_kms)
 249 KMS_INVALID_IOCTL(radeon_mem_free_kms)
 250 KMS_INVALID_IOCTL(radeon_mem_init_heap_kms)
 251 KMS_INVALID_IOCTL(radeon_irq_emit_kms)
 252 KMS_INVALID_IOCTL(radeon_irq_wait_kms)
 253 KMS_INVALID_IOCTL(radeon_cp_setparam_kms)
 254 KMS_INVALID_IOCTL(radeon_surface_alloc_kms)
 255 KMS_INVALID_IOCTL(radeon_surface_free_kms)
 256
 257
 258 struct drm_ioctl_desc radeon_ioctls_kms[] = {
 259         DRM_IOCTL_DEF(DRM_RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 260         DRM_IOCTL_DEF(DRM_RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 261         DRM_IOCTL_DEF(DRM_RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 262         DRM_IOCTL_DEF(DRM_RADEON_CP_RESET, radeon_cp_reset_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 263         DRM_IOCTL_DEF(DRM_RADEON_CP_IDLE, radeon_cp_idle_kms, DRM_AUTH),
 264         DRM_IOCTL_DEF(DRM_RADEON_CP_RESUME, radeon_cp_resume_kms, DRM_AUTH),
 265         DRM_IOCTL_DEF(DRM_RADEON_RESET, radeon_engine_reset_kms, DRM_AUTH),
 266         DRM_IOCTL_DEF(DRM_RADEON_FULLSCREEN, radeon_fullscreen_kms, DRM_AUTH),
 267         DRM_IOCTL_DEF(DRM_RADEON_SWAP, radeon_cp_swap_kms, DRM_AUTH),
 268         DRM_IOCTL_DEF(DRM_RADEON_CLEAR, radeon_cp_clear_kms, DRM_AUTH),
 269         DRM_IOCTL_DEF(DRM_RADEON_VERTEX, radeon_cp_vertex_kms, DRM_AUTH),
 270         DRM_IOCTL_DEF(DRM_RADEON_INDICES, radeon_cp_indices_kms, DRM_AUTH),
 271         DRM_IOCTL_DEF(DRM_RADEON_TEXTURE, radeon_cp_texture_kms, DRM_AUTH),
 272         DRM_IOCTL_DEF(DRM_RADEON_STIPPLE, radeon_cp_stipple_kms, DRM_AUTH),
 273         DRM_IOCTL_DEF(DRM_RADEON_INDIRECT, radeon_cp_indirect_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 274         DRM_IOCTL_DEF(DRM_RADEON_VERTEX2, radeon_cp_vertex2_kms, DRM_AUTH),
 275         DRM_IOCTL_DEF(DRM_RADEON_CMDBUF, radeon_cp_cmdbuf_kms, DRM_AUTH),
 276         DRM_IOCTL_DEF(DRM_RADEON_GETPARAM, radeon_cp_getparam_kms, DRM_AUTH),
 277         DRM_IOCTL_DEF(DRM_RADEON_FLIP, radeon_cp_flip_kms, DRM_AUTH),
 278         DRM_IOCTL_DEF(DRM_RADEON_ALLOC, radeon_mem_alloc_kms, DRM_AUTH),
 279         DRM_IOCTL_DEF(DRM_RADEON_FREE, radeon_mem_free_kms, DRM_AUTH),
 280         DRM_IOCTL_DEF(DRM_RADEON_INIT_HEAP, radeon_mem_init_heap_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 281         DRM_IOCTL_DEF(DRM_RADEON_IRQ_EMIT, radeon_irq_emit_kms, DRM_AUTH),
 282         DRM_IOCTL_DEF(DRM_RADEON_IRQ_WAIT, radeon_irq_wait_kms, DRM_AUTH),
 283         DRM_IOCTL_DEF(DRM_RADEON_SETPARAM, radeon_cp_setparam_kms, DRM_AUTH),
 284         DRM_IOCTL_DEF(DRM_RADEON_SURF_ALLOC, radeon_surface_alloc_kms, DRM_AUTH),
 285         DRM_IOCTL_DEF(DRM_RADEON_SURF_FREE, radeon_surface_free_kms, DRM_AUTH),
 286         /* KMS */
 287         DRM_IOCTL_DEF(DRM_RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH),
 288         DRM_IOCTL_DEF(DRM_RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH),
 289         DRM_IOCTL_DEF(DRM_RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH),
 290         DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH),
 291         DRM_IOCTL_DEF(DRM_RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH),
 292         DRM_IOCTL_DEF(DRM_RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH),
 293         DRM_IOCTL_DEF(DRM_RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH),
 294         DRM_IOCTL_DEF(DRM_RADEON_CS, radeon_cs_ioctl, DRM_AUTH),
 295         DRM_IOCTL_DEF(DRM_RADEON_INFO, radeon_info_ioctl, DRM_AUTH),
 296         DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH),
 297         DRM_IOCTL_DEF(DRM_RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH),
 298 };
 299 int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);