drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "drm_crtc.h"
  37 #include "drm_edid.h"
  38 #include "intel_drv.h"
  39 #include "i915_drm.h"
  40 #include "i915_drv.h"
  41 #include <linux/acpi.h>
  42
  43 /* Private structure for the integrated LVDS support */
  44 struct intel_lvds {
  45         struct intel_encoder base;
  46         int fitting_mode;
  47         u32 pfit_control;
  48         u32 pfit_pgm_ratios;
  49         bool pfit_dirty;
  50 };
  51
  52 static struct intel_lvds *enc_to_intel_lvds(struct drm_encoder *encoder)
  53 {
  54         return container_of(encoder, struct intel_lvds, base.base);
  55 }
  56
  57 /**
  58  * Sets the power state for the panel.
  59  */
  60 static void intel_lvds_set_power(struct intel_lvds *intel_lvds, bool on)
  61 {
  62         struct drm_device *dev = intel_lvds->base.base.dev;
  63         struct drm_i915_private *dev_priv = dev->dev_private;
  64         u32 ctl_reg, lvds_reg;
  65
  66         if (HAS_PCH_SPLIT(dev)) {
  67                 ctl_reg = PCH_PP_CONTROL;
  68                 lvds_reg = PCH_LVDS;
  69         } else {
  70                 ctl_reg = PP_CONTROL;
  71                 lvds_reg = LVDS;
  72         }
  73
  74         if (on) {
  75                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  76                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  77                 intel_panel_set_backlight(dev, dev_priv->backlight_level);
  78         } else {
  79                 dev_priv->backlight_level = intel_panel_get_backlight(dev);
  80
  81                 intel_panel_set_backlight(dev, 0);
  82                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  83
  84                 if (intel_lvds->pfit_control) {
  85                         if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
  86                                 DRM_ERROR("timed out waiting for panel to power off\n");
  87                         I915_WRITE(PFIT_CONTROL, 0);
  88                         intel_lvds->pfit_control = 0;
  89                 }
  90
  91                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  92         }
  93         POSTING_READ(lvds_reg);
  94 }
  95
  96 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
  97 {
  98         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
  99
 100         if (mode == DRM_MODE_DPMS_ON)
 101                 intel_lvds_set_power(intel_lvds, true);
 102         else
 103                 intel_lvds_set_power(intel_lvds, false);
 104
 105         /* XXX: We never power down the LVDS pairs. */
 106 }
 107
 108 static int intel_lvds_mode_valid(struct drm_connector *connector,
 109                                  struct drm_display_mode *mode)
 110 {
 111         struct drm_device *dev = connector->dev;
 112         struct drm_i915_private *dev_priv = dev->dev_private;
 113         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
 114
 115         if (fixed_mode) {
 116                 if (mode->hdisplay > fixed_mode->hdisplay)
 117                         return MODE_PANEL;
 118                 if (mode->vdisplay > fixed_mode->vdisplay)
 119                         return MODE_PANEL;
 120         }
 121
 122         return MODE_OK;
 123 }
 124
 125 static void
 126 centre_horizontally(struct drm_display_mode *mode,
 127                     int width)
 128 {
 129         u32 border, sync_pos, blank_width, sync_width;
 130
 131         /* keep the hsync and hblank widths constant */
 132         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 133         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 134         sync_pos = (blank_width - sync_width + 1) / 2;
 135
 136         border = (mode->hdisplay - width + 1) / 2;
 137         border += border & 1; /* make the border even */
 138
 139         mode->crtc_hdisplay = width;
 140         mode->crtc_hblank_start = width + border;
 141         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 142
 143         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 144         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 145 }
 146
 147 static void
 148 centre_vertically(struct drm_display_mode *mode,
 149                   int height)
 150 {
 151         u32 border, sync_pos, blank_width, sync_width;
 152
 153         /* keep the vsync and vblank widths constant */
 154         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 155         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 156         sync_pos = (blank_width - sync_width + 1) / 2;
 157
 158         border = (mode->vdisplay - height + 1) / 2;
 159
 160         mode->crtc_vdisplay = height;
 161         mode->crtc_vblank_start = height + border;
 162         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 163
 164         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 165         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 166 }
 167
 168 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 169 {
 170         /*
 171          * Floating point operation is not supported. So the FACTOR
 172          * is defined, which can avoid the floating point computation
 173          * when calculating the panel ratio.
 174          */
 175 #define ACCURACY 12
 176 #define FACTOR (1 << ACCURACY)
 177         u32 ratio = source * FACTOR / target;
 178         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 179 }
 180
 181 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 182                                   struct drm_display_mode *mode,
 183                                   struct drm_display_mode *adjusted_mode)
 184 {
 185         struct drm_device *dev = encoder->dev;
 186         struct drm_i915_private *dev_priv = dev->dev_private;
 187         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 188         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 189         struct drm_encoder *tmp_encoder;
 190         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 191
 192         /* Should never happen!! */
 193         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
 194                 DRM_ERROR("Can't support LVDS on pipe A\n");
 195                 return false;
 196         }
 197
 198         /* Should never happen!! */
 199         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 200                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 201                         DRM_ERROR("Can't enable LVDS and another "
 202                                "encoder on the same pipe\n");
 203                         return false;
 204                 }
 205         }
 206         /* If we don't have a panel mode, there is nothing we can do */
 207         if (dev_priv->panel_fixed_mode == NULL)
 208                 return true;
 209
 210         /*
 211          * We have timings from the BIOS for the panel, put them in
 212          * to the adjusted mode.  The CRTC will be set up for this mode,
 213          * with the panel scaling set up to source from the H/VDisplay
 214          * of the original mode.
 215          */
 216         intel_fixed_panel_mode(dev_priv->panel_fixed_mode, adjusted_mode);
 217
 218         if (HAS_PCH_SPLIT(dev)) {
 219                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
 220                                         mode, adjusted_mode);
 221                 return true;
 222         }
 223
 224         /* Make sure pre-965s set dither correctly */
 225         if (!IS_I965G(dev)) {
 226                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
 227                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 228         }
 229
 230         /* Native modes don't need fitting */
 231         if (adjusted_mode->hdisplay == mode->hdisplay &&
 232             adjusted_mode->vdisplay == mode->vdisplay)
 233                 goto out;
 234
 235         /* 965+ wants fuzzy fitting */
 236         if (IS_I965G(dev))
 237                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 238                                  PFIT_FILTER_FUZZY);
 239
 240         /*
 241          * Enable automatic panel scaling for non-native modes so that they fill
 242          * the screen.  Should be enabled before the pipe is enabled, according
 243          * to register description and PRM.
 244          * Change the value here to see the borders for debugging
 245          */
 246         I915_WRITE(BCLRPAT_A, 0);
 247         I915_WRITE(BCLRPAT_B, 0);
 248
 249         switch (intel_lvds->fitting_mode) {
 250         case DRM_MODE_SCALE_CENTER:
 251                 /*
 252                  * For centered modes, we have to calculate border widths &
 253                  * heights and modify the values programmed into the CRTC.
 254                  */
 255                 centre_horizontally(adjusted_mode, mode->hdisplay);
 256                 centre_vertically(adjusted_mode, mode->vdisplay);
 257                 border = LVDS_BORDER_ENABLE;
 258                 break;
 259
 260         case DRM_MODE_SCALE_ASPECT:
 261                 /* Scale but preserve the aspect ratio */
 262                 if (IS_I965G(dev)) {
 263                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 264                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 265
 266                         pfit_control |= PFIT_ENABLE;
 267                         /* 965+ is easy, it does everything in hw */
 268                         if (scaled_width > scaled_height)
 269                                 pfit_control |= PFIT_SCALING_PILLAR;
 270                         else if (scaled_width < scaled_height)
 271                                 pfit_control |= PFIT_SCALING_LETTER;
 272                         else
 273                                 pfit_control |= PFIT_SCALING_AUTO;
 274                 } else {
 275                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 276                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 277                         /*
 278                          * For earlier chips we have to calculate the scaling
 279                          * ratio by hand and program it into the
 280                          * PFIT_PGM_RATIO register
 281                          */
 282                         if (scaled_width > scaled_height) { /* pillar */
 283                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
 284
 285                                 border = LVDS_BORDER_ENABLE;
 286                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 287                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 288                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 289                                                             bits << PFIT_VERT_SCALE_SHIFT);
 290                                         pfit_control |= (PFIT_ENABLE |
 291                                                          VERT_INTERP_BILINEAR |
 292                                                          HORIZ_INTERP_BILINEAR);
 293                                 }
 294                         } else if (scaled_width < scaled_height) { /* letter */
 295                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
 296
 297                                 border = LVDS_BORDER_ENABLE;
 298                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 299                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 300                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 301                                                             bits << PFIT_VERT_SCALE_SHIFT);
 302                                         pfit_control |= (PFIT_ENABLE |
 303                                                          VERT_INTERP_BILINEAR |
 304                                                          HORIZ_INTERP_BILINEAR);
 305                                 }
 306                         } else
 307                                 /* Aspects match, Let hw scale both directions */
 308                                 pfit_control |= (PFIT_ENABLE |
 309                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 310                                                  VERT_INTERP_BILINEAR |
 311                                                  HORIZ_INTERP_BILINEAR);
 312                 }
 313                 break;
 314
 315         case DRM_MODE_SCALE_FULLSCREEN:
 316                 /*
 317                  * Full scaling, even if it changes the aspect ratio.
 318                  * Fortunately this is all done for us in hw.
 319                  */
 320                 pfit_control |= PFIT_ENABLE;
 321                 if (IS_I965G(dev))
 322                         pfit_control |= PFIT_SCALING_AUTO;
 323                 else
 324                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 325                                          VERT_INTERP_BILINEAR |
 326                                          HORIZ_INTERP_BILINEAR);
 327                 break;
 328
 329         default:
 330                 break;
 331         }
 332
 333 out:
 334         if (pfit_control != intel_lvds->pfit_control ||
 335             pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
 336                 intel_lvds->pfit_control = pfit_control;
 337                 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
 338                 intel_lvds->pfit_dirty = true;
 339         }
 340         dev_priv->lvds_border_bits = border;
 341
 342         /*
 343          * XXX: It would be nice to support lower refresh rates on the
 344          * panels to reduce power consumption, and perhaps match the
 345          * user's requested refresh rate.
 346          */
 347
 348         return true;
 349 }
 350
 351 static void intel_lvds_prepare(struct drm_encoder *encoder)
 352 {
 353         struct drm_device *dev = encoder->dev;
 354         struct drm_i915_private *dev_priv = dev->dev_private;
 355         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 356
 357         dev_priv->backlight_level = intel_panel_get_backlight(dev);
 358
 359         /* We try to do the minimum that is necessary in order to unlock
 360          * the registers for mode setting.
 361          *
 362          * On Ironlake, this is quite simple as we just set the unlock key
 363          * and ignore all subtleties. (This may cause some issues...)
 364          *
 365          * Prior to Ironlake, we must disable the pipe if we want to adjust
 366          * the panel fitter. However at all other times we can just reset
 367          * the registers regardless.
 368          */
 369
 370         if (HAS_PCH_SPLIT(dev)) {
 371                 I915_WRITE(PCH_PP_CONTROL,
 372                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
 373         } else if (intel_lvds->pfit_dirty) {
 374                 I915_WRITE(PP_CONTROL,
 375                            I915_READ(PP_CONTROL) & ~POWER_TARGET_ON);
 376                 I915_WRITE(LVDS, I915_READ(LVDS) & ~LVDS_PORT_EN);
 377         } else {
 378                 I915_WRITE(PP_CONTROL,
 379                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
 380         }
 381 }
 382
 383 static void intel_lvds_commit(struct drm_encoder *encoder)
 384 {
 385         struct drm_device *dev = encoder->dev;
 386         struct drm_i915_private *dev_priv = dev->dev_private;
 387         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 388
 389         if (dev_priv->backlight_level == 0)
 390                 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
 391
 392         /* Undo any unlocking done in prepare to prevent accidental
 393          * adjustment of the registers.
 394          */
 395         if (HAS_PCH_SPLIT(dev)) {
 396                 u32 val = I915_READ(PCH_PP_CONTROL);
 397                 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
 398                         I915_WRITE(PCH_PP_CONTROL, val & 0x3);
 399         } else {
 400                 u32 val = I915_READ(PP_CONTROL);
 401                 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
 402                         I915_WRITE(PP_CONTROL, val & 0x3);
 403         }
 404
 405         /* Always do a full power on as we do not know what state
 406          * we were left in.
 407          */
 408         intel_lvds_set_power(intel_lvds, true);
 409 }
 410
 411 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 412                                 struct drm_display_mode *mode,
 413                                 struct drm_display_mode *adjusted_mode)
 414 {
 415         struct drm_device *dev = encoder->dev;
 416         struct drm_i915_private *dev_priv = dev->dev_private;
 417         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 418
 419         /*
 420          * The LVDS pin pair will already have been turned on in the
 421          * intel_crtc_mode_set since it has a large impact on the DPLL
 422          * settings.
 423          */
 424
 425         if (HAS_PCH_SPLIT(dev))
 426                 return;
 427
 428         if (!intel_lvds->pfit_dirty)
 429                 return;
 430
 431         /*
 432          * Enable automatic panel scaling so that non-native modes fill the
 433          * screen.  Should be enabled before the pipe is enabled, according to
 434          * register description and PRM.
 435          */
 436         if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
 437                 DRM_ERROR("timed out waiting for panel to power off\n");
 438
 439         I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
 440         I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
 441         intel_lvds->pfit_dirty = false;
 442 }
 443
 444 /**
 445  * Detect the LVDS connection.
 446  *
 447  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 448  * connected and closed means disconnected.  We also send hotplug events as
 449  * needed, using lid status notification from the input layer.
 450  */
 451 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
 452 {
 453         struct drm_device *dev = connector->dev;
 454         enum drm_connector_status status = connector_status_connected;
 455
 456         /* ACPI lid methods were generally unreliable in this generation, so
 457          * don't even bother.
 458          */
 459         if (IS_GEN2(dev) || IS_GEN3(dev))
 460                 return connector_status_connected;
 461
 462         return status;
 463 }
 464
 465 /**
 466  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 467  */
 468 static int intel_lvds_get_modes(struct drm_connector *connector)
 469 {
 470         struct drm_device *dev = connector->dev;
 471         struct drm_i915_private *dev_priv = dev->dev_private;
 472
 473         if (dev_priv->lvds_edid_good) {
 474                 struct intel_encoder *encoder = intel_attached_encoder(connector);
 475                 int ret = intel_ddc_get_modes(connector, encoder->ddc_bus);
 476                 if (ret)
 477                         return ret;
 478         }
 479
 480         /* Didn't get an EDID, so
 481          * Set wide sync ranges so we get all modes
 482          * handed to valid_mode for checking
 483          */
 484         connector->display_info.min_vfreq = 0;
 485         connector->display_info.max_vfreq = 200;
 486         connector->display_info.min_hfreq = 0;
 487         connector->display_info.max_hfreq = 200;
 488
 489         if (dev_priv->panel_fixed_mode != NULL) {
 490                 struct drm_display_mode *mode;
 491
 492                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
 493                 drm_mode_probed_add(connector, mode);
 494
 495                 return 1;
 496         }
 497
 498         return 0;
 499 }
 500
 501 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 502 {
 503         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
 504         return 1;
 505 }
 506
 507 /* The GPU hangs up on these systems if modeset is performed on LID open */
 508 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 509         {
 510                 .callback = intel_no_modeset_on_lid_dmi_callback,
 511                 .ident = "Toshiba Tecra A11",
 512                 .matches = {
 513                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 514                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 515                 },
 516         },
 517
 518         { }     /* terminating entry */
 519 };
 520
 521 /*
 522  * Lid events. Note the use of 'modeset_on_lid':
 523  *  - we set it on lid close, and reset it on open
 524  *  - we use it as a "only once" bit (ie we ignore
 525  *    duplicate events where it was already properly
 526  *    set/reset)
 527  *  - the suspend/resume paths will also set it to
 528  *    zero, since they restore the mode ("lid open").
 529  */
 530 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 531                             void *unused)
 532 {
 533         struct drm_i915_private *dev_priv =
 534                 container_of(nb, struct drm_i915_private, lid_notifier);
 535         struct drm_device *dev = dev_priv->dev;
 536         struct drm_connector *connector = dev_priv->int_lvds_connector;
 537
 538         /*
 539          * check and update the status of LVDS connector after receiving
 540          * the LID nofication event.
 541          */
 542         if (connector)
 543                 connector->status = connector->funcs->detect(connector);
 544         /* Don't force modeset on machines where it causes a GPU lockup */
 545         if (dmi_check_system(intel_no_modeset_on_lid))
 546                 return NOTIFY_OK;
 547         if (!acpi_lid_open()) {
 548                 dev_priv->modeset_on_lid = 1;
 549                 return NOTIFY_OK;
 550         }
 551
 552         if (!dev_priv->modeset_on_lid)
 553                 return NOTIFY_OK;
 554
 555         dev_priv->modeset_on_lid = 0;
 556
 557         mutex_lock(&dev->mode_config.mutex);
 558         drm_helper_resume_force_mode(dev);
 559         mutex_unlock(&dev->mode_config.mutex);
 560
 561         return NOTIFY_OK;
 562 }
 563
 564 /**
 565  * intel_lvds_destroy - unregister and free LVDS structures
 566  * @connector: connector to free
 567  *
 568  * Unregister the DDC bus for this connector then free the driver private
 569  * structure.
 570  */
 571 static void intel_lvds_destroy(struct drm_connector *connector)
 572 {
 573         struct drm_device *dev = connector->dev;
 574         struct drm_i915_private *dev_priv = dev->dev_private;
 575
 576         if (dev_priv->lid_notifier.notifier_call)
 577                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 578         drm_sysfs_connector_remove(connector);
 579         drm_connector_cleanup(connector);
 580         kfree(connector);
 581 }
 582
 583 static int intel_lvds_set_property(struct drm_connector *connector,
 584                                    struct drm_property *property,
 585                                    uint64_t value)
 586 {
 587         struct drm_device *dev = connector->dev;
 588
 589         if (property == dev->mode_config.scaling_mode_property &&
 590                                 connector->encoder) {
 591                 struct drm_crtc *crtc = connector->encoder->crtc;
 592                 struct drm_encoder *encoder = connector->encoder;
 593                 struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 594
 595                 if (value == DRM_MODE_SCALE_NONE) {
 596                         DRM_DEBUG_KMS("no scaling not supported\n");
 597                         return 0;
 598                 }
 599                 if (intel_lvds->fitting_mode == value) {
 600                         /* the LVDS scaling property is not changed */
 601                         return 0;
 602                 }
 603                 intel_lvds->fitting_mode = value;
 604                 if (crtc && crtc->enabled) {
 605                         /*
 606                          * If the CRTC is enabled, the display will be changed
 607                          * according to the new panel fitting mode.
 608                          */
 609                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 610                                 crtc->x, crtc->y, crtc->fb);
 611                 }
 612         }
 613
 614         return 0;
 615 }
 616
 617 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 618         .dpms = intel_lvds_dpms,
 619         .mode_fixup = intel_lvds_mode_fixup,
 620         .prepare = intel_lvds_prepare,
 621         .mode_set = intel_lvds_mode_set,
 622         .commit = intel_lvds_commit,
 623 };
 624
 625 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 626         .get_modes = intel_lvds_get_modes,
 627         .mode_valid = intel_lvds_mode_valid,
 628         .best_encoder = intel_best_encoder,
 629 };
 630
 631 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 632         .dpms = drm_helper_connector_dpms,
 633         .detect = intel_lvds_detect,
 634         .fill_modes = drm_helper_probe_single_connector_modes,
 635         .set_property = intel_lvds_set_property,
 636         .destroy = intel_lvds_destroy,
 637 };
 638
 639 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 640         .destroy = intel_encoder_destroy,
 641 };
 642
 643 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 644 {
 645         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 646         return 1;
 647 }
 648
 649 /* These systems claim to have LVDS, but really don't */
 650 static const struct dmi_system_id intel_no_lvds[] = {
 651         {
 652                 .callback = intel_no_lvds_dmi_callback,
 653                 .ident = "Apple Mac Mini (Core series)",
 654                 .matches = {
 655                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 656                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 657                 },
 658         },
 659         {
 660                 .callback = intel_no_lvds_dmi_callback,
 661                 .ident = "Apple Mac Mini (Core 2 series)",
 662                 .matches = {
 663                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 664                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 665                 },
 666         },
 667         {
 668                 .callback = intel_no_lvds_dmi_callback,
 669                 .ident = "MSI IM-945GSE-A",
 670                 .matches = {
 671                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 672                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 673                 },
 674         },
 675         {
 676                 .callback = intel_no_lvds_dmi_callback,
 677                 .ident = "Dell Studio Hybrid",
 678                 .matches = {
 679                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 680                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 681                 },
 682         },
 683         {
 684                 .callback = intel_no_lvds_dmi_callback,
 685                 .ident = "AOpen Mini PC",
 686                 .matches = {
 687                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 688                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 689                 },
 690         },
 691         {
 692                 .callback = intel_no_lvds_dmi_callback,
 693                 .ident = "AOpen Mini PC MP915",
 694                 .matches = {
 695                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 696                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 697                 },
 698         },
 699         {
 700                 .callback = intel_no_lvds_dmi_callback,
 701                 .ident = "Aopen i945GTt-VFA",
 702                 .matches = {
 703                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 704                 },
 705         },
 706         {
 707                 .callback = intel_no_lvds_dmi_callback,
 708                 .ident = "Clientron U800",
 709                 .matches = {
 710                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 711                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 712                 },
 713         },
 714
 715         { }     /* terminating entry */
 716 };
 717
 718 /**
 719  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 720  * @dev: drm device
 721  * @connector: LVDS connector
 722  *
 723  * Find the reduced downclock for LVDS in EDID.
 724  */
 725 static void intel_find_lvds_downclock(struct drm_device *dev,
 726                                 struct drm_connector *connector)
 727 {
 728         struct drm_i915_private *dev_priv = dev->dev_private;
 729         struct drm_display_mode *scan, *panel_fixed_mode;
 730         int temp_downclock;
 731
 732         panel_fixed_mode = dev_priv->panel_fixed_mode;
 733         temp_downclock = panel_fixed_mode->clock;
 734
 735         mutex_lock(&dev->mode_config.mutex);
 736         list_for_each_entry(scan, &connector->probed_modes, head) {
 737                 /*
 738                  * If one mode has the same resolution with the fixed_panel
 739                  * mode while they have the different refresh rate, it means
 740                  * that the reduced downclock is found for the LVDS. In such
 741                  * case we can set the different FPx0/1 to dynamically select
 742                  * between low and high frequency.
 743                  */
 744                 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
 745                         scan->hsync_start == panel_fixed_mode->hsync_start &&
 746                         scan->hsync_end == panel_fixed_mode->hsync_end &&
 747                         scan->htotal == panel_fixed_mode->htotal &&
 748                         scan->vdisplay == panel_fixed_mode->vdisplay &&
 749                         scan->vsync_start == panel_fixed_mode->vsync_start &&
 750                         scan->vsync_end == panel_fixed_mode->vsync_end &&
 751                         scan->vtotal == panel_fixed_mode->vtotal) {
 752                         if (scan->clock < temp_downclock) {
 753                                 /*
 754                                  * The downclock is already found. But we
 755                                  * expect to find the lower downclock.
 756                                  */
 757                                 temp_downclock = scan->clock;
 758                         }
 759                 }
 760         }
 761         mutex_unlock(&dev->mode_config.mutex);
 762         if (temp_downclock < panel_fixed_mode->clock &&
 763             i915_lvds_downclock) {
 764                 /* We found the downclock for LVDS. */
 765                 dev_priv->lvds_downclock_avail = 1;
 766                 dev_priv->lvds_downclock = temp_downclock;
 767                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 768                                 "Normal clock %dKhz, downclock %dKhz\n",
 769                                 panel_fixed_mode->clock, temp_downclock);
 770         }
 771         return;
 772 }
 773
 774 /*
 775  * Enumerate the child dev array parsed from VBT to check whether
 776  * the LVDS is present.
 777  * If it is present, return 1.
 778  * If it is not present, return false.
 779  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 780  */
 781 static bool lvds_is_present_in_vbt(struct drm_device *dev)
 782 {
 783         struct drm_i915_private *dev_priv = dev->dev_private;
 784         int i;
 785
 786         if (!dev_priv->child_dev_num)
 787                 return true;
 788
 789         for (i = 0; i < dev_priv->child_dev_num; i++) {
 790                 struct child_device_config *child = dev_priv->child_dev + i;
 791
 792                 /* If the device type is not LFP, continue.
 793                  * We have to check both the new identifiers as well as the
 794                  * old for compatibility with some BIOSes.
 795                  */
 796                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 797                     child->device_type != DEVICE_TYPE_LFP)
 798                         continue;
 799
 800                 /* However, we cannot trust the BIOS writers to populate
 801                  * the VBT correctly.  Since LVDS requires additional
 802                  * information from AIM blocks, a non-zero addin offset is
 803                  * a good indicator that the LVDS is actually present.
 804                  */
 805                 if (child->addin_offset)
 806                         return true;
 807
 808                 /* But even then some BIOS writers perform some black magic
 809                  * and instantiate the device without reference to any
 810                  * additional data.  Trust that if the VBT was written into
 811                  * the OpRegion then they have validated the LVDS's existence.
 812                  */
 813                 if (dev_priv->opregion.vbt)
 814                         return true;
 815         }
 816
 817         return false;
 818 }
 819
 820 /**
 821  * intel_lvds_init - setup LVDS connectors on this device
 822  * @dev: drm device
 823  *
 824  * Create the connector, register the LVDS DDC bus, and try to figure out what
 825  * modes we can display on the LVDS panel (if present).
 826  */
 827 void intel_lvds_init(struct drm_device *dev)
 828 {
 829         struct drm_i915_private *dev_priv = dev->dev_private;
 830         struct intel_lvds *intel_lvds;
 831         struct intel_encoder *intel_encoder;
 832         struct intel_connector *intel_connector;
 833         struct drm_connector *connector;
 834         struct drm_encoder *encoder;
 835         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 836         struct drm_crtc *crtc;
 837         u32 lvds;
 838         int pipe, gpio = GPIOC;
 839
 840         /* Skip init on machines we know falsely report LVDS */
 841         if (dmi_check_system(intel_no_lvds))
 842                 return;
 843
 844         if (!lvds_is_present_in_vbt(dev)) {
 845                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 846                 return;
 847         }
 848
 849         if (HAS_PCH_SPLIT(dev)) {
 850                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 851                         return;
 852                 if (dev_priv->edp_support) {
 853                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 854                         return;
 855                 }
 856                 gpio = PCH_GPIOC;
 857         }
 858
 859         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
 860         if (!intel_lvds) {
 861                 return;
 862         }
 863
 864         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 865         if (!intel_connector) {
 866                 kfree(intel_lvds);
 867                 return;
 868         }
 869
 870         if (!HAS_PCH_SPLIT(dev)) {
 871                 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
 872         }
 873
 874         intel_encoder = &intel_lvds->base;
 875         encoder = &intel_encoder->base;
 876         connector = &intel_connector->base;
 877         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 878                            DRM_MODE_CONNECTOR_LVDS);
 879
 880         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 881                          DRM_MODE_ENCODER_LVDS);
 882
 883         intel_connector_attach_encoder(intel_connector, intel_encoder);
 884         intel_encoder->type = INTEL_OUTPUT_LVDS;
 885
 886         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 887         intel_encoder->crtc_mask = (1 << 1);
 888         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 889         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 890         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 891         connector->interlace_allowed = false;
 892         connector->doublescan_allowed = false;
 893
 894         /* create the scaling mode property */
 895         drm_mode_create_scaling_mode_property(dev);
 896         /*
 897          * the initial panel fitting mode will be FULL_SCREEN.
 898          */
 899
 900         drm_connector_attach_property(&intel_connector->base,
 901                                       dev->mode_config.scaling_mode_property,
 902                                       DRM_MODE_SCALE_ASPECT);
 903         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
 904         /*
 905          * LVDS discovery:
 906          * 1) check for EDID on DDC
 907          * 2) check for VBT data
 908          * 3) check to see if LVDS is already on
 909          *    if none of the above, no panel
 910          * 4) make sure lid is open
 911          *    if closed, act like it's not there for now
 912          */
 913
 914         /* Set up the DDC bus. */
 915         intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
 916         if (!intel_encoder->ddc_bus) {
 917                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
 918                            "failed.\n");
 919                 goto failed;
 920         }
 921
 922         /*
 923          * Attempt to get the fixed panel mode from DDC.  Assume that the
 924          * preferred mode is the right one.
 925          */
 926         dev_priv->lvds_edid_good = true;
 927
 928         if (!intel_ddc_get_modes(connector, intel_encoder->ddc_bus))
 929                 dev_priv->lvds_edid_good = false;
 930
 931         list_for_each_entry(scan, &connector->probed_modes, head) {
 932                 mutex_lock(&dev->mode_config.mutex);
 933                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
 934                         dev_priv->panel_fixed_mode =
 935                                 drm_mode_duplicate(dev, scan);
 936                         mutex_unlock(&dev->mode_config.mutex);
 937                         intel_find_lvds_downclock(dev, connector);
 938                         goto out;
 939                 }
 940                 mutex_unlock(&dev->mode_config.mutex);
 941         }
 942
 943         /* Failed to get EDID, what about VBT? */
 944         if (dev_priv->lfp_lvds_vbt_mode) {
 945                 mutex_lock(&dev->mode_config.mutex);
 946                 dev_priv->panel_fixed_mode =
 947                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
 948                 mutex_unlock(&dev->mode_config.mutex);
 949                 if (dev_priv->panel_fixed_mode) {
 950                         dev_priv->panel_fixed_mode->type |=
 951                                 DRM_MODE_TYPE_PREFERRED;
 952                         goto out;
 953                 }
 954         }
 955
 956         /*
 957          * If we didn't get EDID, try checking if the panel is already turned
 958          * on.  If so, assume that whatever is currently programmed is the
 959          * correct mode.
 960          */
 961
 962         /* Ironlake: FIXME if still fail, not try pipe mode now */
 963         if (HAS_PCH_SPLIT(dev))
 964                 goto failed;
 965
 966         lvds = I915_READ(LVDS);
 967         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
 968         crtc = intel_get_crtc_for_pipe(dev, pipe);
 969
 970         if (crtc && (lvds & LVDS_PORT_EN)) {
 971                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
 972                 if (dev_priv->panel_fixed_mode) {
 973                         dev_priv->panel_fixed_mode->type |=
 974                                 DRM_MODE_TYPE_PREFERRED;
 975                         goto out;
 976                 }
 977         }
 978
 979         /* If we still don't have a mode after all that, give up. */
 980         if (!dev_priv->panel_fixed_mode)
 981                 goto failed;
 982
 983 out:
 984         if (HAS_PCH_SPLIT(dev)) {
 985                 u32 pwm;
 986                 /* make sure PWM is enabled */
 987                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
 988                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
 989                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
 990
 991                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
 992                 pwm |= PWM_PCH_ENABLE;
 993                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
 994         }
 995         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
 996         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
 997                 DRM_DEBUG_KMS("lid notifier registration failed\n");
 998                 dev_priv->lid_notifier.notifier_call = NULL;
 999         }
1000         /* keep the LVDS connector */
1001         dev_priv->int_lvds_connector = connector;
1002         drm_sysfs_connector_add(connector);
1003         return;
1004
1005 failed:
1006         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1007         if (intel_encoder->ddc_bus)
1008                 intel_i2c_destroy(intel_encoder->ddc_bus);
1009         drm_connector_cleanup(connector);
1010         drm_encoder_cleanup(encoder);
1011         kfree(intel_lvds);
1012         kfree(intel_connector);
1013 }