drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "drm_crtc.h"
  37 #include "drm_edid.h"
  38 #include "intel_drv.h"
  39 #include "i915_drm.h"
  40 #include "i915_drv.h"
  41 #include <linux/acpi.h>
  42
  43 /* Private structure for the integrated LVDS support */
  44 struct intel_lvds {
  45         struct intel_encoder base;
  46
  47         struct edid *edid;
  48
  49         int fitting_mode;
  50         u32 pfit_control;
  51         u32 pfit_pgm_ratios;
  52         bool pfit_dirty;
  53
  54         struct drm_display_mode *fixed_mode;
  55 };
  56
  57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  58 {
  59         return container_of(encoder, struct intel_lvds, base.base);
  60 }
  61
  62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  63 {
  64         return container_of(intel_attached_encoder(connector),
  65                             struct intel_lvds, base);
  66 }
  67
  68 /**
  69  * Sets the power state for the panel.
  70  */
  71 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
  72 {
  73         struct drm_device *dev = intel_lvds->base.base.dev;
  74         struct drm_i915_private *dev_priv = dev->dev_private;
  75         u32 ctl_reg, lvds_reg, stat_reg;
  76
  77         if (HAS_PCH_SPLIT(dev)) {
  78                 ctl_reg = PCH_PP_CONTROL;
  79                 lvds_reg = PCH_LVDS;
  80                 stat_reg = PCH_PP_STATUS;
  81         } else {
  82                 ctl_reg = PP_CONTROL;
  83                 lvds_reg = LVDS;
  84                 stat_reg = PP_STATUS;
  85         }
  86
  87         I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  88
  89         if (intel_lvds->pfit_dirty) {
  90                 /*
  91                  * Enable automatic panel scaling so that non-native modes
  92                  * fill the screen.  The panel fitter should only be
  93                  * adjusted whilst the pipe is disabled, according to
  94                  * register description and PRM.
  95                  */
  96                 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  97                               intel_lvds->pfit_control,
  98                               intel_lvds->pfit_pgm_ratios);
  99
 100                 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
 101                 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
 102                 intel_lvds->pfit_dirty = false;
 103         }
 104
 105         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 106         POSTING_READ(lvds_reg);
 107         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 108                 DRM_ERROR("timed out waiting for panel to power on\n");
 109
 110         intel_panel_enable_backlight(dev);
 111 }
 112
 113 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
 114 {
 115         struct drm_device *dev = intel_lvds->base.base.dev;
 116         struct drm_i915_private *dev_priv = dev->dev_private;
 117         u32 ctl_reg, lvds_reg, stat_reg;
 118
 119         if (HAS_PCH_SPLIT(dev)) {
 120                 ctl_reg = PCH_PP_CONTROL;
 121                 lvds_reg = PCH_LVDS;
 122                 stat_reg = PCH_PP_STATUS;
 123         } else {
 124                 ctl_reg = PP_CONTROL;
 125                 lvds_reg = LVDS;
 126                 stat_reg = PP_STATUS;
 127         }
 128
 129         intel_panel_disable_backlight(dev);
 130
 131         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 132         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 133                 DRM_ERROR("timed out waiting for panel to power off\n");
 134
 135         if (intel_lvds->pfit_control) {
 136                 I915_WRITE(PFIT_CONTROL, 0);
 137                 intel_lvds->pfit_dirty = true;
 138         }
 139
 140         I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
 141         POSTING_READ(lvds_reg);
 142 }
 143
 144 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 145 {
 146         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 147
 148         if (mode == DRM_MODE_DPMS_ON)
 149                 intel_lvds_enable(intel_lvds);
 150         else
 151                 intel_lvds_disable(intel_lvds);
 152
 153         /* XXX: We never power down the LVDS pairs. */
 154 }
 155
 156 static int intel_lvds_mode_valid(struct drm_connector *connector,
 157                                  struct drm_display_mode *mode)
 158 {
 159         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 160         struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
 161
 162         if (mode->hdisplay > fixed_mode->hdisplay)
 163                 return MODE_PANEL;
 164         if (mode->vdisplay > fixed_mode->vdisplay)
 165                 return MODE_PANEL;
 166
 167         return MODE_OK;
 168 }
 169
 170 static void
 171 centre_horizontally(struct drm_display_mode *mode,
 172                     int width)
 173 {
 174         u32 border, sync_pos, blank_width, sync_width;
 175
 176         /* keep the hsync and hblank widths constant */
 177         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 178         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 179         sync_pos = (blank_width - sync_width + 1) / 2;
 180
 181         border = (mode->hdisplay - width + 1) / 2;
 182         border += border & 1; /* make the border even */
 183
 184         mode->crtc_hdisplay = width;
 185         mode->crtc_hblank_start = width + border;
 186         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 187
 188         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 189         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 190 }
 191
 192 static void
 193 centre_vertically(struct drm_display_mode *mode,
 194                   int height)
 195 {
 196         u32 border, sync_pos, blank_width, sync_width;
 197
 198         /* keep the vsync and vblank widths constant */
 199         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 200         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 201         sync_pos = (blank_width - sync_width + 1) / 2;
 202
 203         border = (mode->vdisplay - height + 1) / 2;
 204
 205         mode->crtc_vdisplay = height;
 206         mode->crtc_vblank_start = height + border;
 207         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 208
 209         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 210         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 211 }
 212
 213 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 214 {
 215         /*
 216          * Floating point operation is not supported. So the FACTOR
 217          * is defined, which can avoid the floating point computation
 218          * when calculating the panel ratio.
 219          */
 220 #define ACCURACY 12
 221 #define FACTOR (1 << ACCURACY)
 222         u32 ratio = source * FACTOR / target;
 223         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 224 }
 225
 226 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 227                                   struct drm_display_mode *mode,
 228                                   struct drm_display_mode *adjusted_mode)
 229 {
 230         struct drm_device *dev = encoder->dev;
 231         struct drm_i915_private *dev_priv = dev->dev_private;
 232         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 233         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 234         struct drm_encoder *tmp_encoder;
 235         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 236         int pipe;
 237
 238         /* Should never happen!! */
 239         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 240                 DRM_ERROR("Can't support LVDS on pipe A\n");
 241                 return false;
 242         }
 243
 244         /* Should never happen!! */
 245         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 246                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 247                         DRM_ERROR("Can't enable LVDS and another "
 248                                "encoder on the same pipe\n");
 249                         return false;
 250                 }
 251         }
 252
 253         /*
 254          * We have timings from the BIOS for the panel, put them in
 255          * to the adjusted mode.  The CRTC will be set up for this mode,
 256          * with the panel scaling set up to source from the H/VDisplay
 257          * of the original mode.
 258          */
 259         intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
 260
 261         if (HAS_PCH_SPLIT(dev)) {
 262                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
 263                                         mode, adjusted_mode);
 264                 return true;
 265         }
 266
 267         /* Native modes don't need fitting */
 268         if (adjusted_mode->hdisplay == mode->hdisplay &&
 269             adjusted_mode->vdisplay == mode->vdisplay)
 270                 goto out;
 271
 272         /* 965+ wants fuzzy fitting */
 273         if (INTEL_INFO(dev)->gen >= 4)
 274                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 275                                  PFIT_FILTER_FUZZY);
 276
 277         /*
 278          * Enable automatic panel scaling for non-native modes so that they fill
 279          * the screen.  Should be enabled before the pipe is enabled, according
 280          * to register description and PRM.
 281          * Change the value here to see the borders for debugging
 282          */
 283         for_each_pipe(pipe)
 284                 I915_WRITE(BCLRPAT(pipe), 0);
 285
 286         switch (intel_lvds->fitting_mode) {
 287         case DRM_MODE_SCALE_CENTER:
 288                 /*
 289                  * For centered modes, we have to calculate border widths &
 290                  * heights and modify the values programmed into the CRTC.
 291                  */
 292                 centre_horizontally(adjusted_mode, mode->hdisplay);
 293                 centre_vertically(adjusted_mode, mode->vdisplay);
 294                 border = LVDS_BORDER_ENABLE;
 295                 break;
 296
 297         case DRM_MODE_SCALE_ASPECT:
 298                 /* Scale but preserve the aspect ratio */
 299                 if (INTEL_INFO(dev)->gen >= 4) {
 300                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 301                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 302
 303                         /* 965+ is easy, it does everything in hw */
 304                         if (scaled_width > scaled_height)
 305                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
 306                         else if (scaled_width < scaled_height)
 307                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
 308                         else if (adjusted_mode->hdisplay != mode->hdisplay)
 309                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 310                 } else {
 311                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 312                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 313                         /*
 314                          * For earlier chips we have to calculate the scaling
 315                          * ratio by hand and program it into the
 316                          * PFIT_PGM_RATIO register
 317                          */
 318                         if (scaled_width > scaled_height) { /* pillar */
 319                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
 320
 321                                 border = LVDS_BORDER_ENABLE;
 322                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 323                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 324                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 325                                                             bits << PFIT_VERT_SCALE_SHIFT);
 326                                         pfit_control |= (PFIT_ENABLE |
 327                                                          VERT_INTERP_BILINEAR |
 328                                                          HORIZ_INTERP_BILINEAR);
 329                                 }
 330                         } else if (scaled_width < scaled_height) { /* letter */
 331                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
 332
 333                                 border = LVDS_BORDER_ENABLE;
 334                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 335                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 336                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 337                                                             bits << PFIT_VERT_SCALE_SHIFT);
 338                                         pfit_control |= (PFIT_ENABLE |
 339                                                          VERT_INTERP_BILINEAR |
 340                                                          HORIZ_INTERP_BILINEAR);
 341                                 }
 342                         } else
 343                                 /* Aspects match, Let hw scale both directions */
 344                                 pfit_control |= (PFIT_ENABLE |
 345                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 346                                                  VERT_INTERP_BILINEAR |
 347                                                  HORIZ_INTERP_BILINEAR);
 348                 }
 349                 break;
 350
 351         case DRM_MODE_SCALE_FULLSCREEN:
 352                 /*
 353                  * Full scaling, even if it changes the aspect ratio.
 354                  * Fortunately this is all done for us in hw.
 355                  */
 356                 if (mode->vdisplay != adjusted_mode->vdisplay ||
 357                     mode->hdisplay != adjusted_mode->hdisplay) {
 358                         pfit_control |= PFIT_ENABLE;
 359                         if (INTEL_INFO(dev)->gen >= 4)
 360                                 pfit_control |= PFIT_SCALING_AUTO;
 361                         else
 362                                 pfit_control |= (VERT_AUTO_SCALE |
 363                                                  VERT_INTERP_BILINEAR |
 364                                                  HORIZ_AUTO_SCALE |
 365                                                  HORIZ_INTERP_BILINEAR);
 366                 }
 367                 break;
 368
 369         default:
 370                 break;
 371         }
 372
 373 out:
 374         /* If not enabling scaling, be consistent and always use 0. */
 375         if ((pfit_control & PFIT_ENABLE) == 0) {
 376                 pfit_control = 0;
 377                 pfit_pgm_ratios = 0;
 378         }
 379
 380         /* Make sure pre-965 set dither correctly */
 381         if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
 382                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 383
 384         if (pfit_control != intel_lvds->pfit_control ||
 385             pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
 386                 intel_lvds->pfit_control = pfit_control;
 387                 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
 388                 intel_lvds->pfit_dirty = true;
 389         }
 390         dev_priv->lvds_border_bits = border;
 391
 392         /*
 393          * XXX: It would be nice to support lower refresh rates on the
 394          * panels to reduce power consumption, and perhaps match the
 395          * user's requested refresh rate.
 396          */
 397
 398         return true;
 399 }
 400
 401 static void intel_lvds_prepare(struct drm_encoder *encoder)
 402 {
 403         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 404
 405         intel_lvds_disable(intel_lvds);
 406 }
 407
 408 static void intel_lvds_commit(struct drm_encoder *encoder)
 409 {
 410         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 411
 412         /* Always do a full power on as we do not know what state
 413          * we were left in.
 414          */
 415         intel_lvds_enable(intel_lvds);
 416 }
 417
 418 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 419                                 struct drm_display_mode *mode,
 420                                 struct drm_display_mode *adjusted_mode)
 421 {
 422         /*
 423          * The LVDS pin pair will already have been turned on in the
 424          * intel_crtc_mode_set since it has a large impact on the DPLL
 425          * settings.
 426          */
 427 }
 428
 429 /**
 430  * Detect the LVDS connection.
 431  *
 432  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 433  * connected and closed means disconnected.  We also send hotplug events as
 434  * needed, using lid status notification from the input layer.
 435  */
 436 static enum drm_connector_status
 437 intel_lvds_detect(struct drm_connector *connector, bool force)
 438 {
 439         struct drm_device *dev = connector->dev;
 440         enum drm_connector_status status;
 441
 442         status = intel_panel_detect(dev);
 443         if (status != connector_status_unknown)
 444                 return status;
 445
 446         return connector_status_connected;
 447 }
 448
 449 /**
 450  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 451  */
 452 static int intel_lvds_get_modes(struct drm_connector *connector)
 453 {
 454         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 455         struct drm_device *dev = connector->dev;
 456         struct drm_display_mode *mode;
 457
 458         if (intel_lvds->edid)
 459                 return drm_add_edid_modes(connector, intel_lvds->edid);
 460
 461         mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
 462         if (mode == NULL)
 463                 return 0;
 464
 465         drm_mode_probed_add(connector, mode);
 466         return 1;
 467 }
 468
 469 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 470 {
 471         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
 472         return 1;
 473 }
 474
 475 /* The GPU hangs up on these systems if modeset is performed on LID open */
 476 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 477         {
 478                 .callback = intel_no_modeset_on_lid_dmi_callback,
 479                 .ident = "Toshiba Tecra A11",
 480                 .matches = {
 481                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 482                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 483                 },
 484         },
 485
 486         { }     /* terminating entry */
 487 };
 488
 489 /*
 490  * Lid events. Note the use of 'modeset_on_lid':
 491  *  - we set it on lid close, and reset it on open
 492  *  - we use it as a "only once" bit (ie we ignore
 493  *    duplicate events where it was already properly
 494  *    set/reset)
 495  *  - the suspend/resume paths will also set it to
 496  *    zero, since they restore the mode ("lid open").
 497  */
 498 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 499                             void *unused)
 500 {
 501         struct drm_i915_private *dev_priv =
 502                 container_of(nb, struct drm_i915_private, lid_notifier);
 503         struct drm_device *dev = dev_priv->dev;
 504         struct drm_connector *connector = dev_priv->int_lvds_connector;
 505
 506         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 507                 return NOTIFY_OK;
 508
 509         /*
 510          * check and update the status of LVDS connector after receiving
 511          * the LID nofication event.
 512          */
 513         if (connector)
 514                 connector->status = connector->funcs->detect(connector,
 515                                                              false);
 516
 517         /* Don't force modeset on machines where it causes a GPU lockup */
 518         if (dmi_check_system(intel_no_modeset_on_lid))
 519                 return NOTIFY_OK;
 520         if (!acpi_lid_open()) {
 521                 dev_priv->modeset_on_lid = 1;
 522                 return NOTIFY_OK;
 523         }
 524
 525         if (!dev_priv->modeset_on_lid)
 526                 return NOTIFY_OK;
 527
 528         dev_priv->modeset_on_lid = 0;
 529
 530         mutex_lock(&dev->mode_config.mutex);
 531         drm_helper_resume_force_mode(dev);
 532         i915_redisable_vga(dev);
 533         mutex_unlock(&dev->mode_config.mutex);
 534
 535         return NOTIFY_OK;
 536 }
 537
 538 /**
 539  * intel_lvds_destroy - unregister and free LVDS structures
 540  * @connector: connector to free
 541  *
 542  * Unregister the DDC bus for this connector then free the driver private
 543  * structure.
 544  */
 545 static void intel_lvds_destroy(struct drm_connector *connector)
 546 {
 547         struct drm_device *dev = connector->dev;
 548         struct drm_i915_private *dev_priv = dev->dev_private;
 549
 550         if (dev_priv->lid_notifier.notifier_call)
 551                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 552         drm_sysfs_connector_remove(connector);
 553         drm_connector_cleanup(connector);
 554         kfree(connector);
 555 }
 556
 557 static int intel_lvds_set_property(struct drm_connector *connector,
 558                                    struct drm_property *property,
 559                                    uint64_t value)
 560 {
 561         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 562         struct drm_device *dev = connector->dev;
 563
 564         if (property == dev->mode_config.scaling_mode_property) {
 565                 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
 566
 567                 if (value == DRM_MODE_SCALE_NONE) {
 568                         DRM_DEBUG_KMS("no scaling not supported\n");
 569                         return -EINVAL;
 570                 }
 571
 572                 if (intel_lvds->fitting_mode == value) {
 573                         /* the LVDS scaling property is not changed */
 574                         return 0;
 575                 }
 576                 intel_lvds->fitting_mode = value;
 577                 if (crtc && crtc->enabled) {
 578                         /*
 579                          * If the CRTC is enabled, the display will be changed
 580                          * according to the new panel fitting mode.
 581                          */
 582                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 583                                 crtc->x, crtc->y, crtc->fb);
 584                 }
 585         }
 586
 587         return 0;
 588 }
 589
 590 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 591         .dpms = intel_lvds_dpms,
 592         .mode_fixup = intel_lvds_mode_fixup,
 593         .prepare = intel_lvds_prepare,
 594         .mode_set = intel_lvds_mode_set,
 595         .commit = intel_lvds_commit,
 596 };
 597
 598 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 599         .get_modes = intel_lvds_get_modes,
 600         .mode_valid = intel_lvds_mode_valid,
 601         .best_encoder = intel_best_encoder,
 602 };
 603
 604 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 605         .dpms = drm_helper_connector_dpms,
 606         .detect = intel_lvds_detect,
 607         .fill_modes = drm_helper_probe_single_connector_modes,
 608         .set_property = intel_lvds_set_property,
 609         .destroy = intel_lvds_destroy,
 610 };
 611
 612 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 613         .destroy = intel_encoder_destroy,
 614 };
 615
 616 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 617 {
 618         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 619         return 1;
 620 }
 621
 622 /* These systems claim to have LVDS, but really don't */
 623 static const struct dmi_system_id intel_no_lvds[] = {
 624         {
 625                 .callback = intel_no_lvds_dmi_callback,
 626                 .ident = "Apple Mac Mini (Core series)",
 627                 .matches = {
 628                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 629                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 630                 },
 631         },
 632         {
 633                 .callback = intel_no_lvds_dmi_callback,
 634                 .ident = "Apple Mac Mini (Core 2 series)",
 635                 .matches = {
 636                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 637                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 638                 },
 639         },
 640         {
 641                 .callback = intel_no_lvds_dmi_callback,
 642                 .ident = "MSI IM-945GSE-A",
 643                 .matches = {
 644                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 645                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 646                 },
 647         },
 648         {
 649                 .callback = intel_no_lvds_dmi_callback,
 650                 .ident = "Dell Studio Hybrid",
 651                 .matches = {
 652                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 653                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 654                 },
 655         },
 656         {
 657                 .callback = intel_no_lvds_dmi_callback,
 658                 .ident = "Dell OptiPlex FX170",
 659                 .matches = {
 660                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 661                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 662                 },
 663         },
 664         {
 665                 .callback = intel_no_lvds_dmi_callback,
 666                 .ident = "AOpen Mini PC",
 667                 .matches = {
 668                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 669                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 670                 },
 671         },
 672         {
 673                 .callback = intel_no_lvds_dmi_callback,
 674                 .ident = "AOpen Mini PC MP915",
 675                 .matches = {
 676                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 677                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 678                 },
 679         },
 680         {
 681                 .callback = intel_no_lvds_dmi_callback,
 682                 .ident = "AOpen i915GMm-HFS",
 683                 .matches = {
 684                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 685                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 686                 },
 687         },
 688         {
 689                 .callback = intel_no_lvds_dmi_callback,
 690                 .ident = "AOpen i45GMx-I",
 691                 .matches = {
 692                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 693                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 694                 },
 695         },
 696         {
 697                 .callback = intel_no_lvds_dmi_callback,
 698                 .ident = "Aopen i945GTt-VFA",
 699                 .matches = {
 700                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 701                 },
 702         },
 703         {
 704                 .callback = intel_no_lvds_dmi_callback,
 705                 .ident = "Clientron U800",
 706                 .matches = {
 707                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 708                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 709                 },
 710         },
 711         {
 712                 .callback = intel_no_lvds_dmi_callback,
 713                 .ident = "Clientron E830",
 714                 .matches = {
 715                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 716                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 717                 },
 718         },
 719         {
 720                 .callback = intel_no_lvds_dmi_callback,
 721                 .ident = "Asus EeeBox PC EB1007",
 722                 .matches = {
 723                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 724                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 725                 },
 726         },
 727         {
 728                 .callback = intel_no_lvds_dmi_callback,
 729                 .ident = "Asus AT5NM10T-I",
 730                 .matches = {
 731                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 732                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 733                 },
 734         },
 735         {
 736                 .callback = intel_no_lvds_dmi_callback,
 737                 .ident = "Hewlett-Packard HP t5740",
 738                 .matches = {
 739                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 740                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 741                 },
 742         },
 743         {
 744                 .callback = intel_no_lvds_dmi_callback,
 745                 .ident = "Hewlett-Packard t5745",
 746                 .matches = {
 747                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 748                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 749                 },
 750         },
 751         {
 752                 .callback = intel_no_lvds_dmi_callback,
 753                 .ident = "Hewlett-Packard st5747",
 754                 .matches = {
 755                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 756                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 757                 },
 758         },
 759         {
 760                 .callback = intel_no_lvds_dmi_callback,
 761                 .ident = "MSI Wind Box DC500",
 762                 .matches = {
 763                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 764                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 765                 },
 766         },
 767         {
 768                 .callback = intel_no_lvds_dmi_callback,
 769                 .ident = "Gigabyte GA-D525TUD",
 770                 .matches = {
 771                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 772                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 773                 },
 774         },
 775         {
 776                 .callback = intel_no_lvds_dmi_callback,
 777                 .ident = "Supermicro X7SPA-H",
 778                 .matches = {
 779                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 780                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 781                 },
 782         },
 783         {
 784                 .callback = intel_no_lvds_dmi_callback,
 785                 .ident = "Fujitsu Esprimo Q900",
 786                 .matches = {
 787                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 788                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 789                 },
 790         },
 791
 792         { }     /* terminating entry */
 793 };
 794
 795 /**
 796  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 797  * @dev: drm device
 798  * @connector: LVDS connector
 799  *
 800  * Find the reduced downclock for LVDS in EDID.
 801  */
 802 static void intel_find_lvds_downclock(struct drm_device *dev,
 803                                       struct drm_display_mode *fixed_mode,
 804                                       struct drm_connector *connector)
 805 {
 806         struct drm_i915_private *dev_priv = dev->dev_private;
 807         struct drm_display_mode *scan;
 808         int temp_downclock;
 809
 810         temp_downclock = fixed_mode->clock;
 811         list_for_each_entry(scan, &connector->probed_modes, head) {
 812                 /*
 813                  * If one mode has the same resolution with the fixed_panel
 814                  * mode while they have the different refresh rate, it means
 815                  * that the reduced downclock is found for the LVDS. In such
 816                  * case we can set the different FPx0/1 to dynamically select
 817                  * between low and high frequency.
 818                  */
 819                 if (scan->hdisplay == fixed_mode->hdisplay &&
 820                     scan->hsync_start == fixed_mode->hsync_start &&
 821                     scan->hsync_end == fixed_mode->hsync_end &&
 822                     scan->htotal == fixed_mode->htotal &&
 823                     scan->vdisplay == fixed_mode->vdisplay &&
 824                     scan->vsync_start == fixed_mode->vsync_start &&
 825                     scan->vsync_end == fixed_mode->vsync_end &&
 826                     scan->vtotal == fixed_mode->vtotal) {
 827                         if (scan->clock < temp_downclock) {
 828                                 /*
 829                                  * The downclock is already found. But we
 830                                  * expect to find the lower downclock.
 831                                  */
 832                                 temp_downclock = scan->clock;
 833                         }
 834                 }
 835         }
 836         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
 837                 /* We found the downclock for LVDS. */
 838                 dev_priv->lvds_downclock_avail = 1;
 839                 dev_priv->lvds_downclock = temp_downclock;
 840                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 841                               "Normal clock %dKhz, downclock %dKhz\n",
 842                               fixed_mode->clock, temp_downclock);
 843         }
 844 }
 845
 846 /*
 847  * Enumerate the child dev array parsed from VBT to check whether
 848  * the LVDS is present.
 849  * If it is present, return 1.
 850  * If it is not present, return false.
 851  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 852  */
 853 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 854                                    u8 *i2c_pin)
 855 {
 856         struct drm_i915_private *dev_priv = dev->dev_private;
 857         int i;
 858
 859         if (!dev_priv->child_dev_num)
 860                 return true;
 861
 862         for (i = 0; i < dev_priv->child_dev_num; i++) {
 863                 struct child_device_config *child = dev_priv->child_dev + i;
 864
 865                 /* If the device type is not LFP, continue.
 866                  * We have to check both the new identifiers as well as the
 867                  * old for compatibility with some BIOSes.
 868                  */
 869                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 870                     child->device_type != DEVICE_TYPE_LFP)
 871                         continue;
 872
 873                 if (child->i2c_pin)
 874                     *i2c_pin = child->i2c_pin;
 875
 876                 /* However, we cannot trust the BIOS writers to populate
 877                  * the VBT correctly.  Since LVDS requires additional
 878                  * information from AIM blocks, a non-zero addin offset is
 879                  * a good indicator that the LVDS is actually present.
 880                  */
 881                 if (child->addin_offset)
 882                         return true;
 883
 884                 /* But even then some BIOS writers perform some black magic
 885                  * and instantiate the device without reference to any
 886                  * additional data.  Trust that if the VBT was written into
 887                  * the OpRegion then they have validated the LVDS's existence.
 888                  */
 889                 if (dev_priv->opregion.vbt)
 890                         return true;
 891         }
 892
 893         return false;
 894 }
 895
 896 /**
 897  * intel_lvds_init - setup LVDS connectors on this device
 898  * @dev: drm device
 899  *
 900  * Create the connector, register the LVDS DDC bus, and try to figure out what
 901  * modes we can display on the LVDS panel (if present).
 902  */
 903 bool intel_lvds_init(struct drm_device *dev)
 904 {
 905         struct drm_i915_private *dev_priv = dev->dev_private;
 906         struct intel_lvds *intel_lvds;
 907         struct intel_encoder *intel_encoder;
 908         struct intel_connector *intel_connector;
 909         struct drm_connector *connector;
 910         struct drm_encoder *encoder;
 911         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 912         struct drm_crtc *crtc;
 913         u32 lvds;
 914         int pipe;
 915         u8 pin;
 916
 917         /*
 918          * Unlock registers and just leave them unlocked. Do this before
 919          * checking quirk lists to avoid bogus WARNINGs.
 920          */
 921         if (HAS_PCH_SPLIT(dev)) {
 922                 I915_WRITE(PCH_PP_CONTROL,
 923                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
 924         } else {
 925                 I915_WRITE(PP_CONTROL,
 926                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
 927         }
 928
 929         /* Skip init on machines we know falsely report LVDS */
 930         if (dmi_check_system(intel_no_lvds))
 931                 return false;
 932
 933         pin = GMBUS_PORT_PANEL;
 934         if (!lvds_is_present_in_vbt(dev, &pin)) {
 935                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 936                 return false;
 937         }
 938
 939         if (HAS_PCH_SPLIT(dev)) {
 940                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 941                         return false;
 942                 if (dev_priv->edp.support) {
 943                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 944                         return false;
 945                 }
 946         }
 947
 948         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
 949         if (!intel_lvds) {
 950                 return false;
 951         }
 952
 953         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 954         if (!intel_connector) {
 955                 kfree(intel_lvds);
 956                 return false;
 957         }
 958
 959         if (!HAS_PCH_SPLIT(dev)) {
 960                 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
 961         }
 962
 963         intel_encoder = &intel_lvds->base;
 964         encoder = &intel_encoder->base;
 965         connector = &intel_connector->base;
 966         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 967                            DRM_MODE_CONNECTOR_LVDS);
 968
 969         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 970                          DRM_MODE_ENCODER_LVDS);
 971
 972         intel_connector_attach_encoder(intel_connector, intel_encoder);
 973         intel_encoder->type = INTEL_OUTPUT_LVDS;
 974
 975         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 976         if (HAS_PCH_SPLIT(dev))
 977                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 978         else
 979                 intel_encoder->crtc_mask = (1 << 1);
 980
 981         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 982         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 983         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 984         connector->interlace_allowed = false;
 985         connector->doublescan_allowed = false;
 986
 987         /* create the scaling mode property */
 988         drm_mode_create_scaling_mode_property(dev);
 989         /*
 990          * the initial panel fitting mode will be FULL_SCREEN.
 991          */
 992
 993         drm_connector_attach_property(&intel_connector->base,
 994                                       dev->mode_config.scaling_mode_property,
 995                                       DRM_MODE_SCALE_ASPECT);
 996         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
 997         /*
 998          * LVDS discovery:
 999          * 1) check for EDID on DDC
1000          * 2) check for VBT data
1001          * 3) check to see if LVDS is already on
1002          *    if none of the above, no panel
1003          * 4) make sure lid is open
1004          *    if closed, act like it's not there for now
1005          */
1006
1007         /*
1008          * Attempt to get the fixed panel mode from DDC.  Assume that the
1009          * preferred mode is the right one.
1010          */
1011         intel_lvds->edid = drm_get_edid(connector,
1012                                         &dev_priv->gmbus[pin].adapter);
1013         if (intel_lvds->edid) {
1014                 if (drm_add_edid_modes(connector,
1015                                        intel_lvds->edid)) {
1016                         drm_mode_connector_update_edid_property(connector,
1017                                                                 intel_lvds->edid);
1018                 } else {
1019                         kfree(intel_lvds->edid);
1020                         intel_lvds->edid = NULL;
1021                 }
1022         }
1023         if (!intel_lvds->edid) {
1024                 /* Didn't get an EDID, so
1025                  * Set wide sync ranges so we get all modes
1026                  * handed to valid_mode for checking
1027                  */
1028                 connector->display_info.min_vfreq = 0;
1029                 connector->display_info.max_vfreq = 200;
1030                 connector->display_info.min_hfreq = 0;
1031                 connector->display_info.max_hfreq = 200;
1032         }
1033
1034         list_for_each_entry(scan, &connector->probed_modes, head) {
1035                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1036                         intel_lvds->fixed_mode =
1037                                 drm_mode_duplicate(dev, scan);
1038                         intel_find_lvds_downclock(dev,
1039                                                   intel_lvds->fixed_mode,
1040                                                   connector);
1041                         goto out;
1042                 }
1043         }
1044
1045         /* Failed to get EDID, what about VBT? */
1046         if (dev_priv->lfp_lvds_vbt_mode) {
1047                 intel_lvds->fixed_mode =
1048                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1049                 if (intel_lvds->fixed_mode) {
1050                         intel_lvds->fixed_mode->type |=
1051                                 DRM_MODE_TYPE_PREFERRED;
1052                         goto out;
1053                 }
1054         }
1055
1056         /*
1057          * If we didn't get EDID, try checking if the panel is already turned
1058          * on.  If so, assume that whatever is currently programmed is the
1059          * correct mode.
1060          */
1061
1062         /* Ironlake: FIXME if still fail, not try pipe mode now */
1063         if (HAS_PCH_SPLIT(dev))
1064                 goto failed;
1065
1066         lvds = I915_READ(LVDS);
1067         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1068         crtc = intel_get_crtc_for_pipe(dev, pipe);
1069
1070         if (crtc && (lvds & LVDS_PORT_EN)) {
1071                 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1072                 if (intel_lvds->fixed_mode) {
1073                         intel_lvds->fixed_mode->type |=
1074                                 DRM_MODE_TYPE_PREFERRED;
1075                         goto out;
1076                 }
1077         }
1078
1079         /* If we still don't have a mode after all that, give up. */
1080         if (!intel_lvds->fixed_mode)
1081                 goto failed;
1082
1083 out:
1084         if (HAS_PCH_SPLIT(dev) &&
1085             !(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
1086                 u32 pwm;
1087
1088                 pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
1089
1090                 /* make sure PWM is enabled and locked to the LVDS pipe */
1091                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1092                 if (pipe == 0 && (pwm & PWM_PIPE_B))
1093                         I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
1094                 if (pipe)
1095                         pwm |= PWM_PIPE_B;
1096                 else
1097                         pwm &= ~PWM_PIPE_B;
1098                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
1099
1100                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1101                 pwm |= PWM_PCH_ENABLE;
1102                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1103         }
1104         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1105         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1106                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1107                 dev_priv->lid_notifier.notifier_call = NULL;
1108         }
1109         /* keep the LVDS connector */
1110         dev_priv->int_lvds_connector = connector;
1111         drm_sysfs_connector_add(connector);
1112
1113         intel_panel_setup_backlight(dev);
1114
1115         return true;
1116
1117 failed:
1118         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1119         drm_connector_cleanup(connector);
1120         drm_encoder_cleanup(encoder);
1121         kfree(intel_lvds);
1122         kfree(intel_connector);
1123         return false;
1124 }