drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "drm_crtc.h"
  37 #include "drm_edid.h"
  38 #include "intel_drv.h"
  39 #include "i915_drm.h"
  40 #include "i915_drv.h"
  41 #include <linux/acpi.h>
  42
  43 /* Private structure for the integrated LVDS support */
  44 struct intel_lvds {
  45         struct intel_encoder base;
  46         int fitting_mode;
  47         u32 pfit_control;
  48         u32 pfit_pgm_ratios;
  49 };
  50
  51 static struct intel_lvds *enc_to_intel_lvds(struct drm_encoder *encoder)
  52 {
  53         return container_of(encoder, struct intel_lvds, base.base);
  54 }
  55
  56 static void intel_lvds_lock_panel(struct drm_device *dev, bool lock)
  57 {
  58         struct drm_i915_private *dev_priv = dev->dev_private;
  59
  60         if (lock)
  61                 I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3);
  62         else
  63                 I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  64 }
  65
  66 /**
  67  * Sets the power state for the panel.
  68  */
  69 static void intel_lvds_set_power(struct drm_device *dev, bool on)
  70 {
  71         struct drm_i915_private *dev_priv = dev->dev_private;
  72         u32 ctl_reg, status_reg, lvds_reg;
  73
  74         if (HAS_PCH_SPLIT(dev)) {
  75                 ctl_reg = PCH_PP_CONTROL;
  76                 status_reg = PCH_PP_STATUS;
  77                 lvds_reg = PCH_LVDS;
  78         } else {
  79                 ctl_reg = PP_CONTROL;
  80                 status_reg = PP_STATUS;
  81                 lvds_reg = LVDS;
  82         }
  83
  84         if (on) {
  85                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  86                 POSTING_READ(lvds_reg);
  87
  88                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
  89                            POWER_TARGET_ON);
  90                 if (wait_for(I915_READ(status_reg) & PP_ON, 1000))
  91                         DRM_ERROR("timed out waiting to enable LVDS pipe");
  92
  93                 intel_panel_set_backlight(dev, dev_priv->backlight_level);
  94         } else {
  95                 intel_panel_set_backlight(dev, 0);
  96
  97                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
  98                            ~POWER_TARGET_ON);
  99                 if (wait_for((I915_READ(status_reg) & PP_ON) == 0, 1000))
 100                         DRM_ERROR("timed out waiting for LVDS pipe to turn off");
 101
 102                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
 103                 POSTING_READ(lvds_reg);
 104         }
 105 }
 106
 107 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 108 {
 109         struct drm_device *dev = encoder->dev;
 110
 111         if (mode == DRM_MODE_DPMS_ON)
 112                 intel_lvds_set_power(dev, true);
 113         else
 114                 intel_lvds_set_power(dev, false);
 115
 116         /* XXX: We never power down the LVDS pairs. */
 117 }
 118
 119 static int intel_lvds_mode_valid(struct drm_connector *connector,
 120                                  struct drm_display_mode *mode)
 121 {
 122         struct drm_device *dev = connector->dev;
 123         struct drm_i915_private *dev_priv = dev->dev_private;
 124         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
 125
 126         if (fixed_mode) {
 127                 if (mode->hdisplay > fixed_mode->hdisplay)
 128                         return MODE_PANEL;
 129                 if (mode->vdisplay > fixed_mode->vdisplay)
 130                         return MODE_PANEL;
 131         }
 132
 133         return MODE_OK;
 134 }
 135
 136 static void
 137 centre_horizontally(struct drm_display_mode *mode,
 138                     int width)
 139 {
 140         u32 border, sync_pos, blank_width, sync_width;
 141
 142         /* keep the hsync and hblank widths constant */
 143         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 144         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 145         sync_pos = (blank_width - sync_width + 1) / 2;
 146
 147         border = (mode->hdisplay - width + 1) / 2;
 148         border += border & 1; /* make the border even */
 149
 150         mode->crtc_hdisplay = width;
 151         mode->crtc_hblank_start = width + border;
 152         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 153
 154         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 155         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 156 }
 157
 158 static void
 159 centre_vertically(struct drm_display_mode *mode,
 160                   int height)
 161 {
 162         u32 border, sync_pos, blank_width, sync_width;
 163
 164         /* keep the vsync and vblank widths constant */
 165         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 166         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 167         sync_pos = (blank_width - sync_width + 1) / 2;
 168
 169         border = (mode->vdisplay - height + 1) / 2;
 170
 171         mode->crtc_vdisplay = height;
 172         mode->crtc_vblank_start = height + border;
 173         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 174
 175         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 176         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 177 }
 178
 179 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 180 {
 181         /*
 182          * Floating point operation is not supported. So the FACTOR
 183          * is defined, which can avoid the floating point computation
 184          * when calculating the panel ratio.
 185          */
 186 #define ACCURACY 12
 187 #define FACTOR (1 << ACCURACY)
 188         u32 ratio = source * FACTOR / target;
 189         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 190 }
 191
 192 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 193                                   struct drm_display_mode *mode,
 194                                   struct drm_display_mode *adjusted_mode)
 195 {
 196         struct drm_device *dev = encoder->dev;
 197         struct drm_i915_private *dev_priv = dev->dev_private;
 198         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 199         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 200         struct drm_encoder *tmp_encoder;
 201         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 202
 203         /* Should never happen!! */
 204         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
 205                 DRM_ERROR("Can't support LVDS on pipe A\n");
 206                 return false;
 207         }
 208
 209         /* Should never happen!! */
 210         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 211                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 212                         DRM_ERROR("Can't enable LVDS and another "
 213                                "encoder on the same pipe\n");
 214                         return false;
 215                 }
 216         }
 217         /* If we don't have a panel mode, there is nothing we can do */
 218         if (dev_priv->panel_fixed_mode == NULL)
 219                 return true;
 220
 221         /*
 222          * We have timings from the BIOS for the panel, put them in
 223          * to the adjusted mode.  The CRTC will be set up for this mode,
 224          * with the panel scaling set up to source from the H/VDisplay
 225          * of the original mode.
 226          */
 227         intel_fixed_panel_mode(dev_priv->panel_fixed_mode, adjusted_mode);
 228
 229         if (HAS_PCH_SPLIT(dev)) {
 230                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
 231                                         mode, adjusted_mode);
 232                 return true;
 233         }
 234
 235         /* Make sure pre-965s set dither correctly */
 236         if (!IS_I965G(dev)) {
 237                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
 238                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 239         }
 240
 241         /* Native modes don't need fitting */
 242         if (adjusted_mode->hdisplay == mode->hdisplay &&
 243             adjusted_mode->vdisplay == mode->vdisplay)
 244                 goto out;
 245
 246         /* 965+ wants fuzzy fitting */
 247         if (IS_I965G(dev))
 248                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 249                                  PFIT_FILTER_FUZZY);
 250
 251         /*
 252          * Enable automatic panel scaling for non-native modes so that they fill
 253          * the screen.  Should be enabled before the pipe is enabled, according
 254          * to register description and PRM.
 255          * Change the value here to see the borders for debugging
 256          */
 257         I915_WRITE(BCLRPAT_A, 0);
 258         I915_WRITE(BCLRPAT_B, 0);
 259
 260         switch (intel_lvds->fitting_mode) {
 261         case DRM_MODE_SCALE_CENTER:
 262                 /*
 263                  * For centered modes, we have to calculate border widths &
 264                  * heights and modify the values programmed into the CRTC.
 265                  */
 266                 centre_horizontally(adjusted_mode, mode->hdisplay);
 267                 centre_vertically(adjusted_mode, mode->vdisplay);
 268                 border = LVDS_BORDER_ENABLE;
 269                 break;
 270
 271         case DRM_MODE_SCALE_ASPECT:
 272                 /* Scale but preserve the aspect ratio */
 273                 if (IS_I965G(dev)) {
 274                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 275                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 276
 277                         pfit_control |= PFIT_ENABLE;
 278                         /* 965+ is easy, it does everything in hw */
 279                         if (scaled_width > scaled_height)
 280                                 pfit_control |= PFIT_SCALING_PILLAR;
 281                         else if (scaled_width < scaled_height)
 282                                 pfit_control |= PFIT_SCALING_LETTER;
 283                         else
 284                                 pfit_control |= PFIT_SCALING_AUTO;
 285                 } else {
 286                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 287                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 288                         /*
 289                          * For earlier chips we have to calculate the scaling
 290                          * ratio by hand and program it into the
 291                          * PFIT_PGM_RATIO register
 292                          */
 293                         if (scaled_width > scaled_height) { /* pillar */
 294                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
 295
 296                                 border = LVDS_BORDER_ENABLE;
 297                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 298                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 299                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 300                                                             bits << PFIT_VERT_SCALE_SHIFT);
 301                                         pfit_control |= (PFIT_ENABLE |
 302                                                          VERT_INTERP_BILINEAR |
 303                                                          HORIZ_INTERP_BILINEAR);
 304                                 }
 305                         } else if (scaled_width < scaled_height) { /* letter */
 306                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
 307
 308                                 border = LVDS_BORDER_ENABLE;
 309                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 310                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 311                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 312                                                             bits << PFIT_VERT_SCALE_SHIFT);
 313                                         pfit_control |= (PFIT_ENABLE |
 314                                                          VERT_INTERP_BILINEAR |
 315                                                          HORIZ_INTERP_BILINEAR);
 316                                 }
 317                         } else
 318                                 /* Aspects match, Let hw scale both directions */
 319                                 pfit_control |= (PFIT_ENABLE |
 320                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 321                                                  VERT_INTERP_BILINEAR |
 322                                                  HORIZ_INTERP_BILINEAR);
 323                 }
 324                 break;
 325
 326         case DRM_MODE_SCALE_FULLSCREEN:
 327                 /*
 328                  * Full scaling, even if it changes the aspect ratio.
 329                  * Fortunately this is all done for us in hw.
 330                  */
 331                 pfit_control |= PFIT_ENABLE;
 332                 if (IS_I965G(dev))
 333                         pfit_control |= PFIT_SCALING_AUTO;
 334                 else
 335                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 336                                          VERT_INTERP_BILINEAR |
 337                                          HORIZ_INTERP_BILINEAR);
 338                 break;
 339
 340         default:
 341                 break;
 342         }
 343
 344 out:
 345         intel_lvds->pfit_control = pfit_control;
 346         intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
 347         dev_priv->lvds_border_bits = border;
 348
 349         /*
 350          * XXX: It would be nice to support lower refresh rates on the
 351          * panels to reduce power consumption, and perhaps match the
 352          * user's requested refresh rate.
 353          */
 354
 355         return true;
 356 }
 357
 358 static void intel_lvds_prepare(struct drm_encoder *encoder)
 359 {
 360         struct drm_device *dev = encoder->dev;
 361         struct drm_i915_private *dev_priv = dev->dev_private;
 362         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 363
 364         dev_priv->backlight_level = intel_panel_get_backlight(dev);
 365
 366         if (intel_lvds->pfit_control == I915_READ(PFIT_CONTROL))
 367                 intel_lvds_lock_panel(dev, false);
 368         else
 369                 intel_lvds_set_power(dev, false);
 370 }
 371
 372 static void intel_lvds_commit( struct drm_encoder *encoder)
 373 {
 374         struct drm_device *dev = encoder->dev;
 375         struct drm_i915_private *dev_priv = dev->dev_private;
 376
 377         if (dev_priv->backlight_level == 0)
 378                 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
 379
 380         if ((I915_READ(PP_CONTROL) & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
 381                 intel_lvds_lock_panel(dev, true);
 382         else
 383                 intel_lvds_set_power(dev, true);
 384 }
 385
 386 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 387                                 struct drm_display_mode *mode,
 388                                 struct drm_display_mode *adjusted_mode)
 389 {
 390         struct drm_device *dev = encoder->dev;
 391         struct drm_i915_private *dev_priv = dev->dev_private;
 392         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 393
 394         /*
 395          * The LVDS pin pair will already have been turned on in the
 396          * intel_crtc_mode_set since it has a large impact on the DPLL
 397          * settings.
 398          */
 399
 400         if (HAS_PCH_SPLIT(dev))
 401                 return;
 402
 403         /*
 404          * Enable automatic panel scaling so that non-native modes fill the
 405          * screen.  Should be enabled before the pipe is enabled, according to
 406          * register description and PRM.
 407          */
 408         I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
 409         I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
 410 }
 411
 412 /**
 413  * Detect the LVDS connection.
 414  *
 415  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 416  * connected and closed means disconnected.  We also send hotplug events as
 417  * needed, using lid status notification from the input layer.
 418  */
 419 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
 420 {
 421         struct drm_device *dev = connector->dev;
 422         enum drm_connector_status status = connector_status_connected;
 423
 424         /* ACPI lid methods were generally unreliable in this generation, so
 425          * don't even bother.
 426          */
 427         if (IS_GEN2(dev) || IS_GEN3(dev))
 428                 return connector_status_connected;
 429
 430         return status;
 431 }
 432
 433 /**
 434  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 435  */
 436 static int intel_lvds_get_modes(struct drm_connector *connector)
 437 {
 438         struct drm_device *dev = connector->dev;
 439         struct drm_i915_private *dev_priv = dev->dev_private;
 440
 441         if (dev_priv->lvds_edid_good) {
 442                 struct intel_encoder *encoder = intel_attached_encoder(connector);
 443                 int ret = intel_ddc_get_modes(connector, encoder->ddc_bus);
 444                 if (ret)
 445                         return ret;
 446         }
 447
 448         /* Didn't get an EDID, so
 449          * Set wide sync ranges so we get all modes
 450          * handed to valid_mode for checking
 451          */
 452         connector->display_info.min_vfreq = 0;
 453         connector->display_info.max_vfreq = 200;
 454         connector->display_info.min_hfreq = 0;
 455         connector->display_info.max_hfreq = 200;
 456
 457         if (dev_priv->panel_fixed_mode != NULL) {
 458                 struct drm_display_mode *mode;
 459
 460                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
 461                 drm_mode_probed_add(connector, mode);
 462
 463                 return 1;
 464         }
 465
 466         return 0;
 467 }
 468
 469 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 470 {
 471         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
 472         return 1;
 473 }
 474
 475 /* The GPU hangs up on these systems if modeset is performed on LID open */
 476 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 477         {
 478                 .callback = intel_no_modeset_on_lid_dmi_callback,
 479                 .ident = "Toshiba Tecra A11",
 480                 .matches = {
 481                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 482                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 483                 },
 484         },
 485
 486         { }     /* terminating entry */
 487 };
 488
 489 /*
 490  * Lid events. Note the use of 'modeset_on_lid':
 491  *  - we set it on lid close, and reset it on open
 492  *  - we use it as a "only once" bit (ie we ignore
 493  *    duplicate events where it was already properly
 494  *    set/reset)
 495  *  - the suspend/resume paths will also set it to
 496  *    zero, since they restore the mode ("lid open").
 497  */
 498 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 499                             void *unused)
 500 {
 501         struct drm_i915_private *dev_priv =
 502                 container_of(nb, struct drm_i915_private, lid_notifier);
 503         struct drm_device *dev = dev_priv->dev;
 504         struct drm_connector *connector = dev_priv->int_lvds_connector;
 505
 506         /*
 507          * check and update the status of LVDS connector after receiving
 508          * the LID nofication event.
 509          */
 510         if (connector)
 511                 connector->status = connector->funcs->detect(connector);
 512         /* Don't force modeset on machines where it causes a GPU lockup */
 513         if (dmi_check_system(intel_no_modeset_on_lid))
 514                 return NOTIFY_OK;
 515         if (!acpi_lid_open()) {
 516                 dev_priv->modeset_on_lid = 1;
 517                 return NOTIFY_OK;
 518         }
 519
 520         if (!dev_priv->modeset_on_lid)
 521                 return NOTIFY_OK;
 522
 523         dev_priv->modeset_on_lid = 0;
 524
 525         mutex_lock(&dev->mode_config.mutex);
 526         drm_helper_resume_force_mode(dev);
 527         mutex_unlock(&dev->mode_config.mutex);
 528
 529         return NOTIFY_OK;
 530 }
 531
 532 /**
 533  * intel_lvds_destroy - unregister and free LVDS structures
 534  * @connector: connector to free
 535  *
 536  * Unregister the DDC bus for this connector then free the driver private
 537  * structure.
 538  */
 539 static void intel_lvds_destroy(struct drm_connector *connector)
 540 {
 541         struct drm_device *dev = connector->dev;
 542         struct drm_i915_private *dev_priv = dev->dev_private;
 543
 544         if (dev_priv->lid_notifier.notifier_call)
 545                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 546         drm_sysfs_connector_remove(connector);
 547         drm_connector_cleanup(connector);
 548         kfree(connector);
 549 }
 550
 551 static int intel_lvds_set_property(struct drm_connector *connector,
 552                                    struct drm_property *property,
 553                                    uint64_t value)
 554 {
 555         struct drm_device *dev = connector->dev;
 556
 557         if (property == dev->mode_config.scaling_mode_property &&
 558                                 connector->encoder) {
 559                 struct drm_crtc *crtc = connector->encoder->crtc;
 560                 struct drm_encoder *encoder = connector->encoder;
 561                 struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 562
 563                 if (value == DRM_MODE_SCALE_NONE) {
 564                         DRM_DEBUG_KMS("no scaling not supported\n");
 565                         return 0;
 566                 }
 567                 if (intel_lvds->fitting_mode == value) {
 568                         /* the LVDS scaling property is not changed */
 569                         return 0;
 570                 }
 571                 intel_lvds->fitting_mode = value;
 572                 if (crtc && crtc->enabled) {
 573                         /*
 574                          * If the CRTC is enabled, the display will be changed
 575                          * according to the new panel fitting mode.
 576                          */
 577                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 578                                 crtc->x, crtc->y, crtc->fb);
 579                 }
 580         }
 581
 582         return 0;
 583 }
 584
 585 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 586         .dpms = intel_lvds_dpms,
 587         .mode_fixup = intel_lvds_mode_fixup,
 588         .prepare = intel_lvds_prepare,
 589         .mode_set = intel_lvds_mode_set,
 590         .commit = intel_lvds_commit,
 591 };
 592
 593 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 594         .get_modes = intel_lvds_get_modes,
 595         .mode_valid = intel_lvds_mode_valid,
 596         .best_encoder = intel_best_encoder,
 597 };
 598
 599 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 600         .dpms = drm_helper_connector_dpms,
 601         .detect = intel_lvds_detect,
 602         .fill_modes = drm_helper_probe_single_connector_modes,
 603         .set_property = intel_lvds_set_property,
 604         .destroy = intel_lvds_destroy,
 605 };
 606
 607 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 608         .destroy = intel_encoder_destroy,
 609 };
 610
 611 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 612 {
 613         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 614         return 1;
 615 }
 616
 617 /* These systems claim to have LVDS, but really don't */
 618 static const struct dmi_system_id intel_no_lvds[] = {
 619         {
 620                 .callback = intel_no_lvds_dmi_callback,
 621                 .ident = "Apple Mac Mini (Core series)",
 622                 .matches = {
 623                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 624                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 625                 },
 626         },
 627         {
 628                 .callback = intel_no_lvds_dmi_callback,
 629                 .ident = "Apple Mac Mini (Core 2 series)",
 630                 .matches = {
 631                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 632                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 633                 },
 634         },
 635         {
 636                 .callback = intel_no_lvds_dmi_callback,
 637                 .ident = "MSI IM-945GSE-A",
 638                 .matches = {
 639                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 640                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 641                 },
 642         },
 643         {
 644                 .callback = intel_no_lvds_dmi_callback,
 645                 .ident = "Dell Studio Hybrid",
 646                 .matches = {
 647                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 648                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 649                 },
 650         },
 651         {
 652                 .callback = intel_no_lvds_dmi_callback,
 653                 .ident = "AOpen Mini PC",
 654                 .matches = {
 655                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 656                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 657                 },
 658         },
 659         {
 660                 .callback = intel_no_lvds_dmi_callback,
 661                 .ident = "AOpen Mini PC MP915",
 662                 .matches = {
 663                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 664                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 665                 },
 666         },
 667         {
 668                 .callback = intel_no_lvds_dmi_callback,
 669                 .ident = "Aopen i945GTt-VFA",
 670                 .matches = {
 671                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 672                 },
 673         },
 674         {
 675                 .callback = intel_no_lvds_dmi_callback,
 676                 .ident = "Clientron U800",
 677                 .matches = {
 678                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 679                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 680                 },
 681         },
 682
 683         { }     /* terminating entry */
 684 };
 685
 686 /**
 687  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 688  * @dev: drm device
 689  * @connector: LVDS connector
 690  *
 691  * Find the reduced downclock for LVDS in EDID.
 692  */
 693 static void intel_find_lvds_downclock(struct drm_device *dev,
 694                                 struct drm_connector *connector)
 695 {
 696         struct drm_i915_private *dev_priv = dev->dev_private;
 697         struct drm_display_mode *scan, *panel_fixed_mode;
 698         int temp_downclock;
 699
 700         panel_fixed_mode = dev_priv->panel_fixed_mode;
 701         temp_downclock = panel_fixed_mode->clock;
 702
 703         mutex_lock(&dev->mode_config.mutex);
 704         list_for_each_entry(scan, &connector->probed_modes, head) {
 705                 /*
 706                  * If one mode has the same resolution with the fixed_panel
 707                  * mode while they have the different refresh rate, it means
 708                  * that the reduced downclock is found for the LVDS. In such
 709                  * case we can set the different FPx0/1 to dynamically select
 710                  * between low and high frequency.
 711                  */
 712                 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
 713                         scan->hsync_start == panel_fixed_mode->hsync_start &&
 714                         scan->hsync_end == panel_fixed_mode->hsync_end &&
 715                         scan->htotal == panel_fixed_mode->htotal &&
 716                         scan->vdisplay == panel_fixed_mode->vdisplay &&
 717                         scan->vsync_start == panel_fixed_mode->vsync_start &&
 718                         scan->vsync_end == panel_fixed_mode->vsync_end &&
 719                         scan->vtotal == panel_fixed_mode->vtotal) {
 720                         if (scan->clock < temp_downclock) {
 721                                 /*
 722                                  * The downclock is already found. But we
 723                                  * expect to find the lower downclock.
 724                                  */
 725                                 temp_downclock = scan->clock;
 726                         }
 727                 }
 728         }
 729         mutex_unlock(&dev->mode_config.mutex);
 730         if (temp_downclock < panel_fixed_mode->clock &&
 731             i915_lvds_downclock) {
 732                 /* We found the downclock for LVDS. */
 733                 dev_priv->lvds_downclock_avail = 1;
 734                 dev_priv->lvds_downclock = temp_downclock;
 735                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 736                                 "Normal clock %dKhz, downclock %dKhz\n",
 737                                 panel_fixed_mode->clock, temp_downclock);
 738         }
 739         return;
 740 }
 741
 742 /*
 743  * Enumerate the child dev array parsed from VBT to check whether
 744  * the LVDS is present.
 745  * If it is present, return 1.
 746  * If it is not present, return false.
 747  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 748  */
 749 static bool lvds_is_present_in_vbt(struct drm_device *dev)
 750 {
 751         struct drm_i915_private *dev_priv = dev->dev_private;
 752         int i;
 753
 754         if (!dev_priv->child_dev_num)
 755                 return true;
 756
 757         for (i = 0; i < dev_priv->child_dev_num; i++) {
 758                 struct child_device_config *child = dev_priv->child_dev + i;
 759
 760                 /* If the device type is not LFP, continue.
 761                  * We have to check both the new identifiers as well as the
 762                  * old for compatibility with some BIOSes.
 763                  */
 764                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 765                     child->device_type != DEVICE_TYPE_LFP)
 766                         continue;
 767
 768                 /* However, we cannot trust the BIOS writers to populate
 769                  * the VBT correctly.  Since LVDS requires additional
 770                  * information from AIM blocks, a non-zero addin offset is
 771                  * a good indicator that the LVDS is actually present.
 772                  */
 773                 if (child->addin_offset)
 774                         return true;
 775
 776                 /* But even then some BIOS writers perform some black magic
 777                  * and instantiate the device without reference to any
 778                  * additional data.  Trust that if the VBT was written into
 779                  * the OpRegion then they have validated the LVDS's existence.
 780                  */
 781                 if (dev_priv->opregion.vbt)
 782                         return true;
 783         }
 784
 785         return false;
 786 }
 787
 788 /**
 789  * intel_lvds_init - setup LVDS connectors on this device
 790  * @dev: drm device
 791  *
 792  * Create the connector, register the LVDS DDC bus, and try to figure out what
 793  * modes we can display on the LVDS panel (if present).
 794  */
 795 void intel_lvds_init(struct drm_device *dev)
 796 {
 797         struct drm_i915_private *dev_priv = dev->dev_private;
 798         struct intel_lvds *intel_lvds;
 799         struct intel_encoder *intel_encoder;
 800         struct intel_connector *intel_connector;
 801         struct drm_connector *connector;
 802         struct drm_encoder *encoder;
 803         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 804         struct drm_crtc *crtc;
 805         u32 lvds;
 806         int pipe, gpio = GPIOC;
 807
 808         /* Skip init on machines we know falsely report LVDS */
 809         if (dmi_check_system(intel_no_lvds))
 810                 return;
 811
 812         if (!lvds_is_present_in_vbt(dev)) {
 813                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 814                 return;
 815         }
 816
 817         if (HAS_PCH_SPLIT(dev)) {
 818                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 819                         return;
 820                 if (dev_priv->edp_support) {
 821                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 822                         return;
 823                 }
 824                 gpio = PCH_GPIOC;
 825         }
 826
 827         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
 828         if (!intel_lvds) {
 829                 return;
 830         }
 831
 832         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 833         if (!intel_connector) {
 834                 kfree(intel_lvds);
 835                 return;
 836         }
 837
 838         intel_encoder = &intel_lvds->base;
 839         encoder = &intel_encoder->base;
 840         connector = &intel_connector->base;
 841         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 842                            DRM_MODE_CONNECTOR_LVDS);
 843
 844         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 845                          DRM_MODE_ENCODER_LVDS);
 846
 847         intel_connector_attach_encoder(intel_connector, intel_encoder);
 848         intel_encoder->type = INTEL_OUTPUT_LVDS;
 849
 850         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 851         intel_encoder->crtc_mask = (1 << 1);
 852         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 853         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 854         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 855         connector->interlace_allowed = false;
 856         connector->doublescan_allowed = false;
 857
 858         /* create the scaling mode property */
 859         drm_mode_create_scaling_mode_property(dev);
 860         /*
 861          * the initial panel fitting mode will be FULL_SCREEN.
 862          */
 863
 864         drm_connector_attach_property(&intel_connector->base,
 865                                       dev->mode_config.scaling_mode_property,
 866                                       DRM_MODE_SCALE_ASPECT);
 867         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
 868         /*
 869          * LVDS discovery:
 870          * 1) check for EDID on DDC
 871          * 2) check for VBT data
 872          * 3) check to see if LVDS is already on
 873          *    if none of the above, no panel
 874          * 4) make sure lid is open
 875          *    if closed, act like it's not there for now
 876          */
 877
 878         /* Set up the DDC bus. */
 879         intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
 880         if (!intel_encoder->ddc_bus) {
 881                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
 882                            "failed.\n");
 883                 goto failed;
 884         }
 885
 886         /*
 887          * Attempt to get the fixed panel mode from DDC.  Assume that the
 888          * preferred mode is the right one.
 889          */
 890         dev_priv->lvds_edid_good = true;
 891
 892         if (!intel_ddc_get_modes(connector, intel_encoder->ddc_bus))
 893                 dev_priv->lvds_edid_good = false;
 894
 895         list_for_each_entry(scan, &connector->probed_modes, head) {
 896                 mutex_lock(&dev->mode_config.mutex);
 897                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
 898                         dev_priv->panel_fixed_mode =
 899                                 drm_mode_duplicate(dev, scan);
 900                         mutex_unlock(&dev->mode_config.mutex);
 901                         intel_find_lvds_downclock(dev, connector);
 902                         goto out;
 903                 }
 904                 mutex_unlock(&dev->mode_config.mutex);
 905         }
 906
 907         /* Failed to get EDID, what about VBT? */
 908         if (dev_priv->lfp_lvds_vbt_mode) {
 909                 mutex_lock(&dev->mode_config.mutex);
 910                 dev_priv->panel_fixed_mode =
 911                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
 912                 mutex_unlock(&dev->mode_config.mutex);
 913                 if (dev_priv->panel_fixed_mode) {
 914                         dev_priv->panel_fixed_mode->type |=
 915                                 DRM_MODE_TYPE_PREFERRED;
 916                         goto out;
 917                 }
 918         }
 919
 920         /*
 921          * If we didn't get EDID, try checking if the panel is already turned
 922          * on.  If so, assume that whatever is currently programmed is the
 923          * correct mode.
 924          */
 925
 926         /* Ironlake: FIXME if still fail, not try pipe mode now */
 927         if (HAS_PCH_SPLIT(dev))
 928                 goto failed;
 929
 930         lvds = I915_READ(LVDS);
 931         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
 932         crtc = intel_get_crtc_for_pipe(dev, pipe);
 933
 934         if (crtc && (lvds & LVDS_PORT_EN)) {
 935                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
 936                 if (dev_priv->panel_fixed_mode) {
 937                         dev_priv->panel_fixed_mode->type |=
 938                                 DRM_MODE_TYPE_PREFERRED;
 939                         goto out;
 940                 }
 941         }
 942
 943         /* If we still don't have a mode after all that, give up. */
 944         if (!dev_priv->panel_fixed_mode)
 945                 goto failed;
 946
 947 out:
 948         if (HAS_PCH_SPLIT(dev)) {
 949                 u32 pwm;
 950                 /* make sure PWM is enabled */
 951                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
 952                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
 953                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
 954
 955                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
 956                 pwm |= PWM_PCH_ENABLE;
 957                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
 958         }
 959         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
 960         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
 961                 DRM_DEBUG_KMS("lid notifier registration failed\n");
 962                 dev_priv->lid_notifier.notifier_call = NULL;
 963         }
 964         /* keep the LVDS connector */
 965         dev_priv->int_lvds_connector = connector;
 966         drm_sysfs_connector_add(connector);
 967         return;
 968
 969 failed:
 970         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
 971         if (intel_encoder->ddc_bus)
 972                 intel_i2c_destroy(intel_encoder->ddc_bus);
 973         drm_connector_cleanup(connector);
 974         drm_encoder_cleanup(encoder);
 975         kfree(intel_lvds);
 976         kfree(intel_connector);
 977 }