drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "drm_crtc.h"
  37 #include "drm_edid.h"
  38 #include "intel_drv.h"
  39 #include "i915_drm.h"
  40 #include "i915_drv.h"
  41 #include <linux/acpi.h>
  42
  43 /* Private structure for the integrated LVDS support */
  44 struct intel_lvds {
  45         struct intel_encoder base;
  46
  47         struct edid *edid;
  48
  49         int fitting_mode;
  50         u32 pfit_control;
  51         u32 pfit_pgm_ratios;
  52         bool pfit_dirty;
  53
  54         struct drm_display_mode *fixed_mode;
  55 };
  56
  57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  58 {
  59         return container_of(encoder, struct intel_lvds, base.base);
  60 }
  61
  62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  63 {
  64         return container_of(intel_attached_encoder(connector),
  65                             struct intel_lvds, base);
  66 }
  67
  68 /**
  69  * Sets the power state for the panel.
  70  */
  71 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
  72 {
  73         struct drm_device *dev = intel_lvds->base.base.dev;
  74         struct drm_i915_private *dev_priv = dev->dev_private;
  75         u32 ctl_reg, lvds_reg;
  76
  77         if (HAS_PCH_SPLIT(dev)) {
  78                 ctl_reg = PCH_PP_CONTROL;
  79                 lvds_reg = PCH_LVDS;
  80         } else {
  81                 ctl_reg = PP_CONTROL;
  82                 lvds_reg = LVDS;
  83         }
  84
  85         I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  86
  87         if (intel_lvds->pfit_dirty) {
  88                 /*
  89                  * Enable automatic panel scaling so that non-native modes
  90                  * fill the screen.  The panel fitter should only be
  91                  * adjusted whilst the pipe is disabled, according to
  92                  * register description and PRM.
  93                  */
  94                 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  95                               intel_lvds->pfit_control,
  96                               intel_lvds->pfit_pgm_ratios);
  97                 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) {
  98                         DRM_ERROR("timed out waiting for panel to power off\n");
  99                 } else {
 100                         I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
 101                         I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
 102                         intel_lvds->pfit_dirty = false;
 103                 }
 104         }
 105
 106         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 107         POSTING_READ(lvds_reg);
 108
 109         intel_panel_enable_backlight(dev);
 110 }
 111
 112 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
 113 {
 114         struct drm_device *dev = intel_lvds->base.base.dev;
 115         struct drm_i915_private *dev_priv = dev->dev_private;
 116         u32 ctl_reg, lvds_reg;
 117
 118         if (HAS_PCH_SPLIT(dev)) {
 119                 ctl_reg = PCH_PP_CONTROL;
 120                 lvds_reg = PCH_LVDS;
 121         } else {
 122                 ctl_reg = PP_CONTROL;
 123                 lvds_reg = LVDS;
 124         }
 125
 126         intel_panel_disable_backlight(dev);
 127
 128         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 129
 130         if (intel_lvds->pfit_control) {
 131                 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
 132                         DRM_ERROR("timed out waiting for panel to power off\n");
 133
 134                 I915_WRITE(PFIT_CONTROL, 0);
 135                 intel_lvds->pfit_dirty = true;
 136         }
 137
 138         I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
 139         POSTING_READ(lvds_reg);
 140 }
 141
 142 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 143 {
 144         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 145
 146         if (mode == DRM_MODE_DPMS_ON)
 147                 intel_lvds_enable(intel_lvds);
 148         else
 149                 intel_lvds_disable(intel_lvds);
 150
 151         /* XXX: We never power down the LVDS pairs. */
 152 }
 153
 154 static int intel_lvds_mode_valid(struct drm_connector *connector,
 155                                  struct drm_display_mode *mode)
 156 {
 157         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 158         struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
 159
 160         if (mode->hdisplay > fixed_mode->hdisplay)
 161                 return MODE_PANEL;
 162         if (mode->vdisplay > fixed_mode->vdisplay)
 163                 return MODE_PANEL;
 164
 165         return MODE_OK;
 166 }
 167
 168 static void
 169 centre_horizontally(struct drm_display_mode *mode,
 170                     int width)
 171 {
 172         u32 border, sync_pos, blank_width, sync_width;
 173
 174         /* keep the hsync and hblank widths constant */
 175         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 176         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 177         sync_pos = (blank_width - sync_width + 1) / 2;
 178
 179         border = (mode->hdisplay - width + 1) / 2;
 180         border += border & 1; /* make the border even */
 181
 182         mode->crtc_hdisplay = width;
 183         mode->crtc_hblank_start = width + border;
 184         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 185
 186         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 187         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 188 }
 189
 190 static void
 191 centre_vertically(struct drm_display_mode *mode,
 192                   int height)
 193 {
 194         u32 border, sync_pos, blank_width, sync_width;
 195
 196         /* keep the vsync and vblank widths constant */
 197         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 198         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 199         sync_pos = (blank_width - sync_width + 1) / 2;
 200
 201         border = (mode->vdisplay - height + 1) / 2;
 202
 203         mode->crtc_vdisplay = height;
 204         mode->crtc_vblank_start = height + border;
 205         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 206
 207         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 208         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 209 }
 210
 211 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 212 {
 213         /*
 214          * Floating point operation is not supported. So the FACTOR
 215          * is defined, which can avoid the floating point computation
 216          * when calculating the panel ratio.
 217          */
 218 #define ACCURACY 12
 219 #define FACTOR (1 << ACCURACY)
 220         u32 ratio = source * FACTOR / target;
 221         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 222 }
 223
 224 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 225                                   struct drm_display_mode *mode,
 226                                   struct drm_display_mode *adjusted_mode)
 227 {
 228         struct drm_device *dev = encoder->dev;
 229         struct drm_i915_private *dev_priv = dev->dev_private;
 230         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 231         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 232         struct drm_encoder *tmp_encoder;
 233         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 234
 235         /* Should never happen!! */
 236         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 237                 DRM_ERROR("Can't support LVDS on pipe A\n");
 238                 return false;
 239         }
 240
 241         /* Should never happen!! */
 242         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 243                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 244                         DRM_ERROR("Can't enable LVDS and another "
 245                                "encoder on the same pipe\n");
 246                         return false;
 247                 }
 248         }
 249
 250         /*
 251          * We have timings from the BIOS for the panel, put them in
 252          * to the adjusted mode.  The CRTC will be set up for this mode,
 253          * with the panel scaling set up to source from the H/VDisplay
 254          * of the original mode.
 255          */
 256         intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
 257
 258         if (HAS_PCH_SPLIT(dev)) {
 259                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
 260                                         mode, adjusted_mode);
 261                 return true;
 262         }
 263
 264         /* Native modes don't need fitting */
 265         if (adjusted_mode->hdisplay == mode->hdisplay &&
 266             adjusted_mode->vdisplay == mode->vdisplay)
 267                 goto out;
 268
 269         /* 965+ wants fuzzy fitting */
 270         if (INTEL_INFO(dev)->gen >= 4)
 271                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 272                                  PFIT_FILTER_FUZZY);
 273
 274         /*
 275          * Enable automatic panel scaling for non-native modes so that they fill
 276          * the screen.  Should be enabled before the pipe is enabled, according
 277          * to register description and PRM.
 278          * Change the value here to see the borders for debugging
 279          */
 280         I915_WRITE(BCLRPAT_A, 0);
 281         I915_WRITE(BCLRPAT_B, 0);
 282
 283         switch (intel_lvds->fitting_mode) {
 284         case DRM_MODE_SCALE_CENTER:
 285                 /*
 286                  * For centered modes, we have to calculate border widths &
 287                  * heights and modify the values programmed into the CRTC.
 288                  */
 289                 centre_horizontally(adjusted_mode, mode->hdisplay);
 290                 centre_vertically(adjusted_mode, mode->vdisplay);
 291                 border = LVDS_BORDER_ENABLE;
 292                 break;
 293
 294         case DRM_MODE_SCALE_ASPECT:
 295                 /* Scale but preserve the aspect ratio */
 296                 if (INTEL_INFO(dev)->gen >= 4) {
 297                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 298                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 299
 300                         /* 965+ is easy, it does everything in hw */
 301                         if (scaled_width > scaled_height)
 302                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
 303                         else if (scaled_width < scaled_height)
 304                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
 305                         else if (adjusted_mode->hdisplay != mode->hdisplay)
 306                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 307                 } else {
 308                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 309                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 310                         /*
 311                          * For earlier chips we have to calculate the scaling
 312                          * ratio by hand and program it into the
 313                          * PFIT_PGM_RATIO register
 314                          */
 315                         if (scaled_width > scaled_height) { /* pillar */
 316                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
 317
 318                                 border = LVDS_BORDER_ENABLE;
 319                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 320                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 321                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 322                                                             bits << PFIT_VERT_SCALE_SHIFT);
 323                                         pfit_control |= (PFIT_ENABLE |
 324                                                          VERT_INTERP_BILINEAR |
 325                                                          HORIZ_INTERP_BILINEAR);
 326                                 }
 327                         } else if (scaled_width < scaled_height) { /* letter */
 328                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
 329
 330                                 border = LVDS_BORDER_ENABLE;
 331                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 332                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 333                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 334                                                             bits << PFIT_VERT_SCALE_SHIFT);
 335                                         pfit_control |= (PFIT_ENABLE |
 336                                                          VERT_INTERP_BILINEAR |
 337                                                          HORIZ_INTERP_BILINEAR);
 338                                 }
 339                         } else
 340                                 /* Aspects match, Let hw scale both directions */
 341                                 pfit_control |= (PFIT_ENABLE |
 342                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 343                                                  VERT_INTERP_BILINEAR |
 344                                                  HORIZ_INTERP_BILINEAR);
 345                 }
 346                 break;
 347
 348         case DRM_MODE_SCALE_FULLSCREEN:
 349                 /*
 350                  * Full scaling, even if it changes the aspect ratio.
 351                  * Fortunately this is all done for us in hw.
 352                  */
 353                 if (mode->vdisplay != adjusted_mode->vdisplay ||
 354                     mode->hdisplay != adjusted_mode->hdisplay) {
 355                         pfit_control |= PFIT_ENABLE;
 356                         if (INTEL_INFO(dev)->gen >= 4)
 357                                 pfit_control |= PFIT_SCALING_AUTO;
 358                         else
 359                                 pfit_control |= (VERT_AUTO_SCALE |
 360                                                  VERT_INTERP_BILINEAR |
 361                                                  HORIZ_AUTO_SCALE |
 362                                                  HORIZ_INTERP_BILINEAR);
 363                 }
 364                 break;
 365
 366         default:
 367                 break;
 368         }
 369
 370 out:
 371         /* If not enabling scaling, be consistent and always use 0. */
 372         if ((pfit_control & PFIT_ENABLE) == 0) {
 373                 pfit_control = 0;
 374                 pfit_pgm_ratios = 0;
 375         }
 376
 377         /* Make sure pre-965 set dither correctly */
 378         if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
 379                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 380
 381         if (pfit_control != intel_lvds->pfit_control ||
 382             pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
 383                 intel_lvds->pfit_control = pfit_control;
 384                 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
 385                 intel_lvds->pfit_dirty = true;
 386         }
 387         dev_priv->lvds_border_bits = border;
 388
 389         /*
 390          * XXX: It would be nice to support lower refresh rates on the
 391          * panels to reduce power consumption, and perhaps match the
 392          * user's requested refresh rate.
 393          */
 394
 395         return true;
 396 }
 397
 398 static void intel_lvds_prepare(struct drm_encoder *encoder)
 399 {
 400         struct drm_device *dev = encoder->dev;
 401         struct drm_i915_private *dev_priv = dev->dev_private;
 402         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 403
 404         /* We try to do the minimum that is necessary in order to unlock
 405          * the registers for mode setting.
 406          *
 407          * On Ironlake, this is quite simple as we just set the unlock key
 408          * and ignore all subtleties. (This may cause some issues...)
 409          *
 410          * Prior to Ironlake, we must disable the pipe if we want to adjust
 411          * the panel fitter. However at all other times we can just reset
 412          * the registers regardless.
 413          */
 414
 415         if (HAS_PCH_SPLIT(dev)) {
 416                 I915_WRITE(PCH_PP_CONTROL,
 417                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
 418         } else if (intel_lvds->pfit_dirty) {
 419                 I915_WRITE(PP_CONTROL,
 420                            (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS)
 421                            & ~POWER_TARGET_ON);
 422         } else {
 423                 I915_WRITE(PP_CONTROL,
 424                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
 425         }
 426 }
 427
 428 static void intel_lvds_commit(struct drm_encoder *encoder)
 429 {
 430         struct drm_device *dev = encoder->dev;
 431         struct drm_i915_private *dev_priv = dev->dev_private;
 432         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 433
 434         /* Undo any unlocking done in prepare to prevent accidental
 435          * adjustment of the registers.
 436          */
 437         if (HAS_PCH_SPLIT(dev)) {
 438                 u32 val = I915_READ(PCH_PP_CONTROL);
 439                 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
 440                         I915_WRITE(PCH_PP_CONTROL, val & 0x3);
 441         } else {
 442                 u32 val = I915_READ(PP_CONTROL);
 443                 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
 444                         I915_WRITE(PP_CONTROL, val & 0x3);
 445         }
 446
 447         /* Always do a full power on as we do not know what state
 448          * we were left in.
 449          */
 450         intel_lvds_enable(intel_lvds);
 451 }
 452
 453 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 454                                 struct drm_display_mode *mode,
 455                                 struct drm_display_mode *adjusted_mode)
 456 {
 457         /*
 458          * The LVDS pin pair will already have been turned on in the
 459          * intel_crtc_mode_set since it has a large impact on the DPLL
 460          * settings.
 461          */
 462 }
 463
 464 /**
 465  * Detect the LVDS connection.
 466  *
 467  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 468  * connected and closed means disconnected.  We also send hotplug events as
 469  * needed, using lid status notification from the input layer.
 470  */
 471 static enum drm_connector_status
 472 intel_lvds_detect(struct drm_connector *connector, bool force)
 473 {
 474         struct drm_device *dev = connector->dev;
 475         enum drm_connector_status status = connector_status_connected;
 476
 477         /* ACPI lid methods were generally unreliable in this generation, so
 478          * don't even bother.
 479          */
 480         if (IS_GEN2(dev) || IS_GEN3(dev))
 481                 return connector_status_connected;
 482
 483         return status;
 484 }
 485
 486 /**
 487  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 488  */
 489 static int intel_lvds_get_modes(struct drm_connector *connector)
 490 {
 491         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 492         struct drm_device *dev = connector->dev;
 493         struct drm_display_mode *mode;
 494
 495         if (intel_lvds->edid)
 496                 return drm_add_edid_modes(connector, intel_lvds->edid);
 497
 498         mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
 499         if (mode == 0)
 500                 return 0;
 501
 502         drm_mode_probed_add(connector, mode);
 503         return 1;
 504 }
 505
 506 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 507 {
 508         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
 509         return 1;
 510 }
 511
 512 /* The GPU hangs up on these systems if modeset is performed on LID open */
 513 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 514         {
 515                 .callback = intel_no_modeset_on_lid_dmi_callback,
 516                 .ident = "Toshiba Tecra A11",
 517                 .matches = {
 518                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 519                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 520                 },
 521         },
 522
 523         { }     /* terminating entry */
 524 };
 525
 526 /*
 527  * Lid events. Note the use of 'modeset_on_lid':
 528  *  - we set it on lid close, and reset it on open
 529  *  - we use it as a "only once" bit (ie we ignore
 530  *    duplicate events where it was already properly
 531  *    set/reset)
 532  *  - the suspend/resume paths will also set it to
 533  *    zero, since they restore the mode ("lid open").
 534  */
 535 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 536                             void *unused)
 537 {
 538         struct drm_i915_private *dev_priv =
 539                 container_of(nb, struct drm_i915_private, lid_notifier);
 540         struct drm_device *dev = dev_priv->dev;
 541         struct drm_connector *connector = dev_priv->int_lvds_connector;
 542
 543         /*
 544          * check and update the status of LVDS connector after receiving
 545          * the LID nofication event.
 546          */
 547         if (connector)
 548                 connector->status = connector->funcs->detect(connector,
 549                                                              false);
 550
 551         /* Don't force modeset on machines where it causes a GPU lockup */
 552         if (dmi_check_system(intel_no_modeset_on_lid))
 553                 return NOTIFY_OK;
 554         if (!acpi_lid_open()) {
 555                 dev_priv->modeset_on_lid = 1;
 556                 return NOTIFY_OK;
 557         }
 558
 559         if (!dev_priv->modeset_on_lid)
 560                 return NOTIFY_OK;
 561
 562         dev_priv->modeset_on_lid = 0;
 563
 564         mutex_lock(&dev->mode_config.mutex);
 565         drm_helper_resume_force_mode(dev);
 566         mutex_unlock(&dev->mode_config.mutex);
 567
 568         return NOTIFY_OK;
 569 }
 570
 571 /**
 572  * intel_lvds_destroy - unregister and free LVDS structures
 573  * @connector: connector to free
 574  *
 575  * Unregister the DDC bus for this connector then free the driver private
 576  * structure.
 577  */
 578 static void intel_lvds_destroy(struct drm_connector *connector)
 579 {
 580         struct drm_device *dev = connector->dev;
 581         struct drm_i915_private *dev_priv = dev->dev_private;
 582
 583         if (dev_priv->lid_notifier.notifier_call)
 584                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 585         drm_sysfs_connector_remove(connector);
 586         drm_connector_cleanup(connector);
 587         kfree(connector);
 588 }
 589
 590 static int intel_lvds_set_property(struct drm_connector *connector,
 591                                    struct drm_property *property,
 592                                    uint64_t value)
 593 {
 594         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 595         struct drm_device *dev = connector->dev;
 596
 597         if (property == dev->mode_config.scaling_mode_property) {
 598                 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
 599
 600                 if (value == DRM_MODE_SCALE_NONE) {
 601                         DRM_DEBUG_KMS("no scaling not supported\n");
 602                         return -EINVAL;
 603                 }
 604
 605                 if (intel_lvds->fitting_mode == value) {
 606                         /* the LVDS scaling property is not changed */
 607                         return 0;
 608                 }
 609                 intel_lvds->fitting_mode = value;
 610                 if (crtc && crtc->enabled) {
 611                         /*
 612                          * If the CRTC is enabled, the display will be changed
 613                          * according to the new panel fitting mode.
 614                          */
 615                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 616                                 crtc->x, crtc->y, crtc->fb);
 617                 }
 618         }
 619
 620         return 0;
 621 }
 622
 623 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 624         .dpms = intel_lvds_dpms,
 625         .mode_fixup = intel_lvds_mode_fixup,
 626         .prepare = intel_lvds_prepare,
 627         .mode_set = intel_lvds_mode_set,
 628         .commit = intel_lvds_commit,
 629 };
 630
 631 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 632         .get_modes = intel_lvds_get_modes,
 633         .mode_valid = intel_lvds_mode_valid,
 634         .best_encoder = intel_best_encoder,
 635 };
 636
 637 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 638         .dpms = drm_helper_connector_dpms,
 639         .detect = intel_lvds_detect,
 640         .fill_modes = drm_helper_probe_single_connector_modes,
 641         .set_property = intel_lvds_set_property,
 642         .destroy = intel_lvds_destroy,
 643 };
 644
 645 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 646         .destroy = intel_encoder_destroy,
 647 };
 648
 649 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 650 {
 651         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 652         return 1;
 653 }
 654
 655 /* These systems claim to have LVDS, but really don't */
 656 static const struct dmi_system_id intel_no_lvds[] = {
 657         {
 658                 .callback = intel_no_lvds_dmi_callback,
 659                 .ident = "Apple Mac Mini (Core series)",
 660                 .matches = {
 661                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 662                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 663                 },
 664         },
 665         {
 666                 .callback = intel_no_lvds_dmi_callback,
 667                 .ident = "Apple Mac Mini (Core 2 series)",
 668                 .matches = {
 669                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 670                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 671                 },
 672         },
 673         {
 674                 .callback = intel_no_lvds_dmi_callback,
 675                 .ident = "MSI IM-945GSE-A",
 676                 .matches = {
 677                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 678                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 679                 },
 680         },
 681         {
 682                 .callback = intel_no_lvds_dmi_callback,
 683                 .ident = "Dell Studio Hybrid",
 684                 .matches = {
 685                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 686                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 687                 },
 688         },
 689         {
 690                 .callback = intel_no_lvds_dmi_callback,
 691                 .ident = "AOpen Mini PC",
 692                 .matches = {
 693                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 694                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 695                 },
 696         },
 697         {
 698                 .callback = intel_no_lvds_dmi_callback,
 699                 .ident = "AOpen Mini PC MP915",
 700                 .matches = {
 701                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 702                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 703                 },
 704         },
 705         {
 706                 .callback = intel_no_lvds_dmi_callback,
 707                 .ident = "AOpen i915GMm-HFS",
 708                 .matches = {
 709                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 710                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 711                 },
 712         },
 713         {
 714                 .callback = intel_no_lvds_dmi_callback,
 715                 .ident = "Aopen i945GTt-VFA",
 716                 .matches = {
 717                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 718                 },
 719         },
 720         {
 721                 .callback = intel_no_lvds_dmi_callback,
 722                 .ident = "Clientron U800",
 723                 .matches = {
 724                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 725                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 726                 },
 727         },
 728
 729         { }     /* terminating entry */
 730 };
 731
 732 /**
 733  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 734  * @dev: drm device
 735  * @connector: LVDS connector
 736  *
 737  * Find the reduced downclock for LVDS in EDID.
 738  */
 739 static void intel_find_lvds_downclock(struct drm_device *dev,
 740                                       struct drm_display_mode *fixed_mode,
 741                                       struct drm_connector *connector)
 742 {
 743         struct drm_i915_private *dev_priv = dev->dev_private;
 744         struct drm_display_mode *scan;
 745         int temp_downclock;
 746
 747         temp_downclock = fixed_mode->clock;
 748         list_for_each_entry(scan, &connector->probed_modes, head) {
 749                 /*
 750                  * If one mode has the same resolution with the fixed_panel
 751                  * mode while they have the different refresh rate, it means
 752                  * that the reduced downclock is found for the LVDS. In such
 753                  * case we can set the different FPx0/1 to dynamically select
 754                  * between low and high frequency.
 755                  */
 756                 if (scan->hdisplay == fixed_mode->hdisplay &&
 757                     scan->hsync_start == fixed_mode->hsync_start &&
 758                     scan->hsync_end == fixed_mode->hsync_end &&
 759                     scan->htotal == fixed_mode->htotal &&
 760                     scan->vdisplay == fixed_mode->vdisplay &&
 761                     scan->vsync_start == fixed_mode->vsync_start &&
 762                     scan->vsync_end == fixed_mode->vsync_end &&
 763                     scan->vtotal == fixed_mode->vtotal) {
 764                         if (scan->clock < temp_downclock) {
 765                                 /*
 766                                  * The downclock is already found. But we
 767                                  * expect to find the lower downclock.
 768                                  */
 769                                 temp_downclock = scan->clock;
 770                         }
 771                 }
 772         }
 773         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
 774                 /* We found the downclock for LVDS. */
 775                 dev_priv->lvds_downclock_avail = 1;
 776                 dev_priv->lvds_downclock = temp_downclock;
 777                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 778                               "Normal clock %dKhz, downclock %dKhz\n",
 779                               fixed_mode->clock, temp_downclock);
 780         }
 781 }
 782
 783 /*
 784  * Enumerate the child dev array parsed from VBT to check whether
 785  * the LVDS is present.
 786  * If it is present, return 1.
 787  * If it is not present, return false.
 788  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 789  */
 790 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 791                                    u8 *i2c_pin)
 792 {
 793         struct drm_i915_private *dev_priv = dev->dev_private;
 794         int i;
 795
 796         if (!dev_priv->child_dev_num)
 797                 return true;
 798
 799         for (i = 0; i < dev_priv->child_dev_num; i++) {
 800                 struct child_device_config *child = dev_priv->child_dev + i;
 801
 802                 /* If the device type is not LFP, continue.
 803                  * We have to check both the new identifiers as well as the
 804                  * old for compatibility with some BIOSes.
 805                  */
 806                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 807                     child->device_type != DEVICE_TYPE_LFP)
 808                         continue;
 809
 810                 if (child->i2c_pin)
 811                     *i2c_pin = child->i2c_pin;
 812
 813                 /* However, we cannot trust the BIOS writers to populate
 814                  * the VBT correctly.  Since LVDS requires additional
 815                  * information from AIM blocks, a non-zero addin offset is
 816                  * a good indicator that the LVDS is actually present.
 817                  */
 818                 if (child->addin_offset)
 819                         return true;
 820
 821                 /* But even then some BIOS writers perform some black magic
 822                  * and instantiate the device without reference to any
 823                  * additional data.  Trust that if the VBT was written into
 824                  * the OpRegion then they have validated the LVDS's existence.
 825                  */
 826                 if (dev_priv->opregion.vbt)
 827                         return true;
 828         }
 829
 830         return false;
 831 }
 832
 833 static bool intel_lvds_ddc_probe(struct drm_device *dev, u8 pin)
 834 {
 835         struct drm_i915_private *dev_priv = dev->dev_private;
 836         u8 buf = 0;
 837         struct i2c_msg msgs[] = {
 838                 {
 839                         .addr = 0xA0,
 840                         .flags = 0,
 841                         .len = 1,
 842                         .buf = &buf,
 843                 },
 844         };
 845         struct i2c_adapter *i2c = &dev_priv->gmbus[pin].adapter;
 846         /* XXX this only appears to work when using GMBUS */
 847         if (intel_gmbus_is_forced_bit(i2c))
 848                 return true;
 849         return i2c_transfer(i2c, msgs, 1) == 1;
 850 }
 851
 852 /**
 853  * intel_lvds_init - setup LVDS connectors on this device
 854  * @dev: drm device
 855  *
 856  * Create the connector, register the LVDS DDC bus, and try to figure out what
 857  * modes we can display on the LVDS panel (if present).
 858  */
 859 bool intel_lvds_init(struct drm_device *dev)
 860 {
 861         struct drm_i915_private *dev_priv = dev->dev_private;
 862         struct intel_lvds *intel_lvds;
 863         struct intel_encoder *intel_encoder;
 864         struct intel_connector *intel_connector;
 865         struct drm_connector *connector;
 866         struct drm_encoder *encoder;
 867         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 868         struct drm_crtc *crtc;
 869         u32 lvds;
 870         int pipe;
 871         u8 pin;
 872
 873         /* Skip init on machines we know falsely report LVDS */
 874         if (dmi_check_system(intel_no_lvds))
 875                 return false;
 876
 877         pin = GMBUS_PORT_PANEL;
 878         if (!lvds_is_present_in_vbt(dev, &pin)) {
 879                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 880                 return false;
 881         }
 882
 883         if (HAS_PCH_SPLIT(dev)) {
 884                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 885                         return false;
 886                 if (dev_priv->edp.support) {
 887                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 888                         return false;
 889                 }
 890         }
 891
 892         if (!intel_lvds_ddc_probe(dev, pin)) {
 893                 DRM_DEBUG_KMS("LVDS did not respond to DDC probe\n");
 894                 return false;
 895         }
 896
 897         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
 898         if (!intel_lvds) {
 899                 return false;
 900         }
 901
 902         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 903         if (!intel_connector) {
 904                 kfree(intel_lvds);
 905                 return false;
 906         }
 907
 908         if (!HAS_PCH_SPLIT(dev)) {
 909                 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
 910         }
 911
 912         intel_encoder = &intel_lvds->base;
 913         encoder = &intel_encoder->base;
 914         connector = &intel_connector->base;
 915         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 916                            DRM_MODE_CONNECTOR_LVDS);
 917
 918         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 919                          DRM_MODE_ENCODER_LVDS);
 920
 921         intel_connector_attach_encoder(intel_connector, intel_encoder);
 922         intel_encoder->type = INTEL_OUTPUT_LVDS;
 923
 924         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 925         intel_encoder->crtc_mask = (1 << 1);
 926         if (INTEL_INFO(dev)->gen >= 5)
 927                 intel_encoder->crtc_mask |= (1 << 0);
 928         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 929         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 930         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 931         connector->interlace_allowed = false;
 932         connector->doublescan_allowed = false;
 933
 934         /* create the scaling mode property */
 935         drm_mode_create_scaling_mode_property(dev);
 936         /*
 937          * the initial panel fitting mode will be FULL_SCREEN.
 938          */
 939
 940         drm_connector_attach_property(&intel_connector->base,
 941                                       dev->mode_config.scaling_mode_property,
 942                                       DRM_MODE_SCALE_ASPECT);
 943         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
 944         /*
 945          * LVDS discovery:
 946          * 1) check for EDID on DDC
 947          * 2) check for VBT data
 948          * 3) check to see if LVDS is already on
 949          *    if none of the above, no panel
 950          * 4) make sure lid is open
 951          *    if closed, act like it's not there for now
 952          */
 953
 954         /*
 955          * Attempt to get the fixed panel mode from DDC.  Assume that the
 956          * preferred mode is the right one.
 957          */
 958         intel_lvds->edid = drm_get_edid(connector,
 959                                         &dev_priv->gmbus[pin].adapter);
 960         if (intel_lvds->edid) {
 961                 if (drm_add_edid_modes(connector,
 962                                        intel_lvds->edid)) {
 963                         drm_mode_connector_update_edid_property(connector,
 964                                                                 intel_lvds->edid);
 965                 } else {
 966                         kfree(intel_lvds->edid);
 967                         intel_lvds->edid = NULL;
 968                 }
 969         }
 970         if (!intel_lvds->edid) {
 971                 /* Didn't get an EDID, so
 972                  * Set wide sync ranges so we get all modes
 973                  * handed to valid_mode for checking
 974                  */
 975                 connector->display_info.min_vfreq = 0;
 976                 connector->display_info.max_vfreq = 200;
 977                 connector->display_info.min_hfreq = 0;
 978                 connector->display_info.max_hfreq = 200;
 979         }
 980
 981         list_for_each_entry(scan, &connector->probed_modes, head) {
 982                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
 983                         intel_lvds->fixed_mode =
 984                                 drm_mode_duplicate(dev, scan);
 985                         intel_find_lvds_downclock(dev,
 986                                                   intel_lvds->fixed_mode,
 987                                                   connector);
 988                         goto out;
 989                 }
 990         }
 991
 992         /* Failed to get EDID, what about VBT? */
 993         if (dev_priv->lfp_lvds_vbt_mode) {
 994                 intel_lvds->fixed_mode =
 995                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
 996                 if (intel_lvds->fixed_mode) {
 997                         intel_lvds->fixed_mode->type |=
 998                                 DRM_MODE_TYPE_PREFERRED;
 999                         goto out;
1000                 }
1001         }
1002
1003         /*
1004          * If we didn't get EDID, try checking if the panel is already turned
1005          * on.  If so, assume that whatever is currently programmed is the
1006          * correct mode.
1007          */
1008
1009         /* Ironlake: FIXME if still fail, not try pipe mode now */
1010         if (HAS_PCH_SPLIT(dev))
1011                 goto failed;
1012
1013         lvds = I915_READ(LVDS);
1014         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1015         crtc = intel_get_crtc_for_pipe(dev, pipe);
1016
1017         if (crtc && (lvds & LVDS_PORT_EN)) {
1018                 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1019                 if (intel_lvds->fixed_mode) {
1020                         intel_lvds->fixed_mode->type |=
1021                                 DRM_MODE_TYPE_PREFERRED;
1022                         goto out;
1023                 }
1024         }
1025
1026         /* If we still don't have a mode after all that, give up. */
1027         if (!intel_lvds->fixed_mode)
1028                 goto failed;
1029
1030 out:
1031         if (HAS_PCH_SPLIT(dev)) {
1032                 u32 pwm;
1033
1034                 pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
1035
1036                 /* make sure PWM is enabled and locked to the LVDS pipe */
1037                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1038                 if (pipe == 0 && (pwm & PWM_PIPE_B))
1039                         I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
1040                 if (pipe)
1041                         pwm |= PWM_PIPE_B;
1042                 else
1043                         pwm &= ~PWM_PIPE_B;
1044                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
1045
1046                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1047                 pwm |= PWM_PCH_ENABLE;
1048                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1049         }
1050         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1051         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1052                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1053                 dev_priv->lid_notifier.notifier_call = NULL;
1054         }
1055         /* keep the LVDS connector */
1056         dev_priv->int_lvds_connector = connector;
1057         drm_sysfs_connector_add(connector);
1058         return true;
1059
1060 failed:
1061         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1062         drm_connector_cleanup(connector);
1063         drm_encoder_cleanup(encoder);
1064         kfree(intel_lvds);
1065         kfree(intel_connector);
1066         return false;
1067 }