2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
38 #include "intel_drv.h"
41 #include <linux/acpi.h>
43 /* Private structure for the integrated LVDS support */
45 struct intel_encoder base;
54 struct drm_display_mode *fixed_mode;
57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
59 return container_of(encoder, struct intel_lvds, base.base);
62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
64 return container_of(intel_attached_encoder(connector),
65 struct intel_lvds, base);
69 * Sets the power state for the panel.
71 static void intel_lvds_set_power(struct intel_lvds *intel_lvds, bool on)
73 struct drm_device *dev = intel_lvds->base.base.dev;
74 struct drm_i915_private *dev_priv = dev->dev_private;
75 u32 ctl_reg, lvds_reg;
77 if (HAS_PCH_SPLIT(dev)) {
78 ctl_reg = PCH_PP_CONTROL;
86 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
87 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
88 intel_panel_set_backlight(dev, dev_priv->backlight_level);
90 dev_priv->backlight_level = intel_panel_get_backlight(dev);
92 intel_panel_set_backlight(dev, 0);
93 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
95 if (intel_lvds->pfit_control) {
96 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
97 DRM_ERROR("timed out waiting for panel to power off\n");
98 I915_WRITE(PFIT_CONTROL, 0);
99 intel_lvds->pfit_control = 0;
102 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
104 POSTING_READ(lvds_reg);
107 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
109 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
111 if (mode == DRM_MODE_DPMS_ON)
112 intel_lvds_set_power(intel_lvds, true);
114 intel_lvds_set_power(intel_lvds, false);
116 /* XXX: We never power down the LVDS pairs. */
119 static int intel_lvds_mode_valid(struct drm_connector *connector,
120 struct drm_display_mode *mode)
122 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
123 struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
125 if (mode->hdisplay > fixed_mode->hdisplay)
127 if (mode->vdisplay > fixed_mode->vdisplay)
134 centre_horizontally(struct drm_display_mode *mode,
137 u32 border, sync_pos, blank_width, sync_width;
139 /* keep the hsync and hblank widths constant */
140 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
141 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
142 sync_pos = (blank_width - sync_width + 1) / 2;
144 border = (mode->hdisplay - width + 1) / 2;
145 border += border & 1; /* make the border even */
147 mode->crtc_hdisplay = width;
148 mode->crtc_hblank_start = width + border;
149 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
151 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
152 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
156 centre_vertically(struct drm_display_mode *mode,
159 u32 border, sync_pos, blank_width, sync_width;
161 /* keep the vsync and vblank widths constant */
162 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
163 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
164 sync_pos = (blank_width - sync_width + 1) / 2;
166 border = (mode->vdisplay - height + 1) / 2;
168 mode->crtc_vdisplay = height;
169 mode->crtc_vblank_start = height + border;
170 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
172 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
173 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
176 static inline u32 panel_fitter_scaling(u32 source, u32 target)
179 * Floating point operation is not supported. So the FACTOR
180 * is defined, which can avoid the floating point computation
181 * when calculating the panel ratio.
184 #define FACTOR (1 << ACCURACY)
185 u32 ratio = source * FACTOR / target;
186 return (FACTOR * ratio + FACTOR/2) / FACTOR;
189 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
190 struct drm_display_mode *mode,
191 struct drm_display_mode *adjusted_mode)
193 struct drm_device *dev = encoder->dev;
194 struct drm_i915_private *dev_priv = dev->dev_private;
195 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
196 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
197 struct drm_encoder *tmp_encoder;
198 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
200 /* Should never happen!! */
201 if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
202 DRM_ERROR("Can't support LVDS on pipe A\n");
206 /* Should never happen!! */
207 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
208 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
209 DRM_ERROR("Can't enable LVDS and another "
210 "encoder on the same pipe\n");
216 * We have timings from the BIOS for the panel, put them in
217 * to the adjusted mode. The CRTC will be set up for this mode,
218 * with the panel scaling set up to source from the H/VDisplay
219 * of the original mode.
221 intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
223 if (HAS_PCH_SPLIT(dev)) {
224 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
225 mode, adjusted_mode);
229 /* Make sure pre-965s set dither correctly */
230 if (!IS_I965G(dev)) {
231 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
232 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
235 /* Native modes don't need fitting */
236 if (adjusted_mode->hdisplay == mode->hdisplay &&
237 adjusted_mode->vdisplay == mode->vdisplay)
240 /* 965+ wants fuzzy fitting */
242 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
246 * Enable automatic panel scaling for non-native modes so that they fill
247 * the screen. Should be enabled before the pipe is enabled, according
248 * to register description and PRM.
249 * Change the value here to see the borders for debugging
251 I915_WRITE(BCLRPAT_A, 0);
252 I915_WRITE(BCLRPAT_B, 0);
254 switch (intel_lvds->fitting_mode) {
255 case DRM_MODE_SCALE_CENTER:
257 * For centered modes, we have to calculate border widths &
258 * heights and modify the values programmed into the CRTC.
260 centre_horizontally(adjusted_mode, mode->hdisplay);
261 centre_vertically(adjusted_mode, mode->vdisplay);
262 border = LVDS_BORDER_ENABLE;
265 case DRM_MODE_SCALE_ASPECT:
266 /* Scale but preserve the aspect ratio */
268 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
269 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
271 pfit_control |= PFIT_ENABLE;
272 /* 965+ is easy, it does everything in hw */
273 if (scaled_width > scaled_height)
274 pfit_control |= PFIT_SCALING_PILLAR;
275 else if (scaled_width < scaled_height)
276 pfit_control |= PFIT_SCALING_LETTER;
278 pfit_control |= PFIT_SCALING_AUTO;
280 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
281 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
283 * For earlier chips we have to calculate the scaling
284 * ratio by hand and program it into the
285 * PFIT_PGM_RATIO register
287 if (scaled_width > scaled_height) { /* pillar */
288 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
290 border = LVDS_BORDER_ENABLE;
291 if (mode->vdisplay != adjusted_mode->vdisplay) {
292 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
293 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
294 bits << PFIT_VERT_SCALE_SHIFT);
295 pfit_control |= (PFIT_ENABLE |
296 VERT_INTERP_BILINEAR |
297 HORIZ_INTERP_BILINEAR);
299 } else if (scaled_width < scaled_height) { /* letter */
300 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
302 border = LVDS_BORDER_ENABLE;
303 if (mode->hdisplay != adjusted_mode->hdisplay) {
304 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
305 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
306 bits << PFIT_VERT_SCALE_SHIFT);
307 pfit_control |= (PFIT_ENABLE |
308 VERT_INTERP_BILINEAR |
309 HORIZ_INTERP_BILINEAR);
312 /* Aspects match, Let hw scale both directions */
313 pfit_control |= (PFIT_ENABLE |
314 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
315 VERT_INTERP_BILINEAR |
316 HORIZ_INTERP_BILINEAR);
320 case DRM_MODE_SCALE_FULLSCREEN:
322 * Full scaling, even if it changes the aspect ratio.
323 * Fortunately this is all done for us in hw.
325 pfit_control |= PFIT_ENABLE;
327 pfit_control |= PFIT_SCALING_AUTO;
329 pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
330 VERT_INTERP_BILINEAR |
331 HORIZ_INTERP_BILINEAR);
339 if (pfit_control != intel_lvds->pfit_control ||
340 pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
341 intel_lvds->pfit_control = pfit_control;
342 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
343 intel_lvds->pfit_dirty = true;
345 dev_priv->lvds_border_bits = border;
348 * XXX: It would be nice to support lower refresh rates on the
349 * panels to reduce power consumption, and perhaps match the
350 * user's requested refresh rate.
356 static void intel_lvds_prepare(struct drm_encoder *encoder)
358 struct drm_device *dev = encoder->dev;
359 struct drm_i915_private *dev_priv = dev->dev_private;
360 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
362 dev_priv->backlight_level = intel_panel_get_backlight(dev);
364 /* We try to do the minimum that is necessary in order to unlock
365 * the registers for mode setting.
367 * On Ironlake, this is quite simple as we just set the unlock key
368 * and ignore all subtleties. (This may cause some issues...)
370 * Prior to Ironlake, we must disable the pipe if we want to adjust
371 * the panel fitter. However at all other times we can just reset
372 * the registers regardless.
375 if (HAS_PCH_SPLIT(dev)) {
376 I915_WRITE(PCH_PP_CONTROL,
377 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
378 } else if (intel_lvds->pfit_dirty) {
379 I915_WRITE(PP_CONTROL,
380 I915_READ(PP_CONTROL) & ~POWER_TARGET_ON);
381 I915_WRITE(LVDS, I915_READ(LVDS) & ~LVDS_PORT_EN);
383 I915_WRITE(PP_CONTROL,
384 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
388 static void intel_lvds_commit(struct drm_encoder *encoder)
390 struct drm_device *dev = encoder->dev;
391 struct drm_i915_private *dev_priv = dev->dev_private;
392 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
394 if (dev_priv->backlight_level == 0)
395 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
397 /* Undo any unlocking done in prepare to prevent accidental
398 * adjustment of the registers.
400 if (HAS_PCH_SPLIT(dev)) {
401 u32 val = I915_READ(PCH_PP_CONTROL);
402 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
403 I915_WRITE(PCH_PP_CONTROL, val & 0x3);
405 u32 val = I915_READ(PP_CONTROL);
406 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
407 I915_WRITE(PP_CONTROL, val & 0x3);
410 /* Always do a full power on as we do not know what state
413 intel_lvds_set_power(intel_lvds, true);
416 static void intel_lvds_mode_set(struct drm_encoder *encoder,
417 struct drm_display_mode *mode,
418 struct drm_display_mode *adjusted_mode)
420 struct drm_device *dev = encoder->dev;
421 struct drm_i915_private *dev_priv = dev->dev_private;
422 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
425 * The LVDS pin pair will already have been turned on in the
426 * intel_crtc_mode_set since it has a large impact on the DPLL
430 if (HAS_PCH_SPLIT(dev))
433 if (!intel_lvds->pfit_dirty)
437 * Enable automatic panel scaling so that non-native modes fill the
438 * screen. Should be enabled before the pipe is enabled, according to
439 * register description and PRM.
441 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
442 DRM_ERROR("timed out waiting for panel to power off\n");
444 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
445 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
446 intel_lvds->pfit_dirty = false;
450 * Detect the LVDS connection.
452 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
453 * connected and closed means disconnected. We also send hotplug events as
454 * needed, using lid status notification from the input layer.
456 static enum drm_connector_status
457 intel_lvds_detect(struct drm_connector *connector, bool force)
459 struct drm_device *dev = connector->dev;
460 enum drm_connector_status status = connector_status_connected;
462 /* ACPI lid methods were generally unreliable in this generation, so
465 if (IS_GEN2(dev) || IS_GEN3(dev))
466 return connector_status_connected;
472 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
474 static int intel_lvds_get_modes(struct drm_connector *connector)
476 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
477 struct drm_device *dev = connector->dev;
478 struct drm_display_mode *mode;
480 if (intel_lvds->edid) {
481 drm_mode_connector_update_edid_property(connector,
483 return drm_add_edid_modes(connector, intel_lvds->edid);
486 mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
490 drm_mode_probed_add(connector, mode);
494 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
496 DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
500 /* The GPU hangs up on these systems if modeset is performed on LID open */
501 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
503 .callback = intel_no_modeset_on_lid_dmi_callback,
504 .ident = "Toshiba Tecra A11",
506 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
507 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
511 { } /* terminating entry */
515 * Lid events. Note the use of 'modeset_on_lid':
516 * - we set it on lid close, and reset it on open
517 * - we use it as a "only once" bit (ie we ignore
518 * duplicate events where it was already properly
520 * - the suspend/resume paths will also set it to
521 * zero, since they restore the mode ("lid open").
523 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
526 struct drm_i915_private *dev_priv =
527 container_of(nb, struct drm_i915_private, lid_notifier);
528 struct drm_device *dev = dev_priv->dev;
529 struct drm_connector *connector = dev_priv->int_lvds_connector;
532 * check and update the status of LVDS connector after receiving
533 * the LID nofication event.
536 connector->status = connector->funcs->detect(connector,
539 /* Don't force modeset on machines where it causes a GPU lockup */
540 if (dmi_check_system(intel_no_modeset_on_lid))
542 if (!acpi_lid_open()) {
543 dev_priv->modeset_on_lid = 1;
547 if (!dev_priv->modeset_on_lid)
550 dev_priv->modeset_on_lid = 0;
552 mutex_lock(&dev->mode_config.mutex);
553 drm_helper_resume_force_mode(dev);
554 mutex_unlock(&dev->mode_config.mutex);
560 * intel_lvds_destroy - unregister and free LVDS structures
561 * @connector: connector to free
563 * Unregister the DDC bus for this connector then free the driver private
566 static void intel_lvds_destroy(struct drm_connector *connector)
568 struct drm_device *dev = connector->dev;
569 struct drm_i915_private *dev_priv = dev->dev_private;
571 if (dev_priv->lid_notifier.notifier_call)
572 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
573 drm_sysfs_connector_remove(connector);
574 drm_connector_cleanup(connector);
578 static int intel_lvds_set_property(struct drm_connector *connector,
579 struct drm_property *property,
582 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
583 struct drm_device *dev = connector->dev;
585 if (property == dev->mode_config.scaling_mode_property) {
586 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
588 if (value == DRM_MODE_SCALE_NONE) {
589 DRM_DEBUG_KMS("no scaling not supported\n");
593 if (intel_lvds->fitting_mode == value) {
594 /* the LVDS scaling property is not changed */
597 intel_lvds->fitting_mode = value;
598 if (crtc && crtc->enabled) {
600 * If the CRTC is enabled, the display will be changed
601 * according to the new panel fitting mode.
603 drm_crtc_helper_set_mode(crtc, &crtc->mode,
604 crtc->x, crtc->y, crtc->fb);
611 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
612 .dpms = intel_lvds_dpms,
613 .mode_fixup = intel_lvds_mode_fixup,
614 .prepare = intel_lvds_prepare,
615 .mode_set = intel_lvds_mode_set,
616 .commit = intel_lvds_commit,
619 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
620 .get_modes = intel_lvds_get_modes,
621 .mode_valid = intel_lvds_mode_valid,
622 .best_encoder = intel_best_encoder,
625 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
626 .dpms = drm_helper_connector_dpms,
627 .detect = intel_lvds_detect,
628 .fill_modes = drm_helper_probe_single_connector_modes,
629 .set_property = intel_lvds_set_property,
630 .destroy = intel_lvds_destroy,
633 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
634 .destroy = intel_encoder_destroy,
637 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
639 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
643 /* These systems claim to have LVDS, but really don't */
644 static const struct dmi_system_id intel_no_lvds[] = {
646 .callback = intel_no_lvds_dmi_callback,
647 .ident = "Apple Mac Mini (Core series)",
649 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
650 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
654 .callback = intel_no_lvds_dmi_callback,
655 .ident = "Apple Mac Mini (Core 2 series)",
657 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
658 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
662 .callback = intel_no_lvds_dmi_callback,
663 .ident = "MSI IM-945GSE-A",
665 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
666 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
670 .callback = intel_no_lvds_dmi_callback,
671 .ident = "Dell Studio Hybrid",
673 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
674 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
678 .callback = intel_no_lvds_dmi_callback,
679 .ident = "AOpen Mini PC",
681 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
682 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
686 .callback = intel_no_lvds_dmi_callback,
687 .ident = "AOpen Mini PC MP915",
689 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
690 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
694 .callback = intel_no_lvds_dmi_callback,
695 .ident = "Aopen i945GTt-VFA",
697 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
701 .callback = intel_no_lvds_dmi_callback,
702 .ident = "Clientron U800",
704 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
705 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
709 { } /* terminating entry */
713 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
715 * @connector: LVDS connector
717 * Find the reduced downclock for LVDS in EDID.
719 static void intel_find_lvds_downclock(struct drm_device *dev,
720 struct drm_display_mode *fixed_mode,
721 struct drm_connector *connector)
723 struct drm_i915_private *dev_priv = dev->dev_private;
724 struct drm_display_mode *scan;
727 temp_downclock = fixed_mode->clock;
728 list_for_each_entry(scan, &connector->probed_modes, head) {
730 * If one mode has the same resolution with the fixed_panel
731 * mode while they have the different refresh rate, it means
732 * that the reduced downclock is found for the LVDS. In such
733 * case we can set the different FPx0/1 to dynamically select
734 * between low and high frequency.
736 if (scan->hdisplay == fixed_mode->hdisplay &&
737 scan->hsync_start == fixed_mode->hsync_start &&
738 scan->hsync_end == fixed_mode->hsync_end &&
739 scan->htotal == fixed_mode->htotal &&
740 scan->vdisplay == fixed_mode->vdisplay &&
741 scan->vsync_start == fixed_mode->vsync_start &&
742 scan->vsync_end == fixed_mode->vsync_end &&
743 scan->vtotal == fixed_mode->vtotal) {
744 if (scan->clock < temp_downclock) {
746 * The downclock is already found. But we
747 * expect to find the lower downclock.
749 temp_downclock = scan->clock;
753 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
754 /* We found the downclock for LVDS. */
755 dev_priv->lvds_downclock_avail = 1;
756 dev_priv->lvds_downclock = temp_downclock;
757 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
758 "Normal clock %dKhz, downclock %dKhz\n",
759 fixed_mode->clock, temp_downclock);
764 * Enumerate the child dev array parsed from VBT to check whether
765 * the LVDS is present.
766 * If it is present, return 1.
767 * If it is not present, return false.
768 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
770 static bool lvds_is_present_in_vbt(struct drm_device *dev)
772 struct drm_i915_private *dev_priv = dev->dev_private;
775 if (!dev_priv->child_dev_num)
778 for (i = 0; i < dev_priv->child_dev_num; i++) {
779 struct child_device_config *child = dev_priv->child_dev + i;
781 /* If the device type is not LFP, continue.
782 * We have to check both the new identifiers as well as the
783 * old for compatibility with some BIOSes.
785 if (child->device_type != DEVICE_TYPE_INT_LFP &&
786 child->device_type != DEVICE_TYPE_LFP)
789 /* However, we cannot trust the BIOS writers to populate
790 * the VBT correctly. Since LVDS requires additional
791 * information from AIM blocks, a non-zero addin offset is
792 * a good indicator that the LVDS is actually present.
794 if (child->addin_offset)
797 /* But even then some BIOS writers perform some black magic
798 * and instantiate the device without reference to any
799 * additional data. Trust that if the VBT was written into
800 * the OpRegion then they have validated the LVDS's existence.
802 if (dev_priv->opregion.vbt)
810 * intel_lvds_init - setup LVDS connectors on this device
813 * Create the connector, register the LVDS DDC bus, and try to figure out what
814 * modes we can display on the LVDS panel (if present).
816 void intel_lvds_init(struct drm_device *dev)
818 struct drm_i915_private *dev_priv = dev->dev_private;
819 struct intel_lvds *intel_lvds;
820 struct intel_encoder *intel_encoder;
821 struct intel_connector *intel_connector;
822 struct drm_connector *connector;
823 struct drm_encoder *encoder;
824 struct drm_display_mode *scan; /* *modes, *bios_mode; */
825 struct drm_crtc *crtc;
827 int pipe, gpio = GPIOC;
829 /* Skip init on machines we know falsely report LVDS */
830 if (dmi_check_system(intel_no_lvds))
833 if (!lvds_is_present_in_vbt(dev)) {
834 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
838 if (HAS_PCH_SPLIT(dev)) {
839 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
841 if (dev_priv->edp_support) {
842 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
848 intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
853 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
854 if (!intel_connector) {
859 if (!HAS_PCH_SPLIT(dev)) {
860 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
863 intel_encoder = &intel_lvds->base;
864 encoder = &intel_encoder->base;
865 connector = &intel_connector->base;
866 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
867 DRM_MODE_CONNECTOR_LVDS);
869 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
870 DRM_MODE_ENCODER_LVDS);
872 intel_connector_attach_encoder(intel_connector, intel_encoder);
873 intel_encoder->type = INTEL_OUTPUT_LVDS;
875 intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
876 intel_encoder->crtc_mask = (1 << 1);
877 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
878 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
879 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
880 connector->interlace_allowed = false;
881 connector->doublescan_allowed = false;
883 /* create the scaling mode property */
884 drm_mode_create_scaling_mode_property(dev);
886 * the initial panel fitting mode will be FULL_SCREEN.
889 drm_connector_attach_property(&intel_connector->base,
890 dev->mode_config.scaling_mode_property,
891 DRM_MODE_SCALE_ASPECT);
892 intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
895 * 1) check for EDID on DDC
896 * 2) check for VBT data
897 * 3) check to see if LVDS is already on
898 * if none of the above, no panel
899 * 4) make sure lid is open
900 * if closed, act like it's not there for now
904 * Attempt to get the fixed panel mode from DDC. Assume that the
905 * preferred mode is the right one.
907 intel_lvds->edid = drm_get_edid(connector,
908 &dev_priv->gmbus[GMBUS_PORT_PANEL].adapter);
910 if (!intel_lvds->edid) {
911 /* Didn't get an EDID, so
912 * Set wide sync ranges so we get all modes
913 * handed to valid_mode for checking
915 connector->display_info.min_vfreq = 0;
916 connector->display_info.max_vfreq = 200;
917 connector->display_info.min_hfreq = 0;
918 connector->display_info.max_hfreq = 200;
921 list_for_each_entry(scan, &connector->probed_modes, head) {
922 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
923 intel_lvds->fixed_mode =
924 drm_mode_duplicate(dev, scan);
925 intel_find_lvds_downclock(dev,
926 intel_lvds->fixed_mode,
932 /* Failed to get EDID, what about VBT? */
933 if (dev_priv->lfp_lvds_vbt_mode) {
934 intel_lvds->fixed_mode =
935 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
936 if (intel_lvds->fixed_mode) {
937 intel_lvds->fixed_mode->type |=
938 DRM_MODE_TYPE_PREFERRED;
944 * If we didn't get EDID, try checking if the panel is already turned
945 * on. If so, assume that whatever is currently programmed is the
949 /* Ironlake: FIXME if still fail, not try pipe mode now */
950 if (HAS_PCH_SPLIT(dev))
953 lvds = I915_READ(LVDS);
954 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
955 crtc = intel_get_crtc_for_pipe(dev, pipe);
957 if (crtc && (lvds & LVDS_PORT_EN)) {
958 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
959 if (intel_lvds->fixed_mode) {
960 intel_lvds->fixed_mode->type |=
961 DRM_MODE_TYPE_PREFERRED;
966 /* If we still don't have a mode after all that, give up. */
967 if (!intel_lvds->fixed_mode)
971 if (HAS_PCH_SPLIT(dev)) {
973 /* make sure PWM is enabled */
974 pwm = I915_READ(BLC_PWM_CPU_CTL2);
975 pwm |= (PWM_ENABLE | PWM_PIPE_B);
976 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
978 pwm = I915_READ(BLC_PWM_PCH_CTL1);
979 pwm |= PWM_PCH_ENABLE;
980 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
982 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
983 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
984 DRM_DEBUG_KMS("lid notifier registration failed\n");
985 dev_priv->lid_notifier.notifier_call = NULL;
987 /* keep the LVDS connector */
988 dev_priv->int_lvds_connector = connector;
989 drm_sysfs_connector_add(connector);
993 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
994 drm_connector_cleanup(connector);
995 drm_encoder_cleanup(encoder);
997 kfree(intel_connector);