try to make ABI compatible with TI 1.4.14.2616/4_00_00_01 release
[sgx.git] / pvr / sgxapi_km.h
1 /**********************************************************************
2  *
3  * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful but, except
10  * as otherwise stated in writing, without any warranty; without even the
11  * implied warranty of merchantability or fitness for a particular purpose.
12  * See the GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17  *
18  * The full GNU General Public License is included in this distribution in
19  * the file called "COPYING".
20  *
21  * Contact Information:
22  * Imagination Technologies Ltd. <gpl-support@imgtec.com>
23  * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
24  *
25  ******************************************************************************/
26
27 #ifndef __SGXAPI_KM_H__
28 #define __SGXAPI_KM_H__
29
30
31 #include "sgxdefs.h"
32 #include "img_types.h"
33
34 #if defined(__KERNEL__)
35 #include <linux/unistd.h>
36 #else
37 #include <unistd.h>
38 #endif
39
40 #define SGX_UNDEFINED_HEAP_ID                           (~0LU)
41 #define SGX_GENERAL_HEAP_ID                             0
42 #define SGX_TADATA_HEAP_ID                              1
43 #define SGX_KERNEL_CODE_HEAP_ID                         2
44 #define SGX_KERNEL_DATA_HEAP_ID                         3
45 #define SGX_PIXELSHADER_HEAP_ID                         4
46 #define SGX_VERTEXSHADER_HEAP_ID                        5
47 #define SGX_PDSPIXEL_CODEDATA_HEAP_ID                   6
48 #define SGX_PDSVERTEX_CODEDATA_HEAP_ID                  7
49 #define SGX_SYNCINFO_HEAP_ID                            8
50 #define SGX_3DPARAMETERS_HEAP_ID                        9
51 #define SGX_MAX_HEAP_ID                                 10
52
53 #define SGX_MAX_TA_STATUS_VALS                          32
54 #if 0
55 #define SGX_MAX_3D_STATUS_VALS                          4
56 #else
57 #define SGX_MAX_3D_STATUS_VALS                          2
58 #endif
59
60 #define SGX_MAX_SRC_SYNCS                               4
61
62 #define PVRSRV_SGX_HWPERF_NUM_COUNTERS                  9
63
64 #define PVRSRV_SGX_HWPERF_INVALID                       0x1
65
66 #define PVRSRV_SGX_HWPERF_TRANSFER                      0x2
67 #define PVRSRV_SGX_HWPERF_TA                            0x3
68 #define PVRSRV_SGX_HWPERF_3D                            0x4
69 #define PVRSRV_SGX_HWPERF_2D                            0x5
70
71 #define PVRSRV_SGX_HWPERF_MK_EVENT                      0x101
72 #define PVRSRV_SGX_HWPERF_MK_TA                         0x102
73 #define PVRSRV_SGX_HWPERF_MK_3D                         0x103
74 #define PVRSRV_SGX_HWPERF_MK_2D                         0x104
75
76 #define PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT             28
77 #define PVRSRV_SGX_HWPERF_TYPE_OP_MASK                                  \
78         ((1 << PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT) - 1)
79 #define PVRSRV_SGX_HWPERF_TYPE_OP_START                                 \
80         (0 << PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT)
81 #define PVRSRV_SGX_HWPERF_TYPE_OP_END                                   \
82         (1 << PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT)
83
84 #define PVRSRV_SGX_HWPERF_TYPE_TRANSFER_START                           \
85         (PVRSRV_SGX_HWPERF_TRANSFER | PVRSRV_SGX_HWPERF_TYPE_OP_START)
86 #define PVRSRV_SGX_HWPERF_TYPE_TRANSFER_END                             \
87         (PVRSRV_SGX_HWPERF_TRANSFER | PVRSRV_SGX_HWPERF_TYPE_OP_END)
88 #define PVRSRV_SGX_HWPERF_TYPE_TA_START                                 \
89         (PVRSRV_SGX_HWPERF_TA | PVRSRV_SGX_HWPERF_TYPE_OP_START)
90 #define PVRSRV_SGX_HWPERF_TYPE_TA_END                                   \
91         (PVRSRV_SGX_HWPERF_TA | PVRSRV_SGX_HWPERF_TYPE_OP_END)
92 #define PVRSRV_SGX_HWPERF_TYPE_3D_START                                 \
93         (PVRSRV_SGX_HWPERF_3D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
94 #define PVRSRV_SGX_HWPERF_TYPE_3D_END                                   \
95         (PVRSRV_SGX_HWPERF_3D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
96 #define PVRSRV_SGX_HWPERF_TYPE_2D_START                                 \
97         (PVRSRV_SGX_HWPERF_2D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
98 #define PVRSRV_SGX_HWPERF_TYPE_2D_END                                   \
99         (PVRSRV_SGX_HWPERF_2D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
100
101 #define PVRSRV_SGX_HWPERF_TYPE_MK_EVENT_START                           \
102         (PVRSRV_SGX_HWPERF_MK_EVENT | PVRSRV_SGX_HWPERF_TYPE_OP_START)
103 #define PVRSRV_SGX_HWPERF_TYPE_MK_EVENT_END                             \
104         (PVRSRV_SGX_HWPERF_MK_EVENT | PVRSRV_SGX_HWPERF_TYPE_OP_END)
105 #define PVRSRV_SGX_HWPERF_TYPE_MK_TA_START                              \
106         (PVRSRV_SGX_HWPERF_MK_TA | PVRSRV_SGX_HWPERF_TYPE_OP_START)
107 #define PVRSRV_SGX_HWPERF_TYPE_MK_TA_END                                \
108         (PVRSRV_SGX_HWPERF_MK_TA | PVRSRV_SGX_HWPERF_TYPE_OP_END)
109 #define PVRSRV_SGX_HWPERF_TYPE_MK_3D_START                              \
110         (PVRSRV_SGX_HWPERF_MK_3D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
111 #define PVRSRV_SGX_HWPERF_TYPE_MK_3D_END                                \
112         (PVRSRV_SGX_HWPERF_MK_3D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
113 #define PVRSRV_SGX_HWPERF_TYPE_MK_2D_START                              \
114         (PVRSRV_SGX_HWPERF_MK_2D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
115 #define PVRSRV_SGX_HWPERF_TYPE_MK_2D_END                                \
116         (PVRSRV_SGX_HWPERF_MK_2D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
117
118 #define PVRSRV_SGX_HWPERF_OFF                                   0x0
119 #define PVRSRV_SGX_HWPERF_GRAPHICS_ON                           (1UL << 0)
120 #define PVRSRV_SGX_HWPERF_MK_EXECUTION_ON                       (1UL << 1)
121
122 struct PVRSRV_SGX_HWPERF_CB_ENTRY {
123         u32 ui32FrameNo;
124         u32 ui32Type;
125         u32 ui32Ordinal;
126         u32 ui32Clocksx16;
127         u32 ui32Counters[PVRSRV_SGX_HWPERF_NUM_COUNTERS];
128 };
129
130 struct PVRSRV_SGX_HWPERF_CBDATA {
131         u32 ui32FrameNo;
132         u32 ui32Type;
133         u32 ui32StartTimeWraps;
134         u32 ui32StartTime;
135         u32 ui32EndTimeWraps;
136         u32 ui32EndTime;
137         u32 ui32ClockSpeed;
138         u32 ui32TimeMax;
139 };
140
141 struct SGX_MISC_INFO_HWPERF_RETRIEVE_CB {
142         struct PVRSRV_SGX_HWPERF_CBDATA *psHWPerfData;
143         u32 ui32ArraySize;
144         u32 ui32DataCount;
145         u32 ui32Time;
146 };
147
148 struct CTL_STATUS {
149         struct IMG_DEV_VIRTADDR sStatusDevAddr;
150         u32 ui32StatusValue;
151 };
152
153 enum SGX_MISC_INFO_REQUEST {
154         SGX_MISC_INFO_REQUEST_CLOCKSPEED = 0,
155         SGX_MISC_INFO_REQUEST_SGXREV,
156         SGX_MISC_INFO_REQUEST_DRIVER_SGXREV,
157         SGX_MISC_INFO_REQUEST_SET_HWPERF_STATUS,
158         SGX_MISC_INFO_REQUEST_HWPERF_CB_ON,
159         SGX_MISC_INFO_REQUEST_HWPERF_CB_OFF,
160         SGX_MISC_INFO_REQUEST_HWPERF_RETRIEVE_CB,
161         SGX_MISC_INFO_REQUEST_FORCE_I16 = 0x7fff
162 };
163
164 struct PVRSRV_SGX_MISCINFO_FEATURES {
165         u32 ui32CoreRev;
166         u32 ui32CoreID;
167         u32 ui32DDKVersion;
168         u32 ui32DDKBuild;
169         u32 ui32CoreIdSW;
170         u32 ui32CoreRevSW;
171         u32 ui32BuildOptions;
172 };
173
174 struct SGX_MISC_INFO {
175         enum SGX_MISC_INFO_REQUEST eRequest;
176
177         union {
178                 u32 reserved;
179                 struct PVRSRV_SGX_MISCINFO_FEATURES sSGXFeatures;
180                 u32 ui32SGXClockSpeed;
181                 u32 ui32NewHWPerfStatus;
182                 struct SGX_MISC_INFO_HWPERF_RETRIEVE_CB sRetrieveCB;
183         } uData;
184 };
185
186 enum render_state_buf_type {
187         RSB_USSE_VERTEX_PROG,
188         RSB_USSE_FRAGMENT_PROG,
189 };
190
191 struct render_state_buf_info {
192         u32                             buf_id;
193         u32                             offset;
194         u32                             size;
195         enum render_state_buf_type      type;
196 };
197
198 struct render_state_buf_list {
199         u32                             cnt;
200         struct render_state_buf_info    info[20];
201 };
202
203 #define SGX_KICKTA_DUMPBITMAP_MAX_NAME_LENGTH           256
204
205 struct SGX_KICKTA_DUMPBITMAP {
206         struct IMG_DEV_VIRTADDR sDevBaseAddr;
207         u32 ui32Flags;
208         u32 ui32Width;
209         u32 ui32Height;
210         u32 ui32Stride;
211         u32 ui32PDUMPFormat;
212         u32 ui32BytesPP;
213         char pszName[SGX_KICKTA_DUMPBITMAP_MAX_NAME_LENGTH];
214 };
215
216 #define PVRSRV_SGX_PDUMP_CONTEXT_MAX_BITMAP_ARRAY_SIZE  16
217
218 struct PVRSRV_SGX_PDUMP_CONTEXT {
219         u32 ui32CacheControl;
220 };
221
222 struct SGX_KICKTA_DUMP_ROFF {
223         void *hKernelMemInfo;
224         u32 uiAllocIndex;
225         u32 ui32Offset;
226         u32 ui32Value;
227         char *pszName;
228 };
229
230 struct SGX_KICKTA_DUMP_BUFFER {
231         u32 ui32SpaceUsed;
232         u32 ui32Start;
233         u32 ui32End;
234         u32 ui32BufferSize;
235         u32 ui32BackEndLength;
236         u32 uiAllocIndex;
237         void *hKernelMemInfo;
238         void *pvLinAddr;
239         char *pszName;
240 };
241
242 #ifdef PDUMP
243 struct SGX_KICKTA_PDUMP {
244
245         struct SGX_KICKTA_DUMPBITMAP *psPDumpBitmapArray;
246         u32 ui32PDumpBitmapSize;
247
248         struct SGX_KICKTA_DUMP_BUFFER *psBufferArray;
249         u32 ui32BufferArraySize;
250
251         struct SGX_KICKTA_DUMP_ROFF *psROffArray;
252         u32 ui32ROffArraySize;
253 };
254 #endif
255
256 #define SGX_MAX_TRANSFER_STATUS_VALS    2
257 #define SGX_MAX_TRANSFER_SYNC_OPS       5
258
259 #endif