pandora-u-boot.git
9 months agoPrepare v2021.01 v2021.01
Tom Rini [Mon, 11 Jan 2021 18:11:43 +0000 (13:11 -0500)]
Prepare v2021.01

Signed-off-by: Tom Rini <trini@konsulko.com>
9 months agoxea: config: Disable CONFIG_SPL_OF_PLATDATA_PARENT on XEA (imx28)
Lukasz Majewski [Sat, 26 Dec 2020 00:09:02 +0000 (01:09 +0100)]
xea: config: Disable CONFIG_SPL_OF_PLATDATA_PARENT on XEA (imx28)

On the XEA board (imx28) one needs in the SPL support for GPIO, MMC and
SPI. Two last ones are necessary for booting the device. The GPIO support
allows deciding which medium will be used. For example the GPIO DTS node
(gpio@0 at imx28.dtsi) has pinctrl parent (pinctrl@80018000) for which we
don't need driver asigned for correct operation.
In the spl/dts/dt-platdata.c the gpio@0 has index 4 and its parent -
pinctrl@80018000 has index 5.

In the bind_drivers_pass() function (at drivers/core/lists.c) call to
device_bind_by_name() for `fsl_imx23_pinctrl` returns -2, which is
expected.

With current setup - when the SPL_OF_PLATDATA_PARENT=y
The gpio@0 node with index 4 is skipped as its parent with 5 is not yet
bound. It cannot be as we don't need and provide the driver for it.
As a result the gpio@0 is never bound and we end up with bricked board in
the SPL stage.

When CONFIG_SPL_OF_PLATDATA_PARENT is NOT set, all entries from
spl/dts/dt-platdata.c are scanned in ascending index order, so gpio@0 is
properly initialized. For `fsl_imx_pinctrl` we simply check 10 times if
the driver for is available (which is not) and exit.

As a result the GPIOs are initialized and can be used in early SPL stage.
This commit fixes XEA regression introduced with e41651fffda7da55f6.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 months agoxea: config: Use CONFIG_PREBOOT from Kconfig
Lukasz Majewski [Sat, 26 Dec 2020 00:09:01 +0000 (01:09 +0100)]
xea: config: Use CONFIG_PREBOOT from Kconfig

The usage of the preboot feature is now controlled via a separate Kconfig
option - namely CONFIG_USE_PREBOOT.
It must be enabled for preboot code executing commands now defined in
CONFIG_PREBOOT (also moved to the Kconfig).

After defining both CONFIG_USE_PREBOOT and CONFIG_PREBOOT in
imx28_xea_defconfig the define of CONFIG_PREBOOT shall be removed from
xea.h as it is redundant.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
9 months agoxea: spl: Disable pull UP for GPIO0_2{35}
Lukasz Majewski [Sat, 26 Dec 2020 00:09:00 +0000 (01:09 +0100)]
xea: spl: Disable pull UP for GPIO0_2{35}

On the imx287 pin GPMI_WRN (GPIO0_25) no PullUP is available that can be
enabled.

To get the same behavior for both boot select pins (i.e. GPIO0_2{35})
disable pull UPs on both.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
9 months agorockchip: pinebook-pro: default to SPI bus 1 for SPI-flash
Hugh Cole-Baker [Sun, 22 Nov 2020 13:03:44 +0000 (13:03 +0000)]
rockchip: pinebook-pro: default to SPI bus 1 for SPI-flash

SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")

9 months agoMerge tag 'u-boot-stm32-20210106' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Wed, 6 Jan 2021 12:48:19 +0000 (07:48 -0500)]
Merge tag 'u-boot-stm32-20210106' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Fix GPIO hog flags on DHCOM boards

9 months agoARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
Marek Vasut [Sat, 2 Jan 2021 16:44:47 +0000 (17:44 +0100)]
ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02

The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Since GPIO_ACTIVE_HIGH is defined as 0, this change only increases the
correctness of the DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
9 months agoARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
Marek Vasut [Sat, 2 Jan 2021 16:44:46 +0000 (17:44 +0100)]
ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX

The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Due to a change in gpiolib-of.c, setting flags to GPIO_ACTIVE_LOW and
using output-low DT property leads to the GPIO being set high instead.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
9 months agoMerge tag 'ti-v2021.01-rc5' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
Tom Rini [Tue, 5 Jan 2021 21:10:33 +0000 (16:10 -0500)]
Merge tag 'ti-v2021.01-rc5' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

- Fix I2C speed for Nokia RX51

9 months agoNokia RX-51: Decrease i2c speed to 100000
Pali Rohár [Sat, 21 Nov 2020 22:30:11 +0000 (23:30 +0100)]
Nokia RX-51: Decrease i2c speed to 100000

It looks like that i2c bus lot of times timeout on some units. Prior
migration to CONFIG_DM_I2C i2c speed was set to CONFIG_SYS_OMAP24_I2C_SPEED
value which was 100000. Lower speed fixes timeout problems, so change speed
back to its previous value.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 8d8c18170325 ("Nokia RX-51: Convert to CONFIG_DM_I2C")
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
9 months agoimage: support board_fit_config_name_match
Sebastian Reichel [Mon, 4 Jan 2021 19:48:04 +0000 (20:48 +0100)]
image: support board_fit_config_name_match

Support reusing board_fit_config_name_match() to automatically
select a sensible default configuration for booting fitImages
using 'bootm'.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
9 months agoimage: cleanup pre-processor usage
Sebastian Reichel [Mon, 4 Jan 2021 19:48:03 +0000 (20:48 +0100)]
image: cleanup pre-processor usage

Replace most #ifdef checks for USE_HOSTCC and CONFIG_*
with normal if instructions.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
9 months agoPrepare v2021.01-rc5 v2021.01-rc5
Tom Rini [Tue, 5 Jan 2021 12:30:39 +0000 (07:30 -0500)]
Prepare v2021.01-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
9 months agoMerge branch '2021-01-04-minor-fixes'
Tom Rini [Mon, 4 Jan 2021 14:11:35 +0000 (09:11 -0500)]
Merge branch '2021-01-04-minor-fixes'

- Assorted fixes

9 months agocosmetic: fix typo in drivers/usb/Kconfig
Marc Ferland [Wed, 23 Dec 2020 15:13:22 +0000 (10:13 -0500)]
cosmetic: fix typo in drivers/usb/Kconfig

This commit fixes a simple typo: sPL --> SPL.

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
9 months agocmd: ubi: don't allow to rename a volume to a name that already exist
Philippe Reynes [Wed, 23 Dec 2020 14:33:07 +0000 (15:33 +0100)]
cmd: ubi: don't allow to rename a volume to a name that already exist

This commits add a check on the command ubi rename. This check avoids
to rename a volume to with a name that is already used on another ubi
volume. If two volumes has the same name, then the ubi device can't be
mounted anymore.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
9 months agomailmap: Update mail address for Igor Opaniuk
Igor Opaniuk [Wed, 30 Dec 2020 17:25:47 +0000 (19:25 +0200)]
mailmap: Update mail address for Igor Opaniuk

My address at Toradex doesn't exist anymore, map this address
to my personal email.

Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agodoc: android/boot-image: invalid C declaration
Heinrich Schuchardt [Wed, 30 Dec 2020 16:55:22 +0000 (17:55 +0100)]
doc: android/boot-image: invalid C declaration

make htmldocs results in an error:

doc/android/boot-image.rst:33:
WARNING: Unparseable C cross-reference: 'struct andr_img_hdr'
Invalid C declaration: Expected identifier in nested name, got keyword:
struct [error at 6]

Follow the style prescribed in
https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html#highlights-and-cross-references

Add missing definite article.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agonvme: Use only 32-bit accesses in nvme_writeq/nvme_readq
Stefan Agner [Wed, 30 Dec 2020 12:16:36 +0000 (13:16 +0100)]
nvme: Use only 32-bit accesses in nvme_writeq/nvme_readq

There might be hardware configurations where 64-bit data accesses
to NVMe registers are not supported properly.  This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit NVMe registers, similarly as it is done in Linux kernel.

This patch fixes operation of NVMe devices on RPi4 Broadcom BCM2711 SoC
based board, where the PCIe Root Complex, which is attached to the
system through the SCB bridge.

Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
nvme_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0x3c033fff3c033fff which lead to NVMe devices to fail
probing.

This fix is analogous to commit 8e2ab05000ab ("usb: xhci: Use only
32-bit accesses in xhci_writeq/xhci_readq").

Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
9 months agoMerge tag 'efi-2021-01-rc5-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Tue, 29 Dec 2020 15:23:58 +0000 (10:23 -0500)]
Merge tag 'efi-2021-01-rc5-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc5 (2)

The following errors in the UEFI sub-system are fixed:

* use after free in efi_exit()
* invalid free when using the boot manager
* pressing escape key once not recognized

9 months agoefi_loader: use after free in efi_exit()
Heinrich Schuchardt [Mon, 28 Dec 2020 22:24:40 +0000 (23:24 +0100)]
efi_loader: use after free in efi_exit()

Do not use data from the loaded image object after deleting it.

Fixes: 126a43f15b36 ("efi_loader: unload applications upon Exit()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agoefi_loader: describe struct efi_loaded_image_obj
Heinrich Schuchardt [Mon, 28 Dec 2020 21:42:51 +0000 (22:42 +0100)]
efi_loader: describe struct efi_loaded_image_obj

Add the missing description of some fields of struct efi_loaded_image_obj.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agoefi_loader: efi_signal_event() fix comment typos
Heinrich Schuchardt [Sun, 27 Dec 2020 23:59:09 +0000 (00:59 +0100)]
efi_loader: efi_signal_event() fix comment typos

Add missing commas.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agoefi_loader: avoid invalid free
Heinrich Schuchardt [Sun, 27 Dec 2020 14:46:00 +0000 (15:46 +0100)]
efi_loader: avoid invalid free

load_options passed from do_efibootmgr() to do_bootefi_exec() may contain
invalid data from the stack which will lead to an invalid free().

Fixes: 0ad64007feb9 ("efi_loader: set load options in boot manager")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agoefi_loader: escape key handling
Heinrich Schuchardt [Sun, 27 Dec 2020 13:47:50 +0000 (14:47 +0100)]
efi_loader: escape key handling

Up to now the escape key was not correctly detected in UEFI applications.
We had to hit it twice for a single escape to be recognized.

Use a 10 ms delay to detect if we are dealing with the escape key or an
escape sequence.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agoefi_loader: missing parentheses after if
Heinrich Schuchardt [Sun, 27 Dec 2020 14:33:09 +0000 (15:33 +0100)]
efi_loader: missing parentheses after if

IS_ENABLED() contains parentheses. But we should still put extra
parentheses around it in an if statement for readability.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agoMerge tag 'u-boot-imx-20201227' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Mon, 28 Dec 2020 12:44:03 +0000 (07:44 -0500)]
Merge tag 'u-boot-imx-20201227' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2021.1
----------------

CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/5680

- fixes for Variscite dart6ul
- imx8mp : increase malloc area
- fixes for bx50v3
- imx8m: HS400ES and UHS for EVK
- imx8qm-rom7720: fix phy bind

9 months agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Mon, 28 Dec 2020 12:43:28 +0000 (07:43 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell

- Fix "Assert PERST# signal when unloading driver" in a37xx PCI
  driver (Pali)
- Fix SPL on armada-xp-gp (add u-boot,dm-pre-reloc and alias) (myself)

9 months agoRevert "arm64: a37xx: pci: Assert PERST# signal when unloading driver"
Pali Rohár [Wed, 23 Dec 2020 15:07:08 +0000 (16:07 +0100)]
Revert "arm64: a37xx: pci: Assert PERST# signal when unloading driver"

This reverts commit 828d32621686aec593076d16445d39b9b8d49c05.

This change revers code which asserting PERST# signal when unloading
driver. Driver's remove callback is still there as it is used for other
functionality.

Asserting PERST# signal prior booting kernel is causing that A3720 boards
(Turris MOX and Espressobin) with stable Linux kernel versions 4.14 and
4.19 are not able to detect some PCIe cards (e.g. Compex WLE200 and WLE900)
and anymore. When PERST# signal is not asserted these cards are detected
correctly. As this is regression for existing stable Linux kernel versions
revert this problematic change in U-Boot.

To make cards working with OpenWRT 4.14 kernel it is needed to disable link
training prior booting kernel, which is already done in driver's remove
callback.

Described issue is in Linux kernel pci aardvark driver which is (hopefully)
fixed in latest upstream versions. Latest upstream versions should be able
to initialize PCIe bus and detects cards independently of the link training
and PERST# signal state.

So with this change, U-Boot on A3720 boards should be able to boot OpenWRT
4.14 kernel, stable 4.14 and 4.19 kernels and also latest mainline kernels.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
9 months agoarm: mvebu: armada-xp-gp.dts: Add spi0 alias
Stefan Roese [Fri, 11 Dec 2020 04:47:40 +0000 (05:47 +0100)]
arm: mvebu: armada-xp-gp.dts: Add spi0 alias

For correct spi bus detection the spi0 alias is needed in the DT.
Otherwise this error will ocurr in U-Boot:

Invalid bus 0 (err=-19)
Failed to initialize SPI flash at 0:0 (error -19)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
9 months agoarm: mvebu: Add armada-xp-gp-u-boot.dtsi for U-Boot properties
Stefan Roese [Thu, 10 Dec 2020 05:40:10 +0000 (06:40 +0100)]
arm: mvebu: Add armada-xp-gp-u-boot.dtsi for U-Boot properties

Add some missing "u-boot,dm-pre-reloc;" properties to UART0, SPI
controller and SPI NOR flash node to enable usage in SPL. Otherwise
these devices will not be available.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
9 months agoi2c: mxc_i2c: improve error message readability
Marc Ferland [Mon, 21 Dec 2020 14:50:16 +0000 (09:50 -0500)]
i2c: mxc_i2c: improve error message readability

Use 0x%2lx to print the i2c bus base address in hexadecimal format
instead of printing as an integer.

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
9 months agoimx: mx7: clock: use correct format strings
Heinrich Schuchardt [Fri, 25 Dec 2020 15:22:27 +0000 (16:22 +0100)]
imx: mx7: clock: use correct format strings

Use %u and not %d for unsigned values.
Print kHz and not khz.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
9 months agoarm: dart6ul: read and print SoM info from eeprom on startup
Marc Ferland [Tue, 22 Dec 2020 19:24:12 +0000 (14:24 -0500)]
arm: dart6ul: read and print SoM info from eeprom on startup

The dart6ul has an i2c eeprom at 0x50 which contains, among other
things, the manufacturing/revision/options info of the SoM. This patch
replaces the current checkboard() implementation with a more
exhaustive one based on the content of the eeprom.

Since this code uses the new driver model, some changes were also
required in the DTS to make the nodes related to i2c available before
relocation.

This code was inspired from the supported u-boot code from Variscite
which can be found here:

https://github.com/varigit/uboot-imx/tree/imx_v2018.03_4.14.78_1.0.0_ga_var02

New output example:

Board: PN: VSM-6UL-705B, Assy: AS1812142257, Date: 2019 Feb 17
       Storage: eMMC, Wifi: yes, DDR: 1024 MiB, Rev: 2.4G

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
9 months agoarm: dart6ul: change compatible string for eeprom
Marc Ferland [Tue, 22 Dec 2020 19:24:11 +0000 (14:24 -0500)]
arm: dart6ul: change compatible string for eeprom

The eeprom at address 0x50 is a BR24G04NUX-3TTR. It has a
4Kbit (512x8) capacity, change the compatible string to reflect this
fact.

Also, add an alias to easily refer to this eeprom with
fdt_path_offset() which will be in another commit.

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
9 months agotoradex: hand over maintainership
Igor Opaniuk [Tue, 22 Dec 2020 15:56:46 +0000 (17:56 +0200)]
toradex: hand over maintainership

Hand over maintainership of Toradex SoMs (that I was responsible of) to
Oleksandr because of my resignation from Toradex, as such I will
have no immediate involvement with these modules and as a result not
able to continue maintaining these boards.

CC: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
9 months agoimx8mp_evk: Increase CONFIG_SYS_MALLOC_F_LEN
Fabio Estevam [Mon, 21 Dec 2020 18:40:37 +0000 (15:40 -0300)]
imx8mp_evk: Increase CONFIG_SYS_MALLOC_F_LEN

When booting imx8mp-evk the following allocation error
message is seen:

U-Boot 2021.01-rc3-00200-ge668bec96a5f (Dec 21 2020 - 14:36:42 -0300)

alloc space exhausted

Fix it by increasing CONFIG_SYS_MALLOC_F_LEN to 0x10000 like it
is done on other i.MX8MM/8MN boards.

Reported-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
9 months agoimx: ahab: allow to bypass confirmation for ahab_close cmd
Clément Péron [Mon, 21 Dec 2020 17:31:28 +0000 (18:31 +0100)]
imx: ahab: allow to bypass confirmation for ahab_close cmd

Calling ahab_close cmd force the user to interact for confirmation.

This is not user-friendly when using this cmd during factory process.

Allow the user to pass '-y' option to bypass this confirmation.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Oliver Graute <oliver.graute@kococonnector.com>
9 months agoboard: ge: bx50v3: cleanup phy config
Sebastian Reichel [Mon, 14 Dec 2020 23:41:57 +0000 (00:41 +0100)]
board: ge: bx50v3: cleanup phy config

The current PHY rework does the following things:

1. Configure 125MHz clock
2. Setup the TX clock delay (RX is enabled by default),
3. Setup reserved bits to avoid voltage peak

The clock delays are nowadays already configured by the
PHY driver (in ar803x_delay_config). The code for that
can simply be dropped. The clock speed can also be
configured by the PHY driver by adding the device tree
property "qca,clk-out-frequency".

What is left is setting up the undocumented reserved bits
to avoid the voltage peak problem. I slightly improved its
documentation while updating the board's PHY rework code.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
9 months agoboard: ge: bx50v3: remove confidx magic numbers
Sebastian Reichel [Mon, 14 Dec 2020 23:41:56 +0000 (00:41 +0100)]
board: ge: bx50v3: remove confidx magic numbers

Instead of hardcoding index magic numbers in the board code,
also rely on board_fit_config_name_match choosing the right
config for the fitImage containing the kernel.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
9 months agoMerge tag 'efi-2021-01-rc5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sat, 26 Dec 2020 13:02:19 +0000 (08:02 -0500)]
Merge tag 'efi-2021-01-rc5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc5

* In the Standalone MM based implementation of UEFI variables
  check the internal OP-TEE return code

9 months agoefi_loader: Extra checks while opening an OPTEE session
Ilias Apalodimas [Wed, 23 Dec 2020 11:25:00 +0000 (13:25 +0200)]
efi_loader: Extra checks while opening an OPTEE session

When opening an OP-TEE session we need to check the internal return
value of OP-TEE call arguments as well the return code of the
function itself.
The code was also ignoring to close the OP-TEE session in case the
shared memory registration failed.

Fixes: f042e47e8fb43 ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agocompiler.h: add host_build()
Sebastian Reichel [Mon, 14 Dec 2020 23:41:53 +0000 (00:41 +0100)]
compiler.h: add host_build()

Add a host_build() function, so that it's possible to
check for software being build with USE_HOSTCC without
relying on preprocessor conditions. In other words

 #ifdef USE_HOSTCC
  host_only_code();
 #endif

can be written like this instead:

 if (host_build())
  host_only_code();

This improves code readability and test coverage and
compiler will eleminate this unreachable code.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 months agomx6sabresd: Remove unneeded checkboard()
Fabio Estevam [Mon, 14 Dec 2020 17:32:39 +0000 (14:32 -0300)]
mx6sabresd: Remove unneeded checkboard()

After the conversion to device tree the board information becomes
redundant:

Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board
Board: MX6-SabreSD

Remove the printing of the board information.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
9 months agoconfigs: imx8m: enable eMMC HS400ES and SD UHS mode on EVK
Andrey Zhizhikin [Sat, 5 Dec 2020 17:29:19 +0000 (17:29 +0000)]
configs: imx8m: enable eMMC HS400ES and SD UHS mode on EVK

i.MX8M series includes support for high speed modes in uSDHC controllers.
Turn on corresponding configuration options for EVK boards, which would
enable high speed modes to be included in U-Boot.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
9 months agoARM: dts: imx8m: add UHS or HS400/HS400ES properties
Andrey Zhizhikin [Sat, 5 Dec 2020 17:29:18 +0000 (17:29 +0000)]
ARM: dts: imx8m: add UHS or HS400/HS400ES properties

i.MX8M series provide support for high speed grades in their
usdhc controllers, which has eMMC and SDHC connected to them.

Enable this support across the entire i.MX8M family by providing quirks
to usdhc controllers designated by storage media connected to them.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
9 months agoARM: dts: imx8m: increase off-on delay on the SD Vcc regulator
Andrey Zhizhikin [Sat, 5 Dec 2020 17:29:17 +0000 (17:29 +0000)]
ARM: dts: imx8m: increase off-on delay on the SD Vcc regulator

Some SD Card controller and power circuitry has increased capacitance,
which keeps the internal logic remains powered after regulator is switch
off. This is generally the case when card is switched to SD104 mode,
where a power cycle should be performed. In case if the card internal
logic remains powered, it causes a subsequent failure of mode
transition, effectively leading to failed enumeration.

Introduce a delay of 20 msec in order to provide a possibility for
internal card circuitry to drain voltages and perform a power cycle
correctly.

Similar fix is done in commit c49d0ac38a76 ("ARM: dts: rmobile: Increase
off-on delay on the SD Vcc regulator") targeted Renesas SOCs.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
9 months agoimx8mm_beacon: Enable HS400 on MMC controller
Adam Ford [Sat, 5 Dec 2020 00:59:43 +0000 (18:59 -0600)]
imx8mm_beacon: Enable HS400 on MMC controller

The i.MX8MM is capable of HS400.  Enable it in both
U-Boot and SPL for faster throughput.

Signed-off-by: Adam Ford <aford173@gmail.com>
9 months agoarm64: dts: imx8mm-beacon: Re-sync dts file with Linux 5.10-rc6
Adam Ford [Fri, 4 Dec 2020 23:27:47 +0000 (17:27 -0600)]
arm64: dts: imx8mm-beacon: Re-sync dts file with Linux 5.10-rc6

There have been some updates to the device trees, so re-sync.

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
9 months agoarm: dts: imx8mm: sync dts from Linux Kernel 5.10-rc6
Adam Ford [Fri, 4 Dec 2020 23:27:46 +0000 (17:27 -0600)]
arm: dts: imx8mm: sync dts from Linux Kernel 5.10-rc6

There have been some updates to the device tree since 5.6.
This also includes some clocks, and makes it easier to keep
board device tree files in sync with Linux

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
9 months agoimx: imx8mm: Update clock bindings header
Adam Ford [Fri, 4 Dec 2020 23:27:45 +0000 (17:27 -0600)]
imx: imx8mm: Update clock bindings header

Import clock bindings header file from Linux 5.10-rc6

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
9 months agoARM: dts: imx: imx8qm-rom7720: Fix AR8031 phy-mode
Oliver Graute [Fri, 4 Dec 2020 14:26:16 +0000 (15:26 +0100)]
ARM: dts: imx: imx8qm-rom7720: Fix AR8031 phy-mode

Fixed wrong PHY Interface Mode

    As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode)
    the correct phy-mode should be "rgmii-id", so fix it accordingly
    to fix the Ethernet regression.

    This problem has been exposed by commit:

    commit 13114f38e2ccea9386726d8b9831dfc310589548

    Fix the phy-mode accordingly to fix the regression.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
9 months agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Tue, 22 Dec 2020 13:18:21 +0000 (08:18 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- Update Intel Edison doc information about xFSTK
- Move and rename fsp_types.h file to signatures.h

9 months agofsp: Move and rename fsp_types.h file
Sughosh Ganu [Mon, 14 Dec 2020 06:22:44 +0000 (11:52 +0530)]
fsp: Move and rename fsp_types.h file

The fsp_types.h header file contains macros for building signatures of
different widths. These signature macros are architecture agnostic,
and can be used in all places which use signatures in a data
structure. Move and rename the fsp_types.h under the common include
header.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 months agodoc: edison: Update information about xFSTK
Andy Shevchenko [Fri, 27 Nov 2020 15:59:09 +0000 (17:59 +0200)]
doc: edison: Update information about xFSTK

xFSTK sources got a new home under Edison Firmware Group on GitHub [1].
Update Intel Edison documentation accordingly.

While here, fix couple of typos.

[1]: https://github.com/edison-fw

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
9 months agoPrepare v2021.01-rc4 v2021.01-rc4
Tom Rini [Mon, 21 Dec 2020 20:03:24 +0000 (15:03 -0500)]
Prepare v2021.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
9 months agoTravis-CI: Drop support
Tom Rini [Wed, 16 Dec 2020 00:06:03 +0000 (19:06 -0500)]
Travis-CI: Drop support

Travis-CI is changing their support for FOSS (understandably) to have a
limited per-month number of build minutes.  Unfortunately for us, the
matrix of jobs we run will exhaust that very quickly.  Remove the yml
file.  Thanks for all the builds, Travis-CI!

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 months agoboard: kontron: sl28: reorder mmc devices
Michael Walle [Sun, 20 Dec 2020 21:35:13 +0000 (22:35 +0100)]
board: kontron: sl28: reorder mmc devices

Since linux commit 2e6cde96873253fd9eb0f20afd8ffd18278cff75 ("arm64:
dts: ls1028a: make the eMMC and SD card controllers use fixed indices")
mmc0 is the eMMC and mmc1 is the SD card. Also swap it in u-boot to
avoid any confusion by the user and to be aligned with linux.

Signed-off-by: Michael Walle <michael@walle.cc>
9 months agoMerge tag 'efi-2021-01-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sun, 20 Dec 2020 19:55:59 +0000 (14:55 -0500)]
Merge tag 'efi-2021-01-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc4

* Provide a tool to create a file with UEFI variables to preseed UEFI
  variable store.
* Make size of UEFI variable store configurable.
* Add man pages for commands 'bootefi' and 'button'.

9 months agoMAINTAINERS: add tools/efivar.py to EFI PAYLOAD
Heinrich Schuchardt [Sun, 20 Dec 2020 10:58:25 +0000 (11:58 +0100)]
MAINTAINERS: add tools/efivar.py to EFI PAYLOAD

tools/efivar.py allows to prepare a file with UEFI variables to preseed
the UEFI variable store.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agotools: add a simple script to generate EFI variables
Paulo Alcantara [Tue, 8 Dec 2020 23:10:48 +0000 (20:10 -0300)]
tools: add a simple script to generate EFI variables

This script generates EFI variables for U-Boot variable store format.

A few examples:

  - Generating secure boot keys

    $ openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_PK/ \
            -keyout PK.key -out PK.crt -nodes -days 365
    $ efisiglist -a -c PK.crt -o foo.esl
    $ tools/efivar.py set -i ubootefi.var -n db -d foo.esl -t file
    $ tools/efivar.py set -i ubootefi.var -n kek -d foo.esl -t file
    $ tools/efivar.py set -i ubootefi.var -n pk -d foo.esl -t file

  - Printing out variables

    $ tools/efivar.py set -i ubootefi.var -n var1 -d foo -t str
    $ tools/efivar.py set -i ubootefi.var -n var2 -d bar -t str
    $ tools/efivar.py print -i ubootefi.var
    var1:
        8be4df61-93ca-11d2-aa0d-00e098032b8c EFI_GLOBAL_VARIABLE_GUID
        NV|BS|RT, DataSize = 0x3
        0000000000: 66 6F 6F                                          foo
    var2:
        8be4df61-93ca-11d2-aa0d-00e098032b8c EFI_GLOBAL_VARIABLE_GUID
        NV|BS|RT, DataSize = 0x3
        0000000000: 62 61 72                                          bar

    - Removing variables

      $ tools/efivar.py del -i ubootefi.var -n var1
      $ tools/efivar.py set -i ubootefi.var -n var1 -a nv,bs -d foo -t str
      $ tools/efivar.py print -i ubootefi.var -n var1
      var1:
          8be4df61-93ca-11d2-aa0d-00e098032b8c EFI_GLOBAL_VARIABLE_GUID
          NV|BS, DataSize = 0x3
          0000000000: 66 6F 6F                                        foo
      $ tools/efivar.py del -i ubootefi.var -n var1
      err: attributes don't match
      $ tools/efivar.py del -i ubootefi.var -n var1 -a nv,bs
      $ tools/efivar.py print -i ubootefi.var -n var1
      err: variable not found

Signed-off-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Correct examples in commit message.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agoefi_loader: make variable store size customizable
Heinrich Schuchardt [Sun, 20 Dec 2020 10:05:38 +0000 (11:05 +0100)]
efi_loader: make variable store size customizable

Currently the size of the buffer to keep UEFI variables in memory is fixed
at 16384 bytes. This size has proven to be too small for some use cases.

Make the size of the memory buffer for UEFI variables customizable.

Reported-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
9 months agodoc: man-page for bootefi command
Heinrich Schuchardt [Wed, 16 Dec 2020 21:08:38 +0000 (22:08 +0100)]
doc: man-page for bootefi command

Provide a description of the bootefi command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agodoc: button command
Heinrich Schuchardt [Wed, 16 Dec 2020 11:15:49 +0000 (12:15 +0100)]
doc: button command

Provide a description of the 'button' command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
9 months agoMerge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Fri, 18 Dec 2020 18:06:02 +0000 (13:06 -0500)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi

9 months agoMerge tag 'u-boot-amlogic-20201218' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Fri, 18 Dec 2020 18:05:47 +0000 (13:05 -0500)]
Merge tag 'u-boot-amlogic-20201218' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- fix Odroid-C4 soft-reboot caused by bad setup of SDCard VDD regulator

9 months agoARM: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4
Marek Szyprowski [Fri, 18 Dec 2020 10:43:45 +0000 (11:43 +0100)]
ARM: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4

For the proper reboot Odroid-C4 board requires to switch TFLASH_VDD_EN
pin to the high impedance mode, otherwise the board is stuck in the
middle of loading early stages of the bootloader from SD card.

This can be achieved by using the OPEN_DRAIN flag instead if the
ACTIVE_HIGH, what will leave the pin in input to achieve high state (pin
has the pull-up) and solve the issue.

Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
9 months agomtd: spi-nor-ids: add Micron MT25QL01G flash
Hongwei Zhang [Mon, 7 Dec 2020 22:40:01 +0000 (17:40 -0500)]
mtd: spi-nor-ids: add Micron MT25QL01G flash

Add Micron MT25QL01G flash, used on AST2600 board.

Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: ca_sflash: Add CAxxxx SPI Flash Controller
Pengpeng Chen [Thu, 30 Jul 2020 19:52:45 +0000 (12:52 -0700)]
spi: ca_sflash: Add CAxxxx SPI Flash Controller

Add SPI Flash controller driver for Cortina Access
CAxxxx SoCs

Signed-off-by: Pengpeng Chen <pengpeng.chen@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Vignesh R <vigneshr@ti.com>
CC: Tom Rini <trini@konsulko.com>
[jagan: rebase on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agoriscv: Add device tree bindings for SPI
Sean Anderson [Fri, 16 Oct 2020 22:57:54 +0000 (18:57 -0400)]
riscv: Add device tree bindings for SPI

This patch adds bindings for the MMC slot and SPI flash on the Sipeed Maix
Bit.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Rick Chen <rick@andestech.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: dw: Add mem_ops
Sean Anderson [Fri, 16 Oct 2020 22:57:53 +0000 (18:57 -0400)]
spi: dw: Add mem_ops

The designware ssi device has "broken" chip select behaviour [1], and needs
specific manipulation to use the built-in chip select. The existing fix is
to use an external GPIO for chip select, but typically the K210 has SPI3
directly connected to a flash chip with dedicated pins. This makes it
impossible to use the spi_xfer function to use spi, since the CS is
de-asserted in between calls.  This patch adds an implementation of
exec_op, which gives correct behaviour when reading/writing spi flash.

This patch also rearranges the headers to conform to U-Boot style.

[1] https://lkml.org/lkml/2015/12/23/132

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: dw: Document devicetree binding
Sean Anderson [Fri, 16 Oct 2020 22:57:52 +0000 (18:57 -0400)]
spi: dw: Document devicetree binding

This documentation has been taken from Linux commit 3d7db0f11c7a ("spi: dw:
Refactor mid_spi_dma_setup() to separate DMA and IRQ config"), immediately
before the file was deleted and replaced with a yaml version. Additional
compatible strings from newer versions have been added, as well as a few
U-Boot-specific ones.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: dw: Add support for multiple CTRLR0 layouts
Sean Anderson [Fri, 16 Oct 2020 22:57:51 +0000 (18:57 -0400)]
spi: dw: Add support for multiple CTRLR0 layouts

CTRLR0 can have several different layouts depending on the specific device
(dw-apb-ssi vs dwc-ssi), and specific parameters set during synthesis.
Update the driver to support three specific configurations: dw-apb-ssi with
SSI_MAX_XFER_SIZE=16, dw-apb-ssi with SSI_MAX_XFER_SIZE=32, and dwc-ssi.

dw-apb-ssi is the version of the device on Altera/Intel SoCFPGAs, MSCC
SoCs, and Canaan Kendryte K210 SoCs. This is the only version this driver
supported before this change. The register layout before version 3.23a is:

|   31 .. 16  |
| other stuff |

|   15 .. 10  | 9 .. 8 | 7 .. 6 | 5 .. 4 | 3 .. 0 |
| other stuff |  TMOD  |  MODE  |  FRF   |  DFS   |

Note that DFS (Data Frame Size) is only 4 bits, limiting transfers to data
frames of 16 bits or less.

In version 3.23a, the SSI_MAX_XFER_SIZE parameter was introduced. This
parameter defaults to 16 (resulting in the same layout as prior versions),
but may also be set to 32. To allow setting longer data frame sizes, a new
DFS_32 register was introduced:

|   31 .. 21  | 20 .. 16 |
| other stuff |  DFS_32  |

|   15 .. 10  | 9 .. 8 | 7 .. 6 | 5 .. 4 |  3 .. 0   |
| other stuff |  TMOD  |  MODE  |  FRF   | all zeros |

The old DFS field no longer controls the data frame size. To detect this
layout, we try writing 0xF to DFS. If we read back 0x0, then this device
has SSI_MAX_XFER_SIZE=32.

dwc-ssi is the version of the device on Intel Keem Bay SoCs and Canaan
Kendryte K210 SoCs. The layout of ctrlr0 is:

|   31 .. 16  |
| other stuff |

|   15 .. 12  | 11 .. 10 | 9 .. 8 | 7 .. 6 | 4 .. 0 |
| other stuff |   TMOD   |  MODE  |  FRF   | DFS_32 |

The semantics of the fields have not changed since the previous version.
However, SSI_MAX_XFER_SIZE is effectively always 32.

To support these different layouts, we model our approach on the one
which the Linux kernel has taken. During probe, the driver calls an init
function stored in driver_data. This init function is responsible for
determining the layout of CTRLR0, and supplying the update_cr0 function.

The style of and information behind this commit is based on the Linux MMIO
driver for these devices. Specific reference was made to the series adding
support for Intel Keem Bay SoCs [1].

[1] https://lore.kernel.org/linux-spi/20200505130618.554-1-wan.ahmad.zainie.wan.mohamad@intel.com/

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: dw: Add SoC-specific compatible strings
Sean Anderson [Fri, 16 Oct 2020 22:57:50 +0000 (18:57 -0400)]
spi: dw: Add SoC-specific compatible strings

This adds SoC-specific compatible strings to all users of the designware
spi device. This will allow for the correct driver to be selected for each
device. Where it is publicly documented, a compatible string for the
specific device version has also been added. Devices without
publicly-documented device versions include MSCC SoCs, and Arc Socs. All
compatible strings except those for SoCFPGAs and some of the versioned
strings have been taken from Linux.

Since SSI_MAX_XFER_SIZE is determined at runtime, this is not strictly
necessary. However, it is a good cleanup and brings things closer to Linux.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: dw: Rearrange struct dw_spi_priv
Sean Anderson [Fri, 16 Oct 2020 22:57:49 +0000 (18:57 -0400)]
spi: dw: Rearrange struct dw_spi_priv

This should reduce the size of the struct, and also groups more similar
fields together.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: dw: Remove spi_enable_chip
Sean Anderson [Fri, 16 Oct 2020 22:57:48 +0000 (18:57 -0400)]
spi: dw: Remove spi_enable_chip

This function does nothing but wrap dw_write.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: dw: Rename registers to match datasheet
Sean Anderson [Fri, 16 Oct 2020 22:57:47 +0000 (18:57 -0400)]
spi: dw: Rename registers to match datasheet

A few registers had slightly different names from what is in the datasheet.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: dw: Use generic function to read reg address
Sean Anderson [Fri, 16 Oct 2020 22:57:46 +0000 (18:57 -0400)]
spi: dw: Use generic function to read reg address

Using an fdt-specific function causes problems when compiled with a live
tree.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: dw: Rename "cs-gpio" to "cs-gpios"
Sean Anderson [Fri, 16 Oct 2020 22:57:45 +0000 (18:57 -0400)]
spi: dw: Rename "cs-gpio" to "cs-gpios"

This property is named differently than other SPI drivers with the same
property, as well as the property as used in Linux.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: dw: Convert calls to debug to dev_*
Sean Anderson [Fri, 16 Oct 2020 22:57:44 +0000 (18:57 -0400)]
spi: dw: Convert calls to debug to dev_*

This allows different log levels to be enabled or disabled depending on the
desired level of verbosity. In particular, it allows for general debug
information to be printed while excluding more verbose logging which may
interfere with timing.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: dw: Fix driving MOSI low while recieving
Sean Anderson [Fri, 16 Oct 2020 22:57:43 +0000 (18:57 -0400)]
spi: dw: Fix driving MOSI low while recieving

The resting state of MOSI is high when nothing is driving it. If we drive
it low while recieving, it looks like we are transmitting 0x00 instead of
transmitting nothing. This can confuse slaves (like SD cards) which allow
new commands to be sent over MOSI while they are returning data over MISO.
The return of MOSI from 0 to 1 at the end of recieving a byte can look like
a start bit and a transmission bit to an SD card. This will cause the card
to become out-of-sync with the SPI device, as it thinks the device has
already started transmitting two bytes of a new command. The mmc-spi driver
will not detect the R1 response from the SD card, since it is sent too
early, and offset by two bits. This patch fixes transfer errors when using
SD cards with dw spi.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agomtd: spinand: enable erasing of bad mtd blocks
Mikhail Kshevetskiy [Mon, 22 Jun 2020 13:16:34 +0000 (16:16 +0300)]
mtd: spinand: enable erasing of bad mtd blocks

U-Boot is able to erase bad mtd blocks on raw nand devices, but this
is not true for spinand flashes. Lets enable this feature for spinand
flashes as well. This is extemelly useful for flash testing.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@oktetlabs.ru>
9 months agomtd: spinand: Do not erase the block before writing a bad block marker
Frieder Schrempf [Mon, 22 Jun 2020 13:16:33 +0000 (16:16 +0300)]
mtd: spinand: Do not erase the block before writing a bad block marker

Currently when marking a block, we use spinand_erase_op() to erase
the block before writing the marker to the OOB area. Doing so without
waiting for the operation to finish can lead to the marking failing
silently and no bad block marker being written to the flash.

In fact we don't need to do an erase at all before writing the BBM.
The ECC is disabled for raw accesses to the OOB data and we don't
need to work around any issues with chips reporting ECC errors as it
is known to be the case for raw NAND.

Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-4-frieder.schrempf@kontron.de
9 months agomtd: spinand: Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
Frieder Schrempf [Mon, 22 Jun 2020 13:16:32 +0000 (16:16 +0300)]
mtd: spinand: Explicitly use MTD_OPS_RAW to write the bad block marker to OOB

When writing the bad block marker to the OOB area the access mode
should be set to MTD_OPS_RAW as it is done for reading the marker.
Currently this only works because req.mode is initialized to
MTD_OPS_PLACE_OOB (0) and spinand_write_to_cache_op() checks for
req.mode != MTD_OPS_AUTO_OOB.

Fix this by explicitly setting req.mode to MTD_OPS_RAW.

Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-3-frieder.schrempf@kontron.de
9 months agomtd: spinand: Stop using spinand->oobbuf for buffering bad block markers
Frieder Schrempf [Mon, 22 Jun 2020 13:16:31 +0000 (16:16 +0300)]
mtd: spinand: Stop using spinand->oobbuf for buffering bad block markers

For reading and writing the bad block markers, spinand->oobbuf is
currently used as a buffer for the marker bytes. During the
underlying read and write operations to actually get/set the content
of the OOB area, the content of spinand->oobbuf is reused and changed
by accessing it through spinand->oobbuf and/or spinand->databuf.

This is a flaw in the original design of the SPI NAND core and at the
latest from 13c15e07eedf ("mtd: spinand: Handle the case where
PROGRAM LOAD does not reset the cache") on, it results in not having
the bad block marker written at all, as the spinand->oobbuf is
cleared to 0xff after setting the marker bytes to zero.

To fix it, we now just store the two bytes for the marker on the
stack and let the read/write operations copy it from/to the page
buffer later.

Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-2-frieder.schrempf@kontron.de
9 months agospi: Fix typo in header
Sean Anderson [Fri, 7 Aug 2020 17:13:34 +0000 (13:13 -0400)]
spi: Fix typo in header

Spelling.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agodoc: Fix typo in FIT documentation
Sean Anderson [Fri, 7 Aug 2020 17:13:31 +0000 (13:13 -0400)]
doc: Fix typo in FIT documentation

u_boot should be u-boot

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agomtd: spi-nor-ids: Add SECT_4K to mx25l12805d
Robert Marko [Fri, 23 Oct 2020 08:52:38 +0000 (14:22 +0530)]
mtd: spi-nor-ids: Add SECT_4K to mx25l12805d

According to the mx25l12805d datasheet it supports using 4K or 64K sectors.
So lets add the SECT_4K to enable 4K sector usage.

Datasheet: https://www.mxic.com.tw/Lists/Datasheet/Attachments/7321/MX25L12805D,%203V,%20128Mb,%20v1.2.pdf

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agomtd: spi-nor-ids: Add Winbond W25M512JW flash entry
Biju Das [Tue, 29 Sep 2020 10:04:02 +0000 (11:04 +0100)]
mtd: spi-nor-ids: Add Winbond W25M512JW flash entry

Add Winbond W25M512JW flash device description.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agomtd: spi-nor-ids: Add Winbond W25M512JV flash entry
Lad Prabhakar [Thu, 17 Sep 2020 14:50:30 +0000 (15:50 +0100)]
mtd: spi-nor-ids: Add Winbond W25M512JV flash entry

Add Winbond W25M512JV flash device description.

Linux already has the flash entry present. A snippet below:
{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024...},

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agospi: migrate trace to dev and log macro in spi uclass
Patrick Delaunay [Thu, 15 Oct 2020 15:18:17 +0000 (17:18 +0200)]
spi: migrate trace to dev and log macro in spi uclass

Define LOG_CATEGORY and change printf and pr_*
to dev_ (when dev is available) or log_ macro.

This patch adds the support of logging feature with log command
(filtering, display of device name in trace) and allows to
suppress traces via the syslog driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agodh_imx6: Switch to full DM-aware
Jagan Teki [Fri, 23 Oct 2020 08:32:48 +0000 (14:02 +0530)]
dh_imx6: Switch to full DM-aware

Enable DM_SPI/DM_SPI_FLASH with a related config option.

Build fine, but not tested.

Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agocm_fx6: Switch to full DM-aware
Jagan Teki [Fri, 23 Oct 2020 08:26:49 +0000 (13:56 +0530)]
cm_fx6: Switch to full DM-aware

Enable DM_SPI/DM_SPI_FLASH with a related config option.

Build fine, but not tested.

Cc: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
9 months agocl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH
Jagan Teki [Fri, 23 Oct 2020 08:21:01 +0000 (13:51 +0530)]
cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH

Enable DM_SPI/DM_SPI_FLASH with associated config
options.

Build fine, but not tested.

Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
10 months agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Wed, 16 Dec 2020 22:43:33 +0000 (17:43 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

- r8152, xhci fixes

10 months agoconfigs: Resync with savedefconfig
Tom Rini [Wed, 16 Dec 2020 15:58:24 +0000 (10:58 -0500)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
10 months agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Wed, 16 Dec 2020 13:13:37 +0000 (08:13 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- Update cmdline parameter to be an env var in zimage boot
- Various minor fixes for Intel Edison board

10 months agoeth/r8152: fix the aggregation issue
Hayes Wang [Wed, 16 Dec 2020 09:03:23 +0000 (17:03 +0800)]
eth/r8152: fix the aggregation issue

Remove the redundant setting for USB_RX_EARLY_SIZE. Besides, for
RTL8153B, it is necessary to notify the hardware of the changes
of the aggregation settings.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
10 months agoeth/r8152: free previous memory if r8152_eth_probe fail
Hayes Wang [Wed, 16 Dec 2020 09:03:22 +0000 (17:03 +0800)]
eth/r8152: free previous memory if r8152_eth_probe fail

The r8152_eth_probe() may allocate a memory for ss->dev_priv.
It has to be freed if r8152_eth_probe() fails finally.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
10 months agousb: xhci: fix lack of short packet event trb handling
Ran Wang [Wed, 18 Nov 2020 07:49:02 +0000 (15:49 +0800)]
usb: xhci: fix lack of short packet event trb handling

For bulk IN transfer, the codes will set ISP flag to request event TRB
being generated by xHC for the case of short packet. So when encountering
buffer-cross-64K-boundary (which we will divide payload and enqueuqe
more than 1 transfer TRB), and the first TRB ends up with a short packet
condition it will trigger an short packet code transfer event per that
flag and cause more than 1 event TRB generated for this transfer.

However, current codes will only handle the first transfer event TRB
then mark current transfer completed, causing next transfer
failure due to event TRB mis-match.

Such issue has been observed on some Layerscape platforms (LS1028A,
LS1088A, etc) with USB ethernet device.

This patch adds a loop to make sure the event TRB for last transfer TRB
has been handled in time.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>