drivers/nand_legacy/nand_legacy.c

   1 /*
   2  * (C) 2006 Denx
   3  * Driver for NAND support, Rick Bronson
   4  * borrowed heavily from:
   5  * (c) 1999 Machine Vision Holdings, Inc.
   6  * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
   7  *
   8  * Added 16-bit nand support
   9  * (C) 2004 Texas Instruments
  10  */
  11
  12 #include <common.h>
  13
  14 #ifndef CFG_NAND_LEGACY
  15 #error CFG_NAND_LEGACY not defined in a file using the legacy NAND support!
  16 #endif
  17
  18 #include <command.h>
  19 #include <malloc.h>
  20 #include <asm/io.h>
  21 #include <watchdog.h>
  22
  23 #ifdef CONFIG_SHOW_BOOT_PROGRESS
  24 # include <status_led.h>
  25 # define SHOW_BOOT_PROGRESS(arg)        show_boot_progress(arg)
  26 #else
  27 # define SHOW_BOOT_PROGRESS(arg)
  28 #endif
  29
  30 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
  31
  32 #include <linux/mtd/nand_legacy.h>
  33 #include <linux/mtd/nand_ids.h>
  34 #include <jffs2/jffs2.h>
  35
  36 #ifdef CONFIG_OMAP1510
  37 void archflashwp(void *archdata, int wp);
  38 #endif
  39
  40 #define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
  41
  42 #undef  PSYCHO_DEBUG
  43 #undef  NAND_DEBUG
  44
  45 /* ****************** WARNING *********************
  46  * When ALLOW_ERASE_BAD_DEBUG is non-zero the erase command will
  47  * erase (or at least attempt to erase) blocks that are marked
  48  * bad. This can be very handy if you are _sure_ that the block
  49  * is OK, say because you marked a good block bad to test bad
  50  * block handling and you are done testing, or if you have
  51  * accidentally marked blocks bad.
  52  *
  53  * Erasing factory marked bad blocks is a _bad_ idea. If the
  54  * erase succeeds there is no reliable way to find them again,
  55  * and attempting to program or erase bad blocks can affect
  56  * the data in _other_ (good) blocks.
  57  */
  58 #define  ALLOW_ERASE_BAD_DEBUG 0
  59
  60 #define CONFIG_MTD_NAND_ECC  /* enable ECC */
  61 #define CONFIG_MTD_NAND_ECC_JFFS2
  62
  63 /* bits for nand_legacy_rw() `cmd'; or together as needed */
  64 #define NANDRW_READ     0x01
  65 #define NANDRW_WRITE    0x00
  66 #define NANDRW_JFFS2    0x02
  67 #define NANDRW_JFFS2_SKIP       0x04
  68
  69
  70 /*
  71  * Exported variables etc.
  72  */
  73
  74 /* Definition of the out of band configuration structure */
  75 struct nand_oob_config {
  76         /* position of ECC bytes inside oob */
  77         int ecc_pos[6];
  78         /* position of  bad blk flag inside oob -1 = inactive */
  79         int badblock_pos;
  80         /* position of ECC valid flag inside oob -1 = inactive */
  81         int eccvalid_pos;
  82 } oob_config = { {0}, 0, 0};
  83
  84 struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE] = {{0}};
  85
  86 int curr_device = -1; /* Current NAND Device */
  87
  88
  89 /*
  90  * Exported functionss
  91  */
  92 int nand_legacy_erase(struct nand_chip* nand, size_t ofs,
  93                      size_t len, int clean);
  94 int nand_legacy_rw(struct nand_chip* nand, int cmd,
  95                   size_t start, size_t len,
  96                   size_t * retlen, u_char * buf);
  97 void nand_print(struct nand_chip *nand);
  98 void nand_print_bad(struct nand_chip *nand);
  99 int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
 100                  size_t * retlen, u_char * buf);
 101 int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
 102                  size_t * retlen, const u_char * buf);
 103
 104 /*
 105  * Internals
 106  */
 107 static int NanD_WaitReady(struct nand_chip *nand, int ale_wait);
 108 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
 109                  size_t * retlen, u_char *buf, u_char *ecc_code);
 110 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
 111                            size_t * retlen, const u_char * buf,
 112                            u_char * ecc_code);
 113 #ifdef CONFIG_MTD_NAND_ECC
 114 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc);
 115 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code);
 116 #endif
 117
 118
 119 /*
 120  *
 121  * Function definitions
 122  *
 123  */
 124
 125 /* returns 0 if block containing pos is OK:
 126  *              valid erase block and
 127  *              not marked bad, or no bad mark position is specified
 128  * returns 1 if marked bad or otherwise invalid
 129  */
 130 static int check_block (struct nand_chip *nand, unsigned long pos)
 131 {
 132         size_t retlen;
 133         uint8_t oob_data;
 134         uint16_t oob_data16[6];
 135         int page0 = pos & (-nand->erasesize);
 136         int page1 = page0 + nand->oobblock;
 137         int badpos = oob_config.badblock_pos;
 138
 139         if (pos >= nand->totlen)
 140                 return 1;
 141
 142         if (badpos < 0)
 143                 return 0;       /* no way to check, assume OK */
 144
 145         if (nand->bus16) {
 146                 if (nand_read_oob(nand, (page0 + 0), 12, &retlen, (uint8_t *)oob_data16)
 147                     || (oob_data16[2] & 0xff00) != 0xff00)
 148                         return 1;
 149                 if (nand_read_oob(nand, (page1 + 0), 12, &retlen, (uint8_t *)oob_data16)
 150                     || (oob_data16[2] & 0xff00) != 0xff00)
 151                         return 1;
 152         } else {
 153                 /* Note - bad block marker can be on first or second page */
 154                 if (nand_read_oob(nand, page0 + badpos, 1, &retlen, (unsigned char *)&oob_data)
 155                     || oob_data != 0xff
 156                     || nand_read_oob (nand, page1 + badpos, 1, &retlen, (unsigned char *)&oob_data)
 157                     || oob_data != 0xff)
 158                         return 1;
 159         }
 160
 161         return 0;
 162 }
 163
 164 /* print bad blocks in NAND flash */
 165 void nand_print_bad(struct nand_chip* nand)
 166 {
 167         unsigned long pos;
 168
 169         for (pos = 0; pos < nand->totlen; pos += nand->erasesize) {
 170                 if (check_block(nand, pos))
 171                         printf(" 0x%8.8lx\n", pos);
 172         }
 173         puts("\n");
 174 }
 175
 176 /* cmd: 0: NANDRW_WRITE                 write, fail on bad block
 177  *      1: NANDRW_READ                  read, fail on bad block
 178  *      2: NANDRW_WRITE | NANDRW_JFFS2  write, skip bad blocks
 179  *      3: NANDRW_READ | NANDRW_JFFS2   read, data all 0xff for bad blocks
 180  *      7: NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP read, skip bad blocks
 181  */
 182 int nand_legacy_rw (struct nand_chip* nand, int cmd,
 183                    size_t start, size_t len,
 184                    size_t * retlen, u_char * buf)
 185 {
 186         int ret = 0, n, total = 0;
 187         char eccbuf[6];
 188         /* eblk (once set) is the start of the erase block containing the
 189          * data being processed.
 190          */
 191         unsigned long eblk = ~0;        /* force mismatch on first pass */
 192         unsigned long erasesize = nand->erasesize;
 193
 194         while (len) {
 195                 if ((start & (-erasesize)) != eblk) {
 196                         /* have crossed into new erase block, deal with
 197                          * it if it is sure marked bad.
 198                          */
 199                         eblk = start & (-erasesize); /* start of block */
 200                         if (check_block(nand, eblk)) {
 201                                 if (cmd == (NANDRW_READ | NANDRW_JFFS2)) {
 202                                         while (len > 0 &&
 203                                                start - eblk < erasesize) {
 204                                                 *(buf++) = 0xff;
 205                                                 ++start;
 206                                                 ++total;
 207                                                 --len;
 208                                         }
 209                                         continue;
 210                                 } else if (cmd == (NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP)) {
 211                                         start += erasesize;
 212                                         continue;
 213                                 } else if (cmd == (NANDRW_WRITE | NANDRW_JFFS2)) {
 214                                         /* skip bad block */
 215                                         start += erasesize;
 216                                         continue;
 217                                 } else {
 218                                         ret = 1;
 219                                         break;
 220                                 }
 221                         }
 222                 }
 223                 /* The ECC will not be calculated correctly if
 224                    less than 512 is written or read */
 225                 /* Is request at least 512 bytes AND it starts on a proper boundry */
 226                 if((start != ROUND_DOWN(start, 0x200)) || (len < 0x200))
 227                         printf("Warning block writes should be at least 512 bytes and start on a 512 byte boundry\n");
 228
 229                 if (cmd & NANDRW_READ) {
 230                         ret = nand_read_ecc(nand, start,
 231                                            min(len, eblk + erasesize - start),
 232                                            (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
 233                 } else {
 234                         ret = nand_write_ecc(nand, start,
 235                                             min(len, eblk + erasesize - start),
 236                                             (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
 237                 }
 238
 239                 if (ret)
 240                         break;
 241
 242                 start  += n;
 243                 buf   += n;
 244                 total += n;
 245                 len   -= n;
 246         }
 247         if (retlen)
 248                 *retlen = total;
 249
 250         return ret;
 251 }
 252
 253 void nand_print(struct nand_chip *nand)
 254 {
 255         if (nand->numchips > 1) {
 256                 printf("%s at 0x%lx,\n"
 257                        "\t  %d chips %s, size %d MB, \n"
 258                        "\t  total size %ld MB, sector size %ld kB\n",
 259                        nand->name, nand->IO_ADDR, nand->numchips,
 260                        nand->chips_name, 1 << (nand->chipshift - 20),
 261                        nand->totlen >> 20, nand->erasesize >> 10);
 262         }
 263         else {
 264                 printf("%s at 0x%lx (", nand->chips_name, nand->IO_ADDR);
 265                 print_size(nand->totlen, ", ");
 266                 print_size(nand->erasesize, " sector)\n");
 267         }
 268 }
 269
 270 /* ------------------------------------------------------------------------- */
 271
 272 static int NanD_WaitReady(struct nand_chip *nand, int ale_wait)
 273 {
 274         /* This is inline, to optimise the common case, where it's ready instantly */
 275         int ret = 0;
 276
 277 #ifdef NAND_NO_RB       /* in config file, shorter delays currently wrap accesses */
 278         if(ale_wait)
 279                 NAND_WAIT_READY(nand);  /* do the worst case 25us wait */
 280         else
 281                 udelay(10);
 282 #else   /* has functional r/b signal */
 283         NAND_WAIT_READY(nand);
 284 #endif
 285         return ret;
 286 }
 287
 288 /* NanD_Command: Send a flash command to the flash chip */
 289
 290 static inline int NanD_Command(struct nand_chip *nand, unsigned char command)
 291 {
 292         unsigned long nandptr = nand->IO_ADDR;
 293
 294         /* Assert the CLE (Command Latch Enable) line to the flash chip */
 295         NAND_CTL_SETCLE(nandptr);
 296
 297         /* Send the command */
 298         WRITE_NAND_COMMAND(command, nandptr);
 299
 300         /* Lower the CLE line */
 301         NAND_CTL_CLRCLE(nandptr);
 302
 303 #ifdef NAND_NO_RB
 304         if(command == NAND_CMD_RESET){
 305                 u_char ret_val;
 306                 NanD_Command(nand, NAND_CMD_STATUS);
 307                 do {
 308                         ret_val = READ_NAND(nandptr);/* wait till ready */
 309                 } while((ret_val & 0x40) != 0x40);
 310         }
 311 #endif
 312         return NanD_WaitReady(nand, 0);
 313 }
 314
 315 /* NanD_Address: Set the current address for the flash chip */
 316
 317 static int NanD_Address(struct nand_chip *nand, int numbytes, unsigned long ofs)
 318 {
 319         unsigned long nandptr;
 320         int i;
 321
 322         nandptr = nand->IO_ADDR;
 323
 324         /* Assert the ALE (Address Latch Enable) line to the flash chip */
 325         NAND_CTL_SETALE(nandptr);
 326
 327         /* Send the address */
 328         /* Devices with 256-byte page are addressed as:
 329          * Column (bits 0-7), Page (bits 8-15, 16-23, 24-31)
 330          * there is no device on the market with page256
 331          * and more than 24 bits.
 332          * Devices with 512-byte page are addressed as:
 333          * Column (bits 0-7), Page (bits 9-16, 17-24, 25-31)
 334          * 25-31 is sent only if the chip support it.
 335          * bit 8 changes the read command to be sent
 336          * (NAND_CMD_READ0 or NAND_CMD_READ1).
 337          */
 338
 339         if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE)
 340                 WRITE_NAND_ADDRESS(ofs, nandptr);
 341
 342         ofs = ofs >> nand->page_shift;
 343
 344         if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE) {
 345                 for (i = 0; i < nand->pageadrlen; i++, ofs = ofs >> 8) {
 346                         WRITE_NAND_ADDRESS(ofs, nandptr);
 347                 }
 348         }
 349
 350         /* Lower the ALE line */
 351         NAND_CTL_CLRALE(nandptr);
 352
 353         /* Wait for the chip to respond */
 354         return NanD_WaitReady(nand, 1);
 355 }
 356
 357 /* NanD_SelectChip: Select a given flash chip within the current floor */
 358
 359 static inline int NanD_SelectChip(struct nand_chip *nand, int chip)
 360 {
 361         /* Wait for it to be ready */
 362         return NanD_WaitReady(nand, 0);
 363 }
 364
 365 /* NanD_IdentChip: Identify a given NAND chip given {floor,chip} */
 366
 367 static int NanD_IdentChip(struct nand_chip *nand, int floor, int chip)
 368 {
 369         int mfr, id, i;
 370
 371         NAND_ENABLE_CE(nand);  /* set pin low */
 372         /* Reset the chip */
 373         if (NanD_Command(nand, NAND_CMD_RESET)) {
 374 #ifdef NAND_DEBUG
 375                 printf("NanD_Command (reset) for %d,%d returned true\n",
 376                        floor, chip);
 377 #endif
 378                 NAND_DISABLE_CE(nand);  /* set pin high */
 379                 return 0;
 380         }
 381
 382         /* Read the NAND chip ID: 1. Send ReadID command */
 383         if (NanD_Command(nand, NAND_CMD_READID)) {
 384 #ifdef NAND_DEBUG
 385                 printf("NanD_Command (ReadID) for %d,%d returned true\n",
 386                        floor, chip);
 387 #endif
 388                 NAND_DISABLE_CE(nand);  /* set pin high */
 389                 return 0;
 390         }
 391
 392         /* Read the NAND chip ID: 2. Send address byte zero */
 393         NanD_Address(nand, ADDR_COLUMN, 0);
 394
 395         /* Read the manufacturer and device id codes from the device */
 396
 397         mfr = READ_NAND(nand->IO_ADDR);
 398
 399         id = READ_NAND(nand->IO_ADDR);
 400
 401         NAND_DISABLE_CE(nand);  /* set pin high */
 402
 403 #ifdef NAND_DEBUG
 404         printf("NanD_Command (ReadID) got %x %x\n", mfr, id);
 405 #endif
 406         if (mfr == 0xff || mfr == 0) {
 407                 /* No response - return failure */
 408                 return 0;
 409         }
 410
 411         /* Check it's the same as the first chip we identified.
 412          * M-Systems say that any given nand_chip device should only
 413          * contain _one_ type of flash part, although that's not a
 414          * hardware restriction. */
 415         if (nand->mfr) {
 416                 if (nand->mfr == mfr && nand->id == id) {
 417                         return 1;       /* This is another the same the first */
 418                 } else {
 419                         printf("Flash chip at floor %d, chip %d is different:\n",
 420                                floor, chip);
 421                 }
 422         }
 423
 424         /* Print and store the manufacturer and ID codes. */
 425         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 426                 if (mfr == nand_flash_ids[i].manufacture_id &&
 427                     id == nand_flash_ids[i].model_id) {
 428 #ifdef NAND_DEBUG
 429                         printf("Flash chip found:\n\t Manufacturer ID: 0x%2.2X, "
 430                                "Chip ID: 0x%2.2X (%s)\n", mfr, id,
 431                                nand_flash_ids[i].name);
 432 #endif
 433                         if (!nand->mfr) {
 434                                 nand->mfr = mfr;
 435                                 nand->id = id;
 436                                 nand->chipshift =
 437                                     nand_flash_ids[i].chipshift;
 438                                 nand->page256 = nand_flash_ids[i].page256;
 439                                 nand->eccsize = 256;
 440                                 if (nand->page256) {
 441                                         nand->oobblock = 256;
 442                                         nand->oobsize = 8;
 443                                         nand->page_shift = 8;
 444                                 } else {
 445                                         nand->oobblock = 512;
 446                                         nand->oobsize = 16;
 447                                         nand->page_shift = 9;
 448                                 }
 449                                 nand->pageadrlen = nand_flash_ids[i].pageadrlen;
 450                                 nand->erasesize  = nand_flash_ids[i].erasesize;
 451                                 nand->chips_name = nand_flash_ids[i].name;
 452                                 nand->bus16      = nand_flash_ids[i].bus16;
 453                                 return 1;
 454                         }
 455                         return 0;
 456                 }
 457         }
 458
 459
 460 #ifdef NAND_DEBUG
 461         /* We haven't fully identified the chip. Print as much as we know. */
 462         printf("Unknown flash chip found: %2.2X %2.2X\n",
 463                id, mfr);
 464 #endif
 465
 466         return 0;
 467 }
 468
 469 /* NanD_ScanChips: Find all NAND chips present in a nand_chip, and identify them */
 470
 471 static void NanD_ScanChips(struct nand_chip *nand)
 472 {
 473         int floor, chip;
 474         int numchips[NAND_MAX_FLOORS];
 475         int maxchips = NAND_MAX_CHIPS;
 476         int ret = 1;
 477
 478         nand->numchips = 0;
 479         nand->mfr = 0;
 480         nand->id = 0;
 481
 482
 483         /* For each floor, find the number of valid chips it contains */
 484         for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
 485                 ret = 1;
 486                 numchips[floor] = 0;
 487                 for (chip = 0; chip < maxchips && ret != 0; chip++) {
 488
 489                         ret = NanD_IdentChip(nand, floor, chip);
 490                         if (ret) {
 491                                 numchips[floor]++;
 492                                 nand->numchips++;
 493                         }
 494                 }
 495         }
 496
 497         /* If there are none at all that we recognise, bail */
 498         if (!nand->numchips) {
 499 #ifdef NAND_DEBUG
 500                 puts ("No NAND flash chips recognised.\n");
 501 #endif
 502                 return;
 503         }
 504
 505         /* Allocate an array to hold the information for each chip */
 506         nand->chips = malloc(sizeof(struct Nand) * nand->numchips);
 507         if (!nand->chips) {
 508                 puts ("No memory for allocating chip info structures\n");
 509                 return;
 510         }
 511
 512         ret = 0;
 513
 514         /* Fill out the chip array with {floor, chipno} for each
 515          * detected chip in the device. */
 516         for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
 517                 for (chip = 0; chip < numchips[floor]; chip++) {
 518                         nand->chips[ret].floor = floor;
 519                         nand->chips[ret].chip = chip;
 520                         nand->chips[ret].curadr = 0;
 521                         nand->chips[ret].curmode = 0x50;
 522                         ret++;
 523                 }
 524         }
 525
 526         /* Calculate and print the total size of the device */
 527         nand->totlen = nand->numchips * (1 << nand->chipshift);
 528
 529 #ifdef NAND_DEBUG
 530         printf("%d flash chips found. Total nand_chip size: %ld MB\n",
 531                nand->numchips, nand->totlen >> 20);
 532 #endif
 533 }
 534
 535 /* we need to be fast here, 1 us per read translates to 1 second per meg */
 536 static void NanD_ReadBuf (struct nand_chip *nand, u_char * data_buf, int cntr)
 537 {
 538         unsigned long nandptr = nand->IO_ADDR;
 539
 540         NanD_Command (nand, NAND_CMD_READ0);
 541
 542         if (nand->bus16) {
 543                 u16 val;
 544
 545                 while (cntr >= 16) {
 546                         val = READ_NAND (nandptr);
 547                         *data_buf++ = val & 0xff;
 548                         *data_buf++ = val >> 8;
 549                         val = READ_NAND (nandptr);
 550                         *data_buf++ = val & 0xff;
 551                         *data_buf++ = val >> 8;
 552                         val = READ_NAND (nandptr);
 553                         *data_buf++ = val & 0xff;
 554                         *data_buf++ = val >> 8;
 555                         val = READ_NAND (nandptr);
 556                         *data_buf++ = val & 0xff;
 557                         *data_buf++ = val >> 8;
 558                         val = READ_NAND (nandptr);
 559                         *data_buf++ = val & 0xff;
 560                         *data_buf++ = val >> 8;
 561                         val = READ_NAND (nandptr);
 562                         *data_buf++ = val & 0xff;
 563                         *data_buf++ = val >> 8;
 564                         val = READ_NAND (nandptr);
 565                         *data_buf++ = val & 0xff;
 566                         *data_buf++ = val >> 8;
 567                         val = READ_NAND (nandptr);
 568                         *data_buf++ = val & 0xff;
 569                         *data_buf++ = val >> 8;
 570                         cntr -= 16;
 571                 }
 572
 573                 while (cntr > 0) {
 574                         val = READ_NAND (nandptr);
 575                         *data_buf++ = val & 0xff;
 576                         *data_buf++ = val >> 8;
 577                         cntr -= 2;
 578                 }
 579         } else {
 580                 while (cntr >= 16) {
 581                         *data_buf++ = READ_NAND (nandptr);
 582                         *data_buf++ = READ_NAND (nandptr);
 583                         *data_buf++ = READ_NAND (nandptr);
 584                         *data_buf++ = READ_NAND (nandptr);
 585                         *data_buf++ = READ_NAND (nandptr);
 586                         *data_buf++ = READ_NAND (nandptr);
 587                         *data_buf++ = READ_NAND (nandptr);
 588                         *data_buf++ = READ_NAND (nandptr);
 589                         *data_buf++ = READ_NAND (nandptr);
 590                         *data_buf++ = READ_NAND (nandptr);
 591                         *data_buf++ = READ_NAND (nandptr);
 592                         *data_buf++ = READ_NAND (nandptr);
 593                         *data_buf++ = READ_NAND (nandptr);
 594                         *data_buf++ = READ_NAND (nandptr);
 595                         *data_buf++ = READ_NAND (nandptr);
 596                         *data_buf++ = READ_NAND (nandptr);
 597                         cntr -= 16;
 598                 }
 599
 600                 while (cntr > 0) {
 601                         *data_buf++ = READ_NAND (nandptr);
 602                         cntr--;
 603                 }
 604         }
 605 }
 606
 607 /*
 608  * NAND read with ECC
 609  */
 610 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
 611                  size_t * retlen, u_char *buf, u_char *ecc_code)
 612 {
 613         int col, page;
 614         int ecc_status = 0;
 615 #ifdef CONFIG_MTD_NAND_ECC
 616         int j;
 617         int ecc_failed = 0;
 618         u_char *data_poi;
 619         u_char ecc_calc[6];
 620 #endif
 621
 622         /* Do not allow reads past end of device */
 623         if ((start + len) > nand->totlen) {
 624                 printf ("%s: Attempt read beyond end of device %x %x %x\n",
 625                         __FUNCTION__, (uint) start, (uint) len, (uint) nand->totlen);
 626                 *retlen = 0;
 627                 return -1;
 628         }
 629
 630         /* First we calculate the starting page */
 631         /*page = shr(start, nand->page_shift);*/
 632         page = start >> nand->page_shift;
 633
 634         /* Get raw starting column */
 635         col = start & (nand->oobblock - 1);
 636
 637         /* Initialize return value */
 638         *retlen = 0;
 639
 640         /* Select the NAND device */
 641         NAND_ENABLE_CE(nand);  /* set pin low */
 642
 643         /* Loop until all data read */
 644         while (*retlen < len) {
 645
 646 #ifdef CONFIG_MTD_NAND_ECC
 647                 /* Do we have this page in cache ? */
 648                 if (nand->cache_page == page)
 649                         goto readdata;
 650                 /* Send the read command */
 651                 NanD_Command(nand, NAND_CMD_READ0);
 652                 if (nand->bus16) {
 653                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 654                                      (page << nand->page_shift) + (col >> 1));
 655                 } else {
 656                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 657                                      (page << nand->page_shift) + col);
 658                 }
 659
 660                 /* Read in a page + oob data */
 661                 NanD_ReadBuf(nand, nand->data_buf, nand->oobblock + nand->oobsize);
 662
 663                 /* copy data into cache, for read out of cache and if ecc fails */
 664                 if (nand->data_cache) {
 665                         memcpy (nand->data_cache, nand->data_buf,
 666                                 nand->oobblock + nand->oobsize);
 667                 }
 668
 669                 /* Pick the ECC bytes out of the oob data */
 670                 for (j = 0; j < 6; j++) {
 671                         ecc_code[j] = nand->data_buf[(nand->oobblock + oob_config.ecc_pos[j])];
 672                 }
 673
 674                 /* Calculate the ECC and verify it */
 675                 /* If block was not written with ECC, skip ECC */
 676                 if (oob_config.eccvalid_pos != -1 &&
 677                     (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0x0f) != 0x0f) {
 678
 679                         nand_calculate_ecc (&nand->data_buf[0], &ecc_calc[0]);
 680                         switch (nand_correct_data (&nand->data_buf[0], &ecc_code[0], &ecc_calc[0])) {
 681                         case -1:
 682                                 printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
 683                                 ecc_failed++;
 684                                 break;
 685                         case 1:
 686                         case 2: /* transfer ECC corrected data to cache */
 687                                 if (nand->data_cache)
 688                                         memcpy (nand->data_cache, nand->data_buf, 256);
 689                                 break;
 690                         }
 691                 }
 692
 693                 if (oob_config.eccvalid_pos != -1 &&
 694                     nand->oobblock == 512 && (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0xf0) != 0xf0) {
 695
 696                         nand_calculate_ecc (&nand->data_buf[256], &ecc_calc[3]);
 697                         switch (nand_correct_data (&nand->data_buf[256], &ecc_code[3], &ecc_calc[3])) {
 698                         case -1:
 699                                 printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
 700                                 ecc_failed++;
 701                                 break;
 702                         case 1:
 703                         case 2: /* transfer ECC corrected data to cache */
 704                                 if (nand->data_cache)
 705                                         memcpy (&nand->data_cache[256], &nand->data_buf[256], 256);
 706                                 break;
 707                         }
 708                 }
 709 readdata:
 710                 /* Read the data from ECC data buffer into return buffer */
 711                 data_poi = (nand->data_cache) ? nand->data_cache : nand->data_buf;
 712                 data_poi += col;
 713                 if ((*retlen + (nand->oobblock - col)) >= len) {
 714                         memcpy (buf + *retlen, data_poi, len - *retlen);
 715                         *retlen = len;
 716                 } else {
 717                         memcpy (buf + *retlen, data_poi,  nand->oobblock - col);
 718                         *retlen += nand->oobblock - col;
 719                 }
 720                 /* Set cache page address, invalidate, if ecc_failed */
 721                 nand->cache_page = (nand->data_cache && !ecc_failed) ? page : -1;
 722
 723                 ecc_status += ecc_failed;
 724                 ecc_failed = 0;
 725
 726 #else
 727                 /* Send the read command */
 728                 NanD_Command(nand, NAND_CMD_READ0);
 729                 if (nand->bus16) {
 730                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 731                                      (page << nand->page_shift) + (col >> 1));
 732                 } else {
 733                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 734                                      (page << nand->page_shift) + col);
 735                 }
 736
 737                 /* Read the data directly into the return buffer */
 738                 if ((*retlen + (nand->oobblock - col)) >= len) {
 739                         NanD_ReadBuf(nand, buf + *retlen, len - *retlen);
 740                         *retlen = len;
 741                         /* We're done */
 742                         continue;
 743                 } else {
 744                         NanD_ReadBuf(nand, buf + *retlen, nand->oobblock - col);
 745                         *retlen += nand->oobblock - col;
 746                         }
 747 #endif
 748                 /* For subsequent reads align to page boundary. */
 749                 col = 0;
 750                 /* Increment page address */
 751                 page++;
 752         }
 753
 754         /* De-select the NAND device */
 755         NAND_DISABLE_CE(nand);  /* set pin high */
 756
 757         /*
 758          * Return success, if no ECC failures, else -EIO
 759          * fs driver will take care of that, because
 760          * retlen == desired len and result == -EIO
 761          */
 762         return ecc_status ? -1 : 0;
 763 }
 764
 765 /*
 766  *      Nand_page_program function is used for write and writev !
 767  */
 768 static int nand_write_page (struct nand_chip *nand,
 769                             int page, int col, int last, u_char * ecc_code)
 770 {
 771
 772         int i;
 773         unsigned long nandptr = nand->IO_ADDR;
 774
 775 #ifdef CONFIG_MTD_NAND_ECC
 776 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
 777         int ecc_bytes = (nand->oobblock == 512) ? 6 : 3;
 778 #endif
 779 #endif
 780         /* pad oob area */
 781         for (i = nand->oobblock; i < nand->oobblock + nand->oobsize; i++)
 782                 nand->data_buf[i] = 0xff;
 783
 784 #ifdef CONFIG_MTD_NAND_ECC
 785         /* Zero out the ECC array */
 786         for (i = 0; i < 6; i++)
 787                 ecc_code[i] = 0x00;
 788
 789         /* Read back previous written data, if col > 0 */
 790         if (col) {
 791                 NanD_Command (nand, NAND_CMD_READ0);
 792                 if (nand->bus16) {
 793                         NanD_Address (nand, ADDR_COLUMN_PAGE,
 794                                       (page << nand->page_shift) + (col >> 1));
 795                 } else {
 796                         NanD_Address (nand, ADDR_COLUMN_PAGE,
 797                                       (page << nand->page_shift) + col);
 798                 }
 799
 800                 if (nand->bus16) {
 801                         u16 val;
 802
 803                         for (i = 0; i < col; i += 2) {
 804                                 val = READ_NAND (nandptr);
 805                                 nand->data_buf[i] = val & 0xff;
 806                                 nand->data_buf[i + 1] = val >> 8;
 807                         }
 808                 } else {
 809                         for (i = 0; i < col; i++)
 810                                 nand->data_buf[i] = READ_NAND (nandptr);
 811                 }
 812         }
 813
 814         /* Calculate and write the ECC if we have enough data */
 815         if ((col < nand->eccsize) && (last >= nand->eccsize)) {
 816                 nand_calculate_ecc (&nand->data_buf[0], &(ecc_code[0]));
 817                 for (i = 0; i < 3; i++) {
 818                         nand->data_buf[(nand->oobblock +
 819                                         oob_config.ecc_pos[i])] = ecc_code[i];
 820                 }
 821                 if (oob_config.eccvalid_pos != -1) {
 822                         nand->data_buf[nand->oobblock +
 823                                        oob_config.eccvalid_pos] = 0xf0;
 824                 }
 825         }
 826
 827         /* Calculate and write the second ECC if we have enough data */
 828         if ((nand->oobblock == 512) && (last == nand->oobblock)) {
 829                 nand_calculate_ecc (&nand->data_buf[256], &(ecc_code[3]));
 830                 for (i = 3; i < 6; i++) {
 831                         nand->data_buf[(nand->oobblock +
 832                                         oob_config.ecc_pos[i])] = ecc_code[i];
 833                 }
 834                 if (oob_config.eccvalid_pos != -1) {
 835                         nand->data_buf[nand->oobblock +
 836                                        oob_config.eccvalid_pos] &= 0x0f;
 837                 }
 838         }
 839 #endif
 840         /* Prepad for partial page programming !!! */
 841         for (i = 0; i < col; i++)
 842                 nand->data_buf[i] = 0xff;
 843
 844         /* Postpad for partial page programming !!! oob is already padded */
 845         for (i = last; i < nand->oobblock; i++)
 846                 nand->data_buf[i] = 0xff;
 847
 848         /* Send command to begin auto page programming */
 849         NanD_Command (nand, NAND_CMD_READ0);
 850         NanD_Command (nand, NAND_CMD_SEQIN);
 851         if (nand->bus16) {
 852                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 853                               (page << nand->page_shift) + (col >> 1));
 854         } else {
 855                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 856                               (page << nand->page_shift) + col);
 857         }
 858
 859         /* Write out complete page of data */
 860         if (nand->bus16) {
 861                 for (i = 0; i < (nand->oobblock + nand->oobsize); i += 2) {
 862                         WRITE_NAND (nand->data_buf[i] +
 863                                     (nand->data_buf[i + 1] << 8),
 864                                     nand->IO_ADDR);
 865                 }
 866         } else {
 867                 for (i = 0; i < (nand->oobblock + nand->oobsize); i++)
 868                         WRITE_NAND (nand->data_buf[i], nand->IO_ADDR);
 869         }
 870
 871         /* Send command to actually program the data */
 872         NanD_Command (nand, NAND_CMD_PAGEPROG);
 873         NanD_Command (nand, NAND_CMD_STATUS);
 874 #ifdef NAND_NO_RB
 875         {
 876                 u_char ret_val;
 877
 878                 do {
 879                         ret_val = READ_NAND (nandptr);  /* wait till ready */
 880                 } while ((ret_val & 0x40) != 0x40);
 881         }
 882 #endif
 883         /* See if device thinks it succeeded */
 884         if (READ_NAND (nand->IO_ADDR) & 0x01) {
 885                 printf ("%s: Failed write, page 0x%08x, ", __FUNCTION__,
 886                         page);
 887                 return -1;
 888         }
 889 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
 890         /*
 891          * The NAND device assumes that it is always writing to
 892          * a cleanly erased page. Hence, it performs its internal
 893          * write verification only on bits that transitioned from
 894          * 1 to 0. The device does NOT verify the whole page on a
 895          * byte by byte basis. It is possible that the page was
 896          * not completely erased or the page is becoming unusable
 897          * due to wear. The read with ECC would catch the error
 898          * later when the ECC page check fails, but we would rather
 899          * catch it early in the page write stage. Better to write
 900          * no data than invalid data.
 901          */
 902
 903         /* Send command to read back the page */
 904         if (col < nand->eccsize)
 905                 NanD_Command (nand, NAND_CMD_READ0);
 906         else
 907                 NanD_Command (nand, NAND_CMD_READ1);
 908         if (nand->bus16) {
 909                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 910                               (page << nand->page_shift) + (col >> 1));
 911         } else {
 912                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 913                               (page << nand->page_shift) + col);
 914         }
 915
 916         /* Loop through and verify the data */
 917         if (nand->bus16) {
 918                 for (i = col; i < last; i = +2) {
 919                         if ((nand->data_buf[i] +
 920                              (nand->data_buf[i + 1] << 8)) != READ_NAND (nand->IO_ADDR)) {
 921                                 printf ("%s: Failed write verify, page 0x%08x ",
 922                                         __FUNCTION__, page);
 923                                 return -1;
 924                         }
 925                 }
 926         } else {
 927                 for (i = col; i < last; i++) {
 928                         if (nand->data_buf[i] != READ_NAND (nand->IO_ADDR)) {
 929                                 printf ("%s: Failed write verify, page 0x%08x ",
 930                                         __FUNCTION__, page);
 931                                 return -1;
 932                         }
 933                 }
 934         }
 935
 936 #ifdef CONFIG_MTD_NAND_ECC
 937         /*
 938          * We also want to check that the ECC bytes wrote
 939          * correctly for the same reasons stated above.
 940          */
 941         NanD_Command (nand, NAND_CMD_READOOB);
 942         if (nand->bus16) {
 943                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 944                               (page << nand->page_shift) + (col >> 1));
 945         } else {
 946                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 947                               (page << nand->page_shift) + col);
 948         }
 949         if (nand->bus16) {
 950                 for (i = 0; i < nand->oobsize; i += 2) {
 951                         u16 val;
 952
 953                         val = READ_NAND (nand->IO_ADDR);
 954                         nand->data_buf[i] = val & 0xff;
 955                         nand->data_buf[i + 1] = val >> 8;
 956                 }
 957         } else {
 958                 for (i = 0; i < nand->oobsize; i++) {
 959                         nand->data_buf[i] = READ_NAND (nand->IO_ADDR);
 960                 }
 961         }
 962         for (i = 0; i < ecc_bytes; i++) {
 963                 if ((nand->data_buf[(oob_config.ecc_pos[i])] != ecc_code[i]) && ecc_code[i]) {
 964                         printf ("%s: Failed ECC write "
 965                                 "verify, page 0x%08x, "
 966                                 "%6i bytes were succesful\n",
 967                                 __FUNCTION__, page, i);
 968                         return -1;
 969                 }
 970         }
 971 #endif  /* CONFIG_MTD_NAND_ECC */
 972 #endif  /* CONFIG_MTD_NAND_VERIFY_WRITE */
 973         return 0;
 974 }
 975
 976 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
 977                            size_t * retlen, const u_char * buf, u_char * ecc_code)
 978 {
 979         int i, page, col, cnt, ret = 0;
 980
 981         /* Do not allow write past end of device */
 982         if ((to + len) > nand->totlen) {
 983                 printf ("%s: Attempt to write past end of page\n", __FUNCTION__);
 984                 return -1;
 985         }
 986
 987         /* Shift to get page */
 988         page = ((int) to) >> nand->page_shift;
 989
 990         /* Get the starting column */
 991         col = to & (nand->oobblock - 1);
 992
 993         /* Initialize return length value */
 994         *retlen = 0;
 995
 996         /* Select the NAND device */
 997 #ifdef CONFIG_OMAP1510
 998         archflashwp(0,0);
 999 #endif
1000 #ifdef CFG_NAND_WP
1001         NAND_WP_OFF();
1002 #endif
1003
1004         NAND_ENABLE_CE(nand);  /* set pin low */
1005
1006         /* Check the WP bit */
1007         NanD_Command(nand, NAND_CMD_STATUS);
1008         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1009                 printf ("%s: Device is write protected!!!\n", __FUNCTION__);
1010                 ret = -1;
1011                 goto out;
1012         }
1013
1014         /* Loop until all data is written */
1015         while (*retlen < len) {
1016                 /* Invalidate cache, if we write to this page */
1017                 if (nand->cache_page == page)
1018                         nand->cache_page = -1;
1019
1020                 /* Write data into buffer */
1021                 if ((col + len) >= nand->oobblock) {
1022                         for (i = col, cnt = 0; i < nand->oobblock; i++, cnt++) {
1023                                 nand->data_buf[i] = buf[(*retlen + cnt)];
1024                         }
1025                 } else {
1026                         for (i = col, cnt = 0; cnt < (len - *retlen); i++, cnt++) {
1027                                 nand->data_buf[i] = buf[(*retlen + cnt)];
1028                         }
1029                 }
1030                 /* We use the same function for write and writev !) */
1031                 ret = nand_write_page (nand, page, col, i, ecc_code);
1032                 if (ret)
1033                         goto out;
1034
1035                 /* Next data start at page boundary */
1036                 col = 0;
1037
1038                 /* Update written bytes count */
1039                 *retlen += cnt;
1040
1041                 /* Increment page address */
1042                 page++;
1043         }
1044
1045         /* Return happy */
1046         *retlen = len;
1047
1048 out:
1049         /* De-select the NAND device */
1050         NAND_DISABLE_CE(nand);  /* set pin high */
1051 #ifdef CONFIG_OMAP1510
1052         archflashwp(0,1);
1053 #endif
1054 #ifdef CFG_NAND_WP
1055         NAND_WP_ON();
1056 #endif
1057
1058         return ret;
1059 }
1060
1061 /* read from the 16 bytes of oob data that correspond to a 512 byte
1062  * page or 2 256-byte pages.
1063  */
1064 int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
1065                          size_t * retlen, u_char * buf)
1066 {
1067         int len256 = 0;
1068         struct Nand *mychip;
1069         int ret = 0;
1070
1071         mychip = &nand->chips[ofs >> nand->chipshift];
1072
1073         /* update address for 2M x 8bit devices. OOB starts on the second */
1074         /* page to maintain compatibility with nand_read_ecc. */
1075         if (nand->page256) {
1076                 if (!(ofs & 0x8))
1077                         ofs += 0x100;
1078                 else
1079                         ofs -= 0x8;
1080         }
1081
1082         NAND_ENABLE_CE(nand);  /* set pin low */
1083         NanD_Command(nand, NAND_CMD_READOOB);
1084         if (nand->bus16) {
1085                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1086                              ((ofs >> nand->page_shift) << nand->page_shift) +
1087                                 ((ofs & (nand->oobblock - 1)) >> 1));
1088         } else {
1089                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1090         }
1091
1092         /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1093         /* Note: datasheet says it should automaticaly wrap to the */
1094         /*       next OOB block, but it didn't work here. mf.      */
1095         if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1096                 len256 = (ofs | 0x7) + 1 - ofs;
1097                 NanD_ReadBuf(nand, buf, len256);
1098
1099                 NanD_Command(nand, NAND_CMD_READOOB);
1100                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1101         }
1102
1103         NanD_ReadBuf(nand, &buf[len256], len - len256);
1104
1105         *retlen = len;
1106         /* Reading the full OOB data drops us off of the end of the page,
1107          * causing the flash device to go into busy mode, so we need
1108          * to wait until ready 11.4.1 and Toshiba TC58256FT nands */
1109
1110         ret = NanD_WaitReady(nand, 1);
1111         NAND_DISABLE_CE(nand);  /* set pin high */
1112
1113         return ret;
1114
1115 }
1116
1117 /* write to the 16 bytes of oob data that correspond to a 512 byte
1118  * page or 2 256-byte pages.
1119  */
1120 int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
1121                   size_t * retlen, const u_char * buf)
1122 {
1123         int len256 = 0;
1124         int i;
1125         unsigned long nandptr = nand->IO_ADDR;
1126
1127 #ifdef PSYCHO_DEBUG
1128         printf("nand_write_oob(%lx, %d): %2.2X %2.2X %2.2X %2.2X ... %2.2X %2.2X .. %2.2X %2.2X\n",
1129                (long)ofs, len, buf[0], buf[1], buf[2], buf[3],
1130                buf[8], buf[9], buf[14],buf[15]);
1131 #endif
1132
1133         NAND_ENABLE_CE(nand);  /* set pin low to enable chip */
1134
1135         /* Reset the chip */
1136         NanD_Command(nand, NAND_CMD_RESET);
1137
1138         /* issue the Read2 command to set the pointer to the Spare Data Area. */
1139         NanD_Command(nand, NAND_CMD_READOOB);
1140         if (nand->bus16) {
1141                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1142                              ((ofs >> nand->page_shift) << nand->page_shift) +
1143                                 ((ofs & (nand->oobblock - 1)) >> 1));
1144         } else {
1145                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1146         }
1147
1148         /* update address for 2M x 8bit devices. OOB starts on the second */
1149         /* page to maintain compatibility with nand_read_ecc. */
1150         if (nand->page256) {
1151                 if (!(ofs & 0x8))
1152                         ofs += 0x100;
1153                 else
1154                         ofs -= 0x8;
1155         }
1156
1157         /* issue the Serial Data In command to initial the Page Program process */
1158         NanD_Command(nand, NAND_CMD_SEQIN);
1159         if (nand->bus16) {
1160                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1161                              ((ofs >> nand->page_shift) << nand->page_shift) +
1162                                 ((ofs & (nand->oobblock - 1)) >> 1));
1163         } else {
1164                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1165         }
1166
1167         /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1168         /* Note: datasheet says it should automaticaly wrap to the */
1169         /*       next OOB block, but it didn't work here. mf.      */
1170         if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1171                 len256 = (ofs | 0x7) + 1 - ofs;
1172                 for (i = 0; i < len256; i++)
1173                         WRITE_NAND(buf[i], nandptr);
1174
1175                 NanD_Command(nand, NAND_CMD_PAGEPROG);
1176                 NanD_Command(nand, NAND_CMD_STATUS);
1177 #ifdef NAND_NO_RB
1178                 { u_char ret_val;
1179                         do {
1180                                 ret_val = READ_NAND(nandptr); /* wait till ready */
1181                         } while ((ret_val & 0x40) != 0x40);
1182                 }
1183 #endif
1184                 if (READ_NAND(nandptr) & 1) {
1185                         puts ("Error programming oob data\n");
1186                         /* There was an error */
1187                         NAND_DISABLE_CE(nand);  /* set pin high */
1188                         *retlen = 0;
1189                         return -1;
1190                 }
1191                 NanD_Command(nand, NAND_CMD_SEQIN);
1192                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1193         }
1194
1195         if (nand->bus16) {
1196                 for (i = len256; i < len; i += 2) {
1197                         WRITE_NAND(buf[i] + (buf[i+1] << 8), nandptr);
1198                 }
1199         } else {
1200                 for (i = len256; i < len; i++)
1201                         WRITE_NAND(buf[i], nandptr);
1202         }
1203
1204         NanD_Command(nand, NAND_CMD_PAGEPROG);
1205         NanD_Command(nand, NAND_CMD_STATUS);
1206 #ifdef NAND_NO_RB
1207         {       u_char ret_val;
1208                 do {
1209                         ret_val = READ_NAND(nandptr); /* wait till ready */
1210                 } while ((ret_val & 0x40) != 0x40);
1211         }
1212 #endif
1213         if (READ_NAND(nandptr) & 1) {
1214                 puts ("Error programming oob data\n");
1215                 /* There was an error */
1216                 NAND_DISABLE_CE(nand);  /* set pin high */
1217                 *retlen = 0;
1218                 return -1;
1219         }
1220
1221         NAND_DISABLE_CE(nand);  /* set pin high */
1222         *retlen = len;
1223         return 0;
1224
1225 }
1226
1227 int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean)
1228 {
1229         /* This is defined as a structure so it will work on any system
1230          * using native endian jffs2 (the default).
1231          */
1232         static struct jffs2_unknown_node clean_marker = {
1233                 JFFS2_MAGIC_BITMASK,
1234                 JFFS2_NODETYPE_CLEANMARKER,
1235                 8               /* 8 bytes in this node */
1236         };
1237         unsigned long nandptr;
1238         struct Nand *mychip;
1239         int ret = 0;
1240
1241         if (ofs & (nand->erasesize-1) || len & (nand->erasesize-1)) {
1242                 printf ("Offset and size must be sector aligned, erasesize = %d\n",
1243                         (int) nand->erasesize);
1244                 return -1;
1245         }
1246
1247         nandptr = nand->IO_ADDR;
1248
1249         /* Select the NAND device */
1250 #ifdef CONFIG_OMAP1510
1251         archflashwp(0,0);
1252 #endif
1253 #ifdef CFG_NAND_WP
1254         NAND_WP_OFF();
1255 #endif
1256     NAND_ENABLE_CE(nand);  /* set pin low */
1257
1258         /* Check the WP bit */
1259         NanD_Command(nand, NAND_CMD_STATUS);
1260         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1261                 printf ("nand_write_ecc: Device is write protected!!!\n");
1262                 ret = -1;
1263                 goto out;
1264         }
1265
1266         /* Check the WP bit */
1267         NanD_Command(nand, NAND_CMD_STATUS);
1268         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1269                 printf ("%s: Device is write protected!!!\n", __FUNCTION__);
1270                 ret = -1;
1271                 goto out;
1272         }
1273
1274         /* FIXME: Do nand in the background. Use timers or schedule_task() */
1275         while(len) {
1276                 /*mychip = &nand->chips[shr(ofs, nand->chipshift)];*/
1277                 mychip = &nand->chips[ofs >> nand->chipshift];
1278
1279                 /* always check for bad block first, genuine bad blocks
1280                  * should _never_  be erased.
1281                  */
1282                 if (ALLOW_ERASE_BAD_DEBUG || !check_block(nand, ofs)) {
1283                         /* Select the NAND device */
1284                         NAND_ENABLE_CE(nand);  /* set pin low */
1285
1286                         NanD_Command(nand, NAND_CMD_ERASE1);
1287                         NanD_Address(nand, ADDR_PAGE, ofs);
1288                         NanD_Command(nand, NAND_CMD_ERASE2);
1289
1290                         NanD_Command(nand, NAND_CMD_STATUS);
1291
1292 #ifdef NAND_NO_RB
1293                         {       u_char ret_val;
1294                                 do {
1295                                         ret_val = READ_NAND(nandptr); /* wait till ready */
1296                                 } while ((ret_val & 0x40) != 0x40);
1297                         }
1298 #endif
1299                         if (READ_NAND(nandptr) & 1) {
1300                                 printf ("%s: Error erasing at 0x%lx\n",
1301                                         __FUNCTION__, (long)ofs);
1302                                 /* There was an error */
1303                                 ret = -1;
1304                                 goto out;
1305                         }
1306                         if (clean) {
1307                                 int n;  /* return value not used */
1308                                 int p, l;
1309
1310                                 /* clean marker position and size depend
1311                                  * on the page size, since 256 byte pages
1312                                  * only have 8 bytes of oob data
1313                                  */
1314                                 if (nand->page256) {
1315                                         p = NAND_JFFS2_OOB8_FSDAPOS;
1316                                         l = NAND_JFFS2_OOB8_FSDALEN;
1317                                 } else {
1318                                         p = NAND_JFFS2_OOB16_FSDAPOS;
1319                                         l = NAND_JFFS2_OOB16_FSDALEN;
1320                                 }
1321
1322                                 ret = nand_write_oob(nand, ofs + p, l, (size_t *)&n,
1323                                                      (u_char *)&clean_marker);
1324                                 /* quit here if write failed */
1325                                 if (ret)
1326                                         goto out;
1327                         }
1328                 }
1329                 ofs += nand->erasesize;
1330                 len -= nand->erasesize;
1331         }
1332
1333 out:
1334         /* De-select the NAND device */
1335         NAND_DISABLE_CE(nand);  /* set pin high */
1336 #ifdef CONFIG_OMAP1510
1337         archflashwp(0,1);
1338 #endif
1339 #ifdef CFG_NAND_WP
1340         NAND_WP_ON();
1341 #endif
1342
1343         return ret;
1344 }
1345
1346
1347 static inline int nandcheck(unsigned long potential, unsigned long physadr)
1348 {
1349         return 0;
1350 }
1351
1352 unsigned long nand_probe(unsigned long physadr)
1353 {
1354         struct nand_chip *nand = NULL;
1355         int i = 0, ChipID = 1;
1356
1357 #ifdef CONFIG_MTD_NAND_ECC_JFFS2
1358         oob_config.ecc_pos[0] = NAND_JFFS2_OOB_ECCPOS0;
1359         oob_config.ecc_pos[1] = NAND_JFFS2_OOB_ECCPOS1;
1360         oob_config.ecc_pos[2] = NAND_JFFS2_OOB_ECCPOS2;
1361         oob_config.ecc_pos[3] = NAND_JFFS2_OOB_ECCPOS3;
1362         oob_config.ecc_pos[4] = NAND_JFFS2_OOB_ECCPOS4;
1363         oob_config.ecc_pos[5] = NAND_JFFS2_OOB_ECCPOS5;
1364         oob_config.eccvalid_pos = 4;
1365 #else
1366         oob_config.ecc_pos[0] = NAND_NOOB_ECCPOS0;
1367         oob_config.ecc_pos[1] = NAND_NOOB_ECCPOS1;
1368         oob_config.ecc_pos[2] = NAND_NOOB_ECCPOS2;
1369         oob_config.ecc_pos[3] = NAND_NOOB_ECCPOS3;
1370         oob_config.ecc_pos[4] = NAND_NOOB_ECCPOS4;
1371         oob_config.ecc_pos[5] = NAND_NOOB_ECCPOS5;
1372         oob_config.eccvalid_pos = NAND_NOOB_ECCVPOS;
1373 #endif
1374         oob_config.badblock_pos = 5;
1375
1376         for (i=0; i<CFG_MAX_NAND_DEVICE; i++) {
1377                 if (nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN) {
1378                         nand = &nand_dev_desc[i];
1379                         break;
1380                 }
1381         }
1382         if (!nand)
1383                 return (0);
1384
1385         memset((char *)nand, 0, sizeof(struct nand_chip));
1386
1387         nand->IO_ADDR = physadr;
1388         nand->cache_page = -1;  /* init the cache page */
1389         NanD_ScanChips(nand);
1390
1391         if (nand->totlen == 0) {
1392                 /* no chips found, clean up and quit */
1393                 memset((char *)nand, 0, sizeof(struct nand_chip));
1394                 nand->ChipID = NAND_ChipID_UNKNOWN;
1395                 return (0);
1396         }
1397
1398         nand->ChipID = ChipID;
1399         if (curr_device == -1)
1400                 curr_device = i;
1401
1402         nand->data_buf = malloc (nand->oobblock + nand->oobsize);
1403         if (!nand->data_buf) {
1404                 puts ("Cannot allocate memory for data structures.\n");
1405                 return (0);
1406         }
1407
1408         return (nand->totlen);
1409 }
1410
1411 #ifdef CONFIG_MTD_NAND_ECC
1412 /*
1413  * Pre-calculated 256-way 1 byte column parity
1414  */
1415 static const u_char nand_ecc_precalc_table[] = {
1416         0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
1417         0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
1418         0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
1419         0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1420         0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
1421         0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1422         0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
1423         0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1424         0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
1425         0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1426         0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
1427         0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1428         0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
1429         0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1430         0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
1431         0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1432         0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
1433         0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1434         0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
1435         0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1436         0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
1437         0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1438         0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
1439         0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1440         0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
1441         0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1442         0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
1443         0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1444         0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
1445         0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1446         0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
1447         0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
1448 };
1449
1450
1451 /*
1452  * Creates non-inverted ECC code from line parity
1453  */
1454 static void nand_trans_result(u_char reg2, u_char reg3,
1455         u_char *ecc_code)
1456 {
1457         u_char a, b, i, tmp1, tmp2;
1458
1459         /* Initialize variables */
1460         a = b = 0x80;
1461         tmp1 = tmp2 = 0;
1462
1463         /* Calculate first ECC byte */
1464         for (i = 0; i < 4; i++) {
1465                 if (reg3 & a)           /* LP15,13,11,9 --> ecc_code[0] */
1466                         tmp1 |= b;
1467                 b >>= 1;
1468                 if (reg2 & a)           /* LP14,12,10,8 --> ecc_code[0] */
1469                         tmp1 |= b;
1470                 b >>= 1;
1471                 a >>= 1;
1472         }
1473
1474         /* Calculate second ECC byte */
1475         b = 0x80;
1476         for (i = 0; i < 4; i++) {
1477                 if (reg3 & a)           /* LP7,5,3,1 --> ecc_code[1] */
1478                         tmp2 |= b;
1479                 b >>= 1;
1480                 if (reg2 & a)           /* LP6,4,2,0 --> ecc_code[1] */
1481                         tmp2 |= b;
1482                 b >>= 1;
1483                 a >>= 1;
1484         }
1485
1486         /* Store two of the ECC bytes */
1487         ecc_code[0] = tmp1;
1488         ecc_code[1] = tmp2;
1489 }
1490
1491 /*
1492  * Calculate 3 byte ECC code for 256 byte block
1493  */
1494 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code)
1495 {
1496         u_char idx, reg1, reg3;
1497         int j;
1498
1499         /* Initialize variables */
1500         reg1 = reg3 = 0;
1501         ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
1502
1503         /* Build up column parity */
1504         for(j = 0; j < 256; j++) {
1505
1506                 /* Get CP0 - CP5 from table */
1507                 idx = nand_ecc_precalc_table[dat[j]];
1508                 reg1 ^= idx;
1509
1510                 /* All bit XOR = 1 ? */
1511                 if (idx & 0x40) {
1512                         reg3 ^= (u_char) j;
1513                 }
1514         }
1515
1516         /* Create non-inverted ECC code from line parity */
1517         nand_trans_result((reg1 & 0x40) ? ~reg3 : reg3, reg3, ecc_code);
1518
1519         /* Calculate final ECC code */
1520         ecc_code[0] = ~ecc_code[0];
1521         ecc_code[1] = ~ecc_code[1];
1522         ecc_code[2] = ((~reg1) << 2) | 0x03;
1523 }
1524
1525 /*
1526  * Detect and correct a 1 bit error for 256 byte block
1527  */
1528 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc)
1529 {
1530         u_char a, b, c, d1, d2, d3, add, bit, i;
1531
1532         /* Do error detection */
1533         d1 = calc_ecc[0] ^ read_ecc[0];
1534         d2 = calc_ecc[1] ^ read_ecc[1];
1535         d3 = calc_ecc[2] ^ read_ecc[2];
1536
1537         if ((d1 | d2 | d3) == 0) {
1538                 /* No errors */
1539                 return 0;
1540         } else {
1541                 a = (d1 ^ (d1 >> 1)) & 0x55;
1542                 b = (d2 ^ (d2 >> 1)) & 0x55;
1543                 c = (d3 ^ (d3 >> 1)) & 0x54;
1544
1545                 /* Found and will correct single bit error in the data */
1546                 if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
1547                         c = 0x80;
1548                         add = 0;
1549                         a = 0x80;
1550                         for (i=0; i<4; i++) {
1551                                 if (d1 & c)
1552                                         add |= a;
1553                                 c >>= 2;
1554                                 a >>= 1;
1555                         }
1556                         c = 0x80;
1557                         for (i=0; i<4; i++) {
1558                                 if (d2 & c)
1559                                         add |= a;
1560                                 c >>= 2;
1561                                 a >>= 1;
1562                         }
1563                         bit = 0;
1564                         b = 0x04;
1565                         c = 0x80;
1566                         for (i=0; i<3; i++) {
1567                                 if (d3 & c)
1568                                         bit |= b;
1569                                 c >>= 2;
1570                                 b >>= 1;
1571                         }
1572                         b = 0x01;
1573                         a = dat[add];
1574                         a ^= (b << bit);
1575                         dat[add] = a;
1576                         return 1;
1577                 }
1578                 else {
1579                         i = 0;
1580                         while (d1) {
1581                                 if (d1 & 0x01)
1582                                         ++i;
1583                                 d1 >>= 1;
1584                         }
1585                         while (d2) {
1586                                 if (d2 & 0x01)
1587                                         ++i;
1588                                 d2 >>= 1;
1589                         }
1590                         while (d3) {
1591                                 if (d3 & 0x01)
1592                                         ++i;
1593                                 d3 >>= 1;
1594                         }
1595                         if (i == 1) {
1596                                 /* ECC Code Error Correction */
1597                                 read_ecc[0] = calc_ecc[0];
1598                                 read_ecc[1] = calc_ecc[1];
1599                                 read_ecc[2] = calc_ecc[2];
1600                                 return 2;
1601                         }
1602                         else {
1603                                 /* Uncorrectable Error */
1604                                 return -1;
1605                         }
1606                 }
1607         }
1608
1609         /* Should never happen */
1610         return -1;
1611 }
1612
1613 #endif
1614
1615 #endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */