2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #include <mtd/cfi_flash.h>
45 * This file implements a Common Flash Interface (CFI) driver for
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
61 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62 * reading and writing ... (yes there is such a Hardware).
65 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
66 static uint flash_verbose = 1;
68 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
71 * Check if chip width is defined. If not, start detecting with 8bit.
73 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
74 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
77 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
78 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
81 static phys_addr_t __cfi_flash_bank_addr(int i)
83 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
85 phys_addr_t cfi_flash_bank_addr(int i)
86 __attribute__((weak, alias("__cfi_flash_bank_addr")));
88 static unsigned long __cfi_flash_bank_size(int i)
90 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
91 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
96 unsigned long cfi_flash_bank_size(int i)
97 __attribute__((weak, alias("__cfi_flash_bank_size")));
99 static void __flash_write8(u8 value, void *addr)
101 __raw_writeb(value, addr);
104 static void __flash_write16(u16 value, void *addr)
106 __raw_writew(value, addr);
109 static void __flash_write32(u32 value, void *addr)
111 __raw_writel(value, addr);
114 static void __flash_write64(u64 value, void *addr)
116 /* No architectures currently implement __raw_writeq() */
117 *(volatile u64 *)addr = value;
120 static u8 __flash_read8(void *addr)
122 return __raw_readb(addr);
125 static u16 __flash_read16(void *addr)
127 return __raw_readw(addr);
130 static u32 __flash_read32(void *addr)
132 return __raw_readl(addr);
135 static u64 __flash_read64(void *addr)
137 /* No architectures currently implement __raw_readq() */
138 return *(volatile u64 *)addr;
141 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
142 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
143 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
144 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
145 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
146 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
147 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
148 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
149 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
151 #define flash_write8 __flash_write8
152 #define flash_write16 __flash_write16
153 #define flash_write32 __flash_write32
154 #define flash_write64 __flash_write64
155 #define flash_read8 __flash_read8
156 #define flash_read16 __flash_read16
157 #define flash_read32 __flash_read32
158 #define flash_read64 __flash_read64
161 /*-----------------------------------------------------------------------
163 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
164 flash_info_t *flash_get_info(ulong base)
167 flash_info_t *info = NULL;
169 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
170 info = & flash_info[i];
171 if (info->size && info->start[0] <= base &&
172 base <= info->start[0] + info->size - 1)
180 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
182 if (sect != (info->sector_count - 1))
183 return info->start[sect + 1] - info->start[sect];
185 return info->start[0] + info->size - info->start[sect];
188 /*-----------------------------------------------------------------------
189 * create an address based on the offset and the port width
192 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
194 unsigned int byte_offset = offset * info->portwidth;
196 return (void *)(info->start[sect] + byte_offset);
199 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
200 unsigned int offset, void *addr)
204 /*-----------------------------------------------------------------------
205 * make a proper sized command based on the port and chip widths
207 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
212 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
213 u32 cmd_le = cpu_to_le32(cmd);
216 uchar *cp = (uchar *) cmdbuf;
218 for (i = info->portwidth; i > 0; i--){
219 cword_offset = (info->portwidth-i)%info->chipwidth;
220 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
221 cp_offset = info->portwidth - i;
222 val = *((uchar*)&cmd_le + cword_offset);
225 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
227 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
232 /*-----------------------------------------------------------------------
235 static void print_longlong (char *str, unsigned long long data)
241 for (i = 0; i < 8; i++)
242 sprintf (&str[i * 2], "%2.2x", *cp++);
245 static void flash_printqry (struct cfi_qry *qry)
250 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
252 for (y = 0; y < 16; y++)
253 debug("%2.2x ", p[x + y]);
255 for (y = 0; y < 16; y++) {
256 unsigned char c = p[x + y];
257 if (c >= 0x20 && c <= 0x7e)
268 /*-----------------------------------------------------------------------
269 * read a character at a port width address
271 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
276 cp = flash_map (info, 0, offset);
277 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
278 retval = flash_read8(cp);
280 retval = flash_read8(cp + info->portwidth - 1);
282 flash_unmap (info, 0, offset, cp);
286 /*-----------------------------------------------------------------------
287 * read a word at a port width address, assume 16bit bus
289 static inline ushort flash_read_word (flash_info_t * info, uint offset)
291 ushort *addr, retval;
293 addr = flash_map (info, 0, offset);
294 retval = flash_read16 (addr);
295 flash_unmap (info, 0, offset, addr);
300 /*-----------------------------------------------------------------------
301 * read a long word by picking the least significant byte of each maximum
302 * port size word. Swap for ppc format.
304 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
313 addr = flash_map (info, sect, offset);
316 debug ("long addr is at %p info->portwidth = %d\n", addr,
318 for (x = 0; x < 4 * info->portwidth; x++) {
319 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
322 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
323 retval = ((flash_read8(addr) << 16) |
324 (flash_read8(addr + info->portwidth) << 24) |
325 (flash_read8(addr + 2 * info->portwidth)) |
326 (flash_read8(addr + 3 * info->portwidth) << 8));
328 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
329 (flash_read8(addr + info->portwidth - 1) << 16) |
330 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
331 (flash_read8(addr + 3 * info->portwidth - 1)));
333 flash_unmap(info, sect, offset, addr);
339 * Write a proper sized command to the correct address
341 void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
342 uint offset, u32 cmd)
348 addr = flash_map (info, sect, offset);
349 flash_make_cmd (info, cmd, &cword);
350 switch (info->portwidth) {
352 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
353 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
354 flash_write8(cword.c, addr);
356 case FLASH_CFI_16BIT:
357 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
359 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
360 flash_write16(cword.w, addr);
362 case FLASH_CFI_32BIT:
363 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
365 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
366 flash_write32(cword.l, addr);
368 case FLASH_CFI_64BIT:
373 print_longlong (str, cword.ll);
375 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
377 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
380 flash_write64(cword.ll, addr);
384 /* Ensure all the instructions are fully finished */
387 flash_unmap(info, sect, offset, addr);
390 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
392 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
393 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
396 /*-----------------------------------------------------------------------
398 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
399 uint offset, uchar cmd)
405 addr = flash_map (info, sect, offset);
406 flash_make_cmd (info, cmd, &cword);
408 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
409 switch (info->portwidth) {
411 debug ("is= %x %x\n", flash_read8(addr), cword.c);
412 retval = (flash_read8(addr) == cword.c);
414 case FLASH_CFI_16BIT:
415 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
416 retval = (flash_read16(addr) == cword.w);
418 case FLASH_CFI_32BIT:
419 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
420 retval = (flash_read32(addr) == cword.l);
422 case FLASH_CFI_64BIT:
428 print_longlong (str1, flash_read64(addr));
429 print_longlong (str2, cword.ll);
430 debug ("is= %s %s\n", str1, str2);
433 retval = (flash_read64(addr) == cword.ll);
439 flash_unmap(info, sect, offset, addr);
444 /*-----------------------------------------------------------------------
446 static int flash_isset (flash_info_t * info, flash_sect_t sect,
447 uint offset, uchar cmd)
453 addr = flash_map (info, sect, offset);
454 flash_make_cmd (info, cmd, &cword);
455 switch (info->portwidth) {
457 retval = ((flash_read8(addr) & cword.c) == cword.c);
459 case FLASH_CFI_16BIT:
460 retval = ((flash_read16(addr) & cword.w) == cword.w);
462 case FLASH_CFI_32BIT:
463 retval = ((flash_read32(addr) & cword.l) == cword.l);
465 case FLASH_CFI_64BIT:
466 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
472 flash_unmap(info, sect, offset, addr);
477 /*-----------------------------------------------------------------------
479 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
480 uint offset, uchar cmd)
486 addr = flash_map (info, sect, offset);
487 flash_make_cmd (info, cmd, &cword);
488 switch (info->portwidth) {
490 retval = flash_read8(addr) != flash_read8(addr);
492 case FLASH_CFI_16BIT:
493 retval = flash_read16(addr) != flash_read16(addr);
495 case FLASH_CFI_32BIT:
496 retval = flash_read32(addr) != flash_read32(addr);
498 case FLASH_CFI_64BIT:
499 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
500 (flash_read32(addr+4) != flash_read32(addr+4)) );
506 flash_unmap(info, sect, offset, addr);
512 * flash_is_busy - check to see if the flash is busy
514 * This routine checks the status of the chip and returns true if the
517 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
521 switch (info->vendor) {
522 case CFI_CMDSET_INTEL_PROG_REGIONS:
523 case CFI_CMDSET_INTEL_STANDARD:
524 case CFI_CMDSET_INTEL_EXTENDED:
525 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
527 case CFI_CMDSET_AMD_STANDARD:
528 case CFI_CMDSET_AMD_EXTENDED:
529 #ifdef CONFIG_FLASH_CFI_LEGACY
530 case CFI_CMDSET_AMD_LEGACY:
532 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
537 debug ("flash_is_busy: %d\n", retval);
541 /*-----------------------------------------------------------------------
542 * wait for XSR.7 to be set. Time out with an error if it does not.
543 * This routine does not set the flash to read-array mode.
545 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
546 ulong tout, char *prompt)
550 #if CONFIG_SYS_HZ != 1000
551 if ((ulong)CONFIG_SYS_HZ > 100000)
552 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
554 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
557 /* Wait for command completion */
559 start = get_timer (0);
560 while (flash_is_busy (info, sector)) {
561 if (get_timer (start) > tout) {
562 printf ("Flash %s timeout at address %lx data %lx\n",
563 prompt, info->start[sector],
564 flash_read_long (info, sector, 0));
565 flash_write_cmd (info, sector, 0, info->cmd_reset);
568 udelay (1); /* also triggers watchdog */
573 /*-----------------------------------------------------------------------
574 * Wait for XSR.7 to be set, if it times out print an error, otherwise
575 * do a full status check.
577 * This routine sets the flash to read-array mode.
579 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
580 ulong tout, char *prompt)
584 retcode = flash_status_check (info, sector, tout, prompt);
585 switch (info->vendor) {
586 case CFI_CMDSET_INTEL_PROG_REGIONS:
587 case CFI_CMDSET_INTEL_EXTENDED:
588 case CFI_CMDSET_INTEL_STANDARD:
589 if ((retcode != ERR_OK)
590 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
592 printf ("Flash %s error at address %lx\n", prompt,
593 info->start[sector]);
594 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
595 FLASH_STATUS_PSLBS)) {
596 puts ("Command Sequence Error.\n");
597 } else if (flash_isset (info, sector, 0,
598 FLASH_STATUS_ECLBS)) {
599 puts ("Block Erase Error.\n");
600 retcode = ERR_NOT_ERASED;
601 } else if (flash_isset (info, sector, 0,
602 FLASH_STATUS_PSLBS)) {
603 puts ("Locking Error\n");
605 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
606 puts ("Block locked.\n");
607 retcode = ERR_PROTECTED;
609 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
610 puts ("Vpp Low Error.\n");
612 flash_write_cmd (info, sector, 0, info->cmd_reset);
620 static int use_flash_status_poll(flash_info_t *info)
622 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
623 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
624 info->vendor == CFI_CMDSET_AMD_STANDARD)
630 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
631 ulong tout, char *prompt)
633 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
637 #if CONFIG_SYS_HZ != 1000
638 if ((ulong)CONFIG_SYS_HZ > 100000)
639 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
641 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
644 /* Wait for command completion */
646 start = get_timer(0);
648 switch (info->portwidth) {
650 ready = flash_read8(dst) == flash_read8(src);
652 case FLASH_CFI_16BIT:
653 ready = flash_read16(dst) == flash_read16(src);
655 case FLASH_CFI_32BIT:
656 ready = flash_read32(dst) == flash_read32(src);
658 case FLASH_CFI_64BIT:
659 ready = flash_read64(dst) == flash_read64(src);
667 if (get_timer(start) > tout) {
668 printf("Flash %s timeout at address %lx data %lx\n",
669 prompt, (ulong)dst, (ulong)flash_read8(dst));
672 udelay(1); /* also triggers watchdog */
674 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
678 /*-----------------------------------------------------------------------
680 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
682 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
685 unsigned long long ll;
688 switch (info->portwidth) {
692 case FLASH_CFI_16BIT:
693 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
696 cword->w = (cword->w >> 8) | w;
698 cword->w = (cword->w << 8) | c;
701 case FLASH_CFI_32BIT:
702 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
705 cword->l = (cword->l >> 8) | l;
707 cword->l = (cword->l << 8) | c;
710 case FLASH_CFI_64BIT:
711 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
714 cword->ll = (cword->ll >> 8) | ll;
716 cword->ll = (cword->ll << 8) | c;
723 * Loop through the sector table starting from the previously found sector.
724 * Searches forwards or backwards, dependent on the passed address.
726 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
728 static flash_sect_t saved_sector = 0; /* previously found sector */
729 flash_sect_t sector = saved_sector;
731 while ((info->start[sector] < addr)
732 && (sector < info->sector_count - 1))
734 while ((info->start[sector] > addr) && (sector > 0))
736 * also decrements the sector in case of an overshot
741 saved_sector = sector;
745 /*-----------------------------------------------------------------------
747 static int flash_write_cfiword (flash_info_t * info, ulong dest,
750 void *dstaddr = (void *)dest;
752 flash_sect_t sect = 0;
755 /* Check if Flash is (sufficiently) erased */
756 switch (info->portwidth) {
758 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
760 case FLASH_CFI_16BIT:
761 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
763 case FLASH_CFI_32BIT:
764 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
766 case FLASH_CFI_64BIT:
767 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
774 return ERR_NOT_ERASED;
776 /* Disable interrupts which might cause a timeout here */
777 flag = disable_interrupts ();
779 switch (info->vendor) {
780 case CFI_CMDSET_INTEL_PROG_REGIONS:
781 case CFI_CMDSET_INTEL_EXTENDED:
782 case CFI_CMDSET_INTEL_STANDARD:
783 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
784 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
786 case CFI_CMDSET_AMD_EXTENDED:
787 case CFI_CMDSET_AMD_STANDARD:
788 sect = find_sector(info, dest);
789 flash_unlock_seq (info, sect);
790 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
793 #ifdef CONFIG_FLASH_CFI_LEGACY
794 case CFI_CMDSET_AMD_LEGACY:
795 sect = find_sector(info, dest);
796 flash_unlock_seq (info, 0);
797 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
803 switch (info->portwidth) {
805 flash_write8(cword.c, dstaddr);
807 case FLASH_CFI_16BIT:
808 flash_write16(cword.w, dstaddr);
810 case FLASH_CFI_32BIT:
811 flash_write32(cword.l, dstaddr);
813 case FLASH_CFI_64BIT:
814 flash_write64(cword.ll, dstaddr);
818 /* re-enable interrupts if necessary */
820 enable_interrupts ();
823 sect = find_sector (info, dest);
825 if (use_flash_status_poll(info))
826 return flash_status_poll(info, &cword, dstaddr,
827 info->write_tout, "write");
829 return flash_full_status_check(info, sect,
830 info->write_tout, "write");
833 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
835 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
842 void *dst = (void *)dest;
849 switch (info->portwidth) {
853 case FLASH_CFI_16BIT:
856 case FLASH_CFI_32BIT:
859 case FLASH_CFI_64BIT:
869 while ((cnt-- > 0) && (flag == 0)) {
870 switch (info->portwidth) {
872 flag = ((flash_read8(dst2) & flash_read8(src)) ==
876 case FLASH_CFI_16BIT:
877 flag = ((flash_read16(dst2) & flash_read16(src)) ==
881 case FLASH_CFI_32BIT:
882 flag = ((flash_read32(dst2) & flash_read32(src)) ==
886 case FLASH_CFI_64BIT:
887 flag = ((flash_read64(dst2) & flash_read64(src)) ==
894 retcode = ERR_NOT_ERASED;
899 sector = find_sector (info, dest);
901 switch (info->vendor) {
902 case CFI_CMDSET_INTEL_PROG_REGIONS:
903 case CFI_CMDSET_INTEL_STANDARD:
904 case CFI_CMDSET_INTEL_EXTENDED:
905 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
906 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
907 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
908 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
909 flash_write_cmd (info, sector, 0, write_cmd);
910 retcode = flash_status_check (info, sector,
911 info->buffer_write_tout,
913 if (retcode == ERR_OK) {
914 /* reduce the number of loops by the width of
917 flash_write_cmd (info, sector, 0, cnt - 1);
919 switch (info->portwidth) {
921 flash_write8(flash_read8(src), dst);
924 case FLASH_CFI_16BIT:
925 flash_write16(flash_read16(src), dst);
928 case FLASH_CFI_32BIT:
929 flash_write32(flash_read32(src), dst);
932 case FLASH_CFI_64BIT:
933 flash_write64(flash_read64(src), dst);
941 flash_write_cmd (info, sector, 0,
942 FLASH_CMD_WRITE_BUFFER_CONFIRM);
943 retcode = flash_full_status_check (
944 info, sector, info->buffer_write_tout,
950 case CFI_CMDSET_AMD_STANDARD:
951 case CFI_CMDSET_AMD_EXTENDED:
952 flash_unlock_seq(info,0);
954 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
955 offset = ((unsigned long)dst - info->start[sector]) >> shift;
957 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
959 flash_write_cmd(info, sector, offset, cnt - 1);
961 switch (info->portwidth) {
964 flash_write8(flash_read8(src), dst);
968 case FLASH_CFI_16BIT:
970 flash_write16(flash_read16(src), dst);
974 case FLASH_CFI_32BIT:
976 flash_write32(flash_read32(src), dst);
980 case FLASH_CFI_64BIT:
982 flash_write64(flash_read64(src), dst);
991 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
992 if (use_flash_status_poll(info))
993 retcode = flash_status_poll(info, src - (1 << shift),
995 info->buffer_write_tout,
998 retcode = flash_full_status_check(info, sector,
999 info->buffer_write_tout,
1004 debug ("Unknown Command Set\n");
1005 retcode = ERR_INVAL;
1012 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1015 /*-----------------------------------------------------------------------
1017 int flash_erase (flash_info_t * info, int s_first, int s_last)
1024 if (info->flash_id != FLASH_MAN_CFI) {
1025 puts ("Can't erase unknown flash type - aborted\n");
1028 if ((s_first < 0) || (s_first > s_last)) {
1029 puts ("- no sectors to erase\n");
1034 for (sect = s_first; sect <= s_last; ++sect) {
1035 if (info->protect[sect]) {
1040 printf ("- Warning: %d protected sectors will not be erased!\n",
1042 } else if (flash_verbose) {
1047 for (sect = s_first; sect <= s_last; sect++) {
1048 if (info->protect[sect] == 0) { /* not protected */
1049 switch (info->vendor) {
1050 case CFI_CMDSET_INTEL_PROG_REGIONS:
1051 case CFI_CMDSET_INTEL_STANDARD:
1052 case CFI_CMDSET_INTEL_EXTENDED:
1053 flash_write_cmd (info, sect, 0,
1054 FLASH_CMD_CLEAR_STATUS);
1055 flash_write_cmd (info, sect, 0,
1056 FLASH_CMD_BLOCK_ERASE);
1057 flash_write_cmd (info, sect, 0,
1058 FLASH_CMD_ERASE_CONFIRM);
1060 case CFI_CMDSET_AMD_STANDARD:
1061 case CFI_CMDSET_AMD_EXTENDED:
1062 flash_unlock_seq (info, sect);
1063 flash_write_cmd (info, sect,
1065 AMD_CMD_ERASE_START);
1066 flash_unlock_seq (info, sect);
1067 flash_write_cmd (info, sect, 0,
1068 AMD_CMD_ERASE_SECTOR);
1070 #ifdef CONFIG_FLASH_CFI_LEGACY
1071 case CFI_CMDSET_AMD_LEGACY:
1072 flash_unlock_seq (info, 0);
1073 flash_write_cmd (info, 0, info->addr_unlock1,
1074 AMD_CMD_ERASE_START);
1075 flash_unlock_seq (info, 0);
1076 flash_write_cmd (info, sect, 0,
1077 AMD_CMD_ERASE_SECTOR);
1081 debug ("Unkown flash vendor %d\n",
1086 if (use_flash_status_poll(info)) {
1087 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1089 dest = flash_map(info, sect, 0);
1090 st = flash_status_poll(info, &cword, dest,
1091 info->erase_blk_tout, "erase");
1092 flash_unmap(info, sect, 0, dest);
1094 st = flash_full_status_check(info, sect,
1095 info->erase_blk_tout,
1099 else if (flash_verbose)
1110 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1111 static int sector_erased(flash_info_t *info, int i)
1115 volatile unsigned long *flash;
1118 * Check if whole sector is erased
1120 size = flash_sector_size(info, i);
1121 flash = (volatile unsigned long *) info->start[i];
1122 /* divide by 4 for longword access */
1125 for (k = 0; k < size; k++) {
1126 if (*flash++ != 0xffffffff)
1127 return 0; /* not erased */
1130 return 1; /* erased */
1132 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1134 void flash_print_info (flash_info_t * info)
1138 if (info->flash_id != FLASH_MAN_CFI) {
1139 puts ("missing or unknown FLASH type\n");
1143 printf ("%s FLASH (%d x %d)",
1145 (info->portwidth << 3), (info->chipwidth << 3));
1146 if (info->size < 1024*1024)
1147 printf (" Size: %ld kB in %d Sectors\n",
1148 info->size >> 10, info->sector_count);
1150 printf (" Size: %ld MB in %d Sectors\n",
1151 info->size >> 20, info->sector_count);
1153 switch (info->vendor) {
1154 case CFI_CMDSET_INTEL_PROG_REGIONS:
1155 printf ("Intel Prog Regions");
1157 case CFI_CMDSET_INTEL_STANDARD:
1158 printf ("Intel Standard");
1160 case CFI_CMDSET_INTEL_EXTENDED:
1161 printf ("Intel Extended");
1163 case CFI_CMDSET_AMD_STANDARD:
1164 printf ("AMD Standard");
1166 case CFI_CMDSET_AMD_EXTENDED:
1167 printf ("AMD Extended");
1169 #ifdef CONFIG_FLASH_CFI_LEGACY
1170 case CFI_CMDSET_AMD_LEGACY:
1171 printf ("AMD Legacy");
1175 printf ("Unknown (%d)", info->vendor);
1178 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1179 info->manufacturer_id);
1180 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1182 if (info->device_id == 0x7E) {
1183 printf("%04X", info->device_id2);
1185 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1186 info->erase_blk_tout,
1188 if (info->buffer_size > 1) {
1189 printf (" Buffer write timeout: %ld ms, "
1190 "buffer size: %d bytes\n",
1191 info->buffer_write_tout,
1195 puts ("\n Sector Start Addresses:");
1196 for (i = 0; i < info->sector_count; ++i) {
1201 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1202 /* print empty and read-only info */
1203 printf (" %08lX %c %s ",
1205 sector_erased(info, i) ? 'E' : ' ',
1206 info->protect[i] ? "RO" : " ");
1207 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1208 printf (" %08lX %s ",
1210 info->protect[i] ? "RO" : " ");
1217 /*-----------------------------------------------------------------------
1218 * This is used in a few places in write_buf() to show programming
1219 * progress. Making it a function is nasty because it needs to do side
1220 * effect updates to digit and dots. Repeated code is nasty too, so
1221 * we define it once here.
1223 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1224 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1225 if (flash_verbose) { \
1227 if ((scale > 0) && (dots <= 0)) { \
1228 if ((digit % 5) == 0) \
1229 printf ("%d", digit / 5); \
1237 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1240 /*-----------------------------------------------------------------------
1241 * Copy memory to flash, returns:
1244 * 2 - Flash not erased
1246 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1253 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1256 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1257 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1262 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1264 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1265 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1266 CONFIG_FLASH_SHOW_PROGRESS);
1270 /* get lower aligned address */
1271 wp = (addr & ~(info->portwidth - 1));
1273 /* handle unaligned start */
1274 if ((aln = addr - wp) != 0) {
1277 for (i = 0; i < aln; ++i)
1278 flash_add_byte (info, &cword, flash_read8(p + i));
1280 for (; (i < info->portwidth) && (cnt > 0); i++) {
1281 flash_add_byte (info, &cword, *src++);
1284 for (; (cnt == 0) && (i < info->portwidth); ++i)
1285 flash_add_byte (info, &cword, flash_read8(p + i));
1287 rc = flash_write_cfiword (info, wp, cword);
1292 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1295 /* handle the aligned part */
1296 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1297 buffered_size = (info->portwidth / info->chipwidth);
1298 buffered_size *= info->buffer_size;
1299 while (cnt >= info->portwidth) {
1300 /* prohibit buffer write when buffer_size is 1 */
1301 if (info->buffer_size == 1) {
1303 for (i = 0; i < info->portwidth; i++)
1304 flash_add_byte (info, &cword, *src++);
1305 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1307 wp += info->portwidth;
1308 cnt -= info->portwidth;
1312 /* write buffer until next buffered_size aligned boundary */
1313 i = buffered_size - (wp % buffered_size);
1316 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1318 i -= i & (info->portwidth - 1);
1322 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1325 while (cnt >= info->portwidth) {
1327 for (i = 0; i < info->portwidth; i++) {
1328 flash_add_byte (info, &cword, *src++);
1330 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1332 wp += info->portwidth;
1333 cnt -= info->portwidth;
1334 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1336 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1343 * handle unaligned tail bytes
1347 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1348 flash_add_byte (info, &cword, *src++);
1351 for (; i < info->portwidth; ++i)
1352 flash_add_byte (info, &cword, flash_read8(p + i));
1354 return flash_write_cfiword (info, wp, cword);
1357 /*-----------------------------------------------------------------------
1359 #ifdef CONFIG_SYS_FLASH_PROTECTION
1361 int flash_real_protect (flash_info_t * info, long sector, int prot)
1365 switch (info->vendor) {
1366 case CFI_CMDSET_INTEL_PROG_REGIONS:
1367 case CFI_CMDSET_INTEL_STANDARD:
1368 case CFI_CMDSET_INTEL_EXTENDED:
1371 * "Numonyx Axcell P33/P30 Specification Update" :)
1373 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
1374 if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
1377 * cmd must come before FLASH_CMD_PROTECT + 20us
1378 * Disable interrupts which might cause a timeout here.
1380 int flag = disable_interrupts ();
1384 cmd = FLASH_CMD_PROTECT_SET;
1386 cmd = FLASH_CMD_PROTECT_CLEAR;
1388 flash_write_cmd (info, sector, 0,
1390 flash_write_cmd (info, sector, 0, cmd);
1391 /* re-enable interrupts if necessary */
1393 enable_interrupts ();
1396 case CFI_CMDSET_AMD_EXTENDED:
1397 case CFI_CMDSET_AMD_STANDARD:
1398 /* U-Boot only checks the first byte */
1399 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1401 flash_unlock_seq (info, 0);
1402 flash_write_cmd (info, 0,
1404 ATM_CMD_SOFTLOCK_START);
1405 flash_unlock_seq (info, 0);
1406 flash_write_cmd (info, sector, 0,
1409 flash_write_cmd (info, 0,
1411 AMD_CMD_UNLOCK_START);
1412 if (info->device_id == ATM_ID_BV6416)
1413 flash_write_cmd (info, sector,
1414 0, ATM_CMD_UNLOCK_SECT);
1418 #ifdef CONFIG_FLASH_CFI_LEGACY
1419 case CFI_CMDSET_AMD_LEGACY:
1420 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1421 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1423 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1425 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1430 * Flash needs to be in status register read mode for
1431 * flash_full_status_check() to work correctly
1433 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1435 flash_full_status_check (info, sector, info->erase_blk_tout,
1436 prot ? "protect" : "unprotect")) == 0) {
1438 info->protect[sector] = prot;
1441 * On some of Intel's flash chips (marked via legacy_unlock)
1442 * unprotect unprotects all locking.
1444 if ((prot == 0) && (info->legacy_unlock)) {
1447 for (i = 0; i < info->sector_count; i++) {
1448 if (info->protect[i])
1449 flash_real_protect (info, i, 1);
1456 /*-----------------------------------------------------------------------
1457 * flash_read_user_serial - read the OneTimeProgramming cells
1459 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1466 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1467 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1468 memcpy (dst, src + offset, len);
1469 flash_write_cmd (info, 0, 0, info->cmd_reset);
1470 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1474 * flash_read_factory_serial - read the device Id from the protection area
1476 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1481 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1482 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1483 memcpy (buffer, src + offset, len);
1484 flash_write_cmd (info, 0, 0, info->cmd_reset);
1485 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1488 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1490 /*-----------------------------------------------------------------------
1491 * Reverse the order of the erase regions in the CFI QRY structure.
1492 * This is needed for chips that are either a) correctly detected as
1493 * top-boot, or b) buggy.
1495 static void cfi_reverse_geometry(struct cfi_qry *qry)
1500 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1501 tmp = qry->erase_region_info[i];
1502 qry->erase_region_info[i] = qry->erase_region_info[j];
1503 qry->erase_region_info[j] = tmp;
1507 /*-----------------------------------------------------------------------
1508 * read jedec ids from device and set corresponding fields in info struct
1510 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1513 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1515 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1516 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1517 udelay(1000); /* some flash are slow to respond */
1518 info->manufacturer_id = flash_read_uchar (info,
1519 FLASH_OFFSET_MANUFACTURER_ID);
1520 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1521 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1522 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
1523 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1526 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1528 info->cmd_reset = FLASH_CMD_RESET;
1530 cmdset_intel_read_jedec_ids(info);
1531 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1533 #ifdef CONFIG_SYS_FLASH_PROTECTION
1534 /* read legacy lock/unlock bit from intel flash */
1535 if (info->ext_addr) {
1536 info->legacy_unlock = flash_read_uchar (info,
1537 info->ext_addr + 5) & 0x08;
1544 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1549 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1550 flash_unlock_seq(info, 0);
1551 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1552 udelay(1000); /* some flash are slow to respond */
1554 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1555 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1556 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1558 manuId = flash_read_uchar (info,
1559 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1561 info->manufacturer_id = manuId;
1563 switch (info->chipwidth){
1564 case FLASH_CFI_8BIT:
1565 info->device_id = flash_read_uchar (info,
1566 FLASH_OFFSET_DEVICE_ID);
1567 if (info->device_id == 0x7E) {
1568 /* AMD 3-byte (expanded) device ids */
1569 info->device_id2 = flash_read_uchar (info,
1570 FLASH_OFFSET_DEVICE_ID2);
1571 info->device_id2 <<= 8;
1572 info->device_id2 |= flash_read_uchar (info,
1573 FLASH_OFFSET_DEVICE_ID3);
1576 case FLASH_CFI_16BIT:
1577 info->device_id = flash_read_word (info,
1578 FLASH_OFFSET_DEVICE_ID);
1583 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1586 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1588 info->cmd_reset = AMD_CMD_RESET;
1590 cmdset_amd_read_jedec_ids(info);
1591 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1596 #ifdef CONFIG_FLASH_CFI_LEGACY
1597 static void flash_read_jedec_ids (flash_info_t * info)
1599 info->manufacturer_id = 0;
1600 info->device_id = 0;
1601 info->device_id2 = 0;
1603 switch (info->vendor) {
1604 case CFI_CMDSET_INTEL_PROG_REGIONS:
1605 case CFI_CMDSET_INTEL_STANDARD:
1606 case CFI_CMDSET_INTEL_EXTENDED:
1607 cmdset_intel_read_jedec_ids(info);
1609 case CFI_CMDSET_AMD_STANDARD:
1610 case CFI_CMDSET_AMD_EXTENDED:
1611 cmdset_amd_read_jedec_ids(info);
1618 /*-----------------------------------------------------------------------
1619 * Call board code to request info about non-CFI flash.
1620 * board_flash_get_legacy needs to fill in at least:
1621 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1623 static int flash_detect_legacy(phys_addr_t base, int banknum)
1625 flash_info_t *info = &flash_info[banknum];
1627 if (board_flash_get_legacy(base, banknum, info)) {
1628 /* board code may have filled info completely. If not, we
1629 use JEDEC ID probing. */
1630 if (!info->vendor) {
1632 CFI_CMDSET_AMD_STANDARD,
1633 CFI_CMDSET_INTEL_STANDARD
1637 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1638 info->vendor = modes[i];
1640 (ulong)map_physmem(base,
1643 if (info->portwidth == FLASH_CFI_8BIT
1644 && info->interface == FLASH_CFI_X8X16) {
1645 info->addr_unlock1 = 0x2AAA;
1646 info->addr_unlock2 = 0x5555;
1648 info->addr_unlock1 = 0x5555;
1649 info->addr_unlock2 = 0x2AAA;
1651 flash_read_jedec_ids(info);
1652 debug("JEDEC PROBE: ID %x %x %x\n",
1653 info->manufacturer_id,
1656 if (jedec_flash_match(info, info->start[0]))
1659 unmap_physmem((void *)info->start[0],
1664 switch(info->vendor) {
1665 case CFI_CMDSET_INTEL_PROG_REGIONS:
1666 case CFI_CMDSET_INTEL_STANDARD:
1667 case CFI_CMDSET_INTEL_EXTENDED:
1668 info->cmd_reset = FLASH_CMD_RESET;
1670 case CFI_CMDSET_AMD_STANDARD:
1671 case CFI_CMDSET_AMD_EXTENDED:
1672 case CFI_CMDSET_AMD_LEGACY:
1673 info->cmd_reset = AMD_CMD_RESET;
1676 info->flash_id = FLASH_MAN_CFI;
1679 return 0; /* use CFI */
1682 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1684 return 0; /* use CFI */
1688 /*-----------------------------------------------------------------------
1689 * detect if flash is compatible with the Common Flash Interface (CFI)
1690 * http://www.jedec.org/download/search/jesd68.pdf
1692 static void flash_read_cfi (flash_info_t *info, void *buf,
1693 unsigned int start, size_t len)
1698 for (i = 0; i < len; i++)
1699 p[i] = flash_read_uchar(info, start + i);
1702 void __flash_cmd_reset(flash_info_t *info)
1705 * We do not yet know what kind of commandset to use, so we issue
1706 * the reset command in both Intel and AMD variants, in the hope
1707 * that AMD flash roms ignore the Intel command.
1709 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1710 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1712 void flash_cmd_reset(flash_info_t *info)
1713 __attribute__((weak,alias("__flash_cmd_reset")));
1715 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1719 /* Issue FLASH reset command */
1720 flash_cmd_reset(info);
1723 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1725 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1727 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1728 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1729 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1730 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1731 sizeof(struct cfi_qry));
1732 info->interface = le16_to_cpu(qry->interface_desc);
1734 info->cfi_offset = flash_offset_cfi[cfi_offset];
1735 debug ("device interface is %d\n",
1737 debug ("found port %d chip %d ",
1738 info->portwidth, info->chipwidth);
1739 debug ("port %d bits chip %d bits\n",
1740 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1741 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1743 /* calculate command offsets as in the Linux driver */
1744 info->addr_unlock1 = 0x555;
1745 info->addr_unlock2 = 0x2aa;
1748 * modify the unlock address if we are
1749 * in compatibility mode
1751 if ( /* x8/x16 in x8 mode */
1752 ((info->chipwidth == FLASH_CFI_BY8) &&
1753 (info->interface == FLASH_CFI_X8X16)) ||
1754 /* x16/x32 in x16 mode */
1755 ((info->chipwidth == FLASH_CFI_BY16) &&
1756 (info->interface == FLASH_CFI_X16X32)))
1758 info->addr_unlock1 = 0xaaa;
1759 info->addr_unlock2 = 0x555;
1762 info->name = "CFI conformant";
1770 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1772 debug ("flash detect cfi\n");
1774 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1775 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1776 for (info->chipwidth = FLASH_CFI_BY8;
1777 info->chipwidth <= info->portwidth;
1778 info->chipwidth <<= 1)
1779 if (__flash_detect_cfi(info, qry))
1782 debug ("not found\n");
1787 * Manufacturer-specific quirks. Add workarounds for geometry
1788 * reversal, etc. here.
1790 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1792 /* check if flash geometry needs reversal */
1793 if (qry->num_erase_regions > 1) {
1794 /* reverse geometry if top boot part */
1795 if (info->cfi_version < 0x3131) {
1796 /* CFI < 1.1, try to guess from device id */
1797 if ((info->device_id & 0x80) != 0)
1798 cfi_reverse_geometry(qry);
1799 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1800 /* CFI >= 1.1, deduct from top/bottom flag */
1801 /* note: ext_addr is valid since cfi_version > 0 */
1802 cfi_reverse_geometry(qry);
1807 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1809 int reverse_geometry = 0;
1811 /* Check the "top boot" bit in the PRI */
1812 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1813 reverse_geometry = 1;
1815 /* AT49BV6416(T) list the erase regions in the wrong order.
1816 * However, the device ID is identical with the non-broken
1817 * AT49BV642D they differ in the high byte.
1819 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1820 reverse_geometry = !reverse_geometry;
1822 if (reverse_geometry)
1823 cfi_reverse_geometry(qry);
1826 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1828 /* check if flash geometry needs reversal */
1829 if (qry->num_erase_regions > 1) {
1830 /* reverse geometry if top boot part */
1831 if (info->cfi_version < 0x3131) {
1832 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1833 if (info->device_id == 0x22CA ||
1834 info->device_id == 0x2256) {
1835 cfi_reverse_geometry(qry);
1842 * The following code cannot be run from FLASH!
1845 ulong flash_get_size (phys_addr_t base, int banknum)
1847 flash_info_t *info = &flash_info[banknum];
1849 flash_sect_t sect_cnt;
1853 uchar num_erase_regions;
1854 int erase_region_size;
1855 int erase_region_count;
1857 unsigned long max_size;
1859 memset(&qry, 0, sizeof(qry));
1862 info->cfi_version = 0;
1863 #ifdef CONFIG_SYS_FLASH_PROTECTION
1864 info->legacy_unlock = 0;
1867 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
1869 if (flash_detect_cfi (info, &qry)) {
1870 info->vendor = le16_to_cpu(qry.p_id);
1871 info->ext_addr = le16_to_cpu(qry.p_adr);
1872 num_erase_regions = qry.num_erase_regions;
1874 if (info->ext_addr) {
1875 info->cfi_version = (ushort) flash_read_uchar (info,
1876 info->ext_addr + 3) << 8;
1877 info->cfi_version |= (ushort) flash_read_uchar (info,
1878 info->ext_addr + 4);
1882 flash_printqry (&qry);
1885 switch (info->vendor) {
1886 case CFI_CMDSET_INTEL_PROG_REGIONS:
1887 case CFI_CMDSET_INTEL_STANDARD:
1888 case CFI_CMDSET_INTEL_EXTENDED:
1889 cmdset_intel_init(info, &qry);
1891 case CFI_CMDSET_AMD_STANDARD:
1892 case CFI_CMDSET_AMD_EXTENDED:
1893 cmdset_amd_init(info, &qry);
1896 printf("CFI: Unknown command set 0x%x\n",
1899 * Unfortunately, this means we don't know how
1900 * to get the chip back to Read mode. Might
1901 * as well try an Intel-style reset...
1903 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1907 /* Do manufacturer-specific fixups */
1908 switch (info->manufacturer_id) {
1910 flash_fixup_amd(info, &qry);
1913 flash_fixup_atmel(info, &qry);
1916 flash_fixup_stm(info, &qry);
1920 debug ("manufacturer is %d\n", info->vendor);
1921 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1922 debug ("device id is 0x%x\n", info->device_id);
1923 debug ("device id2 is 0x%x\n", info->device_id2);
1924 debug ("cfi version is 0x%04x\n", info->cfi_version);
1926 size_ratio = info->portwidth / info->chipwidth;
1927 /* if the chip is x8/x16 reduce the ratio by half */
1928 if ((info->interface == FLASH_CFI_X8X16)
1929 && (info->chipwidth == FLASH_CFI_BY8)) {
1932 debug ("size_ratio %d port %d bits chip %d bits\n",
1933 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1934 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1935 info->size = 1 << qry.dev_size;
1936 /* multiply the size by the number of chips */
1937 info->size *= size_ratio;
1938 max_size = cfi_flash_bank_size(banknum);
1939 if (max_size && (info->size > max_size)) {
1940 debug("[truncated from %ldMiB]", info->size >> 20);
1941 info->size = max_size;
1943 debug ("found %d erase regions\n", num_erase_regions);
1946 for (i = 0; i < num_erase_regions; i++) {
1947 if (i > NUM_ERASE_REGIONS) {
1948 printf ("%d erase regions found, only %d used\n",
1949 num_erase_regions, NUM_ERASE_REGIONS);
1953 tmp = le32_to_cpu(qry.erase_region_info[i]);
1954 debug("erase region %u: 0x%08lx\n", i, tmp);
1956 erase_region_count = (tmp & 0xffff) + 1;
1959 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1960 debug ("erase_region_count = %d erase_region_size = %d\n",
1961 erase_region_count, erase_region_size);
1962 for (j = 0; j < erase_region_count; j++) {
1963 if (sector - base >= info->size)
1965 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
1966 printf("ERROR: too many flash sectors\n");
1969 info->start[sect_cnt] =
1970 (ulong)map_physmem(sector,
1973 sector += (erase_region_size * size_ratio);
1976 * Only read protection status from
1977 * supported devices (intel...)
1979 switch (info->vendor) {
1980 case CFI_CMDSET_INTEL_PROG_REGIONS:
1981 case CFI_CMDSET_INTEL_EXTENDED:
1982 case CFI_CMDSET_INTEL_STANDARD:
1984 * Set flash to read-id mode. Otherwise
1985 * reading protected status is not
1988 flash_write_cmd(info, sect_cnt, 0,
1990 info->protect[sect_cnt] =
1991 flash_isset (info, sect_cnt,
1992 FLASH_OFFSET_PROTECT,
1993 FLASH_STATUS_PROTECT);
1996 /* default: not protected */
1997 info->protect[sect_cnt] = 0;
2004 info->sector_count = sect_cnt;
2005 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2006 tmp = 1 << qry.block_erase_timeout_typ;
2007 info->erase_blk_tout = tmp *
2008 (1 << qry.block_erase_timeout_max);
2009 tmp = (1 << qry.buf_write_timeout_typ) *
2010 (1 << qry.buf_write_timeout_max);
2012 /* round up when converting to ms */
2013 info->buffer_write_tout = (tmp + 999) / 1000;
2014 tmp = (1 << qry.word_write_timeout_typ) *
2015 (1 << qry.word_write_timeout_max);
2016 /* round up when converting to ms */
2017 info->write_tout = (tmp + 999) / 1000;
2018 info->flash_id = FLASH_MAN_CFI;
2019 if ((info->interface == FLASH_CFI_X8X16) &&
2020 (info->chipwidth == FLASH_CFI_BY8)) {
2021 /* XXX - Need to test on x8/x16 in parallel. */
2022 info->portwidth >>= 1;
2025 flash_write_cmd (info, 0, 0, info->cmd_reset);
2028 return (info->size);
2031 void flash_set_verbose(uint v)
2036 /*-----------------------------------------------------------------------
2038 unsigned long flash_init (void)
2040 unsigned long size = 0;
2042 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2046 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2049 #ifdef CONFIG_SYS_FLASH_PROTECTION
2050 /* read environment from EEPROM */
2052 getenv_f("unlock", s, sizeof(s));
2055 /* Init: no FLASHes known */
2056 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2057 flash_info[i].flash_id = FLASH_UNKNOWN;
2059 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2060 flash_get_size(cfi_flash_bank_addr(i), i);
2061 size += flash_info[i].size;
2062 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2063 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2064 printf ("## Unknown FLASH on Bank %d "
2065 "- Size = 0x%08lx = %ld MB\n",
2066 i+1, flash_info[i].size,
2067 flash_info[i].size >> 20);
2068 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2070 #ifdef CONFIG_SYS_FLASH_PROTECTION
2071 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2073 * Only the U-Boot image and it's environment
2074 * is protected, all other sectors are
2075 * unprotected (unlocked) if flash hardware
2076 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2077 * and the environment variable "unlock" is
2080 if (flash_info[i].legacy_unlock) {
2084 * Disable legacy_unlock temporarily,
2085 * since flash_real_protect would
2086 * relock all other sectors again
2089 flash_info[i].legacy_unlock = 0;
2092 * Legacy unlocking (e.g. Intel J3) ->
2093 * unlock only one sector. This will
2094 * unlock all sectors.
2096 flash_real_protect (&flash_info[i], 0, 0);
2098 flash_info[i].legacy_unlock = 1;
2101 * Manually mark other sectors as
2102 * unlocked (unprotected)
2104 for (k = 1; k < flash_info[i].sector_count; k++)
2105 flash_info[i].protect[k] = 0;
2108 * No legancy unlocking -> unlock all sectors
2110 flash_protect (FLAG_PROTECT_CLEAR,
2111 flash_info[i].start[0],
2112 flash_info[i].start[0]
2113 + flash_info[i].size - 1,
2117 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2120 /* Monitor protection ON by default */
2121 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2122 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2123 flash_protect (FLAG_PROTECT_SET,
2124 CONFIG_SYS_MONITOR_BASE,
2125 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2126 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2129 /* Environment protection ON by default */
2130 #ifdef CONFIG_ENV_IS_IN_FLASH
2131 flash_protect (FLAG_PROTECT_SET,
2133 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2134 flash_get_info(CONFIG_ENV_ADDR));
2137 /* Redundant environment protection ON by default */
2138 #ifdef CONFIG_ENV_ADDR_REDUND
2139 flash_protect (FLAG_PROTECT_SET,
2140 CONFIG_ENV_ADDR_REDUND,
2141 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2142 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2145 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2146 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2147 debug("autoprotecting from %08x to %08x\n",
2148 apl[i].start, apl[i].start + apl[i].size - 1);
2149 flash_protect (FLAG_PROTECT_SET,
2151 apl[i].start + apl[i].size - 1,
2152 flash_get_info(apl[i].start));
2156 #ifdef CONFIG_FLASH_CFI_MTD