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OMAP4: clocks: Fix the clksel_rate struct DPLL divs
2010-01-20 Rajendra NayakOMAP4: clocks: Fix the clksel_rate struct DPLL divs
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2010-01-20 Rajendra NayakOMAP4: PRCM: Fix the base address for CHIRONSS reg...
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-13 Rajendra Nayakmfd: Add twl6030 regulator subdevices
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-13 Rajendra Nayakregulator: Add support for twl6030 regulators
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-13 Rajendra Nayakmfd: Rename twl4030_ routines in twl-regulator.c
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-12 Rajendra NayakARM: OMAP4: PM: Add init api for DPLL nodes
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-12 Rajendra NayakARM: OMAP4: PM: Add support for OMAP4 dpll api's
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-12 Rajendra NayakARM: OMAP4: PM: Move DPLL control apis to dpll.c
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-12 Rajendra NayakARM: OMAP4: PM: Add dummy hooks for OMAP4 dpll api's
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-12 Rajendra NayakARM: OMAP4: PM: OMAP4 clock tree and clkdev registration
 ...Paul Walmsley, Benoit Cousson and Rajendra Nayak.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-12 Rajendra NayakARM: OMAP4: PM: Adds CM1/2 register field masks
Cousson, Paul Walmsley and Rajendra Nayak.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-12 Rajendra NayakARM: OMAP4: PM: Adds PRM register shift and mask bits
Paul Walmsley and Rajendra Nayak.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-12 Rajendra NayakARM: OMAP4: PM: Adds PRM register defs for OMAP4
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-12 Rajendra NayakARM: OMAP4: PM: Adds CM1/2 register defs for OMAP4
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-12 Rajendra NayakARM: OMAP4: PM: PRM/CM module offsets for OMAP4
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-12 Rajendra NayakARM: OMAP4: PM: Fix the PRM and CM base addresses
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-12-09 Rajendra Nayaki2c-omap: OMAP3: PM: (re)init for every transfer to...
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-17 Rajendra Nayakomap3: clock: Fix the DPLL freqsel computations
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: CPUidle: support retention and off-mode...
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: CPUidle: base driver and support for C1-C2
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: Program SDRC to send self refresh on timeout...
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: CORE domain off-mode support
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: MPU off-mode support
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: Restore MMU table entry
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: handle PER/NEON/CORE in idle
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: restore SRAM functions after off-mode.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: SCM context save/restore
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: Populate scratchpad contents
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: PRCM context save/restore
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: INTC context save/restore
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: GPIO context save/restore
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-11-11 Rajendra NayakOMAP3: PM: GPMC context save/restore
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-10-05 Rajendra Nayakomap: Lock DPLL5 at boot
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-07-25 Rajendra NayakOMAP3 SDRC: Move the clk stabilization delay to the...
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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2009-07-25 Rajendra NayakOMAP3 SDRC: Fix freeze when scaling CORE dpll to <...
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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