e1000e: 82577/8/9 mis-configured OEM bits during S0->Sx

The LPLU (Low Power Link Up) and Gigabit Disable bits (a.k.a. OEM bits)
were being configured incorrectly when device goes to D3 state.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index e3374d9..d7fc930 100644 (file)
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -3591,7 +3591,7 @@ void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw)
        ew32(PHY_CTRL, phy_ctrl);
 
        if (hw->mac.type >= e1000_pchlan) {
-               e1000_oem_bits_config_ich8lan(hw, true);
+               e1000_oem_bits_config_ich8lan(hw, false);
                ret_val = hw->phy.ops.acquire(hw);
                if (ret_val)
                        return;