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e1000e: 82577/8/9 mis-configured OEM bits during S0->Sx
authorBruce Allan <bruce.w.allan@intel.com>
Wed, 24 Nov 2010 06:01:41 +0000 (06:01 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Sat, 11 Dec 2010 06:13:27 +0000 (22:13 -0800)
commitce54afd16d874ac07378a8bb55d26f7f5b613c0e
treeabad7c3150c4acbf3012168d71d611523459694atree | snapshot
parentd9c76f99c2a79feb413e3e751362d59c0f5323f6commit | diff
e1000e: 82577/8/9 mis-configured OEM bits during S0->Sx

The LPLU (Low Power Link Up) and Gigabit Disable bits (a.k.a. OEM bits)
were being configured incorrectly when device goes to D3 state.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/e1000e/ich8lan.c diff | blob | history
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