[PATCH] ppc32: Add support for MPC8245 8250 serial ports on Sandpoint

Added platform device initialization for the two 8250 style UARTs that
exist on the MPC8245.  Additionally, updated the Sandpoint code to enable
one of these UARTs if an MPC8245 is connected to it.

Signed-off-by: Matt McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

diff --git a/arch/ppc/platforms/sandpoint.c b/arch/ppc/platforms/sandpoint.c
index 531bfa0..70e58f4 100644 (file)
--- a/arch/ppc/platforms/sandpoint.c
+++ b/arch/ppc/platforms/sandpoint.c
@@ -81,6 +81,7 @@
 #include <linux/serial.h>
 #include <linux/tty.h> /* for linux/serial_core.h */
 #include <linux/serial_core.h>
+#include <linux/serial_8250.h>
 
 #include <asm/system.h>
 #include <asm/pgtable.h>
@@ -99,6 +100,7 @@
 #include <asm/mpc10x.h>
 #include <asm/pci-bridge.h>
 #include <asm/kgdb.h>
+#include <asm/ppc_sys.h>
 
 #include "sandpoint.h"
 
@@ -305,6 +307,24 @@ sandpoint_setup_arch(void)
        /* Lookup PCI host bridges */
        sandpoint_find_bridges();
 
+       if (strncmp (cur_ppc_sys_spec->ppc_sys_name, "8245", 4) == 0)
+       {
+               bd_t *bp = (bd_t *)__res;
+               struct plat_serial8250_port *pdata;
+               pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC10X_DUART);
+
+               if (pdata)
+               {
+                       pdata[0].uartclk = bp->bi_busfreq;
+                       pdata[0].membase = ioremap(pdata[0].mapbase, 0x100);
+
+                       /* this disables the 2nd serial port on the DUART
+                        * since the sandpoint does not have it connected */
+                       pdata[1].uartclk = 0;
+                       pdata[1].irq = 0;
+                       pdata[1].mapbase = 0;
+               }
+
        printk(KERN_INFO "Motorola SPS Sandpoint Test Platform\n");
        printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");
 

diff --git a/arch/ppc/syslib/mpc10x_common.c b/arch/ppc/syslib/mpc10x_common.c
index 0130aeb..8fc5f41 100644 (file)
--- a/arch/ppc/syslib/mpc10x_common.c
+++ b/arch/ppc/syslib/mpc10x_common.c
@@ -44,10 +44,12 @@
 #define MPC10X_I2C_IRQ (EPIC_IRQ_BASE + NUM_8259_INTERRUPTS)
 #define MPC10X_DMA0_IRQ (EPIC_IRQ_BASE + 1 + NUM_8259_INTERRUPTS)
 #define MPC10X_DMA1_IRQ (EPIC_IRQ_BASE + 2 + NUM_8259_INTERRUPTS)
+#define MPC10X_UART0_IRQ (EPIC_IRQ_BASE + 4 + NUM_8259_INTERRUPTS)
 #else
 #define MPC10X_I2C_IRQ -1
 #define MPC10X_DMA0_IRQ -1
 #define MPC10X_DMA1_IRQ -1
+#define MPC10X_UART0_IRQ -1
 #endif
 
 static struct fsl_i2c_platform_data mpc10x_i2c_pdata = {
@@ -55,6 +57,16 @@ static struct fsl_i2c_platform_data mpc10x_i2c_pdata = {
 };
 
 static struct plat_serial8250_port serial_platform_data[] = {
+       [0] = {
+               .mapbase        = 0x4500,
+               .iotype         = UPIO_MEM,
+               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+       },
+       [1] = {
+               .mapbase        = 0x4600,
+               .iotype         = UPIO_MEM,
+               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+       },
        { },
 };
 
@@ -399,6 +411,12 @@ mpc10x_bridge_init(struct pci_controller *hose,
        ppc_sys_platform_devices[MPC10X_DMA1].resource[1].start = MPC10X_DMA1_IRQ;
        ppc_sys_platform_devices[MPC10X_DMA1].resource[1].end = MPC10X_DMA1_IRQ;
 
+       serial_platform_data[0].mapbase += phys_eumb_base;
+       serial_platform_data[0].irq = MPC10X_UART0_IRQ;
+
+       serial_platform_data[1].mapbase += phys_eumb_base;
+       serial_platform_data[1].irq = MPC10X_UART0_IRQ + 1;
+
        /*
         * 8240 erratum 26, 8241/8245 erratum 29, 107 erratum 23: speculative
         * PCI reads may return stale data so turn off.
@@ -597,6 +615,8 @@ void __init mpc10x_set_openpic(void)
        openpic_set_sources(EPIC_IRQ_BASE, 3, OpenPIC_Addr + 0x11020);
        /* Skip reserved space and map Message Unit Interrupt (I2O) */
        openpic_set_sources(EPIC_IRQ_BASE + 3, 1, OpenPIC_Addr + 0x110C0);
+       /* Skip reserved space and map Serial Interupts */
+       openpic_set_sources(EPIC_IRQ_BASE + 4, 2, OpenPIC_Addr + 0x11120);
 
        openpic_init(NUM_8259_INTERRUPTS);
 }