OMAP3: PM: disable sys_clkreq signalling while audio is active

see comment in this commit itself

diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 5722025..dabc07f 100644 (file)
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -503,6 +503,15 @@ out:
        local_irq_enable();
 }
 
        local_irq_enable();
 }
 

+void omap3_pm_alow_pmic_idle(int allow)
+{
+       /* enable sys_clkreq signalling on RET */
+       omap2_prm_rmw_mod_reg_bits((OMAP3430_AUTO_OFF_MASK | OMAP3430_AUTO_RET_MASK
+               | OMAP3430_AUTO_SLEEP_MASK), allow ? OMAP3430_AUTO_RET_MASK : 0,
+               OMAP3430_GR_MOD, OMAP3_PRM_VOLTCTRL_OFFSET);
+}
+EXPORT_SYMBOL(omap3_pm_alow_pmic_idle);
+

 #ifdef CONFIG_SUSPEND
 static int omap3_pm_suspend(void)
 {
 #ifdef CONFIG_SUSPEND
 static int omap3_pm_suspend(void)
 {


@@ -739,10 +748,7 @@ static void __init prcm_setup_regs(void)
        omap3_iva_idle();
        omap3_d2d_idle();
 
        omap3_iva_idle();
        omap3_d2d_idle();
 

-       /* enable sys_clkreq signalling */
-       omap2_prm_rmw_mod_reg_bits((OMAP3430_AUTO_OFF_MASK | OMAP3430_AUTO_RET_MASK
-               | OMAP3430_AUTO_SLEEP_MASK), OMAP3430_AUTO_RET_MASK,
-               OMAP3430_GR_MOD, OMAP3_PRM_VOLTCTRL_OFFSET);
+       omap3_pm_alow_pmic_idle(1);

 }
 
 void omap3_pm_off_mode_enable(int enable)
 }
 
 void omap3_pm_off_mode_enable(int enable)

diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c
index a99ac9b..1609e15 100644 (file)
--- a/sound/soc/codecs/twl4030.c
+++ b/sound/soc/codecs/twl4030.c
@@ -38,6 +38,9 @@
 /* Register descriptions are here */
 #include <linux/mfd/twl4030-audio.h>
 
 /* Register descriptions are here */
 #include <linux/mfd/twl4030-audio.h>
 

+/* HACK */
+extern void omap3_pm_alow_pmic_idle(int allow);
+

 /* Shadow register used by the audio driver */
 #define TWL4030_REG_SW_SHADOW          0x4A
 #define TWL4030_CACHEREGNUM    (TWL4030_REG_SW_SHADOW + 1)
 /* Shadow register used by the audio driver */
 #define TWL4030_REG_SW_SHADOW          0x4A
 #define TWL4030_CACHEREGNUM    (TWL4030_REG_SW_SHADOW + 1)


@@ -1627,11 +1630,18 @@ static int twl4030_set_bias_level(struct snd_soc_codec *codec,
        case SND_SOC_BIAS_PREPARE:
                break;
        case SND_SOC_BIAS_STANDBY:
        case SND_SOC_BIAS_PREPARE:
                break;
        case SND_SOC_BIAS_STANDBY:

-               if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
+               if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {

                        twl4030_codec_enable(codec, 1);
                        twl4030_codec_enable(codec, 1);

+                       /* pandora hack: there seems to be a problem when
+                        * sys_clkreq PMIC signalling is enabled, it looks like
+                        * twl does not provide stable 256fs clock in such a
+                        * case and distrupts the DAC */
+                       omap3_pm_alow_pmic_idle(0);
+               }

                break;
        case SND_SOC_BIAS_OFF:
                twl4030_codec_enable(codec, 0);
                break;
        case SND_SOC_BIAS_OFF:
                twl4030_codec_enable(codec, 0);

+               omap3_pm_alow_pmic_idle(1);

                break;
        }
        codec->dapm.bias_level = level;
                break;
        }
        codec->dapm.bias_level = level;