Revert "arm: mm: hugetlb WT hack"

[pandora-kernel.git] / arch / arm / mm / proc-arm940.S

diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index ac750d5..a613a7d 100644 (file)
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -48,6 +48,7 @@ ENTRY(cpu_arm940_proc_fin)
  * Params  : r0 = address to jump to
  * Notes   : This sets up everything for a reset
  */
+       .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm940_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c5, 0           @ flush I cache
@@ -58,6 +59,8 @@ ENTRY(cpu_arm940_reset)
        bic     ip, ip, #0x00001000             @ i-cache
        mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
        mov     pc, r0
+ENDPROC(cpu_arm940_reset)
+       .popsection
 
 /*
  * cpu_arm940_do_idle()
@@ -157,7 +160,7 @@ ENTRY(arm940_coherent_user_range)
  *     - size  - region size
  */
 ENTRY(arm940_flush_kern_dcache_area)
-       mov     ip, #0
+       mov     r0, #0
        mov     r1, #(CACHE_DSEGMENTS - 1) << 4 @ 4 segments
 1:     orr     r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries
 2:     mcr     p15, 0, r3, c7, c14, 2          @ clean/flush D index
@@ -165,8 +168,8 @@ ENTRY(arm940_flush_kern_dcache_area)
        bcs     2b                              @ entries 63 to 0
        subs    r1, r1, #1 << 4
        bcs     1b                              @ segments 7 to 0
-       mcr     p15, 0, ip, c7, c5, 0           @ invalidate I cache
-       mcr     p15, 0, ip, c7, c10, 4          @ drain WB
+       mcr     p15, 0, r0, c7, c5, 0           @ invalidate I cache
+       mcr     p15, 0, r0, c7, c10, 4          @ drain WB
        mov     pc, lr
 
 /*