2 * pxa-ssp.c -- ALSA Soc Audio Layer
4 * Copyright 2005,2008 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 * o Test network mode for > 16bit sample size
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/clk.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/initval.h>
28 #include <sound/pcm_params.h>
29 #include <sound/soc.h>
30 #include <sound/pxa2xx-lib.h>
32 #include <mach/hardware.h>
34 #include <mach/regs-ssp.h>
35 #include <mach/audio.h>
38 #include "pxa2xx-pcm.h"
42 * SSP audio private data
49 struct ssp_state state;
53 static void dump_registers(struct ssp_device *ssp)
55 dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
56 ssp_read_reg(ssp, SSCR0), ssp_read_reg(ssp, SSCR1),
57 ssp_read_reg(ssp, SSTO));
59 dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
60 ssp_read_reg(ssp, SSPSP), ssp_read_reg(ssp, SSSR),
61 ssp_read_reg(ssp, SSACD));
64 struct pxa2xx_pcm_dma_data {
65 struct pxa2xx_pcm_dma_params params;
69 static struct pxa2xx_pcm_dma_params *
70 ssp_get_dma_params(struct ssp_device *ssp, int width4, int out)
72 struct pxa2xx_pcm_dma_data *dma;
74 dma = kzalloc(sizeof(struct pxa2xx_pcm_dma_data), GFP_KERNEL);
78 snprintf(dma->name, 20, "SSP%d PCM %s %s", ssp->port_id,
79 width4 ? "32-bit" : "16-bit", out ? "out" : "in");
81 dma->params.name = dma->name;
82 dma->params.drcmr = &DRCMR(out ? ssp->drcmr_tx : ssp->drcmr_rx);
83 dma->params.dcmd = (out ? (DCMD_INCSRCADDR | DCMD_FLOWTRG) :
84 (DCMD_INCTRGADDR | DCMD_FLOWSRC)) |
85 (width4 ? DCMD_WIDTH4 : DCMD_WIDTH2) | DCMD_BURST16;
86 dma->params.dev_addr = ssp->phys_base + SSDR;
91 static int pxa_ssp_startup(struct snd_pcm_substream *substream,
92 struct snd_soc_dai *dai)
94 struct snd_soc_pcm_runtime *rtd = substream->private_data;
95 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
96 struct ssp_priv *priv = cpu_dai->private_data;
99 if (!cpu_dai->active) {
100 priv->dev.port = cpu_dai->id + 1;
101 priv->dev.irq = NO_IRQ;
102 clk_enable(priv->dev.ssp->clk);
103 ssp_disable(&priv->dev);
106 if (cpu_dai->dma_data) {
107 kfree(cpu_dai->dma_data);
108 cpu_dai->dma_data = NULL;
113 static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
114 struct snd_soc_dai *dai)
116 struct snd_soc_pcm_runtime *rtd = substream->private_data;
117 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
118 struct ssp_priv *priv = cpu_dai->private_data;
120 if (!cpu_dai->active) {
121 ssp_disable(&priv->dev);
122 clk_disable(priv->dev.ssp->clk);
125 if (cpu_dai->dma_data) {
126 kfree(cpu_dai->dma_data);
127 cpu_dai->dma_data = NULL;
133 static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
135 struct ssp_priv *priv = cpu_dai->private_data;
137 if (!cpu_dai->active)
140 ssp_save_state(&priv->dev, &priv->state);
141 clk_disable(priv->dev.ssp->clk);
145 static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
147 struct ssp_priv *priv = cpu_dai->private_data;
149 if (!cpu_dai->active)
152 clk_enable(priv->dev.ssp->clk);
153 ssp_restore_state(&priv->dev, &priv->state);
154 ssp_enable(&priv->dev);
160 #define pxa_ssp_suspend NULL
161 #define pxa_ssp_resume NULL
165 * ssp_set_clkdiv - set SSP clock divider
166 * @div: serial clock rate divider
168 static void ssp_set_scr(struct ssp_device *ssp, u32 div)
170 u32 sscr0 = ssp_read_reg(ssp, SSCR0);
172 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) {
173 sscr0 &= ~0x0000ff00;
174 sscr0 |= ((div - 2)/2) << 8; /* 2..512 */
176 sscr0 &= ~0x000fff00;
177 sscr0 |= (div - 1) << 8; /* 1..4096 */
179 ssp_write_reg(ssp, SSCR0, sscr0);
183 * ssp_get_clkdiv - get SSP clock divider
185 static u32 ssp_get_scr(struct ssp_device *ssp)
187 u32 sscr0 = ssp_read_reg(ssp, SSCR0);
190 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP)
191 div = ((sscr0 >> 8) & 0xff) * 2 + 2;
193 div = ((sscr0 >> 8) & 0xfff) + 1;
198 * Set the SSP ports SYSCLK.
200 static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
201 int clk_id, unsigned int freq, int dir)
203 struct ssp_priv *priv = cpu_dai->private_data;
204 struct ssp_device *ssp = priv->dev.ssp;
207 u32 sscr0 = ssp_read_reg(ssp, SSCR0) &
208 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
210 dev_dbg(&ssp->pdev->dev,
211 "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %u\n",
212 cpu_dai->id, clk_id, freq);
215 case PXA_SSP_CLK_NET_PLL:
218 case PXA_SSP_CLK_PLL:
219 /* Internal PLL is fixed */
221 priv->sysclk = 1843200;
223 priv->sysclk = 13000000;
225 case PXA_SSP_CLK_EXT:
229 case PXA_SSP_CLK_NET:
231 sscr0 |= SSCR0_NCS | SSCR0_MOD;
233 case PXA_SSP_CLK_AUDIO:
242 /* The SSP clock must be disabled when changing SSP clock mode
243 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
244 if (!cpu_is_pxa3xx())
245 clk_disable(priv->dev.ssp->clk);
246 val = ssp_read_reg(ssp, SSCR0) | sscr0;
247 ssp_write_reg(ssp, SSCR0, val);
248 if (!cpu_is_pxa3xx())
249 clk_enable(priv->dev.ssp->clk);
255 * Set the SSP clock dividers.
257 static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
260 struct ssp_priv *priv = cpu_dai->private_data;
261 struct ssp_device *ssp = priv->dev.ssp;
265 case PXA_SSP_AUDIO_DIV_ACDS:
266 val = (ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div);
267 ssp_write_reg(ssp, SSACD, val);
269 case PXA_SSP_AUDIO_DIV_SCDB:
270 val = ssp_read_reg(ssp, SSACD);
272 #if defined(CONFIG_PXA3xx)
277 case PXA_SSP_CLK_SCDB_1:
280 case PXA_SSP_CLK_SCDB_4:
282 #if defined(CONFIG_PXA3xx)
283 case PXA_SSP_CLK_SCDB_8:
293 ssp_write_reg(ssp, SSACD, val);
295 case PXA_SSP_DIV_SCR:
296 ssp_set_scr(ssp, div);
306 * Configure the PLL frequency pxa27x and (afaik - pxa320 only)
308 static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai,
309 int pll_id, unsigned int freq_in, unsigned int freq_out)
311 struct ssp_priv *priv = cpu_dai->private_data;
312 struct ssp_device *ssp = priv->dev.ssp;
313 u32 ssacd = ssp_read_reg(ssp, SSACD) & ~0x70;
315 #if defined(CONFIG_PXA3xx)
317 ssp_write_reg(ssp, SSACDD, 0);
344 /* PXA3xx has a clock ditherer which can be used to generate
345 * a wider range of frequencies - calculate a value for it.
347 if (cpu_is_pxa3xx()) {
351 do_div(tmp, freq_out);
354 val = (val << 16) | 64;;
355 ssp_write_reg(ssp, SSACDD, val);
359 dev_dbg(&ssp->pdev->dev,
360 "Using SSACDD %x to supply %uHz\n",
369 ssp_write_reg(ssp, SSACD, ssacd);
375 * Set the active slots in TDM/Network mode
377 static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
378 unsigned int mask, int slots)
380 struct ssp_priv *priv = cpu_dai->private_data;
381 struct ssp_device *ssp = priv->dev.ssp;
384 sscr0 = ssp_read_reg(ssp, SSCR0) & ~SSCR0_SlotsPerFrm(7);
386 /* set number of active slots */
387 sscr0 |= SSCR0_SlotsPerFrm(slots);
388 ssp_write_reg(ssp, SSCR0, sscr0);
390 /* set active slot mask */
391 ssp_write_reg(ssp, SSTSA, mask);
392 ssp_write_reg(ssp, SSRSA, mask);
397 * Tristate the SSP DAI lines
399 static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
402 struct ssp_priv *priv = cpu_dai->private_data;
403 struct ssp_device *ssp = priv->dev.ssp;
406 sscr1 = ssp_read_reg(ssp, SSCR1);
411 ssp_write_reg(ssp, SSCR1, sscr1);
417 * Set up the SSP DAI format.
418 * The SSP Port must be inactive before calling this function as the
419 * physical interface format is changed.
421 static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
424 struct ssp_priv *priv = cpu_dai->private_data;
425 struct ssp_device *ssp = priv->dev.ssp;
430 /* check if we need to change anything at all */
431 if (priv->dai_fmt == fmt)
434 /* we can only change the settings if the port is not in use */
435 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) {
436 dev_err(&ssp->pdev->dev,
437 "can't change hardware dai format: stream is in use");
441 /* reset port settings */
442 sscr0 = ssp_read_reg(ssp, SSCR0) &
443 (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
444 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
447 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
448 case SND_SOC_DAIFMT_CBM_CFM:
449 sscr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR;
451 case SND_SOC_DAIFMT_CBM_CFS:
452 sscr1 |= SSCR1_SCLKDIR;
454 case SND_SOC_DAIFMT_CBS_CFS:
460 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
461 case SND_SOC_DAIFMT_NB_NF:
462 sspsp |= SSPSP_SFRMP;
464 case SND_SOC_DAIFMT_NB_IF:
466 case SND_SOC_DAIFMT_IB_IF:
467 sspsp |= SSPSP_SCMODE(2);
469 case SND_SOC_DAIFMT_IB_NF:
470 sspsp |= SSPSP_SCMODE(2) | SSPSP_SFRMP;
476 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
477 case SND_SOC_DAIFMT_I2S:
479 sscr1 |= SSCR1_RWOT | SSCR1_TRAIL;
480 /* See hw_params() */
483 case SND_SOC_DAIFMT_DSP_A:
485 case SND_SOC_DAIFMT_DSP_B:
486 sscr0 |= SSCR0_MOD | SSCR0_PSP;
487 sscr1 |= SSCR1_TRAIL | SSCR1_RWOT;
494 ssp_write_reg(ssp, SSCR0, sscr0);
495 ssp_write_reg(ssp, SSCR1, sscr1);
496 ssp_write_reg(ssp, SSPSP, sspsp);
500 /* Since we are configuring the timings for the format by hand
501 * we have to defer some things until hw_params() where we
502 * know parameters like the sample size.
510 * Set the SSP audio DMA parameters and sample size.
511 * Can be called multiple times by oss emulation.
513 static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
514 struct snd_pcm_hw_params *params,
515 struct snd_soc_dai *dai)
517 struct snd_soc_pcm_runtime *rtd = substream->private_data;
518 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
519 struct ssp_priv *priv = cpu_dai->private_data;
520 struct ssp_device *ssp = priv->dev.ssp;
521 int chn = params_channels(params);
524 int width = snd_pcm_format_physical_width(params_format(params));
525 int ttsa = ssp_read_reg(ssp, SSTSA) & 0xf;
527 /* generate correct DMA params */
528 if (cpu_dai->dma_data)
529 kfree(cpu_dai->dma_data);
531 /* Network mode with one active slot (ttsa == 1) can be used
532 * to force 16-bit frame width on the wire (for S16_LE), even
533 * with two channels. Use 16-bit DMA transfers for this case.
535 cpu_dai->dma_data = ssp_get_dma_params(ssp,
536 ((chn == 2) && (ttsa != 1)) || (width == 32),
537 substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
539 /* we can only change the settings if the port is not in use */
540 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE)
543 /* clear selected SSP bits */
544 sscr0 = ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS);
545 ssp_write_reg(ssp, SSCR0, sscr0);
548 sscr0 = ssp_read_reg(ssp, SSCR0);
549 switch (params_format(params)) {
550 case SNDRV_PCM_FORMAT_S16_LE:
553 sscr0 |= SSCR0_FPCKE;
555 sscr0 |= SSCR0_DataSize(16);
557 case SNDRV_PCM_FORMAT_S24_LE:
558 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(8));
560 case SNDRV_PCM_FORMAT_S32_LE:
561 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16));
564 ssp_write_reg(ssp, SSCR0, sscr0);
566 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
567 case SND_SOC_DAIFMT_I2S:
568 sspsp = ssp_read_reg(ssp, SSPSP);
570 if ((ssp_get_scr(ssp) == 4) && (width == 16)) {
571 /* This is a special case where the bitclk is 64fs
572 * and we're not dealing with 2*32 bits of audio
575 * The SSP values used for that are all found out by
576 * trying and failing a lot; some of the registers
577 * needed for that mode are only available on PXA3xx.
581 if (!cpu_is_pxa3xx())
584 sspsp |= SSPSP_SFRMWDTH(width * 2);
585 sspsp |= SSPSP_SFRMDLY(width * 4);
586 sspsp |= SSPSP_EDMYSTOP(3);
587 sspsp |= SSPSP_DMYSTOP(3);
588 sspsp |= SSPSP_DMYSTRT(1);
593 /* The frame width is the width the LRCLK is
594 * asserted for; the delay is expressed in
595 * half cycle units. We need the extra cycle
596 * because the data starts clocking out one BCLK
597 * after LRCLK changes polarity.
599 sspsp |= SSPSP_SFRMWDTH(width + 1);
600 sspsp |= SSPSP_SFRMDLY((width + 1) * 2);
601 sspsp |= SSPSP_DMYSTRT(1);
604 ssp_write_reg(ssp, SSPSP, sspsp);
610 /* When we use a network mode, we always require TDM slots
611 * - complain loudly and fail if they've not been set up yet.
613 if ((sscr0 & SSCR0_MOD) && !ttsa) {
614 dev_err(&ssp->pdev->dev, "No TDM timeslot configured\n");
623 static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
624 struct snd_soc_dai *dai)
626 struct snd_soc_pcm_runtime *rtd = substream->private_data;
627 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
629 struct ssp_priv *priv = cpu_dai->private_data;
630 struct ssp_device *ssp = priv->dev.ssp;
634 case SNDRV_PCM_TRIGGER_RESUME:
635 ssp_enable(&priv->dev);
637 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
638 val = ssp_read_reg(ssp, SSCR1);
639 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
643 ssp_write_reg(ssp, SSCR1, val);
644 val = ssp_read_reg(ssp, SSSR);
645 ssp_write_reg(ssp, SSSR, val);
647 case SNDRV_PCM_TRIGGER_START:
648 val = ssp_read_reg(ssp, SSCR1);
649 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
653 ssp_write_reg(ssp, SSCR1, val);
654 ssp_enable(&priv->dev);
656 case SNDRV_PCM_TRIGGER_STOP:
657 val = ssp_read_reg(ssp, SSCR1);
658 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
662 ssp_write_reg(ssp, SSCR1, val);
664 case SNDRV_PCM_TRIGGER_SUSPEND:
665 ssp_disable(&priv->dev);
667 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
668 val = ssp_read_reg(ssp, SSCR1);
669 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
673 ssp_write_reg(ssp, SSCR1, val);
685 static int pxa_ssp_probe(struct platform_device *pdev,
686 struct snd_soc_dai *dai)
688 struct ssp_priv *priv;
691 priv = kzalloc(sizeof(struct ssp_priv), GFP_KERNEL);
695 priv->dev.ssp = ssp_request(dai->id + 1, "SoC audio");
696 if (priv->dev.ssp == NULL) {
701 priv->dai_fmt = (unsigned int) -1;
702 dai->private_data = priv;
711 static void pxa_ssp_remove(struct platform_device *pdev,
712 struct snd_soc_dai *dai)
714 struct ssp_priv *priv = dai->private_data;
715 ssp_free(priv->dev.ssp);
718 #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
719 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
720 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
721 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
723 #define PXA_SSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
724 SNDRV_PCM_FMTBIT_S24_LE | \
725 SNDRV_PCM_FMTBIT_S32_LE)
727 static struct snd_soc_dai_ops pxa_ssp_dai_ops = {
728 .startup = pxa_ssp_startup,
729 .shutdown = pxa_ssp_shutdown,
730 .trigger = pxa_ssp_trigger,
731 .hw_params = pxa_ssp_hw_params,
732 .set_sysclk = pxa_ssp_set_dai_sysclk,
733 .set_clkdiv = pxa_ssp_set_dai_clkdiv,
734 .set_pll = pxa_ssp_set_dai_pll,
735 .set_fmt = pxa_ssp_set_dai_fmt,
736 .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
737 .set_tristate = pxa_ssp_set_dai_tristate,
740 struct snd_soc_dai pxa_ssp_dai[] = {
742 .name = "pxa2xx-ssp1",
744 .probe = pxa_ssp_probe,
745 .remove = pxa_ssp_remove,
746 .suspend = pxa_ssp_suspend,
747 .resume = pxa_ssp_resume,
751 .rates = PXA_SSP_RATES,
752 .formats = PXA_SSP_FORMATS,
757 .rates = PXA_SSP_RATES,
758 .formats = PXA_SSP_FORMATS,
760 .ops = &pxa_ssp_dai_ops,
762 { .name = "pxa2xx-ssp2",
764 .probe = pxa_ssp_probe,
765 .remove = pxa_ssp_remove,
766 .suspend = pxa_ssp_suspend,
767 .resume = pxa_ssp_resume,
771 .rates = PXA_SSP_RATES,
772 .formats = PXA_SSP_FORMATS,
777 .rates = PXA_SSP_RATES,
778 .formats = PXA_SSP_FORMATS,
780 .ops = &pxa_ssp_dai_ops,
783 .name = "pxa2xx-ssp3",
785 .probe = pxa_ssp_probe,
786 .remove = pxa_ssp_remove,
787 .suspend = pxa_ssp_suspend,
788 .resume = pxa_ssp_resume,
792 .rates = PXA_SSP_RATES,
793 .formats = PXA_SSP_FORMATS,
798 .rates = PXA_SSP_RATES,
799 .formats = PXA_SSP_FORMATS,
801 .ops = &pxa_ssp_dai_ops,
804 .name = "pxa2xx-ssp4",
806 .probe = pxa_ssp_probe,
807 .remove = pxa_ssp_remove,
808 .suspend = pxa_ssp_suspend,
809 .resume = pxa_ssp_resume,
813 .rates = PXA_SSP_RATES,
814 .formats = PXA_SSP_FORMATS,
819 .rates = PXA_SSP_RATES,
820 .formats = PXA_SSP_FORMATS,
822 .ops = &pxa_ssp_dai_ops,
825 EXPORT_SYMBOL_GPL(pxa_ssp_dai);
827 static int __init pxa_ssp_init(void)
829 return snd_soc_register_dais(pxa_ssp_dai, ARRAY_SIZE(pxa_ssp_dai));
831 module_init(pxa_ssp_init);
833 static void __exit pxa_ssp_exit(void)
835 snd_soc_unregister_dais(pxa_ssp_dai, ARRAY_SIZE(pxa_ssp_dai));
837 module_exit(pxa_ssp_exit);
839 /* Module information */
840 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
841 MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
842 MODULE_LICENSE("GPL");