sound/pci/emu10k1/emu10k1_main.c

   1 /*
   2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
   3  *                   Creative Labs, Inc.
   4  *  Routines for control of EMU10K1 chips
   5  *
   6  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
   7  *      Added support for Audigy 2 Value.
   8  *      Added EMU 1010 support.
   9  *      General bug fixes and enhancements.
  10  *
  11  *
  12  *  BUGS:
  13  *    --
  14  *
  15  *  TODO:
  16  *    --
  17  *
  18  *   This program is free software; you can redistribute it and/or modify
  19  *   it under the terms of the GNU General Public License as published by
  20  *   the Free Software Foundation; either version 2 of the License, or
  21  *   (at your option) any later version.
  22  *
  23  *   This program is distributed in the hope that it will be useful,
  24  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  *   GNU General Public License for more details.
  27  *
  28  *   You should have received a copy of the GNU General Public License
  29  *   along with this program; if not, write to the Free Software
  30  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  31  *
  32  */
  33
  34 #include <linux/sched.h>
  35 #include <linux/kthread.h>
  36 #include <linux/delay.h>
  37 #include <linux/init.h>
  38 #include <linux/module.h>
  39 #include <linux/interrupt.h>
  40 #include <linux/pci.h>
  41 #include <linux/slab.h>
  42 #include <linux/vmalloc.h>
  43 #include <linux/mutex.h>
  44
  45
  46 #include <sound/core.h>
  47 #include <sound/emu10k1.h>
  48 #include <linux/firmware.h>
  49 #include "p16v.h"
  50 #include "tina2.h"
  51 #include "p17v.h"
  52
  53
  54 #define HANA_FILENAME "emu/hana.fw"
  55 #define DOCK_FILENAME "emu/audio_dock.fw"
  56 #define EMU1010B_FILENAME "emu/emu1010b.fw"
  57 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
  58 #define EMU0404_FILENAME "emu/emu0404.fw"
  59 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
  60
  61 MODULE_FIRMWARE(HANA_FILENAME);
  62 MODULE_FIRMWARE(DOCK_FILENAME);
  63 MODULE_FIRMWARE(EMU1010B_FILENAME);
  64 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
  65 MODULE_FIRMWARE(EMU0404_FILENAME);
  66 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
  67
  68
  69 /*************************************************************************
  70  * EMU10K1 init / done
  71  *************************************************************************/
  72
  73 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
  74 {
  75         snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
  76         snd_emu10k1_ptr_write(emu, IP, ch, 0);
  77         snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
  78         snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
  79         snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
  80         snd_emu10k1_ptr_write(emu, CPF, ch, 0);
  81         snd_emu10k1_ptr_write(emu, CCR, ch, 0);
  82
  83         snd_emu10k1_ptr_write(emu, PSST, ch, 0);
  84         snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
  85         snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
  86         snd_emu10k1_ptr_write(emu, Z1, ch, 0);
  87         snd_emu10k1_ptr_write(emu, Z2, ch, 0);
  88         snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
  89
  90         snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
  91         snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
  92         snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
  93         snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
  94         snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
  95         snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);    /* 1 Hz */
  96         snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);    /* 1 Hz */
  97         snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
  98
  99         /*** these are last so OFF prevents writing ***/
 100         snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
 101         snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
 102         snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
 103         snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
 104         snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
 105
 106         /* Audigy extra stuffs */
 107         if (emu->audigy) {
 108                 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
 109                 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
 110                 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
 111                 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
 112                 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
 113                 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
 114                 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
 115         }
 116 }
 117
 118 static unsigned int spi_dac_init[] = {
 119                 0x00ff,
 120                 0x02ff,
 121                 0x0400,
 122                 0x0520,
 123                 0x0600,
 124                 0x08ff,
 125                 0x0aff,
 126                 0x0cff,
 127                 0x0eff,
 128                 0x10ff,
 129                 0x1200,
 130                 0x1400,
 131                 0x1480,
 132                 0x1800,
 133                 0x1aff,
 134                 0x1cff,
 135                 0x1e00,
 136                 0x0530,
 137                 0x0602,
 138                 0x0622,
 139                 0x1400,
 140 };
 141
 142 static unsigned int i2c_adc_init[][2] = {
 143         { 0x17, 0x00 }, /* Reset */
 144         { 0x07, 0x00 }, /* Timeout */
 145         { 0x0b, 0x22 },  /* Interface control */
 146         { 0x0c, 0x22 },  /* Master mode control */
 147         { 0x0d, 0x08 },  /* Powerdown control */
 148         { 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
 149         { 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
 150         { 0x10, 0x7b },  /* ALC Control 1 */
 151         { 0x11, 0x00 },  /* ALC Control 2 */
 152         { 0x12, 0x32 },  /* ALC Control 3 */
 153         { 0x13, 0x00 },  /* Noise gate control */
 154         { 0x14, 0xa6 },  /* Limiter control */
 155         { 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for A2ZS Notebook */
 156 };
 157
 158 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
 159 {
 160         unsigned int silent_page;
 161         int ch;
 162         u32 tmp;
 163
 164         /* disable audio and lock cache */
 165         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
 166                 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 167
 168         /* reset recording buffers */
 169         snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
 170         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 171         snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
 172         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 173         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 174         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 175
 176         /* disable channel interrupt */
 177         outl(0, emu->port + INTE);
 178         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 179         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 180         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 181         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 182
 183         if (emu->audigy) {
 184                 /* set SPDIF bypass mode */
 185                 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
 186                 /* enable rear left + rear right AC97 slots */
 187                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
 188                                       AC97SLOT_REAR_LEFT);
 189         }
 190
 191         /* init envelope engine */
 192         for (ch = 0; ch < NUM_G; ch++)
 193                 snd_emu10k1_voice_init(emu, ch);
 194
 195         snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
 196         snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
 197         snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
 198
 199         if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 200                 /* Hacks for Alice3 to work independent of haP16V driver */
 201                 /* Setup SRCMulti_I2S SamplingRate */
 202                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 203                 tmp &= 0xfffff1ff;
 204                 tmp |= (0x2<<9);
 205                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 206
 207                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 208                 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
 209                 /* Setup SRCMulti Input Audio Enable */
 210                 /* Use 0xFFFFFFFF to enable P16V sounds. */
 211                 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
 212
 213                 /* Enabled Phased (8-channel) P16V playback */
 214                 outl(0x0201, emu->port + HCFG2);
 215                 /* Set playback routing. */
 216                 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
 217         }
 218         if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
 219                 /* Hacks for Alice3 to work independent of haP16V driver */
 220                 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
 221                 /* Setup SRCMulti_I2S SamplingRate */
 222                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 223                 tmp &= 0xfffff1ff;
 224                 tmp |= (0x2<<9);
 225                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 226
 227                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 228                 outl(0x600000, emu->port + 0x20);
 229                 outl(0x14, emu->port + 0x24);
 230
 231                 /* Setup SRCMulti Input Audio Enable */
 232                 outl(0x7b0000, emu->port + 0x20);
 233                 outl(0xFF000000, emu->port + 0x24);
 234
 235                 /* Setup SPDIF Out Audio Enable */
 236                 /* The Audigy 2 Value has a separate SPDIF out,
 237                  * so no need for a mixer switch
 238                  */
 239                 outl(0x7a0000, emu->port + 0x20);
 240                 outl(0xFF000000, emu->port + 0x24);
 241                 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
 242                 outl(tmp, emu->port + A_IOCFG);
 243         }
 244         if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
 245                 int size, n;
 246
 247                 size = ARRAY_SIZE(spi_dac_init);
 248                 for (n = 0; n < size; n++)
 249                         snd_emu10k1_spi_write(emu, spi_dac_init[n]);
 250
 251                 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
 252                 /* Enable GPIOs
 253                  * GPIO0: Unknown
 254                  * GPIO1: Speakers-enabled.
 255                  * GPIO2: Unknown
 256                  * GPIO3: Unknown
 257                  * GPIO4: IEC958 Output on.
 258                  * GPIO5: Unknown
 259                  * GPIO6: Unknown
 260                  * GPIO7: Unknown
 261                  */
 262                 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
 263         }
 264         if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
 265                 int size, n;
 266
 267                 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
 268                 tmp = inl(emu->port + A_IOCFG);
 269                 outl(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
 270                 tmp = inl(emu->port + A_IOCFG);
 271                 size = ARRAY_SIZE(i2c_adc_init);
 272                 for (n = 0; n < size; n++)
 273                         snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
 274                 for (n = 0; n < 4; n++) {
 275                         emu->i2c_capture_volume[n][0] = 0xcf;
 276                         emu->i2c_capture_volume[n][1] = 0xcf;
 277                 }
 278         }
 279
 280
 281         snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
 282         snd_emu10k1_ptr_write(emu, TCB, 0, 0);  /* taken from original driver */
 283         snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
 284
 285         silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
 286         for (ch = 0; ch < NUM_G; ch++) {
 287                 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
 288                 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
 289         }
 290
 291         if (emu->card_capabilities->emu_model) {
 292                 outl(HCFG_AUTOMUTE_ASYNC |
 293                         HCFG_EMU32_SLAVE |
 294                         HCFG_AUDIOENABLE, emu->port + HCFG);
 295         /*
 296          *  Hokay, setup HCFG
 297          *   Mute Disable Audio = 0
 298          *   Lock Tank Memory = 1
 299          *   Lock Sound Memory = 0
 300          *   Auto Mute = 1
 301          */
 302         } else if (emu->audigy) {
 303                 if (emu->revision == 4) /* audigy2 */
 304                         outl(HCFG_AUDIOENABLE |
 305                              HCFG_AC3ENABLE_CDSPDIF |
 306                              HCFG_AC3ENABLE_GPSPDIF |
 307                              HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 308                 else
 309                         outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 310         /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
 311          * e.g. card_capabilities->joystick */
 312         } else if (emu->model == 0x20 ||
 313             emu->model == 0xc400 ||
 314             (emu->model == 0x21 && emu->revision < 6))
 315                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
 316         else
 317                 /* With on-chip joystick */
 318                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 319
 320         if (enable_ir) {        /* enable IR for SB Live */
 321                 if (emu->card_capabilities->emu_model) {
 322                         ;  /* Disable all access to A_IOCFG for the emu1010 */
 323                 } else if (emu->card_capabilities->i2c_adc) {
 324                         ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 325                 } else if (emu->audigy) {
 326                         unsigned int reg = inl(emu->port + A_IOCFG);
 327                         outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 328                         udelay(500);
 329                         outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 330                         udelay(100);
 331                         outl(reg, emu->port + A_IOCFG);
 332                 } else {
 333                         unsigned int reg = inl(emu->port + HCFG);
 334                         outl(reg | HCFG_GPOUT2, emu->port + HCFG);
 335                         udelay(500);
 336                         outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
 337                         udelay(100);
 338                         outl(reg, emu->port + HCFG);
 339                 }
 340         }
 341
 342         if (emu->card_capabilities->emu_model) {
 343                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 344         } else if (emu->card_capabilities->i2c_adc) {
 345                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 346         } else if (emu->audigy) {       /* enable analog output */
 347                 unsigned int reg = inl(emu->port + A_IOCFG);
 348                 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
 349         }
 350
 351         if (emu->address_mode == 0) {
 352                 /* use 16M in 4G */
 353                 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
 354         }
 355
 356         return 0;
 357 }
 358
 359 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
 360 {
 361         /*
 362          *  Enable the audio bit
 363          */
 364         outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
 365
 366         /* Enable analog/digital outs on audigy */
 367         if (emu->card_capabilities->emu_model) {
 368                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 369         } else if (emu->card_capabilities->i2c_adc) {
 370                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 371         } else if (emu->audigy) {
 372                 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
 373
 374                 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 375                         /* Unmute Analog now.  Set GPO6 to 1 for Apollo.
 376                          * This has to be done after init ALice3 I2SOut beyond 48KHz.
 377                          * So, sequence is important. */
 378                         outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
 379                 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
 380                         /* Unmute Analog now. */
 381                         outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
 382                 } else {
 383                         /* Disable routing from AC97 line out to Front speakers */
 384                         outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
 385                 }
 386         }
 387
 388 #if 0
 389         {
 390         unsigned int tmp;
 391         /* FIXME: the following routine disables LiveDrive-II !! */
 392         /* TOSLink detection */
 393         emu->tos_link = 0;
 394         tmp = inl(emu->port + HCFG);
 395         if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 396                 outl(tmp|0x800, emu->port + HCFG);
 397                 udelay(50);
 398                 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
 399                         emu->tos_link = 1;
 400                         outl(tmp, emu->port + HCFG);
 401                 }
 402         }
 403         }
 404 #endif
 405
 406         snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
 407 }
 408
 409 int snd_emu10k1_done(struct snd_emu10k1 *emu)
 410 {
 411         int ch;
 412
 413         outl(0, emu->port + INTE);
 414
 415         /*
 416          *  Shutdown the chip
 417          */
 418         for (ch = 0; ch < NUM_G; ch++)
 419                 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
 420         for (ch = 0; ch < NUM_G; ch++) {
 421                 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
 422                 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
 423                 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
 424                 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
 425         }
 426
 427         /* reset recording buffers */
 428         snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
 429         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 430         snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
 431         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 432         snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
 433         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 434         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 435         snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
 436         snd_emu10k1_ptr_write(emu, TCB, 0, 0);
 437         if (emu->audigy)
 438                 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
 439         else
 440                 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
 441
 442         /* disable channel interrupt */
 443         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 444         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 445         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 446         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 447
 448         /* disable audio and lock cache */
 449         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 450         snd_emu10k1_ptr_write(emu, PTB, 0, 0);
 451
 452         return 0;
 453 }
 454
 455 /*************************************************************************
 456  * ECARD functional implementation
 457  *************************************************************************/
 458
 459 /* In A1 Silicon, these bits are in the HC register */
 460 #define HOOKN_BIT               (1L << 12)
 461 #define HANDN_BIT               (1L << 11)
 462 #define PULSEN_BIT              (1L << 10)
 463
 464 #define EC_GDI1                 (1 << 13)
 465 #define EC_GDI0                 (1 << 14)
 466
 467 #define EC_NUM_CONTROL_BITS     20
 468
 469 #define EC_AC3_DATA_SELN        0x0001L
 470 #define EC_EE_DATA_SEL          0x0002L
 471 #define EC_EE_CNTRL_SELN        0x0004L
 472 #define EC_EECLK                0x0008L
 473 #define EC_EECS                 0x0010L
 474 #define EC_EESDO                0x0020L
 475 #define EC_TRIM_CSN             0x0040L
 476 #define EC_TRIM_SCLK            0x0080L
 477 #define EC_TRIM_SDATA           0x0100L
 478 #define EC_TRIM_MUTEN           0x0200L
 479 #define EC_ADCCAL               0x0400L
 480 #define EC_ADCRSTN              0x0800L
 481 #define EC_DACCAL               0x1000L
 482 #define EC_DACMUTEN             0x2000L
 483 #define EC_LEDN                 0x4000L
 484
 485 #define EC_SPDIF0_SEL_SHIFT     15
 486 #define EC_SPDIF1_SEL_SHIFT     17
 487 #define EC_SPDIF0_SEL_MASK      (0x3L << EC_SPDIF0_SEL_SHIFT)
 488 #define EC_SPDIF1_SEL_MASK      (0x7L << EC_SPDIF1_SEL_SHIFT)
 489 #define EC_SPDIF0_SELECT(_x)    (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
 490 #define EC_SPDIF1_SELECT(_x)    (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
 491 #define EC_CURRENT_PROM_VERSION 0x01    /* Self-explanatory.  This should
 492                                          * be incremented any time the EEPROM's
 493                                          * format is changed.  */
 494
 495 #define EC_EEPROM_SIZE          0x40    /* ECARD EEPROM has 64 16-bit words */
 496
 497 /* Addresses for special values stored in to EEPROM */
 498 #define EC_PROM_VERSION_ADDR    0x20    /* Address of the current prom version */
 499 #define EC_BOARDREV0_ADDR       0x21    /* LSW of board rev */
 500 #define EC_BOARDREV1_ADDR       0x22    /* MSW of board rev */
 501
 502 #define EC_LAST_PROMFILE_ADDR   0x2f
 503
 504 #define EC_SERIALNUM_ADDR       0x30    /* First word of serial number.  The
 505                                          * can be up to 30 characters in length
 506                                          * and is stored as a NULL-terminated
 507                                          * ASCII string.  Any unused bytes must be
 508                                          * filled with zeros */
 509 #define EC_CHECKSUM_ADDR        0x3f    /* Location at which checksum is stored */
 510
 511
 512 /* Most of this stuff is pretty self-evident.  According to the hardware
 513  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
 514  * offset problem.  Weird.
 515  */
 516 #define EC_RAW_RUN_MODE         (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
 517                                  EC_TRIM_CSN)
 518
 519
 520 #define EC_DEFAULT_ADC_GAIN     0xC4C4
 521 #define EC_DEFAULT_SPDIF0_SEL   0x0
 522 #define EC_DEFAULT_SPDIF1_SEL   0x4
 523
 524 /**************************************************************************
 525  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
 526  *  control latch will is loaded bit-serially by toggling the Modem control
 527  *  lines from function 2 on the E8010.  This function hides these details
 528  *  and presents the illusion that we are actually writing to a distinct
 529  *  register.
 530  */
 531
 532 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
 533 {
 534         unsigned short count;
 535         unsigned int data;
 536         unsigned long hc_port;
 537         unsigned int hc_value;
 538
 539         hc_port = emu->port + HCFG;
 540         hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
 541         outl(hc_value, hc_port);
 542
 543         for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
 544
 545                 /* Set up the value */
 546                 data = ((value & 0x1) ? PULSEN_BIT : 0);
 547                 value >>= 1;
 548
 549                 outl(hc_value | data, hc_port);
 550
 551                 /* Clock the shift register */
 552                 outl(hc_value | data | HANDN_BIT, hc_port);
 553                 outl(hc_value | data, hc_port);
 554         }
 555
 556         /* Latch the bits */
 557         outl(hc_value | HOOKN_BIT, hc_port);
 558         outl(hc_value, hc_port);
 559 }
 560
 561 /**************************************************************************
 562  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
 563  * trim value consists of a 16bit value which is composed of two
 564  * 8 bit gain/trim values, one for the left channel and one for the
 565  * right channel.  The following table maps from the Gain/Attenuation
 566  * value in decibels into the corresponding bit pattern for a single
 567  * channel.
 568  */
 569
 570 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
 571                                          unsigned short gain)
 572 {
 573         unsigned int bit;
 574
 575         /* Enable writing to the TRIM registers */
 576         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 577
 578         /* Do it again to insure that we meet hold time requirements */
 579         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 580
 581         for (bit = (1 << 15); bit; bit >>= 1) {
 582                 unsigned int value;
 583
 584                 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
 585
 586                 if (gain & bit)
 587                         value |= EC_TRIM_SDATA;
 588
 589                 /* Clock the bit */
 590                 snd_emu10k1_ecard_write(emu, value);
 591                 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
 592                 snd_emu10k1_ecard_write(emu, value);
 593         }
 594
 595         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 596 }
 597
 598 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
 599 {
 600         unsigned int hc_value;
 601
 602         /* Set up the initial settings */
 603         emu->ecard_ctrl = EC_RAW_RUN_MODE |
 604                           EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
 605                           EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
 606
 607         /* Step 0: Set the codec type in the hardware control register
 608          * and enable audio output */
 609         hc_value = inl(emu->port + HCFG);
 610         outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
 611         inl(emu->port + HCFG);
 612
 613         /* Step 1: Turn off the led and deassert TRIM_CS */
 614         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 615
 616         /* Step 2: Calibrate the ADC and DAC */
 617         snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
 618
 619         /* Step 3: Wait for awhile;   XXX We can't get away with this
 620          * under a real operating system; we'll need to block and wait that
 621          * way. */
 622         snd_emu10k1_wait(emu, 48000);
 623
 624         /* Step 4: Switch off the DAC and ADC calibration.  Note
 625          * That ADC_CAL is actually an inverted signal, so we assert
 626          * it here to stop calibration.  */
 627         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 628
 629         /* Step 4: Switch into run mode */
 630         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 631
 632         /* Step 5: Set the analog input gain */
 633         snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
 634
 635         return 0;
 636 }
 637
 638 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
 639 {
 640         unsigned long special_port;
 641         unsigned int value;
 642
 643         /* Special initialisation routine
 644          * before the rest of the IO-Ports become active.
 645          */
 646         special_port = emu->port + 0x38;
 647         value = inl(special_port);
 648         outl(0x00d00000, special_port);
 649         value = inl(special_port);
 650         outl(0x00d00001, special_port);
 651         value = inl(special_port);
 652         outl(0x00d0005f, special_port);
 653         value = inl(special_port);
 654         outl(0x00d0007f, special_port);
 655         value = inl(special_port);
 656         outl(0x0090007f, special_port);
 657         value = inl(special_port);
 658
 659         snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
 660         /* Delay to give time for ADC chip to switch on. It needs 113ms */
 661         msleep(200);
 662         return 0;
 663 }
 664
 665 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, const char *filename)
 666 {
 667         int err;
 668         int n, i;
 669         int reg;
 670         int value;
 671         unsigned int write_post;
 672         unsigned long flags;
 673         const struct firmware *fw_entry;
 674
 675         err = request_firmware(&fw_entry, filename, &emu->pci->dev);
 676         if (err != 0) {
 677                 snd_printk(KERN_ERR "firmware: %s not found. Err = %d\n", filename, err);
 678                 return err;
 679         }
 680         snd_printk(KERN_INFO "firmware size = 0x%zx\n", fw_entry->size);
 681
 682         /* The FPGA is a Xilinx Spartan IIE XC2S50E */
 683         /* GPIO7 -> FPGA PGMN
 684          * GPIO6 -> FPGA CCLK
 685          * GPIO5 -> FPGA DIN
 686          * FPGA CONFIG OFF -> FPGA PGMN
 687          */
 688         spin_lock_irqsave(&emu->emu_lock, flags);
 689         outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
 690         write_post = inl(emu->port + A_IOCFG);
 691         udelay(100);
 692         outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
 693         write_post = inl(emu->port + A_IOCFG);
 694         udelay(100); /* Allow FPGA memory to clean */
 695         for (n = 0; n < fw_entry->size; n++) {
 696                 value = fw_entry->data[n];
 697                 for (i = 0; i < 8; i++) {
 698                         reg = 0x80;
 699                         if (value & 0x1)
 700                                 reg = reg | 0x20;
 701                         value = value >> 1;
 702                         outl(reg, emu->port + A_IOCFG);
 703                         write_post = inl(emu->port + A_IOCFG);
 704                         outl(reg | 0x40, emu->port + A_IOCFG);
 705                         write_post = inl(emu->port + A_IOCFG);
 706                 }
 707         }
 708         /* After programming, set GPIO bit 4 high again. */
 709         outl(0x10, emu->port + A_IOCFG);
 710         write_post = inl(emu->port + A_IOCFG);
 711         spin_unlock_irqrestore(&emu->emu_lock, flags);
 712
 713         release_firmware(fw_entry);
 714         return 0;
 715 }
 716
 717 static int emu1010_firmware_thread(void *data)
 718 {
 719         struct snd_emu10k1 *emu = data;
 720         u32 tmp, tmp2, reg;
 721         int err;
 722
 723         for (;;) {
 724                 /* Delay to allow Audio Dock to settle */
 725                 msleep_interruptible(1000);
 726                 if (kthread_should_stop())
 727                         break;
 728                 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
 729                 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
 730                 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
 731                         /* Audio Dock attached */
 732                         /* Return to Audio Dock programming mode */
 733                         snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
 734                         snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
 735                         if (emu->card_capabilities->emu_model ==
 736                             EMU_MODEL_EMU1010) {
 737                                 err = snd_emu1010_load_firmware(emu, DOCK_FILENAME);
 738                                 if (err != 0)
 739                                         continue;
 740                         } else if (emu->card_capabilities->emu_model ==
 741                                    EMU_MODEL_EMU1010B) {
 742                                 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
 743                                 if (err != 0)
 744                                         continue;
 745                         } else if (emu->card_capabilities->emu_model ==
 746                                    EMU_MODEL_EMU1616) {
 747                                 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
 748                                 if (err != 0)
 749                                         continue;
 750                         }
 751
 752                         snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
 753                         snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);
 754                         snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg);
 755                         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 756                         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 757                         snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
 758                         if ((reg & 0x1f) != 0x15) {
 759                                 /* FPGA failed to be programmed */
 760                                 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg);
 761                                 continue;
 762                         }
 763                         snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
 764                         snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
 765                         snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
 766                         snd_printk(KERN_INFO "Audio Dock ver: %u.%u\n",
 767                                    tmp, tmp2);
 768                         /* Sync clocking between 1010 and Dock */
 769                         /* Allow DLL to settle */
 770                         msleep(10);
 771                         /* Unmute all. Default is muted after a firmware load */
 772                         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
 773                 }
 774         }
 775         snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
 776         return 0;
 777 }
 778
 779 /*
 780  * EMU-1010 - details found out from this driver, official MS Win drivers,
 781  * testing the card:
 782  *
 783  * Audigy2 (aka Alice2):
 784  * ---------------------
 785  *      * communication over PCI
 786  *      * conversion of 32-bit data coming over EMU32 links from HANA FPGA
 787  *        to 2 x 16-bit, using internal DSP instructions
 788  *      * slave mode, clock supplied by HANA
 789  *      * linked to HANA using:
 790  *              32 x 32-bit serial EMU32 output channels
 791  *              16 x EMU32 input channels
 792  *              (?) x I2S I/O channels (?)
 793  *
 794  * FPGA (aka HANA):
 795  * ---------------
 796  *      * provides all (?) physical inputs and outputs of the card
 797  *              (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
 798  *      * provides clock signal for the card and Alice2
 799  *      * two crystals - for 44.1kHz and 48kHz multiples
 800  *      * provides internal routing of signal sources to signal destinations
 801  *      * inputs/outputs to Alice2 - see above
 802  *
 803  * Current status of the driver:
 804  * ----------------------------
 805  *      * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
 806  *      * PCM device nb. 2:
 807  *              16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
 808  *              16 x 32-bit capture - snd_emu10k1_capture_efx_ops
 809  */
 810 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
 811 {
 812         unsigned int i;
 813         u32 tmp, tmp2, reg;
 814         int err;
 815         const char *filename = NULL;
 816
 817         snd_printk(KERN_INFO "emu1010: Special config.\n");
 818         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 819          * Lock Sound Memory Cache, Lock Tank Memory Cache,
 820          * Mute all codecs.
 821          */
 822         outl(0x0005a00c, emu->port + HCFG);
 823         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 824          * Lock Tank Memory Cache,
 825          * Mute all codecs.
 826          */
 827         outl(0x0005a004, emu->port + HCFG);
 828         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 829          * Mute all codecs.
 830          */
 831         outl(0x0005a000, emu->port + HCFG);
 832         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 833          * Mute all codecs.
 834          */
 835         outl(0x0005a000, emu->port + HCFG);
 836
 837         /* Disable 48Volt power to Audio Dock */
 838         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
 839
 840         /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
 841         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 842         snd_printdd("reg1 = 0x%x\n", reg);
 843         if ((reg & 0x3f) == 0x15) {
 844                 /* FPGA netlist already present so clear it */
 845                 /* Return to programming mode */
 846
 847                 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
 848         }
 849         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 850         snd_printdd("reg2 = 0x%x\n", reg);
 851         if ((reg & 0x3f) == 0x15) {
 852                 /* FPGA failed to return to programming mode */
 853                 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
 854                 return -ENODEV;
 855         }
 856         snd_printk(KERN_INFO "emu1010: EMU_HANA_ID = 0x%x\n", reg);
 857         switch (emu->card_capabilities->emu_model) {
 858         case EMU_MODEL_EMU1010:
 859                 filename = HANA_FILENAME;
 860                 break;
 861         case EMU_MODEL_EMU1010B:
 862                 filename = EMU1010B_FILENAME;
 863                 break;
 864         case EMU_MODEL_EMU1616:
 865                 filename = EMU1010_NOTEBOOK_FILENAME;
 866                 break;
 867         case EMU_MODEL_EMU0404:
 868                 filename = EMU0404_FILENAME;
 869                 break;
 870         default:
 871                 filename = NULL;
 872                 return -ENODEV;
 873                 break;
 874         }
 875         snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
 876         err = snd_emu1010_load_firmware(emu, filename);
 877         if (err != 0) {
 878                 snd_printk(
 879                         KERN_INFO "emu1010: Loading Firmware file %s failed\n",
 880                         filename);
 881                 return err;
 882         }
 883
 884         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 885         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 886         if ((reg & 0x3f) != 0x15) {
 887                 /* FPGA failed to be programmed */
 888                 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg);
 889                 return -ENODEV;
 890         }
 891
 892         snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
 893         snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
 894         snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
 895         snd_printk(KERN_INFO "emu1010: Hana version: %u.%u\n", tmp, tmp2);
 896         /* Enable 48Volt power to Audio Dock */
 897         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
 898
 899         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 900         snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
 901         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 902         snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
 903         snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
 904         /* Optical -> ADAT I/O  */
 905         /* 0 : SPDIF
 906          * 1 : ADAT
 907          */
 908         emu->emu1010.optical_in = 1; /* IN_ADAT */
 909         emu->emu1010.optical_out = 1; /* IN_ADAT */
 910         tmp = 0;
 911         tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
 912                 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
 913         snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
 914         snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
 915         /* Set no attenuation on Audio Dock pads. */
 916         snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
 917         emu->emu1010.adc_pads = 0x00;
 918         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
 919         /* Unmute Audio dock DACs, Headphone source DAC-4. */
 920         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
 921         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
 922         snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
 923         /* DAC PADs. */
 924         snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
 925         emu->emu1010.dac_pads = 0x0f;
 926         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
 927         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
 928         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
 929         /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
 930         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
 931         /* MIDI routing */
 932         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
 933         /* Unknown. */
 934         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
 935         /* IRQ Enable: All on */
 936         /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
 937         /* IRQ Enable: All off */
 938         snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
 939
 940         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 941         snd_printk(KERN_INFO "emu1010: Card options3 = 0x%x\n", reg);
 942         /* Default WCLK set to 48kHz. */
 943         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
 944         /* Word Clock source, Internal 48kHz x1 */
 945         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
 946         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
 947         /* Audio Dock LEDs. */
 948         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
 949
 950 #if 0
 951         /* For 96kHz */
 952         snd_emu1010_fpga_link_dst_src_write(emu,
 953                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 954         snd_emu1010_fpga_link_dst_src_write(emu,
 955                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 956         snd_emu1010_fpga_link_dst_src_write(emu,
 957                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
 958         snd_emu1010_fpga_link_dst_src_write(emu,
 959                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
 960 #endif
 961 #if 0
 962         /* For 192kHz */
 963         snd_emu1010_fpga_link_dst_src_write(emu,
 964                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 965         snd_emu1010_fpga_link_dst_src_write(emu,
 966                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 967         snd_emu1010_fpga_link_dst_src_write(emu,
 968                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 969         snd_emu1010_fpga_link_dst_src_write(emu,
 970                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
 971         snd_emu1010_fpga_link_dst_src_write(emu,
 972                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
 973         snd_emu1010_fpga_link_dst_src_write(emu,
 974                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
 975         snd_emu1010_fpga_link_dst_src_write(emu,
 976                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
 977         snd_emu1010_fpga_link_dst_src_write(emu,
 978                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
 979 #endif
 980 #if 1
 981         /* For 48kHz */
 982         snd_emu1010_fpga_link_dst_src_write(emu,
 983                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
 984         snd_emu1010_fpga_link_dst_src_write(emu,
 985                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
 986         snd_emu1010_fpga_link_dst_src_write(emu,
 987                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 988         snd_emu1010_fpga_link_dst_src_write(emu,
 989                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
 990         snd_emu1010_fpga_link_dst_src_write(emu,
 991                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
 992         snd_emu1010_fpga_link_dst_src_write(emu,
 993                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
 994         snd_emu1010_fpga_link_dst_src_write(emu,
 995                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
 996         snd_emu1010_fpga_link_dst_src_write(emu,
 997                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
 998         /* Pavel Hofman - setting defaults for 8 more capture channels
 999          * Defaults only, users will set their own values anyways, let's
1000          * just copy/paste.
1001          */
1002
1003         snd_emu1010_fpga_link_dst_src_write(emu,
1004                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1005         snd_emu1010_fpga_link_dst_src_write(emu,
1006                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1007         snd_emu1010_fpga_link_dst_src_write(emu,
1008                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1009         snd_emu1010_fpga_link_dst_src_write(emu,
1010                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1011         snd_emu1010_fpga_link_dst_src_write(emu,
1012                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1013         snd_emu1010_fpga_link_dst_src_write(emu,
1014                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1015         snd_emu1010_fpga_link_dst_src_write(emu,
1016                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1017         snd_emu1010_fpga_link_dst_src_write(emu,
1018                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1019 #endif
1020 #if 0
1021         /* Original */
1022         snd_emu1010_fpga_link_dst_src_write(emu,
1023                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1024         snd_emu1010_fpga_link_dst_src_write(emu,
1025                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1026         snd_emu1010_fpga_link_dst_src_write(emu,
1027                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1028         snd_emu1010_fpga_link_dst_src_write(emu,
1029                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1030         snd_emu1010_fpga_link_dst_src_write(emu,
1031                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1032         snd_emu1010_fpga_link_dst_src_write(emu,
1033                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1034         snd_emu1010_fpga_link_dst_src_write(emu,
1035                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1036         snd_emu1010_fpga_link_dst_src_write(emu,
1037                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1038         snd_emu1010_fpga_link_dst_src_write(emu,
1039                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1040         snd_emu1010_fpga_link_dst_src_write(emu,
1041                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1042         snd_emu1010_fpga_link_dst_src_write(emu,
1043                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1044         snd_emu1010_fpga_link_dst_src_write(emu,
1045                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1046 #endif
1047         for (i = 0; i < 0x20; i++) {
1048                 /* AudioDock Elink <- Silence */
1049                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1050         }
1051         for (i = 0; i < 4; i++) {
1052                 /* Hana SPDIF Out <- Silence */
1053                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1054         }
1055         for (i = 0; i < 7; i++) {
1056                 /* Hamoa DAC <- Silence */
1057                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1058         }
1059         for (i = 0; i < 7; i++) {
1060                 /* Hana ADAT Out <- Silence */
1061                 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1062         }
1063         snd_emu1010_fpga_link_dst_src_write(emu,
1064                 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1065         snd_emu1010_fpga_link_dst_src_write(emu,
1066                 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1067         snd_emu1010_fpga_link_dst_src_write(emu,
1068                 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1069         snd_emu1010_fpga_link_dst_src_write(emu,
1070                 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1071         snd_emu1010_fpga_link_dst_src_write(emu,
1072                 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1073         snd_emu1010_fpga_link_dst_src_write(emu,
1074                 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1075         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1076
1077         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1078
1079         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1080          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1081          * Mute all codecs.
1082          */
1083         outl(0x0000a000, emu->port + HCFG);
1084         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1085          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1086          * Un-Mute all codecs.
1087          */
1088         outl(0x0000a001, emu->port + HCFG);
1089
1090         /* Initial boot complete. Now patches */
1091
1092         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1093         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1094         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1095         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1096         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1097         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1098         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif  (or 0x11 for aes/ebu) */
1099
1100         /* Start Micro/Audio Dock firmware loader thread */
1101         if (!emu->emu1010.firmware_thread) {
1102                 emu->emu1010.firmware_thread =
1103                         kthread_create(emu1010_firmware_thread, emu,
1104                                        "emu1010_firmware");
1105                 wake_up_process(emu->emu1010.firmware_thread);
1106         }
1107
1108 #if 0
1109         snd_emu1010_fpga_link_dst_src_write(emu,
1110                 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1111         snd_emu1010_fpga_link_dst_src_write(emu,
1112                 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1113         snd_emu1010_fpga_link_dst_src_write(emu,
1114                 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1115         snd_emu1010_fpga_link_dst_src_write(emu,
1116                 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1117 #endif
1118         /* Default outputs */
1119         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1120                 /* 1616(M) cardbus default outputs */
1121                 /* ALICE2 bus 0xa0 */
1122                 snd_emu1010_fpga_link_dst_src_write(emu,
1123                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1124                 emu->emu1010.output_source[0] = 17;
1125                 snd_emu1010_fpga_link_dst_src_write(emu,
1126                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1127                 emu->emu1010.output_source[1] = 18;
1128                 snd_emu1010_fpga_link_dst_src_write(emu,
1129                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1130                 emu->emu1010.output_source[2] = 19;
1131                 snd_emu1010_fpga_link_dst_src_write(emu,
1132                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1133                 emu->emu1010.output_source[3] = 20;
1134                 snd_emu1010_fpga_link_dst_src_write(emu,
1135                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1136                 emu->emu1010.output_source[4] = 21;
1137                 snd_emu1010_fpga_link_dst_src_write(emu,
1138                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1139                 emu->emu1010.output_source[5] = 22;
1140                 /* ALICE2 bus 0xa0 */
1141                 snd_emu1010_fpga_link_dst_src_write(emu,
1142                         EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1143                 emu->emu1010.output_source[16] = 17;
1144                 snd_emu1010_fpga_link_dst_src_write(emu,
1145                         EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1146                 emu->emu1010.output_source[17] = 18;
1147         } else {
1148                 /* ALICE2 bus 0xa0 */
1149                 snd_emu1010_fpga_link_dst_src_write(emu,
1150                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1151                 emu->emu1010.output_source[0] = 21;
1152                 snd_emu1010_fpga_link_dst_src_write(emu,
1153                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1154                 emu->emu1010.output_source[1] = 22;
1155                 snd_emu1010_fpga_link_dst_src_write(emu,
1156                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1157                 emu->emu1010.output_source[2] = 23;
1158                 snd_emu1010_fpga_link_dst_src_write(emu,
1159                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1160                 emu->emu1010.output_source[3] = 24;
1161                 snd_emu1010_fpga_link_dst_src_write(emu,
1162                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1163                 emu->emu1010.output_source[4] = 25;
1164                 snd_emu1010_fpga_link_dst_src_write(emu,
1165                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1166                 emu->emu1010.output_source[5] = 26;
1167                 snd_emu1010_fpga_link_dst_src_write(emu,
1168                         EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1169                 emu->emu1010.output_source[6] = 27;
1170                 snd_emu1010_fpga_link_dst_src_write(emu,
1171                         EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1172                 emu->emu1010.output_source[7] = 28;
1173                 /* ALICE2 bus 0xa0 */
1174                 snd_emu1010_fpga_link_dst_src_write(emu,
1175                         EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1176                 emu->emu1010.output_source[8] = 21;
1177                 snd_emu1010_fpga_link_dst_src_write(emu,
1178                         EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1179                 emu->emu1010.output_source[9] = 22;
1180                 /* ALICE2 bus 0xa0 */
1181                 snd_emu1010_fpga_link_dst_src_write(emu,
1182                         EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1183                 emu->emu1010.output_source[10] = 21;
1184                 snd_emu1010_fpga_link_dst_src_write(emu,
1185                         EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1186                 emu->emu1010.output_source[11] = 22;
1187                 /* ALICE2 bus 0xa0 */
1188                 snd_emu1010_fpga_link_dst_src_write(emu,
1189                         EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1190                 emu->emu1010.output_source[12] = 21;
1191                 snd_emu1010_fpga_link_dst_src_write(emu,
1192                         EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1193                 emu->emu1010.output_source[13] = 22;
1194                 /* ALICE2 bus 0xa0 */
1195                 snd_emu1010_fpga_link_dst_src_write(emu,
1196                         EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1197                 emu->emu1010.output_source[14] = 21;
1198                 snd_emu1010_fpga_link_dst_src_write(emu,
1199                         EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1200                 emu->emu1010.output_source[15] = 22;
1201                 /* ALICE2 bus 0xa0 */
1202                 snd_emu1010_fpga_link_dst_src_write(emu,
1203                         EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1204                 emu->emu1010.output_source[16] = 21;
1205                 snd_emu1010_fpga_link_dst_src_write(emu,
1206                         EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1207                 emu->emu1010.output_source[17] = 22;
1208                 snd_emu1010_fpga_link_dst_src_write(emu,
1209                         EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1210                 emu->emu1010.output_source[18] = 23;
1211                 snd_emu1010_fpga_link_dst_src_write(emu,
1212                         EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1213                 emu->emu1010.output_source[19] = 24;
1214                 snd_emu1010_fpga_link_dst_src_write(emu,
1215                         EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1216                 emu->emu1010.output_source[20] = 25;
1217                 snd_emu1010_fpga_link_dst_src_write(emu,
1218                         EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1219                 emu->emu1010.output_source[21] = 26;
1220                 snd_emu1010_fpga_link_dst_src_write(emu,
1221                         EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1222                 emu->emu1010.output_source[22] = 27;
1223                 snd_emu1010_fpga_link_dst_src_write(emu,
1224                         EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1225                 emu->emu1010.output_source[23] = 28;
1226         }
1227         /* TEMP: Select SPDIF in/out */
1228         /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1229
1230         /* TEMP: Select 48kHz SPDIF out */
1231         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1232         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1233         /* Word Clock source, Internal 48kHz x1 */
1234         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1235         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1236         emu->emu1010.internal_clock = 1; /* 48000 */
1237         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1238         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1239         /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1240         /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1241         /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1242
1243         return 0;
1244 }
1245 /*
1246  *  Create the EMU10K1 instance
1247  */
1248
1249 #ifdef CONFIG_PM
1250 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1251 static void free_pm_buffer(struct snd_emu10k1 *emu);
1252 #endif
1253
1254 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1255 {
1256         if (emu->port) {        /* avoid access to already used hardware */
1257                 snd_emu10k1_fx8010_tram_setup(emu, 0);
1258                 snd_emu10k1_done(emu);
1259                 snd_emu10k1_free_efx(emu);
1260         }
1261         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1262                 /* Disable 48Volt power to Audio Dock */
1263                 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1264         }
1265         if (emu->emu1010.firmware_thread)
1266                 kthread_stop(emu->emu1010.firmware_thread);
1267         if (emu->irq >= 0)
1268                 free_irq(emu->irq, emu);
1269         /* remove reserved page */
1270         if (emu->reserved_page) {
1271                 snd_emu10k1_synth_free(emu,
1272                         (struct snd_util_memblk *)emu->reserved_page);
1273                 emu->reserved_page = NULL;
1274         }
1275         if (emu->memhdr)
1276                 snd_util_memhdr_free(emu->memhdr);
1277         if (emu->silent_page.area)
1278                 snd_dma_free_pages(&emu->silent_page);
1279         if (emu->ptb_pages.area)
1280                 snd_dma_free_pages(&emu->ptb_pages);
1281         vfree(emu->page_ptr_table);
1282         vfree(emu->page_addr_table);
1283 #ifdef CONFIG_PM
1284         free_pm_buffer(emu);
1285 #endif
1286         if (emu->port)
1287                 pci_release_regions(emu->pci);
1288         if (emu->card_capabilities->ca0151_chip) /* P16V */
1289                 snd_p16v_free(emu);
1290         pci_disable_device(emu->pci);
1291         kfree(emu);
1292         return 0;
1293 }
1294
1295 static int snd_emu10k1_dev_free(struct snd_device *device)
1296 {
1297         struct snd_emu10k1 *emu = device->device_data;
1298         return snd_emu10k1_free(emu);
1299 }
1300
1301 static struct snd_emu_chip_details emu_chip_details[] = {
1302         /* Audigy4 (Not PRO) SB0610 */
1303         /* Tested by James@superbug.co.uk 4th April 2006 */
1304         /* A_IOCFG bits
1305          * Output
1306          * 0: ?
1307          * 1: ?
1308          * 2: ?
1309          * 3: 0 - Digital Out, 1 - Line in
1310          * 4: ?
1311          * 5: ?
1312          * 6: ?
1313          * 7: ?
1314          * Input
1315          * 8: ?
1316          * 9: ?
1317          * A: Green jack sense (Front)
1318          * B: ?
1319          * C: Black jack sense (Rear/Side Right)
1320          * D: Yellow jack sense (Center/LFE/Side Left)
1321          * E: ?
1322          * F: ?
1323          *
1324          * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1325          * 0 - Digital Out
1326          * 1 - Line in
1327          */
1328         /* Mic input not tested.
1329          * Analog CD input not tested
1330          * Digital Out not tested.
1331          * Line in working.
1332          * Audio output 5.1 working. Side outputs not working.
1333          */
1334         /* DSP: CA10300-IAT LF
1335          * DAC: Cirrus Logic CS4382-KQZ
1336          * ADC: Philips 1361T
1337          * AC97: Sigmatel STAC9750
1338          * CA0151: None
1339          */
1340         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1341          .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1342          .id = "Audigy2",
1343          .emu10k2_chip = 1,
1344          .ca0108_chip = 1,
1345          .spk71 = 1,
1346          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1347          .ac97_chip = 1} ,
1348         /* Audigy 2 Value AC3 out does not work yet.
1349          * Need to find out how to turn off interpolators.
1350          */
1351         /* Tested by James@superbug.co.uk 3rd July 2005 */
1352         /* DSP: CA0108-IAT
1353          * DAC: CS4382-KQ
1354          * ADC: Philips 1361T
1355          * AC97: STAC9750
1356          * CA0151: None
1357          */
1358         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1359          .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1360          .id = "Audigy2",
1361          .emu10k2_chip = 1,
1362          .ca0108_chip = 1,
1363          .spk71 = 1,
1364          .ac97_chip = 1} ,
1365         /* Audigy 2 ZS Notebook Cardbus card.*/
1366         /* Tested by James@superbug.co.uk 6th November 2006 */
1367         /* Audio output 7.1/Headphones working.
1368          * Digital output working. (AC3 not checked, only PCM)
1369          * Audio Mic/Line inputs working.
1370          * Digital input not tested.
1371          */
1372         /* DSP: Tina2
1373          * DAC: Wolfson WM8768/WM8568
1374          * ADC: Wolfson WM8775
1375          * AC97: None
1376          * CA0151: None
1377          */
1378         /* Tested by James@superbug.co.uk 4th April 2006 */
1379         /* A_IOCFG bits
1380          * Output
1381          * 0: Not Used
1382          * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1383          * 2: Analog input 0 = line in, 1 = mic in
1384          * 3: Not Used
1385          * 4: Digital output 0 = off, 1 = on.
1386          * 5: Not Used
1387          * 6: Not Used
1388          * 7: Not Used
1389          * Input
1390          *      All bits 1 (0x3fxx) means nothing plugged in.
1391          * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1392          * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1393          * C-D: 2 = Front/Rear/etc, 3 = nothing.
1394          * E-F: Always 0
1395          *
1396          */
1397         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1398          .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1399          .id = "Audigy2",
1400          .emu10k2_chip = 1,
1401          .ca0108_chip = 1,
1402          .ca_cardbus_chip = 1,
1403          .spi_dac = 1,
1404          .i2c_adc = 1,
1405          .spk71 = 1} ,
1406         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1407         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1408          .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1409          .id = "EMU1010",
1410          .emu10k2_chip = 1,
1411          .ca0108_chip = 1,
1412          .ca_cardbus_chip = 1,
1413          .spk71 = 1 ,
1414          .emu_model = EMU_MODEL_EMU1616},
1415         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1416         /* This is MAEM8960, 0202 is MAEM 8980 */
1417         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1418          .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1419          .id = "EMU1010",
1420          .emu10k2_chip = 1,
1421          .ca0108_chip = 1,
1422          .spk71 = 1,
1423          .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1424         /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1425         /* This is MAEM8986, 0202 is MAEM8980 */
1426         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1427          .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1428          .id = "EMU1010",
1429          .emu10k2_chip = 1,
1430          .ca0108_chip = 1,
1431          .spk71 = 1,
1432          .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1433         /* Tested by James@superbug.co.uk 8th July 2005. */
1434         /* This is MAEM8810, 0202 is MAEM8820 */
1435         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1436          .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1437          .id = "EMU1010",
1438          .emu10k2_chip = 1,
1439          .ca0102_chip = 1,
1440          .spk71 = 1,
1441          .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1442         /* EMU0404b */
1443         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1444          .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1445          .id = "EMU0404",
1446          .emu10k2_chip = 1,
1447          .ca0108_chip = 1,
1448          .spk71 = 1,
1449          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1450         /* Tested by James@superbug.co.uk 20-3-2007. */
1451         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1452          .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1453          .id = "EMU0404",
1454          .emu10k2_chip = 1,
1455          .ca0102_chip = 1,
1456          .spk71 = 1,
1457          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1458         /* EMU0404 PCIe */
1459         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1460          .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1461          .id = "EMU0404",
1462          .emu10k2_chip = 1,
1463          .ca0108_chip = 1,
1464          .spk71 = 1,
1465          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1466         /* Note that all E-mu cards require kernel 2.6 or newer. */
1467         {.vendor = 0x1102, .device = 0x0008,
1468          .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1469          .id = "Audigy2",
1470          .emu10k2_chip = 1,
1471          .ca0108_chip = 1,
1472          .ac97_chip = 1} ,
1473         /* Tested by James@superbug.co.uk 3rd July 2005 */
1474         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1475          .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1476          .id = "Audigy2",
1477          .emu10k2_chip = 1,
1478          .ca0102_chip = 1,
1479          .ca0151_chip = 1,
1480          .spk71 = 1,
1481          .spdif_bug = 1,
1482          .ac97_chip = 1} ,
1483         /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1484         /* The 0x20061102 does have SB0350 written on it
1485          * Just like 0x20021102
1486          */
1487         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1488          .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1489          .id = "Audigy2",
1490          .emu10k2_chip = 1,
1491          .ca0102_chip = 1,
1492          .ca0151_chip = 1,
1493          .spk71 = 1,
1494          .spdif_bug = 1,
1495          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1496          .ac97_chip = 1} ,
1497         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1498          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1499          .id = "Audigy2",
1500          .emu10k2_chip = 1,
1501          .ca0102_chip = 1,
1502          .ca0151_chip = 1,
1503          .spk71 = 1,
1504          .spdif_bug = 1,
1505          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1506          .ac97_chip = 1} ,
1507         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1508          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1509          .id = "Audigy2",
1510          .emu10k2_chip = 1,
1511          .ca0102_chip = 1,
1512          .ca0151_chip = 1,
1513          .spk71 = 1,
1514          .spdif_bug = 1,
1515          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1516          .ac97_chip = 1} ,
1517         /* Audigy 2 */
1518         /* Tested by James@superbug.co.uk 3rd July 2005 */
1519         /* DSP: CA0102-IAT
1520          * DAC: CS4382-KQ
1521          * ADC: Philips 1361T
1522          * AC97: STAC9721
1523          * CA0151: Yes
1524          */
1525         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1526          .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1527          .id = "Audigy2",
1528          .emu10k2_chip = 1,
1529          .ca0102_chip = 1,
1530          .ca0151_chip = 1,
1531          .spk71 = 1,
1532          .spdif_bug = 1,
1533          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1534          .ac97_chip = 1} ,
1535         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1536          .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1537          .id = "Audigy2",
1538          .emu10k2_chip = 1,
1539          .ca0102_chip = 1,
1540          .ca0151_chip = 1,
1541          .spk71 = 1,
1542          .spdif_bug = 1} ,
1543         /* Dell OEM/Creative Labs Audigy 2 ZS */
1544         /* See ALSA bug#1365 */
1545         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1546          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1547          .id = "Audigy2",
1548          .emu10k2_chip = 1,
1549          .ca0102_chip = 1,
1550          .ca0151_chip = 1,
1551          .spk71 = 1,
1552          .spdif_bug = 1,
1553          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1554          .ac97_chip = 1} ,
1555         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1556          .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1557          .id = "Audigy2",
1558          .emu10k2_chip = 1,
1559          .ca0102_chip = 1,
1560          .ca0151_chip = 1,
1561          .spk71 = 1,
1562          .spdif_bug = 1,
1563          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1564          .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1565          .ac97_chip = 1} ,
1566         {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1567          .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1568          .id = "Audigy2",
1569          .emu10k2_chip = 1,
1570          .ca0102_chip = 1,
1571          .ca0151_chip = 1,
1572          .spdif_bug = 1,
1573          .ac97_chip = 1} ,
1574         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1575          .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1576          .id = "Audigy",
1577          .emu10k2_chip = 1,
1578          .ca0102_chip = 1,
1579          .ac97_chip = 1} ,
1580         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1581          .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1582          .id = "Audigy",
1583          .emu10k2_chip = 1,
1584          .ca0102_chip = 1,
1585          .spdif_bug = 1,
1586          .ac97_chip = 1} ,
1587         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1588          .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1589          .id = "Audigy",
1590          .emu10k2_chip = 1,
1591          .ca0102_chip = 1,
1592          .ac97_chip = 1} ,
1593         {.vendor = 0x1102, .device = 0x0004,
1594          .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1595          .id = "Audigy",
1596          .emu10k2_chip = 1,
1597          .ca0102_chip = 1,
1598          .ac97_chip = 1} ,
1599         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1600          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1601          .id = "Live",
1602          .emu10k1_chip = 1,
1603          .ac97_chip = 1,
1604          .sblive51 = 1} ,
1605         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1606          .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1607          .id = "Live",
1608          .emu10k1_chip = 1,
1609          .ac97_chip = 1,
1610          .sblive51 = 1} ,
1611         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1612          .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1613          .id = "Live",
1614          .emu10k1_chip = 1,
1615          .ac97_chip = 1,
1616          .sblive51 = 1} ,
1617         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1618          .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1619          .id = "Live",
1620          .emu10k1_chip = 1,
1621          .ac97_chip = 1,
1622          .sblive51 = 1} ,
1623         /* Tested by ALSA bug#1680 26th December 2005 */
1624         /* note: It really has SB0220 written on the card, */
1625         /* but it's SB0228 according to kx.inf */
1626         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1627          .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1628          .id = "Live",
1629          .emu10k1_chip = 1,
1630          .ac97_chip = 1,
1631          .sblive51 = 1} ,
1632         /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1633         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1634          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1635          .id = "Live",
1636          .emu10k1_chip = 1,
1637          .ac97_chip = 1,
1638          .sblive51 = 1} ,
1639         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1640          .driver = "EMU10K1", .name = "SB Live! 5.1",
1641          .id = "Live",
1642          .emu10k1_chip = 1,
1643          .ac97_chip = 1,
1644          .sblive51 = 1} ,
1645         /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1646         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1647          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1648          .id = "Live",
1649          .emu10k1_chip = 1,
1650          .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1651                           * share the same IDs!
1652                           */
1653          .sblive51 = 1} ,
1654         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1655          .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1656          .id = "Live",
1657          .emu10k1_chip = 1,
1658          .ac97_chip = 1,
1659          .sblive51 = 1} ,
1660         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1661          .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1662          .id = "Live",
1663          .emu10k1_chip = 1,
1664          .ac97_chip = 1} ,
1665         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1666          .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1667          .id = "Live",
1668          .emu10k1_chip = 1,
1669          .ac97_chip = 1,
1670          .sblive51 = 1} ,
1671         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1672          .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1673          .id = "Live",
1674          .emu10k1_chip = 1,
1675          .ac97_chip = 1,
1676          .sblive51 = 1} ,
1677         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1678          .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1679          .id = "Live",
1680          .emu10k1_chip = 1,
1681          .ac97_chip = 1,
1682          .sblive51 = 1} ,
1683         /* Tested by James@superbug.co.uk 3rd July 2005 */
1684         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1685          .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1686          .id = "Live",
1687          .emu10k1_chip = 1,
1688          .ac97_chip = 1,
1689          .sblive51 = 1} ,
1690         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1691          .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1692          .id = "Live",
1693          .emu10k1_chip = 1,
1694          .ac97_chip = 1,
1695          .sblive51 = 1} ,
1696         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1697          .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1698          .id = "Live",
1699          .emu10k1_chip = 1,
1700          .ac97_chip = 1,
1701          .sblive51 = 1} ,
1702         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1703          .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1704          .id = "Live",
1705          .emu10k1_chip = 1,
1706          .ac97_chip = 1,
1707          .sblive51 = 1} ,
1708         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1709          .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1710          .id = "APS",
1711          .emu10k1_chip = 1,
1712          .ecard = 1} ,
1713         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1714          .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1715          .id = "Live",
1716          .emu10k1_chip = 1,
1717          .ac97_chip = 1,
1718          .sblive51 = 1} ,
1719         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1720          .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1721          .id = "Live",
1722          .emu10k1_chip = 1,
1723          .ac97_chip = 1,
1724          .sblive51 = 1} ,
1725         {.vendor = 0x1102, .device = 0x0002,
1726          .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1727          .id = "Live",
1728          .emu10k1_chip = 1,
1729          .ac97_chip = 1,
1730          .sblive51 = 1} ,
1731         { } /* terminator */
1732 };
1733
1734 int __devinit snd_emu10k1_create(struct snd_card *card,
1735                        struct pci_dev *pci,
1736                        unsigned short extin_mask,
1737                        unsigned short extout_mask,
1738                        long max_cache_bytes,
1739                        int enable_ir,
1740                        uint subsystem,
1741                        struct snd_emu10k1 **remu)
1742 {
1743         struct snd_emu10k1 *emu;
1744         int idx, err;
1745         int is_audigy;
1746         unsigned int silent_page;
1747         const struct snd_emu_chip_details *c;
1748         static struct snd_device_ops ops = {
1749                 .dev_free =     snd_emu10k1_dev_free,
1750         };
1751
1752         *remu = NULL;
1753
1754         /* enable PCI device */
1755         err = pci_enable_device(pci);
1756         if (err < 0)
1757                 return err;
1758
1759         emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1760         if (emu == NULL) {
1761                 pci_disable_device(pci);
1762                 return -ENOMEM;
1763         }
1764         emu->card = card;
1765         spin_lock_init(&emu->reg_lock);
1766         spin_lock_init(&emu->emu_lock);
1767         spin_lock_init(&emu->spi_lock);
1768         spin_lock_init(&emu->i2c_lock);
1769         spin_lock_init(&emu->voice_lock);
1770         spin_lock_init(&emu->synth_lock);
1771         spin_lock_init(&emu->memblk_lock);
1772         mutex_init(&emu->fx8010.lock);
1773         INIT_LIST_HEAD(&emu->mapped_link_head);
1774         INIT_LIST_HEAD(&emu->mapped_order_link_head);
1775         emu->pci = pci;
1776         emu->irq = -1;
1777         emu->synth = NULL;
1778         emu->get_synth_voice = NULL;
1779         /* read revision & serial */
1780         emu->revision = pci->revision;
1781         pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1782         pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1783         snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci->vendor, pci->device, emu->serial, emu->model);
1784
1785         for (c = emu_chip_details; c->vendor; c++) {
1786                 if (c->vendor == pci->vendor && c->device == pci->device) {
1787                         if (subsystem) {
1788                                 if (c->subsystem && (c->subsystem == subsystem))
1789                                         break;
1790                                 else
1791                                         continue;
1792                         } else {
1793                                 if (c->subsystem && (c->subsystem != emu->serial))
1794                                         continue;
1795                                 if (c->revision && c->revision != emu->revision)
1796                                         continue;
1797                         }
1798                         break;
1799                 }
1800         }
1801         if (c->vendor == 0) {
1802                 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1803                 kfree(emu);
1804                 pci_disable_device(pci);
1805                 return -ENOENT;
1806         }
1807         emu->card_capabilities = c;
1808         if (c->subsystem && !subsystem)
1809                 snd_printdd("Sound card name = %s\n", c->name);
1810         else if (subsystem)
1811                 snd_printdd("Sound card name = %s, "
1812                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1813                         "Forced to subsystem = 0x%x\n", c->name,
1814                         pci->vendor, pci->device, emu->serial, c->subsystem);
1815         else
1816                 snd_printdd("Sound card name = %s, "
1817                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1818                         c->name, pci->vendor, pci->device,
1819                         emu->serial);
1820
1821         if (!*card->id && c->id) {
1822                 int i, n = 0;
1823                 strlcpy(card->id, c->id, sizeof(card->id));
1824                 for (;;) {
1825                         for (i = 0; i < snd_ecards_limit; i++) {
1826                                 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1827                                         break;
1828                         }
1829                         if (i >= snd_ecards_limit)
1830                                 break;
1831                         n++;
1832                         if (n >= SNDRV_CARDS)
1833                                 break;
1834                         snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1835                 }
1836         }
1837
1838         is_audigy = emu->audigy = c->emu10k2_chip;
1839
1840         /* set addressing mode */
1841         emu->address_mode = is_audigy ? 0 : 1;
1842         /* set the DMA transfer mask */
1843         emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1844         if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1845             pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1846                 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1847                 kfree(emu);
1848                 pci_disable_device(pci);
1849                 return -ENXIO;
1850         }
1851         if (is_audigy)
1852                 emu->gpr_base = A_FXGPREGBASE;
1853         else
1854                 emu->gpr_base = FXGPREGBASE;
1855
1856         err = pci_request_regions(pci, "EMU10K1");
1857         if (err < 0) {
1858                 kfree(emu);
1859                 pci_disable_device(pci);
1860                 return err;
1861         }
1862         emu->port = pci_resource_start(pci, 0);
1863
1864         emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1865         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1866                                 (emu->address_mode ? 32 : 16) * 1024, &emu->ptb_pages) < 0) {
1867                 err = -ENOMEM;
1868                 goto error;
1869         }
1870
1871         emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1872         emu->page_addr_table = vmalloc(emu->max_cache_pages *
1873                                        sizeof(unsigned long));
1874         if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1875                 err = -ENOMEM;
1876                 goto error;
1877         }
1878
1879         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1880                                 EMUPAGESIZE, &emu->silent_page) < 0) {
1881                 err = -ENOMEM;
1882                 goto error;
1883         }
1884         emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1885         if (emu->memhdr == NULL) {
1886                 err = -ENOMEM;
1887                 goto error;
1888         }
1889         emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1890                 sizeof(struct snd_util_memblk);
1891
1892         pci_set_master(pci);
1893
1894         emu->fx8010.fxbus_mask = 0x303f;
1895         if (extin_mask == 0)
1896                 extin_mask = 0x3fcf;
1897         if (extout_mask == 0)
1898                 extout_mask = 0x7fff;
1899         emu->fx8010.extin_mask = extin_mask;
1900         emu->fx8010.extout_mask = extout_mask;
1901         emu->enable_ir = enable_ir;
1902
1903         if (emu->card_capabilities->ca_cardbus_chip) {
1904                 err = snd_emu10k1_cardbus_init(emu);
1905                 if (err < 0)
1906                         goto error;
1907         }
1908         if (emu->card_capabilities->ecard) {
1909                 err = snd_emu10k1_ecard_init(emu);
1910                 if (err < 0)
1911                         goto error;
1912         } else if (emu->card_capabilities->emu_model) {
1913                 err = snd_emu10k1_emu1010_init(emu);
1914                 if (err < 0) {
1915                         snd_emu10k1_free(emu);
1916                         return err;
1917                 }
1918         } else {
1919                 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1920                         does not support this, it shouldn't do any harm */
1921                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1922                                         AC97SLOT_CNTR|AC97SLOT_LFE);
1923         }
1924
1925         /* initialize TRAM setup */
1926         emu->fx8010.itram_size = (16 * 1024)/2;
1927         emu->fx8010.etram_pages.area = NULL;
1928         emu->fx8010.etram_pages.bytes = 0;
1929
1930         /* irq handler must be registered after I/O ports are activated */
1931         if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1932                         KBUILD_MODNAME, emu)) {
1933                 err = -EBUSY;
1934                 goto error;
1935         }
1936         emu->irq = pci->irq;
1937
1938         /*
1939          *  Init to 0x02109204 :
1940          *  Clock accuracy    = 0     (1000ppm)
1941          *  Sample Rate       = 2     (48kHz)
1942          *  Audio Channel     = 1     (Left of 2)
1943          *  Source Number     = 0     (Unspecified)
1944          *  Generation Status = 1     (Original for Cat Code 12)
1945          *  Cat Code          = 12    (Digital Signal Mixer)
1946          *  Mode              = 0     (Mode 0)
1947          *  Emphasis          = 0     (None)
1948          *  CP                = 1     (Copyright unasserted)
1949          *  AN                = 0     (Audio data)
1950          *  P                 = 0     (Consumer)
1951          */
1952         emu->spdif_bits[0] = emu->spdif_bits[1] =
1953                 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1954                 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1955                 SPCS_GENERATIONSTATUS | 0x00001200 |
1956                 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1957
1958         emu->reserved_page = (struct snd_emu10k1_memblk *)
1959                 snd_emu10k1_synth_alloc(emu, 4096);
1960         if (emu->reserved_page)
1961                 emu->reserved_page->map_locked = 1;
1962
1963         /* Clear silent pages and set up pointers */
1964         memset(emu->silent_page.area, 0, PAGE_SIZE);
1965         silent_page = emu->silent_page.addr << emu->address_mode;
1966         for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
1967                 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1968
1969         /* set up voice indices */
1970         for (idx = 0; idx < NUM_G; idx++) {
1971                 emu->voices[idx].emu = emu;
1972                 emu->voices[idx].number = idx;
1973         }
1974
1975         err = snd_emu10k1_init(emu, enable_ir, 0);
1976         if (err < 0)
1977                 goto error;
1978 #ifdef CONFIG_PM
1979         err = alloc_pm_buffer(emu);
1980         if (err < 0)
1981                 goto error;
1982 #endif
1983
1984         /*  Initialize the effect engine */
1985         err = snd_emu10k1_init_efx(emu);
1986         if (err < 0)
1987                 goto error;
1988         snd_emu10k1_audio_enable(emu);
1989
1990         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
1991         if (err < 0)
1992                 goto error;
1993
1994 #ifdef CONFIG_PROC_FS
1995         snd_emu10k1_proc_init(emu);
1996 #endif
1997
1998         snd_card_set_dev(card, &pci->dev);
1999         *remu = emu;
2000         return 0;
2001
2002  error:
2003         snd_emu10k1_free(emu);
2004         return err;
2005 }
2006
2007 #ifdef CONFIG_PM
2008 static unsigned char saved_regs[] = {
2009         CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2010         FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2011         ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2012         TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2013         MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2014         SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2015         0xff /* end */
2016 };
2017 static unsigned char saved_regs_audigy[] = {
2018         A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2019         A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2020         0xff /* end */
2021 };
2022
2023 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
2024 {
2025         int size;
2026
2027         size = ARRAY_SIZE(saved_regs);
2028         if (emu->audigy)
2029                 size += ARRAY_SIZE(saved_regs_audigy);
2030         emu->saved_ptr = vmalloc(4 * NUM_G * size);
2031         if (!emu->saved_ptr)
2032                 return -ENOMEM;
2033         if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2034                 return -ENOMEM;
2035         if (emu->card_capabilities->ca0151_chip &&
2036             snd_p16v_alloc_pm_buffer(emu) < 0)
2037                 return -ENOMEM;
2038         return 0;
2039 }
2040
2041 static void free_pm_buffer(struct snd_emu10k1 *emu)
2042 {
2043         vfree(emu->saved_ptr);
2044         snd_emu10k1_efx_free_pm_buffer(emu);
2045         if (emu->card_capabilities->ca0151_chip)
2046                 snd_p16v_free_pm_buffer(emu);
2047 }
2048
2049 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2050 {
2051         int i;
2052         unsigned char *reg;
2053         unsigned int *val;
2054
2055         val = emu->saved_ptr;
2056         for (reg = saved_regs; *reg != 0xff; reg++)
2057                 for (i = 0; i < NUM_G; i++, val++)
2058                         *val = snd_emu10k1_ptr_read(emu, *reg, i);
2059         if (emu->audigy) {
2060                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2061                         for (i = 0; i < NUM_G; i++, val++)
2062                                 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2063         }
2064         if (emu->audigy)
2065                 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2066         emu->saved_hcfg = inl(emu->port + HCFG);
2067 }
2068
2069 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2070 {
2071         if (emu->card_capabilities->ca_cardbus_chip)
2072                 snd_emu10k1_cardbus_init(emu);
2073         if (emu->card_capabilities->ecard)
2074                 snd_emu10k1_ecard_init(emu);
2075         else if (emu->card_capabilities->emu_model)
2076                 snd_emu10k1_emu1010_init(emu);
2077         else
2078                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2079         snd_emu10k1_init(emu, emu->enable_ir, 1);
2080 }
2081
2082 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2083 {
2084         int i;
2085         unsigned char *reg;
2086         unsigned int *val;
2087
2088         snd_emu10k1_audio_enable(emu);
2089
2090         /* resore for spdif */
2091         if (emu->audigy)
2092                 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2093         outl(emu->saved_hcfg, emu->port + HCFG);
2094
2095         val = emu->saved_ptr;
2096         for (reg = saved_regs; *reg != 0xff; reg++)
2097                 for (i = 0; i < NUM_G; i++, val++)
2098                         snd_emu10k1_ptr_write(emu, *reg, i, *val);
2099         if (emu->audigy) {
2100                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2101                         for (i = 0; i < NUM_G; i++, val++)
2102                                 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2103         }
2104 }
2105 #endif