sound/pci/cs46xx/dsp_spos.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  15  *
  16  */
  17
  18 /*
  19  * 2002-07 Benny Sjostrand benny@hostmobility.com
  20  */
  21
  22
  23 #include <sound/driver.h>
  24 #include <asm/io.h>
  25 #include <linux/delay.h>
  26 #include <linux/pci.h>
  27 #include <linux/pm.h>
  28 #include <linux/init.h>
  29 #include <linux/slab.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/mutex.h>
  32
  33 #include <sound/core.h>
  34 #include <sound/control.h>
  35 #include <sound/info.h>
  36 #include <sound/asoundef.h>
  37 #include <sound/cs46xx.h>
  38
  39 #include "cs46xx_lib.h"
  40 #include "dsp_spos.h"
  41
  42 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
  43                                   struct dsp_scb_descriptor * fg_entry);
  44
  45 static enum wide_opcode wide_opcodes[] = {
  46         WIDE_FOR_BEGIN_LOOP,
  47         WIDE_FOR_BEGIN_LOOP2,
  48         WIDE_COND_GOTO_ADDR,
  49         WIDE_COND_GOTO_CALL,
  50         WIDE_TBEQ_COND_GOTO_ADDR,
  51         WIDE_TBEQ_COND_CALL_ADDR,
  52         WIDE_TBEQ_NCOND_GOTO_ADDR,
  53         WIDE_TBEQ_NCOND_CALL_ADDR,
  54         WIDE_TBEQ_COND_GOTO1_ADDR,
  55         WIDE_TBEQ_COND_CALL1_ADDR,
  56         WIDE_TBEQ_NCOND_GOTOI_ADDR,
  57         WIDE_TBEQ_NCOND_CALL1_ADDR
  58 };
  59
  60 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
  61                                        u32 overlay_begin_address)
  62 {
  63         unsigned int i = 0, j, nreallocated = 0;
  64         u32 hival,loval,address;
  65         u32 mop_operands,mop_type,wide_op;
  66         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
  67
  68         snd_assert( ((size % 2) == 0), return -EINVAL);
  69
  70         while (i < size) {
  71                 loval = data[i++];
  72                 hival = data[i++];
  73
  74                 if (ins->code.offset > 0) {
  75                         mop_operands = (hival >> 6) & 0x03fff;
  76                         mop_type = mop_operands >> 10;
  77
  78                         /* check for wide type instruction */
  79                         if (mop_type == 0 &&
  80                             (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
  81                             (mop_operands & WIDE_INSTR_MASK) != 0) {
  82                                 wide_op = loval & 0x7f;
  83                                 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
  84                                         if (wide_opcodes[j] == wide_op) {
  85                                                 /* need to reallocate instruction */
  86                                                 address  = (hival & 0x00FFF) << 5;
  87                                                 address |=  loval >> 15;
  88
  89                                                 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address);
  90
  91                                                 if ( !(address & 0x8000) ) {
  92                                                         address += (ins->code.offset / 2) - overlay_begin_address;
  93                                                 } else {
  94                                                         snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n");
  95                                                 }
  96
  97                                                 hival &= 0xFF000;
  98                                                 loval &= 0x07FFF;
  99
 100                                                 hival |= ( (address >> 5)  & 0x00FFF);
 101                                                 loval |= ( (address << 15) & 0xF8000);
 102
 103                                                 address  = (hival & 0x00FFF) << 5;
 104                                                 address |=  loval >> 15;
 105
 106                                                 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address);
 107                                                 nreallocated ++;
 108                                         } /* wide_opcodes[j] == wide_op */
 109                                 } /* for */
 110                         } /* mod_type == 0 ... */
 111                 } /* ins->code.offset > 0 */
 112
 113                 ins->code.data[ins->code.size++] = loval;
 114                 ins->code.data[ins->code.size++] = hival;
 115         }
 116
 117         snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated);
 118         return nreallocated;
 119 }
 120
 121 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
 122 {
 123         int i;
 124         for (i = 0;i < module->nsegments; ++i) {
 125                 if (module->segments[i].segment_type == seg_type) {
 126                         return (module->segments + i);
 127                 }
 128         }
 129
 130         return NULL;
 131 };
 132
 133 static int find_free_symbol_index (struct dsp_spos_instance * ins)
 134 {
 135         int index = ins->symbol_table.nsymbols,i;
 136
 137         for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
 138                 if (ins->symbol_table.symbols[i].deleted) {
 139                         index = i;
 140                         break;
 141                 }
 142         }
 143
 144         return index;
 145 }
 146
 147 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 148 {
 149         int i;
 150         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 151
 152         if (module->symbol_table.nsymbols > 0) {
 153                 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
 154                     module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
 155                         module->overlay_begin_address = module->symbol_table.symbols[0].address;
 156                 }
 157         }
 158
 159         for (i = 0;i < module->symbol_table.nsymbols; ++i) {
 160                 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 161                         snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 162                         return -ENOMEM;
 163                 }
 164
 165
 166                 if (cs46xx_dsp_lookup_symbol(chip,
 167                                              module->symbol_table.symbols[i].symbol_name,
 168                                              module->symbol_table.symbols[i].symbol_type) == NULL) {
 169
 170                         ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
 171                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
 172                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
 173                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
 174
 175                         if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
 176                                 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
 177
 178                         ins->symbol_table.nsymbols++;
 179                 } else {
 180           /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
 181                              module->symbol_table.symbols[i].symbol_name); */
 182                 }
 183         }
 184
 185         return 0;
 186 }
 187
 188 static struct dsp_symbol_entry *
 189 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
 190 {
 191         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 192         struct dsp_symbol_entry * symbol = NULL;
 193         int index;
 194
 195         if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 196                 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 197                 return NULL;
 198         }
 199
 200         if (cs46xx_dsp_lookup_symbol(chip,
 201                                      symbol_name,
 202                                      type) != NULL) {
 203                 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name);
 204                 return NULL;
 205         }
 206
 207         index = find_free_symbol_index (ins);
 208
 209         strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
 210         ins->symbol_table.symbols[index].address = address;
 211         ins->symbol_table.symbols[index].symbol_type = type;
 212         ins->symbol_table.symbols[index].module = NULL;
 213         ins->symbol_table.symbols[index].deleted = 0;
 214         symbol = (ins->symbol_table.symbols + index);
 215
 216         if (index > ins->symbol_table.highest_frag_index)
 217                 ins->symbol_table.highest_frag_index = index;
 218
 219         if (index == ins->symbol_table.nsymbols)
 220                 ins->symbol_table.nsymbols++; /* no frag. in list */
 221
 222         return symbol;
 223 }
 224
 225 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
 226 {
 227         struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
 228
 229         if (ins == NULL)
 230                 return NULL;
 231
 232         /* better to use vmalloc for this big table */
 233         ins->symbol_table.nsymbols = 0;
 234         ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
 235                                             DSP_MAX_SYMBOLS);
 236         ins->symbol_table.highest_frag_index = 0;
 237
 238         if (ins->symbol_table.symbols == NULL) {
 239                 cs46xx_dsp_spos_destroy(chip);
 240                 goto error;
 241         }
 242
 243         ins->code.offset = 0;
 244         ins->code.size = 0;
 245         ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
 246
 247         if (ins->code.data == NULL) {
 248                 cs46xx_dsp_spos_destroy(chip);
 249                 goto error;
 250         }
 251
 252         ins->nscb = 0;
 253         ins->ntask = 0;
 254
 255         ins->nmodules = 0;
 256         ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
 257
 258         if (ins->modules == NULL) {
 259                 cs46xx_dsp_spos_destroy(chip);
 260                 goto error;
 261         }
 262
 263         /* default SPDIF input sample rate
 264            to 48000 khz */
 265         ins->spdif_in_sample_rate = 48000;
 266
 267         /* maximize volume */
 268         ins->dac_volume_right = 0x8000;
 269         ins->dac_volume_left = 0x8000;
 270         ins->spdif_input_volume_right = 0x8000;
 271         ins->spdif_input_volume_left = 0x8000;
 272
 273         /* set left and right validity bits and
 274            default channel status */
 275         ins->spdif_csuv_default =
 276                 ins->spdif_csuv_stream =
 277          /* byte 0 */  ((unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF        & 0xff)) << 24) |
 278          /* byte 1 */  ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
 279          /* byte 3 */   (unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
 280          /* left and right validity bits */ (1 << 13) | (1 << 12);
 281
 282         return ins;
 283
 284 error:
 285         kfree(ins);
 286         return NULL;
 287 }
 288
 289 void  cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
 290 {
 291         int i;
 292         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 293
 294         snd_assert(ins != NULL, return);
 295
 296         mutex_lock(&chip->spos_mutex);
 297         for (i = 0; i < ins->nscb; ++i) {
 298                 if (ins->scbs[i].deleted) continue;
 299
 300                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 301         }
 302
 303         kfree(ins->code.data);
 304         vfree(ins->symbol_table.symbols);
 305         kfree(ins->modules);
 306         kfree(ins);
 307         mutex_unlock(&chip->spos_mutex);
 308 }
 309
 310 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 311 {
 312         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 313         struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
 314         struct dsp_segment_desc * parameter = get_segment_desc (module,SEGTYPE_SP_PARAMETER);
 315         struct dsp_segment_desc * sample = get_segment_desc (module,SEGTYPE_SP_SAMPLE);
 316         u32 doffset, dsize;
 317
 318         if (ins->nmodules == DSP_MAX_MODULES - 1) {
 319                 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n");
 320                 return -ENOMEM;
 321         }
 322
 323         snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name);
 324
 325         if (ins->nmodules == 0) {
 326                 snd_printdd("dsp_spos: clearing parameter area\n");
 327                 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
 328         }
 329
 330         if (parameter == NULL) {
 331                 snd_printdd("dsp_spos: module got no parameter segment\n");
 332         } else {
 333                 if (ins->nmodules > 0) {
 334                         snd_printk(KERN_WARNING "dsp_spos: WARNING current parameter data may be overwriten!\n");
 335                 }
 336
 337                 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
 338                 dsize   = parameter->size * 4;
 339
 340                 snd_printdd("dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
 341                             doffset,doffset + dsize);
 342
 343                 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
 344                         snd_printk(KERN_ERR "dsp_spos: failed to download parameter data to DSP\n");
 345                         return -EINVAL;
 346                 }
 347         }
 348
 349         if (ins->nmodules == 0) {
 350                 snd_printdd("dsp_spos: clearing sample area\n");
 351                 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
 352         }
 353
 354         if (sample == NULL) {
 355                 snd_printdd("dsp_spos: module got no sample segment\n");
 356         } else {
 357                 if (ins->nmodules > 0) {
 358                         snd_printk(KERN_WARNING "dsp_spos: WARNING current sample data may be overwriten\n");
 359                 }
 360
 361                 doffset = (sample->offset * 4  + DSP_SAMPLE_BYTE_OFFSET);
 362                 dsize   =  sample->size * 4;
 363
 364                 snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n",
 365                             doffset,doffset + dsize);
 366
 367                 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
 368                         snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n");
 369                         return -EINVAL;
 370                 }
 371         }
 372
 373
 374         if (ins->nmodules == 0) {
 375                 snd_printdd("dsp_spos: clearing code area\n");
 376                 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
 377         }
 378
 379         if (code == NULL) {
 380                 snd_printdd("dsp_spos: module got no code segment\n");
 381         } else {
 382                 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
 383                         snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n");
 384                         return -ENOMEM;
 385                 }
 386
 387                 module->load_address = ins->code.offset;
 388                 module->overlay_begin_address = 0x000;
 389
 390                 /* if module has a code segment it must have
 391                    symbol table */
 392                 snd_assert(module->symbol_table.symbols != NULL ,return -ENOMEM);
 393                 if (add_symbols(chip,module)) {
 394                         snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n");
 395                         return -ENOMEM;
 396                 }
 397
 398                 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
 399                 dsize   = code->size * 4;
 400                 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n",
 401                             doffset,doffset + dsize);
 402
 403                 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
 404
 405                 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
 406                         snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n");
 407                         return -EINVAL;
 408                 }
 409
 410                 ins->code.offset += code->size;
 411         }
 412
 413         /* NOTE: module segments and symbol table must be
 414            statically allocated. Case that module data is
 415            not generated by the ospparser */
 416         ins->modules[ins->nmodules] = *module;
 417         ins->nmodules++;
 418
 419         return 0;
 420 }
 421
 422 struct dsp_symbol_entry *
 423 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
 424 {
 425         int i;
 426         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 427
 428         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 429
 430                 if (ins->symbol_table.symbols[i].deleted)
 431                         continue;
 432
 433                 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
 434                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 435                         return (ins->symbol_table.symbols + i);
 436                 }
 437         }
 438
 439 #if 0
 440         printk ("dsp_spos: symbol <%s> type %02x not found\n",
 441                 symbol_name,symbol_type);
 442 #endif
 443
 444         return NULL;
 445 }
 446
 447
 448 #ifdef CONFIG_PROC_FS
 449 static struct dsp_symbol_entry *
 450 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
 451 {
 452         int i;
 453         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 454
 455         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 456
 457                 if (ins->symbol_table.symbols[i].deleted)
 458                         continue;
 459
 460                 if (ins->symbol_table.symbols[i].address == address &&
 461                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 462                         return (ins->symbol_table.symbols + i);
 463                 }
 464         }
 465
 466
 467         return NULL;
 468 }
 469
 470
 471 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
 472                                                struct snd_info_buffer *buffer)
 473 {
 474         struct snd_cs46xx *chip = entry->private_data;
 475         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 476         int i;
 477
 478         snd_iprintf(buffer, "SYMBOLS:\n");
 479         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 480                 char *module_str = "system";
 481
 482                 if (ins->symbol_table.symbols[i].deleted)
 483                         continue;
 484
 485                 if (ins->symbol_table.symbols[i].module != NULL) {
 486                         module_str = ins->symbol_table.symbols[i].module->module_name;
 487                 }
 488
 489
 490                 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
 491                             ins->symbol_table.symbols[i].address,
 492                             ins->symbol_table.symbols[i].symbol_type,
 493                             ins->symbol_table.symbols[i].symbol_name,
 494                             module_str);
 495         }
 496 }
 497
 498
 499 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
 500                                           struct snd_info_buffer *buffer)
 501 {
 502         struct snd_cs46xx *chip = entry->private_data;
 503         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 504         int i,j;
 505
 506         mutex_lock(&chip->spos_mutex);
 507         snd_iprintf(buffer, "MODULES:\n");
 508         for ( i = 0; i < ins->nmodules; ++i ) {
 509                 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
 510                 snd_iprintf(buffer, "   %d symbols\n", ins->modules[i].symbol_table.nsymbols);
 511                 snd_iprintf(buffer, "   %d fixups\n", ins->modules[i].nfixups);
 512
 513                 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
 514                         struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
 515                         snd_iprintf(buffer, "   segment %02x offset %08x size %08x\n",
 516                                     desc->segment_type,desc->offset, desc->size);
 517                 }
 518         }
 519         mutex_unlock(&chip->spos_mutex);
 520 }
 521
 522 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
 523                                             struct snd_info_buffer *buffer)
 524 {
 525         struct snd_cs46xx *chip = entry->private_data;
 526         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 527         int i, j, col;
 528         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 529
 530         mutex_lock(&chip->spos_mutex);
 531         snd_iprintf(buffer, "TASK TREES:\n");
 532         for ( i = 0; i < ins->ntask; ++i) {
 533                 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
 534
 535                 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
 536                         u32 val;
 537                         if (col == 4) {
 538                                 snd_iprintf(buffer,"\n");
 539                                 col = 0;
 540                         }
 541                         val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
 542                         snd_iprintf(buffer,"%08x ",val);
 543                 }
 544         }
 545
 546         snd_iprintf(buffer,"\n");
 547         mutex_unlock(&chip->spos_mutex);
 548 }
 549
 550 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
 551                                       struct snd_info_buffer *buffer)
 552 {
 553         struct snd_cs46xx *chip = entry->private_data;
 554         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 555         int i;
 556
 557         mutex_lock(&chip->spos_mutex);
 558         snd_iprintf(buffer, "SCB's:\n");
 559         for ( i = 0; i < ins->nscb; ++i) {
 560                 if (ins->scbs[i].deleted)
 561                         continue;
 562                 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
 563
 564                 if (ins->scbs[i].parent_scb_ptr != NULL) {
 565                         snd_iprintf(buffer,"parent [%s:%04x] ",
 566                                     ins->scbs[i].parent_scb_ptr->scb_name,
 567                                     ins->scbs[i].parent_scb_ptr->address);
 568                 } else snd_iprintf(buffer,"parent [none] ");
 569
 570                 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x]  task_entry [%s:%04x]\n",
 571                             ins->scbs[i].sub_list_ptr->scb_name,
 572                             ins->scbs[i].sub_list_ptr->address,
 573                             ins->scbs[i].next_scb_ptr->scb_name,
 574                             ins->scbs[i].next_scb_ptr->address,
 575                             ins->scbs[i].task_entry->symbol_name,
 576                             ins->scbs[i].task_entry->address);
 577         }
 578
 579         snd_iprintf(buffer,"\n");
 580         mutex_unlock(&chip->spos_mutex);
 581 }
 582
 583 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
 584                                                  struct snd_info_buffer *buffer)
 585 {
 586         struct snd_cs46xx *chip = entry->private_data;
 587         /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
 588         unsigned int i, col = 0;
 589         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 590         struct dsp_symbol_entry * symbol;
 591
 592         for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
 593                 if (col == 4) {
 594                         snd_iprintf(buffer,"\n");
 595                         col = 0;
 596                 }
 597
 598                 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
 599                         col = 0;
 600                         snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
 601                 }
 602
 603                 if (col == 0) {
 604                         snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
 605                 }
 606
 607                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 608         }
 609 }
 610
 611 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
 612                                               struct snd_info_buffer *buffer)
 613 {
 614         struct snd_cs46xx *chip = entry->private_data;
 615         int i,col = 0;
 616         void __iomem *dst = chip->region.idx[2].remap_addr;
 617
 618         snd_iprintf(buffer,"PCMREADER:\n");
 619         for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
 620                 if (col == 4) {
 621                         snd_iprintf(buffer,"\n");
 622                         col = 0;
 623                 }
 624
 625                 if (col == 0) {
 626                         snd_iprintf(buffer, "%04X ",i);
 627                 }
 628
 629                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 630         }
 631
 632         snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
 633
 634         col = 0;
 635         for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
 636                 if (col == 4) {
 637                         snd_iprintf(buffer,"\n");
 638                         col = 0;
 639                 }
 640
 641                 if (col == 0) {
 642                         snd_iprintf(buffer, "%04X ",i);
 643                 }
 644
 645                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 646         }
 647
 648         snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
 649         col = 0;
 650         for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
 651                 if (col == 4) {
 652                         snd_iprintf(buffer,"\n");
 653                         col = 0;
 654                 }
 655
 656                 if (col == 0) {
 657                         snd_iprintf(buffer, "%04X ",i);
 658                 }
 659
 660                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 661         }
 662
 663
 664         snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
 665         col = 0;
 666         for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
 667                 if (col == 4) {
 668                         snd_iprintf(buffer,"\n");
 669                         col = 0;
 670                 }
 671
 672                 if (col == 0) {
 673                         snd_iprintf(buffer, "%04X ",i);
 674                 }
 675
 676                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 677         }
 678
 679         snd_iprintf(buffer,"\n...\n");
 680         col = 0;
 681
 682         for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
 683                 if (col == 4) {
 684                         snd_iprintf(buffer,"\n");
 685                         col = 0;
 686                 }
 687
 688                 if (col == 0) {
 689                         snd_iprintf(buffer, "%04X ",i);
 690                 }
 691
 692                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 693         }
 694
 695
 696         snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
 697         col = 0;
 698         for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
 699                 if (col == 4) {
 700                         snd_iprintf(buffer,"\n");
 701                         col = 0;
 702                 }
 703
 704                 if (col == 0) {
 705                         snd_iprintf(buffer, "%04X ",i);
 706                 }
 707
 708                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 709         }
 710
 711         snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
 712         col = 0;
 713         for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
 714                 if (col == 4) {
 715                         snd_iprintf(buffer,"\n");
 716                         col = 0;
 717                 }
 718
 719                 if (col == 0) {
 720                         snd_iprintf(buffer, "%04X ",i);
 721                 }
 722
 723                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 724         }
 725 #if 0
 726         snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
 727         col = 0;
 728         for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
 729                 if (col == 4) {
 730                         snd_iprintf(buffer,"\n");
 731                         col = 0;
 732                 }
 733
 734                 if (col == 0) {
 735                         snd_iprintf(buffer, "%04X ",i);
 736                 }
 737
 738                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 739         }
 740 #endif
 741
 742         snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
 743         col = 0;
 744         for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
 745                 if (col == 4) {
 746                         snd_iprintf(buffer,"\n");
 747                         col = 0;
 748                 }
 749
 750                 if (col == 0) {
 751                         snd_iprintf(buffer, "%04X ",i);
 752                 }
 753
 754                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 755         }
 756         snd_iprintf(buffer,"\n");
 757 }
 758
 759 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
 760 {
 761         struct snd_info_entry *entry;
 762         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 763         int i;
 764
 765         ins->snd_card = card;
 766
 767         if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
 768                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 769                 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
 770
 771                 if (snd_info_register(entry) < 0) {
 772                         snd_info_free_entry(entry);
 773                         entry = NULL;
 774                 }
 775         }
 776
 777         ins->proc_dsp_dir = entry;
 778
 779         if (!ins->proc_dsp_dir)
 780                 return -ENOMEM;
 781
 782         if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
 783                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 784                 entry->private_data = chip;
 785                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 786                 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
 787                 if (snd_info_register(entry) < 0) {
 788                         snd_info_free_entry(entry);
 789                         entry = NULL;
 790                 }
 791         }
 792         ins->proc_sym_info_entry = entry;
 793
 794         if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
 795                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 796                 entry->private_data = chip;
 797                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 798                 entry->c.text.read = cs46xx_dsp_proc_modules_read;
 799                 if (snd_info_register(entry) < 0) {
 800                         snd_info_free_entry(entry);
 801                         entry = NULL;
 802                 }
 803         }
 804         ins->proc_modules_info_entry = entry;
 805
 806         if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
 807                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 808                 entry->private_data = chip;
 809                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 810                 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
 811                 if (snd_info_register(entry) < 0) {
 812                         snd_info_free_entry(entry);
 813                         entry = NULL;
 814                 }
 815         }
 816         ins->proc_parameter_dump_info_entry = entry;
 817
 818         if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
 819                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 820                 entry->private_data = chip;
 821                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 822                 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
 823                 if (snd_info_register(entry) < 0) {
 824                         snd_info_free_entry(entry);
 825                         entry = NULL;
 826                 }
 827         }
 828         ins->proc_sample_dump_info_entry = entry;
 829
 830         if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
 831                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 832                 entry->private_data = chip;
 833                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 834                 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
 835                 if (snd_info_register(entry) < 0) {
 836                         snd_info_free_entry(entry);
 837                         entry = NULL;
 838                 }
 839         }
 840         ins->proc_task_info_entry = entry;
 841
 842         if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
 843                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 844                 entry->private_data = chip;
 845                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 846                 entry->c.text.read = cs46xx_dsp_proc_scb_read;
 847                 if (snd_info_register(entry) < 0) {
 848                         snd_info_free_entry(entry);
 849                         entry = NULL;
 850                 }
 851         }
 852         ins->proc_scb_info_entry = entry;
 853
 854         mutex_lock(&chip->spos_mutex);
 855         /* register/update SCB's entries on proc */
 856         for (i = 0; i < ins->nscb; ++i) {
 857                 if (ins->scbs[i].deleted) continue;
 858
 859                 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
 860         }
 861         mutex_unlock(&chip->spos_mutex);
 862
 863         return 0;
 864 }
 865
 866 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
 867 {
 868         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 869         int i;
 870
 871         if (ins->proc_sym_info_entry) {
 872                 snd_info_unregister(ins->proc_sym_info_entry);
 873                 ins->proc_sym_info_entry = NULL;
 874         }
 875
 876         if (ins->proc_modules_info_entry) {
 877                 snd_info_unregister(ins->proc_modules_info_entry);
 878                 ins->proc_modules_info_entry = NULL;
 879         }
 880
 881         if (ins->proc_parameter_dump_info_entry) {
 882                 snd_info_unregister(ins->proc_parameter_dump_info_entry);
 883                 ins->proc_parameter_dump_info_entry = NULL;
 884         }
 885
 886         if (ins->proc_sample_dump_info_entry) {
 887                 snd_info_unregister(ins->proc_sample_dump_info_entry);
 888                 ins->proc_sample_dump_info_entry = NULL;
 889         }
 890
 891         if (ins->proc_scb_info_entry) {
 892                 snd_info_unregister(ins->proc_scb_info_entry);
 893                 ins->proc_scb_info_entry = NULL;
 894         }
 895
 896         if (ins->proc_task_info_entry) {
 897                 snd_info_unregister(ins->proc_task_info_entry);
 898                 ins->proc_task_info_entry = NULL;
 899         }
 900
 901         mutex_lock(&chip->spos_mutex);
 902         for (i = 0; i < ins->nscb; ++i) {
 903                 if (ins->scbs[i].deleted) continue;
 904                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 905         }
 906         mutex_unlock(&chip->spos_mutex);
 907
 908         if (ins->proc_dsp_dir) {
 909                 snd_info_unregister (ins->proc_dsp_dir);
 910                 ins->proc_dsp_dir = NULL;
 911         }
 912
 913         return 0;
 914 }
 915 #endif /* CONFIG_PROC_FS */
 916
 917 static int debug_tree;
 918 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
 919                                    u32  dest, int size)
 920 {
 921         void __iomem *spdst = chip->region.idx[1].remap_addr +
 922                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 923         int i;
 924
 925         for (i = 0; i < size; ++i) {
 926                 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]);
 927                 writel(task_data[i],spdst);
 928                 spdst += sizeof(u32);
 929         }
 930 }
 931
 932 static int debug_scb;
 933 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
 934 {
 935         void __iomem *spdst = chip->region.idx[1].remap_addr +
 936                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 937         int i;
 938
 939         for (i = 0; i < 0x10; ++i) {
 940                 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]);
 941                 writel(scb_data[i],spdst);
 942                 spdst += sizeof(u32);
 943         }
 944 }
 945
 946 static int find_free_scb_index (struct dsp_spos_instance * ins)
 947 {
 948         int index = ins->nscb, i;
 949
 950         for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
 951                 if (ins->scbs[i].deleted) {
 952                         index = i;
 953                         break;
 954                 }
 955         }
 956
 957         return index;
 958 }
 959
 960 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
 961 {
 962         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 963         struct dsp_scb_descriptor * desc = NULL;
 964         int index;
 965
 966         if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
 967                 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n");
 968                 return NULL;
 969         }
 970
 971         index = find_free_scb_index (ins);
 972
 973         strcpy(ins->scbs[index].scb_name, name);
 974         ins->scbs[index].address = dest;
 975         ins->scbs[index].index = index;
 976         ins->scbs[index].proc_info = NULL;
 977         ins->scbs[index].ref_count = 1;
 978         ins->scbs[index].deleted = 0;
 979         spin_lock_init(&ins->scbs[index].lock);
 980
 981         desc = (ins->scbs + index);
 982         ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
 983
 984         if (index > ins->scb_highest_frag_index)
 985                 ins->scb_highest_frag_index = index;
 986
 987         if (index == ins->nscb)
 988                 ins->nscb++;
 989
 990         return desc;
 991 }
 992
 993 static struct dsp_task_descriptor *
 994 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
 995 {
 996         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 997         struct dsp_task_descriptor * desc = NULL;
 998
 999         if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
1000                 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n");
1001                 return NULL;
1002         }
1003
1004         strcpy(ins->tasks[ins->ntask].task_name,name);
1005         ins->tasks[ins->ntask].address = dest;
1006         ins->tasks[ins->ntask].size = size;
1007
1008         /* quick find in list */
1009         ins->tasks[ins->ntask].index = ins->ntask;
1010         desc = (ins->tasks + ins->ntask);
1011         ins->ntask++;
1012
1013         add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1014         return desc;
1015 }
1016
1017 struct dsp_scb_descriptor *
1018 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1019 {
1020         struct dsp_scb_descriptor * desc;
1021
1022         desc = _map_scb (chip,name,dest);
1023         if (desc) {
1024                 _dsp_create_scb(chip,scb_data,dest);
1025         } else {
1026                 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n");
1027         }
1028
1029         return desc;
1030 }
1031
1032
1033 static struct dsp_task_descriptor *
1034 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1035                              u32 dest, int size)
1036 {
1037         struct dsp_task_descriptor * desc;
1038
1039         desc = _map_task_tree (chip,name,dest,size);
1040         if (desc) {
1041                 _dsp_create_task_tree(chip,task_data,dest,size);
1042         } else {
1043                 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n");
1044         }
1045
1046         return desc;
1047 }
1048
1049 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1050 {
1051         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1052         struct dsp_symbol_entry * fg_task_tree_header_code;
1053         struct dsp_symbol_entry * task_tree_header_code;
1054         struct dsp_symbol_entry * task_tree_thread;
1055         struct dsp_symbol_entry * null_algorithm;
1056         struct dsp_symbol_entry * magic_snoop_task;
1057
1058         struct dsp_scb_descriptor * timing_master_scb;
1059         struct dsp_scb_descriptor * codec_out_scb;
1060         struct dsp_scb_descriptor * codec_in_scb;
1061         struct dsp_scb_descriptor * src_task_scb;
1062         struct dsp_scb_descriptor * master_mix_scb;
1063         struct dsp_scb_descriptor * rear_mix_scb;
1064         struct dsp_scb_descriptor * record_mix_scb;
1065         struct dsp_scb_descriptor * write_back_scb;
1066         struct dsp_scb_descriptor * vari_decimate_scb;
1067         struct dsp_scb_descriptor * rear_codec_out_scb;
1068         struct dsp_scb_descriptor * clfe_codec_out_scb;
1069         struct dsp_scb_descriptor * magic_snoop_scb;
1070
1071         int fifo_addr, fifo_span, valid_slots;
1072
1073         static struct dsp_spos_control_block sposcb = {
1074                 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1075                 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1076                 /* 2 */ DSP_SPOS_DC,0,
1077                 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1078                 /* 4 */ 0,0,
1079                 /* 5 */ DSP_SPOS_UU,0,
1080                 /* 6 */ FG_TASK_HEADER_ADDR,0,
1081                 /* 7 */ 0,0,
1082                 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1083                 /* 9 */ 0,
1084                 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1085                 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1086                 /* C */ DSP_SPOS_DC_DC,
1087                 /* D */ DSP_SPOS_DC_DC,
1088                 /* E */ DSP_SPOS_DC_DC,
1089                 /* F */ DSP_SPOS_DC_DC
1090         };
1091
1092         cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1093
1094         null_algorithm  = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1095         if (null_algorithm == NULL) {
1096                 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");
1097                 return -EIO;
1098         }
1099
1100         fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1101         if (fg_task_tree_header_code == NULL) {
1102                 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1103                 return -EIO;
1104         }
1105
1106         task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1107         if (task_tree_header_code == NULL) {
1108                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1109                 return -EIO;
1110         }
1111
1112         task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1113         if (task_tree_thread == NULL) {
1114                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n");
1115                 return -EIO;
1116         }
1117
1118         magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1119         if (magic_snoop_task == NULL) {
1120                 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1121                 return -EIO;
1122         }
1123
1124         {
1125                 /* create the null SCB */
1126                 static struct dsp_generic_scb null_scb = {
1127                         { 0, 0, 0, 0 },
1128                         { 0, 0, 0, 0, 0 },
1129                         NULL_SCB_ADDR, NULL_SCB_ADDR,
1130                         0, 0, 0, 0, 0,
1131                         {
1132                                 0,0,
1133                                 0,0,
1134                         }
1135                 };
1136
1137                 null_scb.entry_point = null_algorithm->address;
1138                 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1139                 ins->the_null_scb->task_entry = null_algorithm;
1140                 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1141                 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1142                 ins->the_null_scb->parent_scb_ptr = NULL;
1143                 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1144         }
1145
1146         {
1147                 /* setup foreground task tree */
1148                 static struct dsp_task_tree_control_block fg_task_tree_hdr =  {
1149                         { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1150                           DSP_SPOS_DC_DC,
1151                           DSP_SPOS_DC_DC,
1152                           0x0000,DSP_SPOS_DC,
1153                           DSP_SPOS_DC, DSP_SPOS_DC,
1154                           DSP_SPOS_DC_DC,
1155                           DSP_SPOS_DC_DC,
1156                           DSP_SPOS_DC_DC,
1157                           DSP_SPOS_DC,DSP_SPOS_DC },
1158
1159                         {
1160                                 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1161                                 0,
1162                                 FG_TASK_HEADER_ADDR + TCBData,
1163                         },
1164
1165                         {
1166                                 4,0,
1167                                 1,0,
1168                                 2,SPOSCB_ADDR + HFGFlags,
1169                                 0,0,
1170                                 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1171                         },
1172
1173                         {
1174                                 DSP_SPOS_DC,0,
1175                                 DSP_SPOS_DC,DSP_SPOS_DC,
1176                                 DSP_SPOS_DC,DSP_SPOS_DC,
1177                                 DSP_SPOS_DC,DSP_SPOS_DC,
1178                                 DSP_SPOS_DC,DSP_SPOS_DC,
1179                                 DSP_SPOS_DCDC,
1180                                 DSP_SPOS_UU,1,
1181                                 DSP_SPOS_DCDC,
1182                                 DSP_SPOS_DCDC,
1183                                 DSP_SPOS_DCDC,
1184                                 DSP_SPOS_DCDC,
1185                                 DSP_SPOS_DCDC,
1186                                 DSP_SPOS_DCDC,
1187                                 DSP_SPOS_DCDC,
1188                                 DSP_SPOS_DCDC,
1189                                 DSP_SPOS_DCDC,
1190                                 DSP_SPOS_DCDC,
1191                                 DSP_SPOS_DCDC,
1192                                 DSP_SPOS_DCDC,
1193                                 DSP_SPOS_DCDC,
1194                                 DSP_SPOS_DCDC,
1195                                 DSP_SPOS_DCDC,
1196                                 DSP_SPOS_DCDC,
1197                                 DSP_SPOS_DCDC,
1198                                 DSP_SPOS_DCDC,
1199                                 DSP_SPOS_DCDC,
1200                                 DSP_SPOS_DCDC,
1201                                 DSP_SPOS_DCDC,
1202                                 DSP_SPOS_DCDC,
1203                                 DSP_SPOS_DCDC,
1204                                 DSP_SPOS_DCDC,
1205                                 DSP_SPOS_DCDC,
1206                                 DSP_SPOS_DCDC,
1207                                 DSP_SPOS_DCDC,
1208                                 DSP_SPOS_DCDC
1209                         },
1210                         {
1211                                 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1212                                 0,0
1213                         }
1214                 };
1215
1216                 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1217                 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1218                 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1219         }
1220
1221
1222         {
1223                 /* setup foreground task tree */
1224                 static struct dsp_task_tree_control_block bg_task_tree_hdr =  {
1225                         { DSP_SPOS_DC_DC,
1226                           DSP_SPOS_DC_DC,
1227                           DSP_SPOS_DC_DC,
1228                           DSP_SPOS_DC, DSP_SPOS_DC,
1229                           DSP_SPOS_DC, DSP_SPOS_DC,
1230                           DSP_SPOS_DC_DC,
1231                           DSP_SPOS_DC_DC,
1232                           DSP_SPOS_DC_DC,
1233                           DSP_SPOS_DC,DSP_SPOS_DC },
1234
1235                         {
1236                                 NULL_SCB_ADDR,NULL_SCB_ADDR,  /* Set up the background to do nothing */
1237                                 0,
1238                                 BG_TREE_SCB_ADDR + TCBData,
1239                         },
1240
1241                         {
1242                                 9999,0,
1243                                 0,1,
1244                                 0,SPOSCB_ADDR + HFGFlags,
1245                                 0,0,
1246                                 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1247                         },
1248
1249                         {
1250                                 DSP_SPOS_DC,0,
1251                                 DSP_SPOS_DC,DSP_SPOS_DC,
1252                                 DSP_SPOS_DC,DSP_SPOS_DC,
1253                                 DSP_SPOS_DC,DSP_SPOS_DC,
1254                                 DSP_SPOS_DC,DSP_SPOS_DC,
1255                                 DSP_SPOS_DCDC,
1256                                 DSP_SPOS_UU,1,
1257                                 DSP_SPOS_DCDC,
1258                                 DSP_SPOS_DCDC,
1259                                 DSP_SPOS_DCDC,
1260                                 DSP_SPOS_DCDC,
1261                                 DSP_SPOS_DCDC,
1262                                 DSP_SPOS_DCDC,
1263                                 DSP_SPOS_DCDC,
1264                                 DSP_SPOS_DCDC,
1265                                 DSP_SPOS_DCDC,
1266                                 DSP_SPOS_DCDC,
1267                                 DSP_SPOS_DCDC,
1268                                 DSP_SPOS_DCDC,
1269                                 DSP_SPOS_DCDC,
1270                                 DSP_SPOS_DCDC,
1271                                 DSP_SPOS_DCDC,
1272                                 DSP_SPOS_DCDC,
1273                                 DSP_SPOS_DCDC,
1274                                 DSP_SPOS_DCDC,
1275                                 DSP_SPOS_DCDC,
1276                                 DSP_SPOS_DCDC,
1277                                 DSP_SPOS_DCDC,
1278                                 DSP_SPOS_DCDC,
1279                                 DSP_SPOS_DCDC,
1280                                 DSP_SPOS_DCDC,
1281                                 DSP_SPOS_DCDC,
1282                                 DSP_SPOS_DCDC,
1283                                 DSP_SPOS_DCDC,
1284                                 DSP_SPOS_DCDC
1285                         },
1286                         {
1287                                 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1288                                 0,0
1289                         }
1290                 };
1291
1292                 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1293                 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1294                 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1295         }
1296
1297         /* create timing master SCB */
1298         timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1299
1300         /* create the CODEC output task */
1301         codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1302                                                         MASTERMIX_SCB_ADDR,
1303                                                         CODECOUT_SCB_ADDR,timing_master_scb,
1304                                                         SCB_ON_PARENT_SUBLIST_SCB);
1305
1306         if (!codec_out_scb) goto _fail_end;
1307         /* create the master mix SCB */
1308         master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1309                                                         MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1310                                                         codec_out_scb,
1311                                                         SCB_ON_PARENT_SUBLIST_SCB);
1312         ins->master_mix_scb = master_mix_scb;
1313
1314         if (!master_mix_scb) goto _fail_end;
1315
1316         /* create codec in */
1317         codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1318                                                       CODEC_INPUT_BUF1,
1319                                                       CODECIN_SCB_ADDR,codec_out_scb,
1320                                                       SCB_ON_PARENT_NEXT_SCB);
1321         if (!codec_in_scb) goto _fail_end;
1322         ins->codec_in_scb = codec_in_scb;
1323
1324         /* create write back scb */
1325         write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1326                                                               WRITE_BACK_BUF1,WRITE_BACK_SPB,
1327                                                               WRITEBACK_SCB_ADDR,
1328                                                               timing_master_scb,
1329                                                               SCB_ON_PARENT_NEXT_SCB);
1330         if (!write_back_scb) goto _fail_end;
1331
1332         {
1333                 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1334                         0x00020000,
1335                         0x0000ffff
1336                 };
1337
1338                 /* dirty hack ... */
1339                 _dsp_create_task_tree (chip,(u32 *)&mix2_ostream_spb,WRITE_BACK_SPB,2);
1340         }
1341
1342         /* input sample converter */
1343         vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1344                                                                 VARI_DECIMATE_BUF0,
1345                                                                 VARI_DECIMATE_BUF1,
1346                                                                 VARIDECIMATE_SCB_ADDR,
1347                                                                 write_back_scb,
1348                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1349         if (!vari_decimate_scb) goto _fail_end;
1350
1351         /* create the record mixer SCB */
1352         record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1353                                                         MIX_SAMPLE_BUF2,
1354                                                         RECORD_MIXER_SCB_ADDR,
1355                                                         vari_decimate_scb,
1356                                                         SCB_ON_PARENT_SUBLIST_SCB);
1357         ins->record_mixer_scb = record_mix_scb;
1358
1359         if (!record_mix_scb) goto _fail_end;
1360
1361         valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1362
1363         snd_assert (chip->nr_ac97_codecs == 1 || chip->nr_ac97_codecs == 2);
1364
1365         if (chip->nr_ac97_codecs == 1) {
1366                 /* output on slot 5 and 11
1367                    on primary CODEC */
1368                 fifo_addr = 0x20;
1369                 fifo_span = 0x60;
1370
1371                 /* enable slot 5 and 11 */
1372                 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1373         } else {
1374                 /* output on slot 7 and 8
1375                    on secondary CODEC */
1376                 fifo_addr = 0x40;
1377                 fifo_span = 0x10;
1378
1379                 /* enable slot 7 and 8 */
1380                 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1381         }
1382         /* create CODEC tasklet for rear speakers output*/
1383         rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1384                                                              REAR_MIXER_SCB_ADDR,
1385                                                              REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1386                                                              SCB_ON_PARENT_NEXT_SCB);
1387         if (!rear_codec_out_scb) goto _fail_end;
1388
1389
1390         /* create the rear PCM channel  mixer SCB */
1391         rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1392                                                       MIX_SAMPLE_BUF3,
1393                                                       REAR_MIXER_SCB_ADDR,
1394                                                       rear_codec_out_scb,
1395                                                       SCB_ON_PARENT_SUBLIST_SCB);
1396         ins->rear_mix_scb = rear_mix_scb;
1397         if (!rear_mix_scb) goto _fail_end;
1398
1399         if (chip->nr_ac97_codecs == 2) {
1400                 /* create CODEC tasklet for rear Center/LFE output
1401                    slot 6 and 9 on seconadry CODEC */
1402                 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1403                                                                      CLFE_MIXER_SCB_ADDR,
1404                                                                      CLFE_CODEC_SCB_ADDR,
1405                                                                      rear_codec_out_scb,
1406                                                                      SCB_ON_PARENT_NEXT_SCB);
1407                 if (!clfe_codec_out_scb) goto _fail_end;
1408
1409
1410                 /* create the rear PCM channel  mixer SCB */
1411                 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1412                                                                          MIX_SAMPLE_BUF4,
1413                                                                          CLFE_MIXER_SCB_ADDR,
1414                                                                          clfe_codec_out_scb,
1415                                                                          SCB_ON_PARENT_SUBLIST_SCB);
1416                 if (!ins->center_lfe_mix_scb) goto _fail_end;
1417
1418                 /* enable slot 6 and 9 */
1419                 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1420         } else {
1421                 clfe_codec_out_scb = rear_codec_out_scb;
1422                 ins->center_lfe_mix_scb = rear_mix_scb;
1423         }
1424
1425         /* enable slots depending on CODEC configuration */
1426         snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1427
1428         /* the magic snooper */
1429         magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1430                                                              OUTPUT_SNOOP_BUFFER,
1431                                                              codec_out_scb,
1432                                                              clfe_codec_out_scb,
1433                                                              SCB_ON_PARENT_NEXT_SCB);
1434
1435
1436         if (!magic_snoop_scb) goto _fail_end;
1437         ins->ref_snoop_scb = magic_snoop_scb;
1438
1439         /* SP IO access */
1440         if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1441                                               magic_snoop_scb,
1442                                               SCB_ON_PARENT_NEXT_SCB))
1443                 goto _fail_end;
1444
1445         /* SPDIF input sampel rate converter */
1446         src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1447                                                       ins->spdif_in_sample_rate,
1448                                                       SRC_OUTPUT_BUF1,
1449                                                       SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1450                                                       master_mix_scb,
1451                                                       SCB_ON_PARENT_SUBLIST_SCB,1);
1452
1453         if (!src_task_scb) goto _fail_end;
1454         cs46xx_src_unlink(chip,src_task_scb);
1455
1456         /* NOTE: when we now how to detect the SPDIF input
1457            sample rate we will use this SRC to adjust it */
1458         ins->spdif_in_src = src_task_scb;
1459
1460         cs46xx_dsp_async_init(chip,timing_master_scb);
1461         return 0;
1462
1463  _fail_end:
1464         snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n");
1465         return -EINVAL;
1466 }
1467
1468 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1469                                   struct dsp_scb_descriptor * fg_entry)
1470 {
1471         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1472         struct dsp_symbol_entry * s16_async_codec_input_task;
1473         struct dsp_symbol_entry * spdifo_task;
1474         struct dsp_symbol_entry * spdifi_task;
1475         struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1476
1477         s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1478         if (s16_async_codec_input_task == NULL) {
1479                 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1480                 return -EIO;
1481         }
1482         spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1483         if (spdifo_task == NULL) {
1484                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n");
1485                 return -EIO;
1486         }
1487
1488         spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1489         if (spdifi_task == NULL) {
1490                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n");
1491                 return -EIO;
1492         }
1493
1494         {
1495                 /* 0xBC0 */
1496                 struct dsp_spdifoscb spdifo_scb = {
1497                         /* 0 */ DSP_SPOS_UUUU,
1498                         {
1499                                 /* 1 */ 0xb0,
1500                                 /* 2 */ 0,
1501                                 /* 3 */ 0,
1502                                 /* 4 */ 0,
1503                         },
1504                         /* NOTE: the SPDIF output task read samples in mono
1505                            format, the AsynchFGTxSCB task writes to buffer
1506                            in stereo format
1507                         */
1508                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1509                         /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 )  |  0xFFFC,
1510                         /* 7 */ 0,0,
1511                         /* 8 */ 0,
1512                         /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1513                         /* A */ spdifo_task->address,
1514                         SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1515                         {
1516                                 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1517                                 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1518                         },
1519                         /* D */ 0x804c,0,                                                         /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1520                         /* E */ 0x0108,0x0001,                                    /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1521                         /* F */ DSP_SPOS_UUUU                                     /* SPDIFOFree; */
1522                 };
1523
1524                 /* 0xBB0 */
1525                 struct dsp_spdifiscb spdifi_scb = {
1526                         /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1527                         /* 1 */ 0,
1528                         /* 2 */ 0,
1529                         /* 3 */ 1,4000,        /* SPDIFICountLimit SPDIFICount */
1530                         /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1531                         /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1532                         /* 6 */ DSP_SPOS_UUUU,  /* Free3 */
1533                         /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC,  /* Free2 BitCount*/
1534                         /* 8 */ DSP_SPOS_UUUU,  /* TempStatus */
1535                         /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1536                         /* A */ spdifi_task->address,
1537                         SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1538                         /* NOTE: The SPDIF input task write the sample in mono
1539                            format from the HW FIFO, the AsynchFGRxSCB task  reads
1540                            them in stereo
1541                         */
1542                         /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1543                         /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1544                         /* D */ 0x8048,0,
1545                         /* E */ 0x01f0,0x0001,
1546                         /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1547                 };
1548
1549                 /* 0xBA0 */
1550                 struct dsp_async_codec_input_scb async_codec_input_scb = {
1551                         /* 0 */ DSP_SPOS_UUUU,
1552                         /* 1 */ 0,
1553                         /* 2 */ 0,
1554                         /* 3 */ 1,4000,
1555                         /* 4 */ 0x0118,0x0001,
1556                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1557                         /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1558                         /* 7 */ DSP_SPOS_UU,0x3,
1559                         /* 8 */ DSP_SPOS_UUUU,
1560                         /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1561                         /* A */ s16_async_codec_input_task->address,
1562                         HFG_TREE_SCB + AsyncCIOFIFOPointer,
1563
1564                         /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1565                         /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10),  /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1566
1567 #ifdef UseASER1Input
1568                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1569                            Init. 0000:8042: for ASER1
1570                            0000:8044: for ASER2 */
1571                         /* D */ 0x8042,0,
1572
1573                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1574                            Init 1 stero:8050 ASER1
1575                            Init 0  mono:8070 ASER2
1576                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1577                         /* E */ 0x0100,0x0001,
1578
1579 #endif
1580
1581 #ifdef UseASER2Input
1582                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1583                            Init. 0000:8042: for ASER1
1584                            0000:8044: for ASER2 */
1585                         /* D */ 0x8044,0,
1586
1587                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1588                            Init 1 stero:8050 ASER1
1589                            Init 0  mono:8070 ASER2
1590                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1591                         /* E */ 0x0110,0x0001,
1592
1593 #endif
1594
1595                         /* short AsyncCIOutputBufModulo:AsyncCIFree;
1596                            AsyncCIOutputBufModulo: The modulo size for
1597                            the output buffer of this task */
1598                         /* F */ 0, /* DSP_SPOS_UUUU */
1599                 };
1600
1601                 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1602
1603                 snd_assert(spdifo_scb_desc, return -EIO);
1604                 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1605                 snd_assert(spdifi_scb_desc, return -EIO);
1606                 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1607                 snd_assert(async_codec_scb_desc, return -EIO);
1608
1609                 async_codec_scb_desc->parent_scb_ptr = NULL;
1610                 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1611                 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1612                 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1613
1614                 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1615                 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1616                 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1617                 spdifi_scb_desc->task_entry = spdifi_task;
1618
1619                 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1620                 spdifo_scb_desc->next_scb_ptr = fg_entry;
1621                 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1622                 spdifo_scb_desc->task_entry = spdifo_task;
1623
1624                 /* this one is faked, as the parnet of SPDIFO task
1625                    is the FG task tree */
1626                 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1627
1628                 /* for proc fs */
1629                 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1630                 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1631                 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1632
1633                 /* Async MASTER ENABLE, affects both SPDIF input and output */
1634                 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1635         }
1636
1637         return 0;
1638 }
1639
1640
1641 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1642 {
1643         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1644
1645         /* set SPDIF output FIFO slot */
1646         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1647
1648         /* SPDIF output MASTER ENABLE */
1649         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1650
1651         /* right and left validate bit */
1652         /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1653         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1654
1655         /* clear fifo pointer */
1656         cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1657
1658         /* monitor state */
1659         ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1660 }
1661
1662 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1663 {
1664         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1665
1666         /* if hw-ctrl already enabled, turn off to reset logic ... */
1667         cs46xx_dsp_disable_spdif_hw (chip);
1668         udelay(50);
1669
1670         /* set SPDIF output FIFO slot */
1671         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1672
1673         /* SPDIF output MASTER ENABLE */
1674         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1675
1676         /* right and left validate bit */
1677         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1678
1679         /* monitor state */
1680         ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1681
1682         return 0;
1683 }
1684
1685 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1686 {
1687         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1688
1689         /* turn on amplifier */
1690         chip->active_ctrl(chip, 1);
1691         chip->amplifier_ctrl(chip, 1);
1692
1693         snd_assert (ins->asynch_rx_scb == NULL,return -EINVAL);
1694         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1695
1696         mutex_lock(&chip->spos_mutex);
1697
1698         if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1699                 /* time countdown enable */
1700                 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1701                 /* NOTE: 80000005 value is just magic. With all values
1702                    that I've tested this one seem to give the best result.
1703                    Got no explication why. (Benny) */
1704
1705                 /* SPDIF input MASTER ENABLE */
1706                 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1707
1708                 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1709         }
1710
1711         /* create and start the asynchronous receiver SCB */
1712         ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1713                                                                 ASYNCRX_SCB_ADDR,
1714                                                                 SPDIFI_SCB_INST,
1715                                                                 SPDIFI_IP_OUTPUT_BUFFER1,
1716                                                                 ins->spdif_in_src,
1717                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1718
1719         spin_lock_irq(&chip->reg_lock);
1720
1721         /* reset SPDIF input sample buffer pointer */
1722         /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1723           (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1724
1725         /* reset FIFO ptr */
1726         /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1727         cs46xx_src_link(chip,ins->spdif_in_src);
1728
1729         /* unmute SRC volume */
1730         cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1731
1732         spin_unlock_irq(&chip->reg_lock);
1733
1734         /* set SPDIF input sample rate and unmute
1735            NOTE: only 48khz support for SPDIF input this time */
1736         /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1737
1738         /* monitor state */
1739         ins->spdif_status_in = 1;
1740         mutex_unlock(&chip->spos_mutex);
1741
1742         return 0;
1743 }
1744
1745 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1746 {
1747         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1748
1749         snd_assert (ins->asynch_rx_scb != NULL, return -EINVAL);
1750         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1751
1752         mutex_lock(&chip->spos_mutex);
1753
1754         /* Remove the asynchronous receiver SCB */
1755         cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1756         ins->asynch_rx_scb = NULL;
1757
1758         cs46xx_src_unlink(chip,ins->spdif_in_src);
1759
1760         /* monitor state */
1761         ins->spdif_status_in = 0;
1762         mutex_unlock(&chip->spos_mutex);
1763
1764         /* restore amplifier */
1765         chip->active_ctrl(chip, -1);
1766         chip->amplifier_ctrl(chip, -1);
1767
1768         return 0;
1769 }
1770
1771 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1772 {
1773         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1774
1775         snd_assert (ins->pcm_input == NULL,return -EINVAL);
1776         snd_assert (ins->ref_snoop_scb != NULL,return -EINVAL);
1777
1778         mutex_lock(&chip->spos_mutex);
1779         ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1780                                                   "PCMSerialInput_Wave");
1781         mutex_unlock(&chip->spos_mutex);
1782
1783         return 0;
1784 }
1785
1786 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1787 {
1788         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1789
1790         snd_assert (ins->pcm_input != NULL,return -EINVAL);
1791
1792         mutex_lock(&chip->spos_mutex);
1793         cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1794         ins->pcm_input = NULL;
1795         mutex_unlock(&chip->spos_mutex);
1796
1797         return 0;
1798 }
1799
1800 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1801 {
1802         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1803
1804         snd_assert (ins->adc_input == NULL,return -EINVAL);
1805         snd_assert (ins->codec_in_scb != NULL,return -EINVAL);
1806
1807         mutex_lock(&chip->spos_mutex);
1808         ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1809                                                   "PCMSerialInput_ADC");
1810         mutex_unlock(&chip->spos_mutex);
1811
1812         return 0;
1813 }
1814
1815 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1816 {
1817         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1818
1819         snd_assert (ins->adc_input != NULL,return -EINVAL);
1820
1821         mutex_lock(&chip->spos_mutex);
1822         cs46xx_dsp_remove_scb (chip,ins->adc_input);
1823         ins->adc_input = NULL;
1824         mutex_unlock(&chip->spos_mutex);
1825
1826         return 0;
1827 }
1828
1829 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1830 {
1831         u32 temp;
1832         int  i;
1833
1834         /* santiy check the parameters.  (These numbers are not 100% correct.  They are
1835            a rough guess from looking at the controller spec.) */
1836         if (address < 0x8000 || address >= 0x9000)
1837                 return -EINVAL;
1838
1839         /* initialize the SP_IO_WRITE SCB with the data. */
1840         temp = ( address << 16 ) | ( address & 0x0000FFFF);   /* offset 0 <-- address2 : address1 */
1841
1842         snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR      << 2), temp);
1843         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1844         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1845
1846         /* Poke this location to tell the task to start */
1847         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1848
1849         /* Verify that the task ran */
1850         for (i=0; i<25; i++) {
1851                 udelay(125);
1852
1853                 temp =  snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1854                 if (temp == 0x00000000)
1855                         break;
1856         }
1857
1858         if (i == 25) {
1859                 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n");
1860                 return -EBUSY;
1861         }
1862
1863         return 0;
1864 }
1865
1866 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1867 {
1868         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1869         struct dsp_scb_descriptor * scb;
1870
1871         mutex_lock(&chip->spos_mutex);
1872
1873         /* main output */
1874         scb = ins->master_mix_scb->sub_list_ptr;
1875         while (scb != ins->the_null_scb) {
1876                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1877                 scb = scb->next_scb_ptr;
1878         }
1879
1880         /* rear output */
1881         scb = ins->rear_mix_scb->sub_list_ptr;
1882         while (scb != ins->the_null_scb) {
1883                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1884                 scb = scb->next_scb_ptr;
1885         }
1886
1887         ins->dac_volume_left = left;
1888         ins->dac_volume_right = right;
1889
1890         mutex_unlock(&chip->spos_mutex);
1891
1892         return 0;
1893 }
1894
1895 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1896 {
1897         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1898
1899         mutex_lock(&chip->spos_mutex);
1900
1901         if (ins->asynch_rx_scb != NULL)
1902                 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1903                                            left,right);
1904
1905         ins->spdif_input_volume_left = left;
1906         ins->spdif_input_volume_right = right;
1907
1908         mutex_unlock(&chip->spos_mutex);
1909
1910         return 0;
1911 }