sound/oss/esssolo1.c

   1 /****************************************************************************/
   2
   3 /*
   4  *      esssolo1.c  --  ESS Technology Solo1 (ES1946) audio driver.
   5  *
   6  *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
   7  *
   8  *      This program is free software; you can redistribute it and/or modify
   9  *      it under the terms of the GNU General Public License as published by
  10  *      the Free Software Foundation; either version 2 of the License, or
  11  *      (at your option) any later version.
  12  *
  13  *      This program is distributed in the hope that it will be useful,
  14  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *      GNU General Public License for more details.
  17  *
  18  *      You should have received a copy of the GNU General Public License
  19  *      along with this program; if not, write to the Free Software
  20  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Module command line parameters:
  23  *   none so far
  24  *
  25  *  Supported devices:
  26  *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
  27  *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
  28  *  /dev/midi   simple MIDI UART interface, no ioctl
  29  *
  30  *  Revision history
  31  *    10.11.1998   0.1   Initial release (without any hardware)
  32  *    22.03.1999   0.2   cinfo.blocks should be reset after GETxPTR ioctl.
  33  *                       reported by Johan Maes <joma@telindus.be>
  34  *                       return EAGAIN instead of EBUSY when O_NONBLOCK
  35  *                       read/write cannot be executed
  36  *    07.04.1999   0.3   implemented the following ioctl's: SOUND_PCM_READ_RATE,
  37  *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
  38  *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
  39  *    15.06.1999   0.4   Fix bad allocation bug.
  40  *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
  41  *    28.06.1999   0.5   Add pci_set_master
  42  *    12.08.1999   0.6   Fix MIDI UART crashing the driver
  43  *                       Changed mixer semantics from OSS documented
  44  *                       behaviour to OSS "code behaviour".
  45  *                       Recording might actually work now.
  46  *                       The real DDMA controller address register is at PCI config
  47  *                       0x60, while the register at 0x18 is used as a placeholder
  48  *                       register for BIOS address allocation. This register
  49  *                       is supposed to be copied into 0x60, according
  50  *                       to the Solo1 datasheet. When I do that, I can access
  51  *                       the DDMA registers except the mask bit, which
  52  *                       is stuck at 1. When I copy the contents of 0x18 +0x10
  53  *                       to the DDMA base register, everything seems to work.
  54  *                       The fun part is that the Windows Solo1 driver doesn't
  55  *                       seem to do these tricks.
  56  *                       Bugs remaining: plops and clicks when starting/stopping playback
  57  *    31.08.1999   0.7   add spin_lock_init
  58  *                       replaced current->state = x with set_current_state(x)
  59  *    03.09.1999   0.8   change read semantics for MIDI to match
  60  *                       OSS more closely; remove possible wakeup race
  61  *    07.10.1999   0.9   Fix initialization; complain if sequencer writes time out
  62  *                       Revised resource grabbing for the FM synthesizer
  63  *    28.10.1999   0.10  More waitqueue races fixed
  64  *    09.12.1999   0.11  Work around stupid Alpha port issue (virt_to_bus(kmalloc(GFP_DMA)) > 16M)
  65  *                       Disabling recording on Alpha
  66  *    12.01.2000   0.12  Prevent some ioctl's from returning bad count values on underrun/overrun;
  67  *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
  68  *                       Integrated (aka redid 8-)) APM support patch by Zach Brown
  69  *    07.02.2000   0.13  Use pci_alloc_consistent and pci_register_driver
  70  *    19.02.2000   0.14  Use pci_dma_supported to determine if recording should be disabled
  71  *    13.03.2000   0.15  Reintroduce initialization of a couple of PCI config space registers
  72  *    21.11.2000   0.16  Initialize dma buffers in poll, otherwise poll may return a bogus mask
  73  *    12.12.2000   0.17  More dma buffer initializations, patch from
  74  *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
  75  *    31.01.2001   0.18  Register/Unregister gameport, original patch from
  76  *                       Nathaniel Daw <daw@cs.cmu.edu>
  77  *                       Fix SETTRIGGER non OSS API conformity
  78  *    10.03.2001         provide abs function, prevent picking up a bogus kernel macro
  79  *                       for abs. Bug report by Andrew Morton <andrewm@uow.edu.au>
  80  *    15.05.2001         pci_enable_device moved, return values in probe cleaned
  81  *                       up. Marcus Meissner <mm@caldera.de>
  82  *    22.05.2001   0.19  more cleanups, changed PM to PCI 2.4 style, got rid
  83  *                       of global list of devices, using pci device data.
  84  *                       Marcus Meissner <mm@caldera.de>
  85  *    03.01.2003   0.20  open_mode fixes from Georg Acher <acher@in.tum.de>
  86  */
  87
  88 /*****************************************************************************/
  89
  90 #include <linux/interrupt.h>
  91 #include <linux/module.h>
  92 #include <linux/string.h>
  93 #include <linux/ioport.h>
  94 #include <linux/sched.h>
  95 #include <linux/delay.h>
  96 #include <linux/sound.h>
  97 #include <linux/slab.h>
  98 #include <linux/soundcard.h>
  99 #include <linux/pci.h>
 100 #include <linux/bitops.h>
 101 #include <linux/init.h>
 102 #include <linux/poll.h>
 103 #include <linux/spinlock.h>
 104 #include <linux/smp_lock.h>
 105 #include <linux/gameport.h>
 106 #include <linux/wait.h>
 107 #include <linux/dma-mapping.h>
 108 #include <linux/mutex.h>
 109
 110
 111 #include <asm/io.h>
 112 #include <asm/page.h>
 113 #include <asm/uaccess.h>
 114
 115 #include "dm.h"
 116
 117 /* --------------------------------------------------------------------- */
 118
 119 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 120
 121 /* --------------------------------------------------------------------- */
 122
 123 #ifndef PCI_VENDOR_ID_ESS
 124 #define PCI_VENDOR_ID_ESS         0x125d
 125 #endif
 126 #ifndef PCI_DEVICE_ID_ESS_SOLO1
 127 #define PCI_DEVICE_ID_ESS_SOLO1   0x1969
 128 #endif
 129
 130 #define SOLO1_MAGIC  ((PCI_VENDOR_ID_ESS<<16)|PCI_DEVICE_ID_ESS_SOLO1)
 131
 132 #define DDMABASE_OFFSET           0    /* chip bug workaround kludge */
 133 #define DDMABASE_EXTENT           16
 134
 135 #define IOBASE_EXTENT             16
 136 #define SBBASE_EXTENT             16
 137 #define VCBASE_EXTENT             (DDMABASE_EXTENT+DDMABASE_OFFSET)
 138 #define MPUBASE_EXTENT            4
 139 #define GPBASE_EXTENT             4
 140 #define GAMEPORT_EXTENT           4
 141
 142 #define FMSYNTH_EXTENT            4
 143
 144 /* MIDI buffer sizes */
 145
 146 #define MIDIINBUF  256
 147 #define MIDIOUTBUF 256
 148
 149 #define FMODE_MIDI_SHIFT 3
 150 #define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
 151 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 152
 153 #define FMODE_DMFM 0x10
 154
 155 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 156 #define SUPPORT_JOYSTICK 1
 157 #endif
 158
 159 static struct pci_driver solo1_driver;
 160
 161 /* --------------------------------------------------------------------- */
 162
 163 struct solo1_state {
 164         /* magic */
 165         unsigned int magic;
 166
 167         /* the corresponding pci_dev structure */
 168         struct pci_dev *dev;
 169
 170         /* soundcore stuff */
 171         int dev_audio;
 172         int dev_mixer;
 173         int dev_midi;
 174         int dev_dmfm;
 175
 176         /* hardware resources */
 177         unsigned long iobase, sbbase, vcbase, ddmabase, mpubase; /* long for SPARC */
 178         unsigned int irq;
 179
 180         /* mixer registers */
 181         struct {
 182                 unsigned short vol[10];
 183                 unsigned int recsrc;
 184                 unsigned int modcnt;
 185                 unsigned short micpreamp;
 186         } mix;
 187
 188         /* wave stuff */
 189         unsigned fmt;
 190         unsigned channels;
 191         unsigned rate;
 192         unsigned char clkdiv;
 193         unsigned ena;
 194
 195         spinlock_t lock;
 196         struct mutex open_mutex;
 197         mode_t open_mode;
 198         wait_queue_head_t open_wait;
 199
 200         struct dmabuf {
 201                 void *rawbuf;
 202                 dma_addr_t dmaaddr;
 203                 unsigned buforder;
 204                 unsigned numfrag;
 205                 unsigned fragshift;
 206                 unsigned hwptr, swptr;
 207                 unsigned total_bytes;
 208                 int count;
 209                 unsigned error; /* over/underrun */
 210                 wait_queue_head_t wait;
 211                 /* redundant, but makes calculations easier */
 212                 unsigned fragsize;
 213                 unsigned dmasize;
 214                 unsigned fragsamples;
 215                 /* OSS stuff */
 216                 unsigned mapped:1;
 217                 unsigned ready:1;
 218                 unsigned endcleared:1;
 219                 unsigned enabled:1;
 220                 unsigned ossfragshift;
 221                 int ossmaxfrags;
 222                 unsigned subdivision;
 223         } dma_dac, dma_adc;
 224
 225         /* midi stuff */
 226         struct {
 227                 unsigned ird, iwr, icnt;
 228                 unsigned ord, owr, ocnt;
 229                 wait_queue_head_t iwait;
 230                 wait_queue_head_t owait;
 231                 struct timer_list timer;
 232                 unsigned char ibuf[MIDIINBUF];
 233                 unsigned char obuf[MIDIOUTBUF];
 234         } midi;
 235
 236 #if SUPPORT_JOYSTICK
 237         struct gameport *gameport;
 238 #endif
 239 };
 240
 241 /* --------------------------------------------------------------------- */
 242
 243 static inline void write_seq(struct solo1_state *s, unsigned char data)
 244 {
 245         int i;
 246         unsigned long flags;
 247
 248         /* the local_irq_save stunt is to send the data within the command window */
 249         for (i = 0; i < 0xffff; i++) {
 250                 local_irq_save(flags);
 251                 if (!(inb(s->sbbase+0xc) & 0x80)) {
 252                         outb(data, s->sbbase+0xc);
 253                         local_irq_restore(flags);
 254                         return;
 255                 }
 256                 local_irq_restore(flags);
 257         }
 258         printk(KERN_ERR "esssolo1: write_seq timeout\n");
 259         outb(data, s->sbbase+0xc);
 260 }
 261
 262 static inline int read_seq(struct solo1_state *s, unsigned char *data)
 263 {
 264         int i;
 265
 266         if (!data)
 267                 return 0;
 268         for (i = 0; i < 0xffff; i++)
 269                 if (inb(s->sbbase+0xe) & 0x80) {
 270                         *data = inb(s->sbbase+0xa);
 271                         return 1;
 272                 }
 273         printk(KERN_ERR "esssolo1: read_seq timeout\n");
 274         return 0;
 275 }
 276
 277 static inline int reset_ctrl(struct solo1_state *s)
 278 {
 279         int i;
 280
 281         outb(3, s->sbbase+6); /* clear sequencer and FIFO */
 282         udelay(10);
 283         outb(0, s->sbbase+6);
 284         for (i = 0; i < 0xffff; i++)
 285                 if (inb(s->sbbase+0xe) & 0x80)
 286                         if (inb(s->sbbase+0xa) == 0xaa) {
 287                                 write_seq(s, 0xc6); /* enter enhanced mode */
 288                                 return 1;
 289                         }
 290         return 0;
 291 }
 292
 293 static void write_ctrl(struct solo1_state *s, unsigned char reg, unsigned char data)
 294 {
 295         write_seq(s, reg);
 296         write_seq(s, data);
 297 }
 298
 299 #if 0 /* unused */
 300 static unsigned char read_ctrl(struct solo1_state *s, unsigned char reg)
 301 {
 302         unsigned char r;
 303
 304         write_seq(s, 0xc0);
 305         write_seq(s, reg);
 306         read_seq(s, &r);
 307         return r;
 308 }
 309 #endif /* unused */
 310
 311 static void write_mixer(struct solo1_state *s, unsigned char reg, unsigned char data)
 312 {
 313         outb(reg, s->sbbase+4);
 314         outb(data, s->sbbase+5);
 315 }
 316
 317 static unsigned char read_mixer(struct solo1_state *s, unsigned char reg)
 318 {
 319         outb(reg, s->sbbase+4);
 320         return inb(s->sbbase+5);
 321 }
 322
 323 /* --------------------------------------------------------------------- */
 324
 325 static inline unsigned ld2(unsigned int x)
 326 {
 327         unsigned r = 0;
 328
 329         if (x >= 0x10000) {
 330                 x >>= 16;
 331                 r += 16;
 332         }
 333         if (x >= 0x100) {
 334                 x >>= 8;
 335                 r += 8;
 336         }
 337         if (x >= 0x10) {
 338                 x >>= 4;
 339                 r += 4;
 340         }
 341         if (x >= 4) {
 342                 x >>= 2;
 343                 r += 2;
 344         }
 345         if (x >= 2)
 346                 r++;
 347         return r;
 348 }
 349
 350 /* --------------------------------------------------------------------- */
 351
 352 static inline void stop_dac(struct solo1_state *s)
 353 {
 354         unsigned long flags;
 355
 356         spin_lock_irqsave(&s->lock, flags);
 357         s->ena &= ~FMODE_WRITE;
 358         write_mixer(s, 0x78, 0x10);
 359         spin_unlock_irqrestore(&s->lock, flags);
 360 }
 361
 362 static void start_dac(struct solo1_state *s)
 363 {
 364         unsigned long flags;
 365
 366         spin_lock_irqsave(&s->lock, flags);
 367         if (!(s->ena & FMODE_WRITE) && (s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
 368                 s->ena |= FMODE_WRITE;
 369                 write_mixer(s, 0x78, 0x12);
 370                 udelay(10);
 371                 write_mixer(s, 0x78, 0x13);
 372         }
 373         spin_unlock_irqrestore(&s->lock, flags);
 374 }
 375
 376 static inline void stop_adc(struct solo1_state *s)
 377 {
 378         unsigned long flags;
 379
 380         spin_lock_irqsave(&s->lock, flags);
 381         s->ena &= ~FMODE_READ;
 382         write_ctrl(s, 0xb8, 0xe);
 383         spin_unlock_irqrestore(&s->lock, flags);
 384 }
 385
 386 static void start_adc(struct solo1_state *s)
 387 {
 388         unsigned long flags;
 389
 390         spin_lock_irqsave(&s->lock, flags);
 391         if (!(s->ena & FMODE_READ) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
 392             && s->dma_adc.ready) {
 393                 s->ena |= FMODE_READ;
 394                 write_ctrl(s, 0xb8, 0xf);
 395 #if 0
 396                 printk(KERN_DEBUG "solo1: DMAbuffer: 0x%08lx\n", (long)s->dma_adc.rawbuf);
 397                 printk(KERN_DEBUG "solo1: DMA: mask: 0x%02x cnt: 0x%04x addr: 0x%08x  stat: 0x%02x\n",
 398                        inb(s->ddmabase+0xf), inw(s->ddmabase+4), inl(s->ddmabase), inb(s->ddmabase+8));
 399 #endif
 400                 outb(0, s->ddmabase+0xd); /* master reset */
 401                 outb(1, s->ddmabase+0xf);  /* mask */
 402                 outb(0x54/*0x14*/, s->ddmabase+0xb);  /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
 403                 outl(virt_to_bus(s->dma_adc.rawbuf), s->ddmabase);
 404                 outw(s->dma_adc.dmasize-1, s->ddmabase+4);
 405                 outb(0, s->ddmabase+0xf);
 406         }
 407         spin_unlock_irqrestore(&s->lock, flags);
 408 #if 0
 409         printk(KERN_DEBUG "solo1: start DMA: reg B8: 0x%02x  SBstat: 0x%02x\n"
 410                KERN_DEBUG "solo1: DMA: stat: 0x%02x  cnt: 0x%04x  mask: 0x%02x\n",
 411                read_ctrl(s, 0xb8), inb(s->sbbase+0xc),
 412                inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->ddmabase+0xf));
 413         printk(KERN_DEBUG "solo1: A1: 0x%02x  A2: 0x%02x  A4: 0x%02x  A5: 0x%02x  A8: 0x%02x\n"
 414                KERN_DEBUG "solo1: B1: 0x%02x  B2: 0x%02x  B4: 0x%02x  B7: 0x%02x  B8: 0x%02x  B9: 0x%02x\n",
 415                read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
 416                read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb4), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8),
 417                read_ctrl(s, 0xb9));
 418 #endif
 419 }
 420
 421 /* --------------------------------------------------------------------- */
 422
 423 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
 424 #define DMABUF_MINORDER 1
 425
 426 static inline void dealloc_dmabuf(struct solo1_state *s, struct dmabuf *db)
 427 {
 428         struct page *page, *pend;
 429
 430         if (db->rawbuf) {
 431                 /* undo marking the pages as reserved */
 432                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 433                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 434                         ClearPageReserved(page);
 435                 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
 436         }
 437         db->rawbuf = NULL;
 438         db->mapped = db->ready = 0;
 439 }
 440
 441 static int prog_dmabuf(struct solo1_state *s, struct dmabuf *db)
 442 {
 443         int order;
 444         unsigned bytespersec;
 445         unsigned bufs, sample_shift = 0;
 446         struct page *page, *pend;
 447
 448         db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
 449         if (!db->rawbuf) {
 450                 db->ready = db->mapped = 0;
 451                 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 452                         if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
 453                                 break;
 454                 if (!db->rawbuf)
 455                         return -ENOMEM;
 456                 db->buforder = order;
 457                 /* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */
 458                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 459                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 460                         SetPageReserved(page);
 461         }
 462         if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 463                 sample_shift++;
 464         if (s->channels > 1)
 465                 sample_shift++;
 466         bytespersec = s->rate << sample_shift;
 467         bufs = PAGE_SIZE << db->buforder;
 468         if (db->ossfragshift) {
 469                 if ((1000 << db->ossfragshift) < bytespersec)
 470                         db->fragshift = ld2(bytespersec/1000);
 471                 else
 472                         db->fragshift = db->ossfragshift;
 473         } else {
 474                 db->fragshift = ld2(bytespersec/100/(db->subdivision ? db->subdivision : 1));
 475                 if (db->fragshift < 3)
 476                         db->fragshift = 3;
 477         }
 478         db->numfrag = bufs >> db->fragshift;
 479         while (db->numfrag < 4 && db->fragshift > 3) {
 480                 db->fragshift--;
 481                 db->numfrag = bufs >> db->fragshift;
 482         }
 483         db->fragsize = 1 << db->fragshift;
 484         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 485                 db->numfrag = db->ossmaxfrags;
 486         db->fragsamples = db->fragsize >> sample_shift;
 487         db->dmasize = db->numfrag << db->fragshift;
 488         db->enabled = 1;
 489         return 0;
 490 }
 491
 492 static inline int prog_dmabuf_adc(struct solo1_state *s)
 493 {
 494         unsigned long va;
 495         int c;
 496
 497         stop_adc(s);
 498         /* check if PCI implementation supports 24bit busmaster DMA */
 499         if (s->dev->dma_mask > 0xffffff)
 500                 return -EIO;
 501         if ((c = prog_dmabuf(s, &s->dma_adc)))
 502                 return c;
 503         va = s->dma_adc.dmaaddr;
 504         if ((va & ~((1<<24)-1)))
 505                 panic("solo1: buffer above 16M boundary");
 506         outb(0, s->ddmabase+0xd);  /* clear */
 507         outb(1, s->ddmabase+0xf); /* mask */
 508         /*outb(0, s->ddmabase+8);*/  /* enable (enable is active low!) */
 509         outb(0x54, s->ddmabase+0xb);  /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
 510         outl(va, s->ddmabase);
 511         outw(s->dma_adc.dmasize-1, s->ddmabase+4);
 512         c = - s->dma_adc.fragsamples;
 513         write_ctrl(s, 0xa4, c);
 514         write_ctrl(s, 0xa5, c >> 8);
 515         outb(0, s->ddmabase+0xf);
 516         s->dma_adc.ready = 1;
 517         return 0;
 518 }
 519
 520 static int prog_dmabuf_dac(struct solo1_state *s)
 521 {
 522         unsigned long va;
 523         int c;
 524
 525         stop_dac(s);
 526         if ((c = prog_dmabuf(s, &s->dma_dac)))
 527                 return c;
 528         memset(s->dma_dac.rawbuf, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80, s->dma_dac.dmasize); /* almost correct for U16 */
 529         va = s->dma_dac.dmaaddr;
 530         if ((va ^ (va + s->dma_dac.dmasize - 1)) & ~((1<<20)-1))
 531                 panic("solo1: buffer crosses 1M boundary");
 532         outl(va, s->iobase);
 533         /* warning: s->dma_dac.dmasize & 0xffff must not be zero! i.e. this limits us to a 32k buffer */
 534         outw(s->dma_dac.dmasize, s->iobase+4);
 535         c = - s->dma_dac.fragsamples;
 536         write_mixer(s, 0x74, c);
 537         write_mixer(s, 0x76, c >> 8);
 538         outb(0xa, s->iobase+6);
 539         s->dma_dac.ready = 1;
 540         return 0;
 541 }
 542
 543 static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
 544 {
 545         if (bptr + len > bsize) {
 546                 unsigned x = bsize - bptr;
 547                 memset(((char *)buf) + bptr, c, x);
 548                 bptr = 0;
 549                 len -= x;
 550         }
 551         memset(((char *)buf) + bptr, c, len);
 552 }
 553
 554 /* call with spinlock held! */
 555
 556 static void solo1_update_ptr(struct solo1_state *s)
 557 {
 558         int diff;
 559         unsigned hwptr;
 560
 561         /* update ADC pointer */
 562         if (s->ena & FMODE_READ) {
 563                 hwptr = (s->dma_adc.dmasize - 1 - inw(s->ddmabase+4)) % s->dma_adc.dmasize;
 564                 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
 565                 s->dma_adc.hwptr = hwptr;
 566                 s->dma_adc.total_bytes += diff;
 567                 s->dma_adc.count += diff;
 568 #if 0
 569                 printk(KERN_DEBUG "solo1: rd: hwptr %u swptr %u dmasize %u count %u\n",
 570                        s->dma_adc.hwptr, s->dma_adc.swptr, s->dma_adc.dmasize, s->dma_adc.count);
 571 #endif
 572                 if (s->dma_adc.mapped) {
 573                         if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
 574                                 wake_up(&s->dma_adc.wait);
 575                 } else {
 576                         if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
 577                                 s->ena &= ~FMODE_READ;
 578                                 write_ctrl(s, 0xb8, 0xe);
 579                                 s->dma_adc.error++;
 580                         }
 581                         if (s->dma_adc.count > 0)
 582                                 wake_up(&s->dma_adc.wait);
 583                 }
 584         }
 585         /* update DAC pointer */
 586         if (s->ena & FMODE_WRITE) {
 587                 hwptr = (s->dma_dac.dmasize - inw(s->iobase+4)) % s->dma_dac.dmasize;
 588                 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
 589                 s->dma_dac.hwptr = hwptr;
 590                 s->dma_dac.total_bytes += diff;
 591 #if 0
 592                 printk(KERN_DEBUG "solo1: wr: hwptr %u swptr %u dmasize %u count %u\n",
 593                        s->dma_dac.hwptr, s->dma_dac.swptr, s->dma_dac.dmasize, s->dma_dac.count);
 594 #endif
 595                 if (s->dma_dac.mapped) {
 596                         s->dma_dac.count += diff;
 597                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
 598                                 wake_up(&s->dma_dac.wait);
 599                 } else {
 600                         s->dma_dac.count -= diff;
 601                         if (s->dma_dac.count <= 0) {
 602                                 s->ena &= ~FMODE_WRITE;
 603                                 write_mixer(s, 0x78, 0x12);
 604                                 s->dma_dac.error++;
 605                         } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
 606                                 clear_advance(s->dma_dac.rawbuf, s->dma_dac.dmasize, s->dma_dac.swptr,
 607                                               s->dma_dac.fragsize, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80);
 608                                 s->dma_dac.endcleared = 1;
 609                         }
 610                         if (s->dma_dac.count < (signed)s->dma_dac.dmasize)
 611                                 wake_up(&s->dma_dac.wait);
 612                 }
 613         }
 614 }
 615
 616 /* --------------------------------------------------------------------- */
 617
 618 static void prog_codec(struct solo1_state *s)
 619 {
 620         unsigned long flags;
 621         int fdiv, filter;
 622         unsigned char c;
 623
 624         reset_ctrl(s);
 625         write_seq(s, 0xd3);
 626         /* program sampling rates */
 627         filter = s->rate * 9 / 20; /* Set filter roll-off to 90% of rate/2 */
 628         fdiv = 256 - 7160000 / (filter * 82);
 629         spin_lock_irqsave(&s->lock, flags);
 630         write_ctrl(s, 0xa1, s->clkdiv);
 631         write_ctrl(s, 0xa2, fdiv);
 632         write_mixer(s, 0x70, s->clkdiv);
 633         write_mixer(s, 0x72, fdiv);
 634         /* program ADC parameters */
 635         write_ctrl(s, 0xb8, 0xe);
 636         write_ctrl(s, 0xb9, /*0x1*/0);
 637         write_ctrl(s, 0xa8, (s->channels > 1) ? 0x11 : 0x12);
 638         c = 0xd0;
 639         if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 640                 c |= 0x04;
 641         if (s->fmt & (AFMT_S16_LE | AFMT_S8))
 642                 c |= 0x20;
 643         if (s->channels > 1)
 644                 c ^= 0x48;
 645         write_ctrl(s, 0xb7, (c & 0x70) | 1);
 646         write_ctrl(s, 0xb7, c);
 647         write_ctrl(s, 0xb1, 0x50);
 648         write_ctrl(s, 0xb2, 0x50);
 649         /* program DAC parameters */
 650         c = 0x40;
 651         if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 652                 c |= 1;
 653         if (s->fmt & (AFMT_S16_LE | AFMT_S8))
 654                 c |= 4;
 655         if (s->channels > 1)
 656                 c |= 2;
 657         write_mixer(s, 0x7a, c);
 658         write_mixer(s, 0x78, 0x10);
 659         s->ena = 0;
 660         spin_unlock_irqrestore(&s->lock, flags);
 661 }
 662
 663 /* --------------------------------------------------------------------- */
 664
 665 static const char invalid_magic[] = KERN_CRIT "solo1: invalid magic value\n";
 666
 667 #define VALIDATE_STATE(s)                         \
 668 ({                                                \
 669         if (!(s) || (s)->magic != SOLO1_MAGIC) { \
 670                 printk(invalid_magic);            \
 671                 return -ENXIO;                    \
 672         }                                         \
 673 })
 674
 675 /* --------------------------------------------------------------------- */
 676
 677 static int mixer_ioctl(struct solo1_state *s, unsigned int cmd, unsigned long arg)
 678 {
 679         static const unsigned int mixer_src[8] = {
 680                 SOUND_MASK_MIC, SOUND_MASK_MIC, SOUND_MASK_CD, SOUND_MASK_VOLUME,
 681                 SOUND_MASK_MIC, 0, SOUND_MASK_LINE, 0
 682         };
 683         static const unsigned char mixtable1[SOUND_MIXER_NRDEVICES] = {
 684                 [SOUND_MIXER_PCM]     = 1,   /* voice */
 685                 [SOUND_MIXER_SYNTH]   = 2,   /* FM */
 686                 [SOUND_MIXER_CD]      = 3,   /* CD */
 687                 [SOUND_MIXER_LINE]    = 4,   /* Line */
 688                 [SOUND_MIXER_LINE1]   = 5,   /* AUX */
 689                 [SOUND_MIXER_MIC]     = 6,   /* Mic */
 690                 [SOUND_MIXER_LINE2]   = 7,   /* Mono in */
 691                 [SOUND_MIXER_SPEAKER] = 8,   /* Speaker */
 692                 [SOUND_MIXER_RECLEV]  = 9,   /* Recording level */
 693                 [SOUND_MIXER_VOLUME]  = 10   /* Master Volume */
 694         };
 695         static const unsigned char mixreg[] = {
 696                 0x7c,   /* voice */
 697                 0x36,   /* FM */
 698                 0x38,   /* CD */
 699                 0x3e,   /* Line */
 700                 0x3a,   /* AUX */
 701                 0x1a,   /* Mic */
 702                 0x6d    /* Mono in */
 703         };
 704         unsigned char l, r, rl, rr, vidx;
 705         int i, val;
 706         int __user *p = (int __user *)arg;
 707
 708         VALIDATE_STATE(s);
 709
 710         if (cmd == SOUND_MIXER_PRIVATE1) {
 711                 /* enable/disable/query mixer preamp */
 712                 if (get_user(val, p))
 713                         return -EFAULT;
 714                 if (val != -1) {
 715                         val = val ? 0xff : 0xf7;
 716                         write_mixer(s, 0x7d, (read_mixer(s, 0x7d) | 0x08) & val);
 717                 }
 718                 val = (read_mixer(s, 0x7d) & 0x08) ? 1 : 0;
 719                 return put_user(val, p);
 720         }
 721         if (cmd == SOUND_MIXER_PRIVATE2) {
 722                 /* enable/disable/query spatializer */
 723                 if (get_user(val, p))
 724                         return -EFAULT;
 725                 if (val != -1) {
 726                         val &= 0x3f;
 727                         write_mixer(s, 0x52, val);
 728                         write_mixer(s, 0x50, val ? 0x08 : 0);
 729                 }
 730                 return put_user(read_mixer(s, 0x52), p);
 731         }
 732         if (cmd == SOUND_MIXER_INFO) {
 733                 mixer_info info;
 734                 strncpy(info.id, "Solo1", sizeof(info.id));
 735                 strncpy(info.name, "ESS Solo1", sizeof(info.name));
 736                 info.modify_counter = s->mix.modcnt;
 737                 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
 738                         return -EFAULT;
 739                 return 0;
 740         }
 741         if (cmd == SOUND_OLD_MIXER_INFO) {
 742                 _old_mixer_info info;
 743                 strncpy(info.id, "Solo1", sizeof(info.id));
 744                 strncpy(info.name, "ESS Solo1", sizeof(info.name));
 745                 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
 746                         return -EFAULT;
 747                 return 0;
 748         }
 749         if (cmd == OSS_GETVERSION)
 750                 return put_user(SOUND_VERSION, p);
 751         if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
 752                 return -EINVAL;
 753         if (_SIOC_DIR(cmd) == _SIOC_READ) {
 754                 switch (_IOC_NR(cmd)) {
 755                 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
 756                         return put_user(mixer_src[read_mixer(s, 0x1c) & 7], p);
 757
 758                 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
 759                         return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
 760                                         SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
 761                                         SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV |
 762                                         SOUND_MASK_SPEAKER, p);
 763
 764                 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
 765                         return put_user(SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_VOLUME, p);
 766
 767                 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
 768                         return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
 769                                         SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
 770                                         SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV, p);
 771
 772                 case SOUND_MIXER_CAPS:
 773                         return put_user(SOUND_CAP_EXCL_INPUT, p);
 774
 775                 default:
 776                         i = _IOC_NR(cmd);
 777                         if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
 778                                 return -EINVAL;
 779                         return put_user(s->mix.vol[vidx-1], p);
 780                 }
 781         }
 782         if (_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE))
 783                 return -EINVAL;
 784         s->mix.modcnt++;
 785         switch (_IOC_NR(cmd)) {
 786         case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
 787 #if 0
 788                 {
 789                         static const unsigned char regs[] = {
 790                                 0x1c, 0x1a, 0x36, 0x38, 0x3a, 0x3c, 0x3e, 0x60, 0x62, 0x6d, 0x7c
 791                         };
 792                         int i;
 793
 794                         for (i = 0; i < sizeof(regs); i++)
 795                                 printk(KERN_DEBUG "solo1: mixer reg 0x%02x: 0x%02x\n",
 796                                        regs[i], read_mixer(s, regs[i]));
 797                         printk(KERN_DEBUG "solo1: ctrl reg 0x%02x: 0x%02x\n",
 798                                0xb4, read_ctrl(s, 0xb4));
 799                 }
 800 #endif
 801                 if (get_user(val, p))
 802                         return -EFAULT;
 803                 i = hweight32(val);
 804                 if (i == 0)
 805                         return 0;
 806                 else if (i > 1)
 807                         val &= ~mixer_src[read_mixer(s, 0x1c) & 7];
 808                 for (i = 0; i < 8; i++) {
 809                         if (mixer_src[i] & val)
 810                                 break;
 811                 }
 812                 if (i > 7)
 813                         return 0;
 814                 write_mixer(s, 0x1c, i);
 815                 return 0;
 816
 817         case SOUND_MIXER_VOLUME:
 818                 if (get_user(val, p))
 819                         return -EFAULT;
 820                 l = val & 0xff;
 821                 if (l > 100)
 822                         l = 100;
 823                 r = (val >> 8) & 0xff;
 824                 if (r > 100)
 825                         r = 100;
 826                 if (l < 6) {
 827                         rl = 0x40;
 828                         l = 0;
 829                 } else {
 830                         rl = (l * 2 - 11) / 3;
 831                         l = (rl * 3 + 11) / 2;
 832                 }
 833                 if (r < 6) {
 834                         rr = 0x40;
 835                         r = 0;
 836                 } else {
 837                         rr = (r * 2 - 11) / 3;
 838                         r = (rr * 3 + 11) / 2;
 839                 }
 840                 write_mixer(s, 0x60, rl);
 841                 write_mixer(s, 0x62, rr);
 842 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 843                 s->mix.vol[9] = ((unsigned int)r << 8) | l;
 844 #else
 845                 s->mix.vol[9] = val;
 846 #endif
 847                 return put_user(s->mix.vol[9], p);
 848
 849         case SOUND_MIXER_SPEAKER:
 850                 if (get_user(val, p))
 851                         return -EFAULT;
 852                 l = val & 0xff;
 853                 if (l > 100)
 854                         l = 100;
 855                 else if (l < 2)
 856                         l = 2;
 857                 rl = (l - 2) / 14;
 858                 l = rl * 14 + 2;
 859                 write_mixer(s, 0x3c, rl);
 860 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 861                 s->mix.vol[7] = l * 0x101;
 862 #else
 863                 s->mix.vol[7] = val;
 864 #endif
 865                 return put_user(s->mix.vol[7], p);
 866
 867         case SOUND_MIXER_RECLEV:
 868                 if (get_user(val, p))
 869                         return -EFAULT;
 870                 l = (val << 1) & 0x1fe;
 871                 if (l > 200)
 872                         l = 200;
 873                 else if (l < 5)
 874                         l = 5;
 875                 r = (val >> 7) & 0x1fe;
 876                 if (r > 200)
 877                         r = 200;
 878                 else if (r < 5)
 879                         r = 5;
 880                 rl = (l - 5) / 13;
 881                 rr = (r - 5) / 13;
 882                 r = (rl * 13 + 5) / 2;
 883                 l = (rr * 13 + 5) / 2;
 884                 write_ctrl(s, 0xb4, (rl << 4) | rr);
 885 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 886                 s->mix.vol[8] = ((unsigned int)r << 8) | l;
 887 #else
 888                 s->mix.vol[8] = val;
 889 #endif
 890                 return put_user(s->mix.vol[8], p);
 891
 892         default:
 893                 i = _IOC_NR(cmd);
 894                 if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
 895                         return -EINVAL;
 896                 if (get_user(val, p))
 897                         return -EFAULT;
 898                 l = (val << 1) & 0x1fe;
 899                 if (l > 200)
 900                         l = 200;
 901                 else if (l < 5)
 902                         l = 5;
 903                 r = (val >> 7) & 0x1fe;
 904                 if (r > 200)
 905                         r = 200;
 906                 else if (r < 5)
 907                         r = 5;
 908                 rl = (l - 5) / 13;
 909                 rr = (r - 5) / 13;
 910                 r = (rl * 13 + 5) / 2;
 911                 l = (rr * 13 + 5) / 2;
 912                 write_mixer(s, mixreg[vidx-1], (rl << 4) | rr);
 913 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 914                 s->mix.vol[vidx-1] = ((unsigned int)r << 8) | l;
 915 #else
 916                 s->mix.vol[vidx-1] = val;
 917 #endif
 918                 return put_user(s->mix.vol[vidx-1], p);
 919         }
 920 }
 921
 922 /* --------------------------------------------------------------------- */
 923
 924 static int solo1_open_mixdev(struct inode *inode, struct file *file)
 925 {
 926         unsigned int minor = iminor(inode);
 927         struct solo1_state *s = NULL;
 928         struct pci_dev *pci_dev = NULL;
 929
 930         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
 931                 struct pci_driver *drvr;
 932                 drvr = pci_dev_driver (pci_dev);
 933                 if (drvr != &solo1_driver)
 934                         continue;
 935                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
 936                 if (!s)
 937                         continue;
 938                 if (s->dev_mixer == minor)
 939                         break;
 940         }
 941         if (!s)
 942                 return -ENODEV;
 943         VALIDATE_STATE(s);
 944         file->private_data = s;
 945         return nonseekable_open(inode, file);
 946 }
 947
 948 static int solo1_release_mixdev(struct inode *inode, struct file *file)
 949 {
 950         struct solo1_state *s = (struct solo1_state *)file->private_data;
 951
 952         VALIDATE_STATE(s);
 953         return 0;
 954 }
 955
 956 static int solo1_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
 957 {
 958         return mixer_ioctl((struct solo1_state *)file->private_data, cmd, arg);
 959 }
 960
 961 static /*const*/ struct file_operations solo1_mixer_fops = {
 962         .owner          = THIS_MODULE,
 963         .llseek         = no_llseek,
 964         .ioctl          = solo1_ioctl_mixdev,
 965         .open           = solo1_open_mixdev,
 966         .release        = solo1_release_mixdev,
 967 };
 968
 969 /* --------------------------------------------------------------------- */
 970
 971 static int drain_dac(struct solo1_state *s, int nonblock)
 972 {
 973         DECLARE_WAITQUEUE(wait, current);
 974         unsigned long flags;
 975         int count;
 976         unsigned tmo;
 977
 978         if (s->dma_dac.mapped)
 979                 return 0;
 980         add_wait_queue(&s->dma_dac.wait, &wait);
 981         for (;;) {
 982                 set_current_state(TASK_INTERRUPTIBLE);
 983                 spin_lock_irqsave(&s->lock, flags);
 984                 count = s->dma_dac.count;
 985                 spin_unlock_irqrestore(&s->lock, flags);
 986                 if (count <= 0)
 987                         break;
 988                 if (signal_pending(current))
 989                         break;
 990                 if (nonblock) {
 991                         remove_wait_queue(&s->dma_dac.wait, &wait);
 992                         set_current_state(TASK_RUNNING);
 993                         return -EBUSY;
 994                 }
 995                 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->rate;
 996                 if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 997                         tmo >>= 1;
 998                 if (s->channels > 1)
 999                         tmo >>= 1;
1000                 if (!schedule_timeout(tmo + 1))
1001                         printk(KERN_DEBUG "solo1: dma timed out??\n");
1002         }
1003         remove_wait_queue(&s->dma_dac.wait, &wait);
1004         set_current_state(TASK_RUNNING);
1005         if (signal_pending(current))
1006                 return -ERESTARTSYS;
1007         return 0;
1008 }
1009
1010 /* --------------------------------------------------------------------- */
1011
1012 static ssize_t solo1_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1013 {
1014         struct solo1_state *s = (struct solo1_state *)file->private_data;
1015         DECLARE_WAITQUEUE(wait, current);
1016         ssize_t ret;
1017         unsigned long flags;
1018         unsigned swptr;
1019         int cnt;
1020
1021         VALIDATE_STATE(s);
1022         if (s->dma_adc.mapped)
1023                 return -ENXIO;
1024         if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1025                 return ret;
1026         if (!access_ok(VERIFY_WRITE, buffer, count))
1027                 return -EFAULT;
1028         ret = 0;
1029         add_wait_queue(&s->dma_adc.wait, &wait);
1030         while (count > 0) {
1031                 spin_lock_irqsave(&s->lock, flags);
1032                 swptr = s->dma_adc.swptr;
1033                 cnt = s->dma_adc.dmasize-swptr;
1034                 if (s->dma_adc.count < cnt)
1035                         cnt = s->dma_adc.count;
1036                 if (cnt <= 0)
1037                         __set_current_state(TASK_INTERRUPTIBLE);
1038                 spin_unlock_irqrestore(&s->lock, flags);
1039                 if (cnt > count)
1040                         cnt = count;
1041 #ifdef DEBUGREC
1042                 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x  DMAstat: 0x%02x  DMAcnt: 0x%04x  SBstat: 0x%02x  cnt: %u\n",
1043                        read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc), cnt);
1044 #endif
1045                 if (cnt <= 0) {
1046                         if (s->dma_adc.enabled)
1047                                 start_adc(s);
1048 #ifdef DEBUGREC
1049                         printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x  A2: 0x%02x  A4: 0x%02x  A5: 0x%02x  A8: 0x%02x\n"
1050                                KERN_DEBUG "solo1_read: regs: B1: 0x%02x  B2: 0x%02x  B7: 0x%02x  B8: 0x%02x  B9: 0x%02x\n"
1051                                KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1052                                KERN_DEBUG "solo1_read: SBstat: 0x%02x  cnt: %u\n",
1053                                read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
1054                                read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
1055                                inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
1056 #endif
1057                         if (inb(s->ddmabase+15) & 1)
1058                                 printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1059                         if (file->f_flags & O_NONBLOCK) {
1060                                 if (!ret)
1061                                         ret = -EAGAIN;
1062                                 break;
1063                         }
1064                         schedule();
1065 #ifdef DEBUGREC
1066                         printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x  A2: 0x%02x  A4: 0x%02x  A5: 0x%02x  A8: 0x%02x\n"
1067                                KERN_DEBUG "solo1_read: regs: B1: 0x%02x  B2: 0x%02x  B7: 0x%02x  B8: 0x%02x  B9: 0x%02x\n"
1068                                KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1069                                KERN_DEBUG "solo1_read: SBstat: 0x%02x  cnt: %u\n",
1070                                read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
1071                                read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
1072                                inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
1073 #endif
1074                         if (signal_pending(current)) {
1075                                 if (!ret)
1076                                         ret = -ERESTARTSYS;
1077                                 break;
1078                         }
1079                         continue;
1080                 }
1081                 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1082                         if (!ret)
1083                                 ret = -EFAULT;
1084                         break;
1085                 }
1086                 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1087                 spin_lock_irqsave(&s->lock, flags);
1088                 s->dma_adc.swptr = swptr;
1089                 s->dma_adc.count -= cnt;
1090                 spin_unlock_irqrestore(&s->lock, flags);
1091                 count -= cnt;
1092                 buffer += cnt;
1093                 ret += cnt;
1094                 if (s->dma_adc.enabled)
1095                         start_adc(s);
1096 #ifdef DEBUGREC
1097                 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x  DMAstat: 0x%02x  DMAcnt: 0x%04x  SBstat: 0x%02x\n",
1098                        read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc));
1099 #endif
1100         }
1101         remove_wait_queue(&s->dma_adc.wait, &wait);
1102         set_current_state(TASK_RUNNING);
1103         return ret;
1104 }
1105
1106 static ssize_t solo1_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1107 {
1108         struct solo1_state *s = (struct solo1_state *)file->private_data;
1109         DECLARE_WAITQUEUE(wait, current);
1110         ssize_t ret;
1111         unsigned long flags;
1112         unsigned swptr;
1113         int cnt;
1114
1115         VALIDATE_STATE(s);
1116         if (s->dma_dac.mapped)
1117                 return -ENXIO;
1118         if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
1119                 return ret;
1120         if (!access_ok(VERIFY_READ, buffer, count))
1121                 return -EFAULT;
1122 #if 0
1123         printk(KERN_DEBUG "solo1_write: reg 70: 0x%02x  71: 0x%02x  72: 0x%02x  74: 0x%02x  76: 0x%02x  78: 0x%02x  7A: 0x%02x\n"
1124                KERN_DEBUG "solo1_write: DMA: addr: 0x%08x  cnt: 0x%04x  stat: 0x%02x  SBstat: 0x%02x\n",
1125                read_mixer(s, 0x70), read_mixer(s, 0x71), read_mixer(s, 0x72), read_mixer(s, 0x74), read_mixer(s, 0x76),
1126                read_mixer(s, 0x78), read_mixer(s, 0x7a), inl(s->iobase), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
1127         printk(KERN_DEBUG "solo1_write: reg 78: 0x%02x  reg 7A: 0x%02x  DMAcnt: 0x%04x  DMAstat: 0x%02x  SBstat: 0x%02x\n",
1128                read_mixer(s, 0x78), read_mixer(s, 0x7a), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
1129 #endif
1130         ret = 0;
1131         add_wait_queue(&s->dma_dac.wait, &wait);
1132         while (count > 0) {
1133                 spin_lock_irqsave(&s->lock, flags);
1134                 if (s->dma_dac.count < 0) {
1135                         s->dma_dac.count = 0;
1136                         s->dma_dac.swptr = s->dma_dac.hwptr;
1137                 }
1138                 swptr = s->dma_dac.swptr;
1139                 cnt = s->dma_dac.dmasize-swptr;
1140                 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1141                         cnt = s->dma_dac.dmasize - s->dma_dac.count;
1142                 if (cnt <= 0)
1143                         __set_current_state(TASK_INTERRUPTIBLE);
1144                 spin_unlock_irqrestore(&s->lock, flags);
1145                 if (cnt > count)
1146                         cnt = count;
1147                 if (cnt <= 0) {
1148                         if (s->dma_dac.enabled)
1149                                 start_dac(s);
1150                         if (file->f_flags & O_NONBLOCK) {
1151                                 if (!ret)
1152                                         ret = -EAGAIN;
1153                                 break;
1154                         }
1155                         schedule();
1156                         if (signal_pending(current)) {
1157                                 if (!ret)
1158                                         ret = -ERESTARTSYS;
1159                                 break;
1160                         }
1161                         continue;
1162                 }
1163                 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1164                         if (!ret)
1165                                 ret = -EFAULT;
1166                         break;
1167                 }
1168                 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1169                 spin_lock_irqsave(&s->lock, flags);
1170                 s->dma_dac.swptr = swptr;
1171                 s->dma_dac.count += cnt;
1172                 s->dma_dac.endcleared = 0;
1173                 spin_unlock_irqrestore(&s->lock, flags);
1174                 count -= cnt;
1175                 buffer += cnt;
1176                 ret += cnt;
1177                 if (s->dma_dac.enabled)
1178                         start_dac(s);
1179         }
1180         remove_wait_queue(&s->dma_dac.wait, &wait);
1181         set_current_state(TASK_RUNNING);
1182         return ret;
1183 }
1184
1185 /* No kernel lock - we have our own spinlock */
1186 static unsigned int solo1_poll(struct file *file, struct poll_table_struct *wait)
1187 {
1188         struct solo1_state *s = (struct solo1_state *)file->private_data;
1189         unsigned long flags;
1190         unsigned int mask = 0;
1191
1192         VALIDATE_STATE(s);
1193         if (file->f_mode & FMODE_WRITE) {
1194                 if (!s->dma_dac.ready && prog_dmabuf_dac(s))
1195                         return 0;
1196                 poll_wait(file, &s->dma_dac.wait, wait);
1197         }
1198         if (file->f_mode & FMODE_READ) {
1199                 if (!s->dma_adc.ready && prog_dmabuf_adc(s))
1200                         return 0;
1201                 poll_wait(file, &s->dma_adc.wait, wait);
1202         }
1203         spin_lock_irqsave(&s->lock, flags);
1204         solo1_update_ptr(s);
1205         if (file->f_mode & FMODE_READ) {
1206                 if (s->dma_adc.mapped) {
1207                         if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1208                                 mask |= POLLIN | POLLRDNORM;
1209                 } else {
1210                         if (s->dma_adc.count > 0)
1211                                 mask |= POLLIN | POLLRDNORM;
1212                 }
1213         }
1214         if (file->f_mode & FMODE_WRITE) {
1215                 if (s->dma_dac.mapped) {
1216                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1217                                 mask |= POLLOUT | POLLWRNORM;
1218                 } else {
1219                         if ((signed)s->dma_dac.dmasize > s->dma_dac.count)
1220                                 mask |= POLLOUT | POLLWRNORM;
1221                 }
1222         }
1223         spin_unlock_irqrestore(&s->lock, flags);
1224         return mask;
1225 }
1226
1227
1228 static int solo1_mmap(struct file *file, struct vm_area_struct *vma)
1229 {
1230         struct solo1_state *s = (struct solo1_state *)file->private_data;
1231         struct dmabuf *db;
1232         int ret = -EINVAL;
1233         unsigned long size;
1234
1235         VALIDATE_STATE(s);
1236         lock_kernel();
1237         if (vma->vm_flags & VM_WRITE) {
1238                 if ((ret = prog_dmabuf_dac(s)) != 0)
1239                         goto out;
1240                 db = &s->dma_dac;
1241         } else if (vma->vm_flags & VM_READ) {
1242                 if ((ret = prog_dmabuf_adc(s)) != 0)
1243                         goto out;
1244                 db = &s->dma_adc;
1245         } else
1246                 goto out;
1247         ret = -EINVAL;
1248         if (vma->vm_pgoff != 0)
1249                 goto out;
1250         size = vma->vm_end - vma->vm_start;
1251         if (size > (PAGE_SIZE << db->buforder))
1252                 goto out;
1253         ret = -EAGAIN;
1254         if (remap_pfn_range(vma, vma->vm_start,
1255                                 virt_to_phys(db->rawbuf) >> PAGE_SHIFT,
1256                                 size, vma->vm_page_prot))
1257                 goto out;
1258         db->mapped = 1;
1259         ret = 0;
1260 out:
1261         unlock_kernel();
1262         return ret;
1263 }
1264
1265 static int solo1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1266 {
1267         struct solo1_state *s = (struct solo1_state *)file->private_data;
1268         unsigned long flags;
1269         audio_buf_info abinfo;
1270         count_info cinfo;
1271         int val, mapped, ret, count;
1272         int div1, div2;
1273         unsigned rate1, rate2;
1274         void __user *argp = (void __user *)arg;
1275         int __user *p = argp;
1276
1277         VALIDATE_STATE(s);
1278         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1279                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1280         switch (cmd) {
1281         case OSS_GETVERSION:
1282                 return put_user(SOUND_VERSION, p);
1283
1284         case SNDCTL_DSP_SYNC:
1285                 if (file->f_mode & FMODE_WRITE)
1286                         return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1287                 return 0;
1288
1289         case SNDCTL_DSP_SETDUPLEX:
1290                 return 0;
1291
1292         case SNDCTL_DSP_GETCAPS:
1293                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1294
1295         case SNDCTL_DSP_RESET:
1296                 if (file->f_mode & FMODE_WRITE) {
1297                         stop_dac(s);
1298                         synchronize_irq(s->irq);
1299                         s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1300                 }
1301                 if (file->f_mode & FMODE_READ) {
1302                         stop_adc(s);
1303                         synchronize_irq(s->irq);
1304                         s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1305                 }
1306                 prog_codec(s);
1307                 return 0;
1308
1309         case SNDCTL_DSP_SPEED:
1310                 if (get_user(val, p))
1311                         return -EFAULT;
1312                 if (val >= 0) {
1313                         stop_adc(s);
1314                         stop_dac(s);
1315                         s->dma_adc.ready = s->dma_dac.ready = 0;
1316                         /* program sampling rates */
1317                         if (val > 48000)
1318                                 val = 48000;
1319                         if (val < 6300)
1320                                 val = 6300;
1321                         div1 = (768000 + val / 2) / val;
1322                         rate1 = (768000 + div1 / 2) / div1;
1323                         div1 = -div1;
1324                         div2 = (793800 + val / 2) / val;
1325                         rate2 = (793800 + div2 / 2) / div2;
1326                         div2 = (-div2) & 0x7f;
1327                         if (abs(val - rate2) < abs(val - rate1)) {
1328                                 rate1 = rate2;
1329                                 div1 = div2;
1330                         }
1331                         s->rate = rate1;
1332                         s->clkdiv = div1;
1333                         prog_codec(s);
1334                 }
1335                 return put_user(s->rate, p);
1336
1337         case SNDCTL_DSP_STEREO:
1338                 if (get_user(val, p))
1339                         return -EFAULT;
1340                 stop_adc(s);
1341                 stop_dac(s);
1342                 s->dma_adc.ready = s->dma_dac.ready = 0;
1343                 /* program channels */
1344                 s->channels = val ? 2 : 1;
1345                 prog_codec(s);
1346                 return 0;
1347
1348         case SNDCTL_DSP_CHANNELS:
1349                 if (get_user(val, p))
1350                         return -EFAULT;
1351                 if (val != 0) {
1352                         stop_adc(s);
1353                         stop_dac(s);
1354                         s->dma_adc.ready = s->dma_dac.ready = 0;
1355                         /* program channels */
1356                         s->channels = (val >= 2) ? 2 : 1;
1357                         prog_codec(s);
1358                 }
1359                 return put_user(s->channels, p);
1360
1361         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1362                 return put_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, p);
1363
1364         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1365                 if (get_user(val, p))
1366                         return -EFAULT;
1367                 if (val != AFMT_QUERY) {
1368                         stop_adc(s);
1369                         stop_dac(s);
1370                         s->dma_adc.ready = s->dma_dac.ready = 0;
1371                         /* program format */
1372                         if (val != AFMT_S16_LE && val != AFMT_U16_LE &&
1373                             val != AFMT_S8 && val != AFMT_U8)
1374                                 val = AFMT_U8;
1375                         s->fmt = val;
1376                         prog_codec(s);
1377                 }
1378                 return put_user(s->fmt, p);
1379
1380         case SNDCTL_DSP_POST:
1381                 return 0;
1382
1383         case SNDCTL_DSP_GETTRIGGER:
1384                 val = 0;
1385                 if (file->f_mode & s->ena & FMODE_READ)
1386                         val |= PCM_ENABLE_INPUT;
1387                 if (file->f_mode & s->ena & FMODE_WRITE)
1388                         val |= PCM_ENABLE_OUTPUT;
1389                 return put_user(val, p);
1390
1391         case SNDCTL_DSP_SETTRIGGER:
1392                 if (get_user(val, p))
1393                         return -EFAULT;
1394                 if (file->f_mode & FMODE_READ) {
1395                         if (val & PCM_ENABLE_INPUT) {
1396                                 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1397                                         return ret;
1398                                 s->dma_dac.enabled = 1;
1399                                 start_adc(s);
1400                                 if (inb(s->ddmabase+15) & 1)
1401                                         printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1402                         } else {
1403                                 s->dma_dac.enabled = 0;
1404                                 stop_adc(s);
1405                         }
1406                 }
1407                 if (file->f_mode & FMODE_WRITE) {
1408                         if (val & PCM_ENABLE_OUTPUT) {
1409                                 if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
1410                                         return ret;
1411                                 s->dma_dac.enabled = 1;
1412                                 start_dac(s);
1413                         } else {
1414                                 s->dma_dac.enabled = 0;
1415                                 stop_dac(s);
1416                         }
1417                 }
1418                 return 0;
1419
1420         case SNDCTL_DSP_GETOSPACE:
1421                 if (!(file->f_mode & FMODE_WRITE))
1422                         return -EINVAL;
1423                 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1424                         return val;
1425                 spin_lock_irqsave(&s->lock, flags);
1426                 solo1_update_ptr(s);
1427                 abinfo.fragsize = s->dma_dac.fragsize;
1428                 count = s->dma_dac.count;
1429                 if (count < 0)
1430                         count = 0;
1431                 abinfo.bytes = s->dma_dac.dmasize - count;
1432                 abinfo.fragstotal = s->dma_dac.numfrag;
1433                 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1434                 spin_unlock_irqrestore(&s->lock, flags);
1435                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1436
1437         case SNDCTL_DSP_GETISPACE:
1438                 if (!(file->f_mode & FMODE_READ))
1439                         return -EINVAL;
1440                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1441                         return val;
1442                 spin_lock_irqsave(&s->lock, flags);
1443                 solo1_update_ptr(s);
1444                 abinfo.fragsize = s->dma_adc.fragsize;
1445                 abinfo.bytes = s->dma_adc.count;
1446                 abinfo.fragstotal = s->dma_adc.numfrag;
1447                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1448                 spin_unlock_irqrestore(&s->lock, flags);
1449                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1450
1451         case SNDCTL_DSP_NONBLOCK:
1452                 file->f_flags |= O_NONBLOCK;
1453                 return 0;
1454
1455         case SNDCTL_DSP_GETODELAY:
1456                 if (!(file->f_mode & FMODE_WRITE))
1457                         return -EINVAL;
1458                 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1459                         return val;
1460                 spin_lock_irqsave(&s->lock, flags);
1461                 solo1_update_ptr(s);
1462                 count = s->dma_dac.count;
1463                 spin_unlock_irqrestore(&s->lock, flags);
1464                 if (count < 0)
1465                         count = 0;
1466                 return put_user(count, p);
1467
1468         case SNDCTL_DSP_GETIPTR:
1469                 if (!(file->f_mode & FMODE_READ))
1470                         return -EINVAL;
1471                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1472                         return val;
1473                 spin_lock_irqsave(&s->lock, flags);
1474                 solo1_update_ptr(s);
1475                 cinfo.bytes = s->dma_adc.total_bytes;
1476                 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1477                 cinfo.ptr = s->dma_adc.hwptr;
1478                 if (s->dma_adc.mapped)
1479                         s->dma_adc.count &= s->dma_adc.fragsize-1;
1480                 spin_unlock_irqrestore(&s->lock, flags);
1481                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1482                         return -EFAULT;
1483                 return 0;
1484
1485         case SNDCTL_DSP_GETOPTR:
1486                 if (!(file->f_mode & FMODE_WRITE))
1487                         return -EINVAL;
1488                 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1489                         return val;
1490                 spin_lock_irqsave(&s->lock, flags);
1491                 solo1_update_ptr(s);
1492                 cinfo.bytes = s->dma_dac.total_bytes;
1493                 count = s->dma_dac.count;
1494                 if (count < 0)
1495                         count = 0;
1496                 cinfo.blocks = count >> s->dma_dac.fragshift;
1497                 cinfo.ptr = s->dma_dac.hwptr;
1498                 if (s->dma_dac.mapped)
1499                         s->dma_dac.count &= s->dma_dac.fragsize-1;
1500                 spin_unlock_irqrestore(&s->lock, flags);
1501 #if 0
1502                 printk(KERN_DEBUG "esssolo1: GETOPTR: bytes %u blocks %u ptr %u, buforder %u numfrag %u fragshift %u\n"
1503                        KERN_DEBUG "esssolo1: swptr %u count %u fragsize %u dmasize %u fragsamples %u\n",
1504                        cinfo.bytes, cinfo.blocks, cinfo.ptr, s->dma_dac.buforder, s->dma_dac.numfrag, s->dma_dac.fragshift,
1505                        s->dma_dac.swptr, s->dma_dac.count, s->dma_dac.fragsize, s->dma_dac.dmasize, s->dma_dac.fragsamples);
1506 #endif
1507                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1508                         return -EFAULT;
1509                 return 0;
1510
1511         case SNDCTL_DSP_GETBLKSIZE:
1512                 if (file->f_mode & FMODE_WRITE) {
1513                         if ((val = prog_dmabuf_dac(s)))
1514                                 return val;
1515                         return put_user(s->dma_dac.fragsize, p);
1516                 }
1517                 if ((val = prog_dmabuf_adc(s)))
1518                         return val;
1519                 return put_user(s->dma_adc.fragsize, p);
1520
1521         case SNDCTL_DSP_SETFRAGMENT:
1522                 if (get_user(val, p))
1523                         return -EFAULT;
1524                 if (file->f_mode & FMODE_READ) {
1525                         s->dma_adc.ossfragshift = val & 0xffff;
1526                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1527                         if (s->dma_adc.ossfragshift < 4)
1528                                 s->dma_adc.ossfragshift = 4;
1529                         if (s->dma_adc.ossfragshift > 15)
1530                                 s->dma_adc.ossfragshift = 15;
1531                         if (s->dma_adc.ossmaxfrags < 4)
1532                                 s->dma_adc.ossmaxfrags = 4;
1533                 }
1534                 if (file->f_mode & FMODE_WRITE) {
1535                         s->dma_dac.ossfragshift = val & 0xffff;
1536                         s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1537                         if (s->dma_dac.ossfragshift < 4)
1538                                 s->dma_dac.ossfragshift = 4;
1539                         if (s->dma_dac.ossfragshift > 15)
1540                                 s->dma_dac.ossfragshift = 15;
1541                         if (s->dma_dac.ossmaxfrags < 4)
1542                                 s->dma_dac.ossmaxfrags = 4;
1543                 }
1544                 return 0;
1545
1546         case SNDCTL_DSP_SUBDIVIDE:
1547                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1548                     (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1549                         return -EINVAL;
1550                 if (get_user(val, p))
1551                         return -EFAULT;
1552                 if (val != 1 && val != 2 && val != 4)
1553                         return -EINVAL;
1554                 if (file->f_mode & FMODE_READ)
1555                         s->dma_adc.subdivision = val;
1556                 if (file->f_mode & FMODE_WRITE)
1557                         s->dma_dac.subdivision = val;
1558                 return 0;
1559
1560         case SOUND_PCM_READ_RATE:
1561                 return put_user(s->rate, p);
1562
1563         case SOUND_PCM_READ_CHANNELS:
1564                 return put_user(s->channels, p);
1565
1566         case SOUND_PCM_READ_BITS:
1567                 return put_user((s->fmt & (AFMT_S8|AFMT_U8)) ? 8 : 16, p);
1568
1569         case SOUND_PCM_WRITE_FILTER:
1570         case SNDCTL_DSP_SETSYNCRO:
1571         case SOUND_PCM_READ_FILTER:
1572                 return -EINVAL;
1573
1574         }
1575         return mixer_ioctl(s, cmd, arg);
1576 }
1577
1578 static int solo1_release(struct inode *inode, struct file *file)
1579 {
1580         struct solo1_state *s = (struct solo1_state *)file->private_data;
1581
1582         VALIDATE_STATE(s);
1583         lock_kernel();
1584         if (file->f_mode & FMODE_WRITE)
1585                 drain_dac(s, file->f_flags & O_NONBLOCK);
1586         mutex_lock(&s->open_mutex);
1587         if (file->f_mode & FMODE_WRITE) {
1588                 stop_dac(s);
1589                 outb(0, s->iobase+6);  /* disable DMA */
1590                 dealloc_dmabuf(s, &s->dma_dac);
1591         }
1592         if (file->f_mode & FMODE_READ) {
1593                 stop_adc(s);
1594                 outb(1, s->ddmabase+0xf); /* mask DMA channel */
1595                 outb(0, s->ddmabase+0xd); /* DMA master clear */
1596                 dealloc_dmabuf(s, &s->dma_adc);
1597         }
1598         s->open_mode &= ~(FMODE_READ | FMODE_WRITE);
1599         wake_up(&s->open_wait);
1600         mutex_unlock(&s->open_mutex);
1601         unlock_kernel();
1602         return 0;
1603 }
1604
1605 static int solo1_open(struct inode *inode, struct file *file)
1606 {
1607         unsigned int minor = iminor(inode);
1608         DECLARE_WAITQUEUE(wait, current);
1609         struct solo1_state *s = NULL;
1610         struct pci_dev *pci_dev = NULL;
1611
1612         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
1613                 struct pci_driver *drvr;
1614
1615                 drvr = pci_dev_driver(pci_dev);
1616                 if (drvr != &solo1_driver)
1617                         continue;
1618                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
1619                 if (!s)
1620                         continue;
1621                 if (!((s->dev_audio ^ minor) & ~0xf))
1622                         break;
1623         }
1624         if (!s)
1625                 return -ENODEV;
1626         VALIDATE_STATE(s);
1627         file->private_data = s;
1628         /* wait for device to become free */
1629         mutex_lock(&s->open_mutex);
1630         while (s->open_mode & (FMODE_READ | FMODE_WRITE)) {
1631                 if (file->f_flags & O_NONBLOCK) {
1632                         mutex_unlock(&s->open_mutex);
1633                         return -EBUSY;
1634                 }
1635                 add_wait_queue(&s->open_wait, &wait);
1636                 __set_current_state(TASK_INTERRUPTIBLE);
1637                 mutex_unlock(&s->open_mutex);
1638                 schedule();
1639                 remove_wait_queue(&s->open_wait, &wait);
1640                 set_current_state(TASK_RUNNING);
1641                 if (signal_pending(current))
1642                         return -ERESTARTSYS;
1643                 mutex_lock(&s->open_mutex);
1644         }
1645         s->fmt = AFMT_U8;
1646         s->channels = 1;
1647         s->rate = 8000;
1648         s->clkdiv = 96 | 0x80;
1649         s->ena = 0;
1650         s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1651         s->dma_adc.enabled = 1;
1652         s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1653         s->dma_dac.enabled = 1;
1654         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1655         mutex_unlock(&s->open_mutex);
1656         prog_codec(s);
1657         return nonseekable_open(inode, file);
1658 }
1659
1660 static /*const*/ struct file_operations solo1_audio_fops = {
1661         .owner          = THIS_MODULE,
1662         .llseek         = no_llseek,
1663         .read           = solo1_read,
1664         .write          = solo1_write,
1665         .poll           = solo1_poll,
1666         .ioctl          = solo1_ioctl,
1667         .mmap           = solo1_mmap,
1668         .open           = solo1_open,
1669         .release        = solo1_release,
1670 };
1671
1672 /* --------------------------------------------------------------------- */
1673
1674 /* hold spinlock for the following! */
1675 static void solo1_handle_midi(struct solo1_state *s)
1676 {
1677         unsigned char ch;
1678         int wake;
1679
1680         if (!(s->mpubase))
1681                 return;
1682         wake = 0;
1683         while (!(inb(s->mpubase+1) & 0x80)) {
1684                 ch = inb(s->mpubase);
1685                 if (s->midi.icnt < MIDIINBUF) {
1686                         s->midi.ibuf[s->midi.iwr] = ch;
1687                         s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1688                         s->midi.icnt++;
1689                 }
1690                 wake = 1;
1691         }
1692         if (wake)
1693                 wake_up(&s->midi.iwait);
1694         wake = 0;
1695         while (!(inb(s->mpubase+1) & 0x40) && s->midi.ocnt > 0) {
1696                 outb(s->midi.obuf[s->midi.ord], s->mpubase);
1697                 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1698                 s->midi.ocnt--;
1699                 if (s->midi.ocnt < MIDIOUTBUF-16)
1700                         wake = 1;
1701         }
1702         if (wake)
1703                 wake_up(&s->midi.owait);
1704 }
1705
1706 static irqreturn_t solo1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1707 {
1708         struct solo1_state *s = (struct solo1_state *)dev_id;
1709         unsigned int intsrc;
1710
1711         /* fastpath out, to ease interrupt sharing */
1712         intsrc = inb(s->iobase+7); /* get interrupt source(s) */
1713         if (!intsrc)
1714                 return IRQ_NONE;
1715         (void)inb(s->sbbase+0xe);  /* clear interrupt */
1716         spin_lock(&s->lock);
1717         /* clear audio interrupts first */
1718         if (intsrc & 0x20)
1719                 write_mixer(s, 0x7a, read_mixer(s, 0x7a) & 0x7f);
1720         solo1_update_ptr(s);
1721         solo1_handle_midi(s);
1722         spin_unlock(&s->lock);
1723         return IRQ_HANDLED;
1724 }
1725
1726 static void solo1_midi_timer(unsigned long data)
1727 {
1728         struct solo1_state *s = (struct solo1_state *)data;
1729         unsigned long flags;
1730
1731         spin_lock_irqsave(&s->lock, flags);
1732         solo1_handle_midi(s);
1733         spin_unlock_irqrestore(&s->lock, flags);
1734         s->midi.timer.expires = jiffies+1;
1735         add_timer(&s->midi.timer);
1736 }
1737
1738 /* --------------------------------------------------------------------- */
1739
1740 static ssize_t solo1_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1741 {
1742         struct solo1_state *s = (struct solo1_state *)file->private_data;
1743         DECLARE_WAITQUEUE(wait, current);
1744         ssize_t ret;
1745         unsigned long flags;
1746         unsigned ptr;
1747         int cnt;
1748
1749         VALIDATE_STATE(s);
1750         if (!access_ok(VERIFY_WRITE, buffer, count))
1751                 return -EFAULT;
1752         if (count == 0)
1753                 return 0;
1754         ret = 0;
1755         add_wait_queue(&s->midi.iwait, &wait);
1756         while (count > 0) {
1757                 spin_lock_irqsave(&s->lock, flags);
1758                 ptr = s->midi.ird;
1759                 cnt = MIDIINBUF - ptr;
1760                 if (s->midi.icnt < cnt)
1761                         cnt = s->midi.icnt;
1762                 if (cnt <= 0)
1763                         __set_current_state(TASK_INTERRUPTIBLE);
1764                 spin_unlock_irqrestore(&s->lock, flags);
1765                 if (cnt > count)
1766                         cnt = count;
1767                 if (cnt <= 0) {
1768                         if (file->f_flags & O_NONBLOCK) {
1769                                 if (!ret)
1770                                         ret = -EAGAIN;
1771                                 break;
1772                         }
1773                         schedule();
1774                         if (signal_pending(current)) {
1775                                 if (!ret)
1776                                         ret = -ERESTARTSYS;
1777                                 break;
1778                         }
1779                         continue;
1780                 }
1781                 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
1782                         if (!ret)
1783                                 ret = -EFAULT;
1784                         break;
1785                 }
1786                 ptr = (ptr + cnt) % MIDIINBUF;
1787                 spin_lock_irqsave(&s->lock, flags);
1788                 s->midi.ird = ptr;
1789                 s->midi.icnt -= cnt;
1790                 spin_unlock_irqrestore(&s->lock, flags);
1791                 count -= cnt;
1792                 buffer += cnt;
1793                 ret += cnt;
1794                 break;
1795         }
1796         __set_current_state(TASK_RUNNING);
1797         remove_wait_queue(&s->midi.iwait, &wait);
1798         return ret;
1799 }
1800
1801 static ssize_t solo1_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1802 {
1803         struct solo1_state *s = (struct solo1_state *)file->private_data;
1804         DECLARE_WAITQUEUE(wait, current);
1805         ssize_t ret;
1806         unsigned long flags;
1807         unsigned ptr;
1808         int cnt;
1809
1810         VALIDATE_STATE(s);
1811         if (!access_ok(VERIFY_READ, buffer, count))
1812                 return -EFAULT;
1813         if (count == 0)
1814                 return 0;
1815         ret = 0;
1816         add_wait_queue(&s->midi.owait, &wait);
1817         while (count > 0) {
1818                 spin_lock_irqsave(&s->lock, flags);
1819                 ptr = s->midi.owr;
1820                 cnt = MIDIOUTBUF - ptr;
1821                 if (s->midi.ocnt + cnt > MIDIOUTBUF)
1822                         cnt = MIDIOUTBUF - s->midi.ocnt;
1823                 if (cnt <= 0) {
1824                         __set_current_state(TASK_INTERRUPTIBLE);
1825                         solo1_handle_midi(s);
1826                 }
1827                 spin_unlock_irqrestore(&s->lock, flags);
1828                 if (cnt > count)
1829                         cnt = count;
1830                 if (cnt <= 0) {
1831                         if (file->f_flags & O_NONBLOCK) {
1832                                 if (!ret)
1833                                         ret = -EAGAIN;
1834                                 break;
1835                         }
1836                         schedule();
1837                         if (signal_pending(current)) {
1838                                 if (!ret)
1839                                         ret = -ERESTARTSYS;
1840                                 break;
1841                         }
1842                         continue;
1843                 }
1844                 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
1845                         if (!ret)
1846                                 ret = -EFAULT;
1847                         break;
1848                 }
1849                 ptr = (ptr + cnt) % MIDIOUTBUF;
1850                 spin_lock_irqsave(&s->lock, flags);
1851                 s->midi.owr = ptr;
1852                 s->midi.ocnt += cnt;
1853                 spin_unlock_irqrestore(&s->lock, flags);
1854                 count -= cnt;
1855                 buffer += cnt;
1856                 ret += cnt;
1857                 spin_lock_irqsave(&s->lock, flags);
1858                 solo1_handle_midi(s);
1859                 spin_unlock_irqrestore(&s->lock, flags);
1860         }
1861         __set_current_state(TASK_RUNNING);
1862         remove_wait_queue(&s->midi.owait, &wait);
1863         return ret;
1864 }
1865
1866 /* No kernel lock - we have our own spinlock */
1867 static unsigned int solo1_midi_poll(struct file *file, struct poll_table_struct *wait)
1868 {
1869         struct solo1_state *s = (struct solo1_state *)file->private_data;
1870         unsigned long flags;
1871         unsigned int mask = 0;
1872
1873         VALIDATE_STATE(s);
1874         if (file->f_flags & FMODE_WRITE)
1875                 poll_wait(file, &s->midi.owait, wait);
1876         if (file->f_flags & FMODE_READ)
1877                 poll_wait(file, &s->midi.iwait, wait);
1878         spin_lock_irqsave(&s->lock, flags);
1879         if (file->f_flags & FMODE_READ) {
1880                 if (s->midi.icnt > 0)
1881                         mask |= POLLIN | POLLRDNORM;
1882         }
1883         if (file->f_flags & FMODE_WRITE) {
1884                 if (s->midi.ocnt < MIDIOUTBUF)
1885                         mask |= POLLOUT | POLLWRNORM;
1886         }
1887         spin_unlock_irqrestore(&s->lock, flags);
1888         return mask;
1889 }
1890
1891 static int solo1_midi_open(struct inode *inode, struct file *file)
1892 {
1893         unsigned int minor = iminor(inode);
1894         DECLARE_WAITQUEUE(wait, current);
1895         unsigned long flags;
1896         struct solo1_state *s = NULL;
1897         struct pci_dev *pci_dev = NULL;
1898
1899         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
1900                 struct pci_driver *drvr;
1901
1902                 drvr = pci_dev_driver(pci_dev);
1903                 if (drvr != &solo1_driver)
1904                         continue;
1905                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
1906                 if (!s)
1907                         continue;
1908                 if (s->dev_midi == minor)
1909                         break;
1910         }
1911         if (!s)
1912                 return -ENODEV;
1913         VALIDATE_STATE(s);
1914         file->private_data = s;
1915         /* wait for device to become free */
1916         mutex_lock(&s->open_mutex);
1917         while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
1918                 if (file->f_flags & O_NONBLOCK) {
1919                         mutex_unlock(&s->open_mutex);
1920                         return -EBUSY;
1921                 }
1922                 add_wait_queue(&s->open_wait, &wait);
1923                 __set_current_state(TASK_INTERRUPTIBLE);
1924                 mutex_unlock(&s->open_mutex);
1925                 schedule();
1926                 remove_wait_queue(&s->open_wait, &wait);
1927                 set_current_state(TASK_RUNNING);
1928                 if (signal_pending(current))
1929                         return -ERESTARTSYS;
1930                 mutex_lock(&s->open_mutex);
1931         }
1932         spin_lock_irqsave(&s->lock, flags);
1933         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1934                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1935                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1936                 outb(0xff, s->mpubase+1); /* reset command */
1937                 outb(0x3f, s->mpubase+1); /* uart command */
1938                 if (!(inb(s->mpubase+1) & 0x80))
1939                         inb(s->mpubase);
1940                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1941                 outb(0xb0, s->iobase + 7); /* enable A1, A2, MPU irq's */
1942                 init_timer(&s->midi.timer);
1943                 s->midi.timer.expires = jiffies+1;
1944                 s->midi.timer.data = (unsigned long)s;
1945                 s->midi.timer.function = solo1_midi_timer;
1946                 add_timer(&s->midi.timer);
1947         }
1948         if (file->f_mode & FMODE_READ) {
1949                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1950         }
1951         if (file->f_mode & FMODE_WRITE) {
1952                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1953         }
1954         spin_unlock_irqrestore(&s->lock, flags);
1955         s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
1956         mutex_unlock(&s->open_mutex);
1957         return nonseekable_open(inode, file);
1958 }
1959
1960 static int solo1_midi_release(struct inode *inode, struct file *file)
1961 {
1962         struct solo1_state *s = (struct solo1_state *)file->private_data;
1963         DECLARE_WAITQUEUE(wait, current);
1964         unsigned long flags;
1965         unsigned count, tmo;
1966
1967         VALIDATE_STATE(s);
1968
1969         lock_kernel();
1970         if (file->f_mode & FMODE_WRITE) {
1971                 add_wait_queue(&s->midi.owait, &wait);
1972                 for (;;) {
1973                         __set_current_state(TASK_INTERRUPTIBLE);
1974                         spin_lock_irqsave(&s->lock, flags);
1975                         count = s->midi.ocnt;
1976                         spin_unlock_irqrestore(&s->lock, flags);
1977                         if (count <= 0)
1978                                 break;
1979                         if (signal_pending(current))
1980                                 break;
1981                         if (file->f_flags & O_NONBLOCK)
1982                                 break;
1983                         tmo = (count * HZ) / 3100;
1984                         if (!schedule_timeout(tmo ? : 1) && tmo)
1985                                 printk(KERN_DEBUG "solo1: midi timed out??\n");
1986                 }
1987                 remove_wait_queue(&s->midi.owait, &wait);
1988                 set_current_state(TASK_RUNNING);
1989         }
1990         mutex_lock(&s->open_mutex);
1991         s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
1992         spin_lock_irqsave(&s->lock, flags);
1993         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1994                 outb(0x30, s->iobase + 7); /* enable A1, A2 irq's */
1995                 del_timer(&s->midi.timer);
1996         }
1997         spin_unlock_irqrestore(&s->lock, flags);
1998         wake_up(&s->open_wait);
1999         mutex_unlock(&s->open_mutex);
2000         unlock_kernel();
2001         return 0;
2002 }
2003
2004 static /*const*/ struct file_operations solo1_midi_fops = {
2005         .owner          = THIS_MODULE,
2006         .llseek         = no_llseek,
2007         .read           = solo1_midi_read,
2008         .write          = solo1_midi_write,
2009         .poll           = solo1_midi_poll,
2010         .open           = solo1_midi_open,
2011         .release        = solo1_midi_release,
2012 };
2013
2014 /* --------------------------------------------------------------------- */
2015
2016 static int solo1_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2017 {
2018         static const unsigned char op_offset[18] = {
2019                 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2020                 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2021                 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2022         };
2023         struct solo1_state *s = (struct solo1_state *)file->private_data;
2024         struct dm_fm_voice v;
2025         struct dm_fm_note n;
2026         struct dm_fm_params p;
2027         unsigned int io;
2028         unsigned int regb;
2029
2030         switch (cmd) {
2031         case FM_IOCTL_RESET:
2032                 for (regb = 0xb0; regb < 0xb9; regb++) {
2033                         outb(regb, s->sbbase);
2034                         outb(0, s->sbbase+1);
2035                         outb(regb, s->sbbase+2);
2036                         outb(0, s->sbbase+3);
2037                 }
2038                 return 0;
2039
2040         case FM_IOCTL_PLAY_NOTE:
2041                 if (copy_from_user(&n, (void __user *)arg, sizeof(n)))
2042                         return -EFAULT;
2043                 if (n.voice >= 18)
2044                         return -EINVAL;
2045                 if (n.voice >= 9) {
2046                         regb = n.voice - 9;
2047                         io = s->sbbase+2;
2048                 } else {
2049                         regb = n.voice;
2050                         io = s->sbbase;
2051                 }
2052                 outb(0xa0 + regb, io);
2053                 outb(n.fnum & 0xff, io+1);
2054                 outb(0xb0 + regb, io);
2055                 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2056                 return 0;
2057
2058         case FM_IOCTL_SET_VOICE:
2059                 if (copy_from_user(&v, (void __user *)arg, sizeof(v)))
2060                         return -EFAULT;
2061                 if (v.voice >= 18)
2062                         return -EINVAL;
2063                 regb = op_offset[v.voice];
2064                 io = s->sbbase + ((v.op & 1) << 1);
2065                 outb(0x20 + regb, io);
2066                 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2067                      ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2068                 outb(0x40 + regb, io);
2069                 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2070                 outb(0x60 + regb, io);
2071                 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2072                 outb(0x80 + regb, io);
2073                 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2074                 outb(0xe0 + regb, io);
2075                 outb(v.waveform & 0x7, io+1);
2076                 if (n.voice >= 9) {
2077                         regb = n.voice - 9;
2078                         io = s->sbbase+2;
2079                 } else {
2080                         regb = n.voice;
2081                         io = s->sbbase;
2082                 }
2083                 outb(0xc0 + regb, io);
2084                 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2085                      (v.connection & 1), io+1);
2086                 return 0;
2087
2088         case FM_IOCTL_SET_PARAMS:
2089                 if (copy_from_user(&p, (void __user *)arg, sizeof(p)))
2090                         return -EFAULT;
2091                 outb(0x08, s->sbbase);
2092                 outb((p.kbd_split & 1) << 6, s->sbbase+1);
2093                 outb(0xbd, s->sbbase);
2094                 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2095                      ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->sbbase+1);
2096                 return 0;
2097
2098         case FM_IOCTL_SET_OPL:
2099                 outb(4, s->sbbase+2);
2100                 outb(arg, s->sbbase+3);
2101                 return 0;
2102
2103         case FM_IOCTL_SET_MODE:
2104                 outb(5, s->sbbase+2);
2105                 outb(arg & 1, s->sbbase+3);
2106                 return 0;
2107
2108         default:
2109                 return -EINVAL;
2110         }
2111 }
2112
2113 static int solo1_dmfm_open(struct inode *inode, struct file *file)
2114 {
2115         unsigned int minor = iminor(inode);
2116         DECLARE_WAITQUEUE(wait, current);
2117         struct solo1_state *s = NULL;
2118         struct pci_dev *pci_dev = NULL;
2119
2120         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
2121                 struct pci_driver *drvr;
2122
2123                 drvr = pci_dev_driver(pci_dev);
2124                 if (drvr != &solo1_driver)
2125                         continue;
2126                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2127                 if (!s)
2128                         continue;
2129                 if (s->dev_dmfm == minor)
2130                         break;
2131         }
2132         if (!s)
2133                 return -ENODEV;
2134         VALIDATE_STATE(s);
2135         file->private_data = s;
2136         /* wait for device to become free */
2137         mutex_lock(&s->open_mutex);
2138         while (s->open_mode & FMODE_DMFM) {
2139                 if (file->f_flags & O_NONBLOCK) {
2140                         mutex_unlock(&s->open_mutex);
2141                         return -EBUSY;
2142                 }
2143                 add_wait_queue(&s->open_wait, &wait);
2144                 __set_current_state(TASK_INTERRUPTIBLE);
2145                 mutex_unlock(&s->open_mutex);
2146                 schedule();
2147                 remove_wait_queue(&s->open_wait, &wait);
2148                 set_current_state(TASK_RUNNING);
2149                 if (signal_pending(current))
2150                         return -ERESTARTSYS;
2151                 mutex_lock(&s->open_mutex);
2152         }
2153         if (!request_region(s->sbbase, FMSYNTH_EXTENT, "ESS Solo1")) {
2154                 mutex_unlock(&s->open_mutex);
2155                 printk(KERN_ERR "solo1: FM synth io ports in use, opl3 loaded?\n");
2156                 return -EBUSY;
2157         }
2158         /* init the stuff */
2159         outb(1, s->sbbase);
2160         outb(0x20, s->sbbase+1); /* enable waveforms */
2161         outb(4, s->sbbase+2);
2162         outb(0, s->sbbase+3);  /* no 4op enabled */
2163         outb(5, s->sbbase+2);
2164         outb(1, s->sbbase+3);  /* enable OPL3 */
2165         s->open_mode |= FMODE_DMFM;
2166         mutex_unlock(&s->open_mutex);
2167         return nonseekable_open(inode, file);
2168 }
2169
2170 static int solo1_dmfm_release(struct inode *inode, struct file *file)
2171 {
2172         struct solo1_state *s = (struct solo1_state *)file->private_data;
2173         unsigned int regb;
2174
2175         VALIDATE_STATE(s);
2176         lock_kernel();
2177         mutex_lock(&s->open_mutex);
2178         s->open_mode &= ~FMODE_DMFM;
2179         for (regb = 0xb0; regb < 0xb9; regb++) {
2180                 outb(regb, s->sbbase);
2181                 outb(0, s->sbbase+1);
2182                 outb(regb, s->sbbase+2);
2183                 outb(0, s->sbbase+3);
2184         }
2185         release_region(s->sbbase, FMSYNTH_EXTENT);
2186         wake_up(&s->open_wait);
2187         mutex_unlock(&s->open_mutex);
2188         unlock_kernel();
2189         return 0;
2190 }
2191
2192 static /*const*/ struct file_operations solo1_dmfm_fops = {
2193         .owner          = THIS_MODULE,
2194         .llseek         = no_llseek,
2195         .ioctl          = solo1_dmfm_ioctl,
2196         .open           = solo1_dmfm_open,
2197         .release        = solo1_dmfm_release,
2198 };
2199
2200 /* --------------------------------------------------------------------- */
2201
2202 static struct initvol {
2203         int mixch;
2204         int vol;
2205 } initvol[] __devinitdata = {
2206         { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2207         { SOUND_MIXER_WRITE_PCM, 0x4040 },
2208         { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2209         { SOUND_MIXER_WRITE_CD, 0x4040 },
2210         { SOUND_MIXER_WRITE_LINE, 0x4040 },
2211         { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2212         { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2213         { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2214         { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2215         { SOUND_MIXER_WRITE_MIC, 0x4040 }
2216 };
2217
2218 static int setup_solo1(struct solo1_state *s)
2219 {
2220         struct pci_dev *pcidev = s->dev;
2221         mm_segment_t fs;
2222         int i, val;
2223
2224         /* initialize DDMA base address */
2225         printk(KERN_DEBUG "solo1: ddma base address: 0x%lx\n", s->ddmabase);
2226         pci_write_config_word(pcidev, 0x60, (s->ddmabase & (~0xf)) | 1);
2227         /* set DMA policy to DDMA, IRQ emulation off (CLKRUN disabled for now) */
2228         pci_write_config_dword(pcidev, 0x50, 0);
2229         /* disable legacy audio address decode */
2230         pci_write_config_word(pcidev, 0x40, 0x907f);
2231
2232         /* initialize the chips */
2233         if (!reset_ctrl(s)) {
2234                 printk(KERN_ERR "esssolo1: cannot reset controller\n");
2235                 return -1;
2236         }
2237         outb(0xb0, s->iobase+7); /* enable A1, A2, MPU irq's */
2238
2239         /* initialize mixer regs */
2240         write_mixer(s, 0x7f, 0); /* disable music digital recording */
2241         write_mixer(s, 0x7d, 0x0c); /* enable mic preamp, MONO_OUT is 2nd DAC right channel */
2242         write_mixer(s, 0x64, 0x45); /* volume control */
2243         write_mixer(s, 0x48, 0x10); /* enable music DAC/ES6xx interface */
2244         write_mixer(s, 0x50, 0);  /* disable spatializer */
2245         write_mixer(s, 0x52, 0);
2246         write_mixer(s, 0x14, 0);  /* DAC1 minimum volume */
2247         write_mixer(s, 0x71, 0x20); /* enable new 0xA1 reg format */
2248         outb(0, s->ddmabase+0xd); /* DMA master clear */
2249         outb(1, s->ddmabase+0xf); /* mask channel */
2250         /*outb(0, s->ddmabase+0x8);*/ /* enable controller (enable is low active!!) */
2251
2252         pci_set_master(pcidev);  /* enable bus mastering */
2253
2254         fs = get_fs();
2255         set_fs(KERNEL_DS);
2256         val = SOUND_MASK_LINE;
2257         mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2258         for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2259                 val = initvol[i].vol;
2260                 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2261         }
2262         val = 1; /* enable mic preamp */
2263         mixer_ioctl(s, SOUND_MIXER_PRIVATE1, (unsigned long)&val);
2264         set_fs(fs);
2265         return 0;
2266 }
2267
2268 static int
2269 solo1_suspend(struct pci_dev *pci_dev, pm_message_t state) {
2270         struct solo1_state *s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2271         if (!s)
2272                 return 1;
2273         outb(0, s->iobase+6);
2274         /* DMA master clear */
2275         outb(0, s->ddmabase+0xd);
2276         /* reset sequencer and FIFO */
2277         outb(3, s->sbbase+6);
2278         /* turn off DDMA controller address space */
2279         pci_write_config_word(s->dev, 0x60, 0);
2280         return 0;
2281 }
2282
2283 static int
2284 solo1_resume(struct pci_dev *pci_dev) {
2285         struct solo1_state *s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2286         if (!s)
2287                 return 1;
2288         setup_solo1(s);
2289         return 0;
2290 }
2291
2292 #ifdef SUPPORT_JOYSTICK
2293 static int __devinit solo1_register_gameport(struct solo1_state *s, int io_port)
2294 {
2295         struct gameport *gp;
2296
2297         if (!request_region(io_port, GAMEPORT_EXTENT, "ESS Solo1")) {
2298                 printk(KERN_ERR "solo1: gameport io ports are in use\n");
2299                 return -EBUSY;
2300         }
2301
2302         s->gameport = gp = gameport_allocate_port();
2303         if (!gp) {
2304                 printk(KERN_ERR "solo1: can not allocate memory for gameport\n");
2305                 release_region(io_port, GAMEPORT_EXTENT);
2306                 return -ENOMEM;
2307         }
2308
2309         gameport_set_name(gp, "ESS Solo1 Gameport");
2310         gameport_set_phys(gp, "isa%04x/gameport0", io_port);
2311         gp->dev.parent = &s->dev->dev;
2312         gp->io = io_port;
2313
2314         gameport_register_port(gp);
2315
2316         return 0;
2317 }
2318
2319 static inline void solo1_unregister_gameport(struct solo1_state *s)
2320 {
2321         if (s->gameport) {
2322                 int gpio = s->gameport->io;
2323                 gameport_unregister_port(s->gameport);
2324                 release_region(gpio, GAMEPORT_EXTENT);
2325         }
2326 }
2327 #else
2328 static inline int solo1_register_gameport(struct solo1_state *s, int io_port) { return -ENOSYS; }
2329 static inline void solo1_unregister_gameport(struct solo1_state *s) { }
2330 #endif /* SUPPORT_JOYSTICK */
2331
2332 static int __devinit solo1_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2333 {
2334         struct solo1_state *s;
2335         int gpio;
2336         int ret;
2337
2338         if ((ret=pci_enable_device(pcidev)))
2339                 return ret;
2340         if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_IO) ||
2341             !(pci_resource_flags(pcidev, 1) & IORESOURCE_IO) ||
2342             !(pci_resource_flags(pcidev, 2) & IORESOURCE_IO) ||
2343             !(pci_resource_flags(pcidev, 3) & IORESOURCE_IO))
2344                 return -ENODEV;
2345         if (pcidev->irq == 0)
2346                 return -ENODEV;
2347
2348         /* Recording requires 24-bit DMA, so attempt to set dma mask
2349          * to 24 bits first, then 32 bits (playback only) if that fails.
2350          */
2351         if (pci_set_dma_mask(pcidev, DMA_24BIT_MASK) &&
2352             pci_set_dma_mask(pcidev, DMA_32BIT_MASK)) {
2353                 printk(KERN_WARNING "solo1: architecture does not support 24bit or 32bit PCI busmaster DMA\n");
2354                 return -ENODEV;
2355         }
2356
2357         if (!(s = kmalloc(sizeof(struct solo1_state), GFP_KERNEL))) {
2358                 printk(KERN_WARNING "solo1: out of memory\n");
2359                 return -ENOMEM;
2360         }
2361         memset(s, 0, sizeof(struct solo1_state));
2362         init_waitqueue_head(&s->dma_adc.wait);
2363         init_waitqueue_head(&s->dma_dac.wait);
2364         init_waitqueue_head(&s->open_wait);
2365         init_waitqueue_head(&s->midi.iwait);
2366         init_waitqueue_head(&s->midi.owait);
2367         mutex_init(&s->open_mutex);
2368         spin_lock_init(&s->lock);
2369         s->magic = SOLO1_MAGIC;
2370         s->dev = pcidev;
2371         s->iobase = pci_resource_start(pcidev, 0);
2372         s->sbbase = pci_resource_start(pcidev, 1);
2373         s->vcbase = pci_resource_start(pcidev, 2);
2374         s->ddmabase = s->vcbase + DDMABASE_OFFSET;
2375         s->mpubase = pci_resource_start(pcidev, 3);
2376         gpio = pci_resource_start(pcidev, 4);
2377         s->irq = pcidev->irq;
2378         ret = -EBUSY;
2379         if (!request_region(s->iobase, IOBASE_EXTENT, "ESS Solo1")) {
2380                 printk(KERN_ERR "solo1: io ports in use\n");
2381                 goto err_region1;
2382         }
2383         if (!request_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT, "ESS Solo1")) {
2384                 printk(KERN_ERR "solo1: io ports in use\n");
2385                 goto err_region2;
2386         }
2387         if (!request_region(s->ddmabase, DDMABASE_EXTENT, "ESS Solo1")) {
2388                 printk(KERN_ERR "solo1: io ports in use\n");
2389                 goto err_region3;
2390         }
2391         if (!request_region(s->mpubase, MPUBASE_EXTENT, "ESS Solo1")) {
2392                 printk(KERN_ERR "solo1: io ports in use\n");
2393                 goto err_region4;
2394         }
2395         if ((ret=request_irq(s->irq,solo1_interrupt,SA_SHIRQ,"ESS Solo1",s))) {
2396                 printk(KERN_ERR "solo1: irq %u in use\n", s->irq);
2397                 goto err_irq;
2398         }
2399         /* register devices */
2400         if ((s->dev_audio = register_sound_dsp(&solo1_audio_fops, -1)) < 0) {
2401                 ret = s->dev_audio;
2402                 goto err_dev1;
2403         }
2404         if ((s->dev_mixer = register_sound_mixer(&solo1_mixer_fops, -1)) < 0) {
2405                 ret = s->dev_mixer;
2406                 goto err_dev2;
2407         }
2408         if ((s->dev_midi = register_sound_midi(&solo1_midi_fops, -1)) < 0) {
2409                 ret = s->dev_midi;
2410                 goto err_dev3;
2411         }
2412         if ((s->dev_dmfm = register_sound_special(&solo1_dmfm_fops, 15 /* ?? */)) < 0) {
2413                 ret = s->dev_dmfm;
2414                 goto err_dev4;
2415         }
2416         if (setup_solo1(s)) {
2417                 ret = -EIO;
2418                 goto err;
2419         }
2420         /* register gameport */
2421         solo1_register_gameport(s, gpio);
2422         /* store it in the driver field */
2423         pci_set_drvdata(pcidev, s);
2424         return 0;
2425
2426  err:
2427         unregister_sound_special(s->dev_dmfm);
2428  err_dev4:
2429         unregister_sound_midi(s->dev_midi);
2430  err_dev3:
2431         unregister_sound_mixer(s->dev_mixer);
2432  err_dev2:
2433         unregister_sound_dsp(s->dev_audio);
2434  err_dev1:
2435         printk(KERN_ERR "solo1: initialisation error\n");
2436         free_irq(s->irq, s);
2437  err_irq:
2438         release_region(s->mpubase, MPUBASE_EXTENT);
2439  err_region4:
2440         release_region(s->ddmabase, DDMABASE_EXTENT);
2441  err_region3:
2442         release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
2443  err_region2:
2444         release_region(s->iobase, IOBASE_EXTENT);
2445  err_region1:
2446         kfree(s);
2447         return ret;
2448 }
2449
2450 static void __devexit solo1_remove(struct pci_dev *dev)
2451 {
2452         struct solo1_state *s = pci_get_drvdata(dev);
2453
2454         if (!s)
2455                 return;
2456         /* stop DMA controller */
2457         outb(0, s->iobase+6);
2458         outb(0, s->ddmabase+0xd); /* DMA master clear */
2459         outb(3, s->sbbase+6); /* reset sequencer and FIFO */
2460         synchronize_irq(s->irq);
2461         pci_write_config_word(s->dev, 0x60, 0); /* turn off DDMA controller address space */
2462         free_irq(s->irq, s);
2463         solo1_unregister_gameport(s);
2464         release_region(s->iobase, IOBASE_EXTENT);
2465         release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
2466         release_region(s->ddmabase, DDMABASE_EXTENT);
2467         release_region(s->mpubase, MPUBASE_EXTENT);
2468         unregister_sound_dsp(s->dev_audio);
2469         unregister_sound_mixer(s->dev_mixer);
2470         unregister_sound_midi(s->dev_midi);
2471         unregister_sound_special(s->dev_dmfm);
2472         kfree(s);
2473         pci_set_drvdata(dev, NULL);
2474 }
2475
2476 static struct pci_device_id id_table[] = {
2477         { PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_SOLO1, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2478         { 0, }
2479 };
2480
2481 MODULE_DEVICE_TABLE(pci, id_table);
2482
2483 static struct pci_driver solo1_driver = {
2484         .name           = "ESS Solo1",
2485         .id_table       = id_table,
2486         .probe          = solo1_probe,
2487         .remove         = __devexit_p(solo1_remove),
2488         .suspend        = solo1_suspend,
2489         .resume         = solo1_resume,
2490 };
2491
2492
2493 static int __init init_solo1(void)
2494 {
2495         printk(KERN_INFO "solo1: version v0.20 time " __TIME__ " " __DATE__ "\n");
2496         return pci_register_driver(&solo1_driver);
2497 }
2498
2499 /* --------------------------------------------------------------------- */
2500
2501 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2502 MODULE_DESCRIPTION("ESS Solo1 Driver");
2503 MODULE_LICENSE("GPL");
2504
2505
2506 static void __exit cleanup_solo1(void)
2507 {
2508         printk(KERN_INFO "solo1: unloading\n");
2509         pci_unregister_driver(&solo1_driver);
2510 }
2511
2512 /* --------------------------------------------------------------------- */
2513
2514 module_init(init_solo1);
2515 module_exit(cleanup_solo1);
2516