2 * Copyright (C) 2005 David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/device.h>
23 #include <linux/mod_devicetable.h>
24 #include <linux/slab.h>
25 #include <linux/kthread.h>
28 * INTERFACES between SPI master-side drivers and SPI infrastructure.
29 * (There's no SPI slave support for Linux yet...)
31 extern struct bus_type spi_bus_type;
34 * struct spi_device - Master side proxy for an SPI slave device
35 * @dev: Driver model representation of the device.
36 * @master: SPI controller used with the device.
37 * @max_speed_hz: Maximum clock rate to be used with this chip
38 * (on this board); may be changed by the device's driver.
39 * The spi_transfer.speed_hz can override this for each transfer.
40 * @chip_select: Chipselect, distinguishing chips handled by @master.
41 * @mode: The spi mode defines how data is clocked out and in.
42 * This may be changed by the device's driver.
43 * The "active low" default for chipselect mode can be overridden
44 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
45 * each word in a transfer (by specifying SPI_LSB_FIRST).
46 * @bits_per_word: Data transfers involve one or more words; word sizes
47 * like eight or 12 bits are common. In-memory wordsizes are
48 * powers of two bytes (e.g. 20 bit samples use 32 bits).
49 * This may be changed by the device's driver, or left at the
50 * default (0) indicating protocol words are eight bit bytes.
51 * The spi_transfer.bits_per_word can override this for each transfer.
52 * @irq: Negative, or the number passed to request_irq() to receive
53 * interrupts from this device.
54 * @controller_state: Controller's runtime state
55 * @controller_data: Board-specific definitions for controller, such as
56 * FIFO initialization parameters; from board_info.controller_data
57 * @modalias: Name of the driver to use with this device, or an alias
58 * for that name. This appears in the sysfs "modalias" attribute
59 * for driver coldplugging, and in uevents used for hotplugging
61 * A @spi_device is used to interchange data between an SPI slave
62 * (usually a discrete chip) and CPU memory.
64 * In @dev, the platform_data is used to hold information about this
65 * device that's meaningful to the device's protocol driver, but not
66 * to its controller. One example might be an identifier for a chip
67 * variant with slightly different functionality; another might be
68 * information about how this particular board wires the chip's pins.
72 struct spi_master *master;
76 #define SPI_CPHA 0x01 /* clock phase */
77 #define SPI_CPOL 0x02 /* clock polarity */
78 #define SPI_MODE_0 (0|0) /* (original MicroWire) */
79 #define SPI_MODE_1 (0|SPI_CPHA)
80 #define SPI_MODE_2 (SPI_CPOL|0)
81 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
82 #define SPI_CS_HIGH 0x04 /* chipselect active high? */
83 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
84 #define SPI_3WIRE 0x10 /* SI/SO signals shared */
85 #define SPI_LOOP 0x20 /* loopback mode */
86 #define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
87 #define SPI_READY 0x80 /* slave pulls low to pause */
90 void *controller_state;
91 void *controller_data;
92 char modalias[SPI_NAME_SIZE];
93 int cs_gpio; /* chip select gpio */
96 * likely need more hooks for more protocol options affecting how
97 * the controller talks to each chip, like:
98 * - memory packing (12 bit samples into low bits, others zeroed)
100 * - drop chipselect after each word
101 * - chipselect delays
106 static inline struct spi_device *to_spi_device(struct device *dev)
108 return dev ? container_of(dev, struct spi_device, dev) : NULL;
111 /* most drivers won't need to care about device refcounting */
112 static inline struct spi_device *spi_dev_get(struct spi_device *spi)
114 return (spi && get_device(&spi->dev)) ? spi : NULL;
117 static inline void spi_dev_put(struct spi_device *spi)
120 put_device(&spi->dev);
123 /* ctldata is for the bus_master driver's runtime state */
124 static inline void *spi_get_ctldata(struct spi_device *spi)
126 return spi->controller_state;
129 static inline void spi_set_ctldata(struct spi_device *spi, void *state)
131 spi->controller_state = state;
134 /* device driver data */
136 static inline void spi_set_drvdata(struct spi_device *spi, void *data)
138 dev_set_drvdata(&spi->dev, data);
141 static inline void *spi_get_drvdata(struct spi_device *spi)
143 return dev_get_drvdata(&spi->dev);
151 * struct spi_driver - Host side "protocol" driver
152 * @id_table: List of SPI devices supported by this driver
153 * @probe: Binds this driver to the spi device. Drivers can verify
154 * that the device is actually present, and may need to configure
155 * characteristics (such as bits_per_word) which weren't needed for
156 * the initial configuration done during system setup.
157 * @remove: Unbinds this driver from the spi device
158 * @shutdown: Standard shutdown callback used during system state
159 * transitions such as powerdown/halt and kexec
160 * @suspend: Standard suspend callback used during system state transitions
161 * @resume: Standard resume callback used during system state transitions
162 * @driver: SPI device drivers should initialize the name and owner
163 * field of this structure.
165 * This represents the kind of device driver that uses SPI messages to
166 * interact with the hardware at the other end of a SPI link. It's called
167 * a "protocol" driver because it works through messages rather than talking
168 * directly to SPI hardware (which is what the underlying SPI controller
169 * driver does to pass those messages). These protocols are defined in the
170 * specification for the device(s) supported by the driver.
172 * As a rule, those device protocols represent the lowest level interface
173 * supported by a driver, and it will support upper level interfaces too.
174 * Examples of such upper levels include frameworks like MTD, networking,
175 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
178 const struct spi_device_id *id_table;
179 int (*probe)(struct spi_device *spi);
180 int (*remove)(struct spi_device *spi);
181 void (*shutdown)(struct spi_device *spi);
182 int (*suspend)(struct spi_device *spi, pm_message_t mesg);
183 int (*resume)(struct spi_device *spi);
184 struct device_driver driver;
187 static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
189 return drv ? container_of(drv, struct spi_driver, driver) : NULL;
192 extern int spi_register_driver(struct spi_driver *sdrv);
195 * spi_unregister_driver - reverse effect of spi_register_driver
196 * @sdrv: the driver to unregister
199 static inline void spi_unregister_driver(struct spi_driver *sdrv)
202 driver_unregister(&sdrv->driver);
206 * module_spi_driver() - Helper macro for registering a SPI driver
207 * @__spi_driver: spi_driver struct
209 * Helper macro for SPI drivers which do not do anything special in module
210 * init/exit. This eliminates a lot of boilerplate. Each module may only
211 * use this macro once, and calling it replaces module_init() and module_exit()
213 #define module_spi_driver(__spi_driver) \
214 module_driver(__spi_driver, spi_register_driver, \
215 spi_unregister_driver)
218 * struct spi_master - interface to SPI master controller
219 * @dev: device interface to this driver
220 * @list: link with the global spi_master list
221 * @bus_num: board-specific (and often SOC-specific) identifier for a
222 * given SPI controller.
223 * @num_chipselect: chipselects are used to distinguish individual
224 * SPI slaves, and are numbered from zero to num_chipselects.
225 * each slave has a chipselect signal, but it's common that not
226 * every chipselect is connected to a slave.
227 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
228 * @mode_bits: flags understood by this controller driver
229 * @flags: other constraints relevant to this driver
230 * @bus_lock_spinlock: spinlock for SPI bus locking
231 * @bus_lock_mutex: mutex for SPI bus locking
232 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
233 * @setup: updates the device mode and clocking records used by a
234 * device's SPI controller; protocol code may call this. This
235 * must fail if an unrecognized or unsupported mode is requested.
236 * It's always safe to call this unless transfers are pending on
237 * the device whose settings are being modified.
238 * @transfer: adds a message to the controller's transfer queue.
239 * @cleanup: frees controller-specific state
240 * @queued: whether this master is providing an internal message queue
241 * @kworker: thread struct for message pump
242 * @kworker_task: pointer to task for message pump kworker thread
243 * @pump_messages: work struct for scheduling work to the message pump
244 * @queue_lock: spinlock to syncronise access to message queue
245 * @queue: message queue
246 * @cur_msg: the currently in-flight message
247 * @busy: message pump is busy
248 * @running: message pump is running
249 * @rt: whether this queue is set to run as a realtime task
250 * @prepare_transfer_hardware: a message will soon arrive from the queue
251 * so the subsystem requests the driver to prepare the transfer hardware
252 * by issuing this call
253 * @transfer_one_message: the subsystem calls the driver to transfer a single
254 * message while queuing transfers that arrive in the meantime. When the
255 * driver is finished with this message, it must call
256 * spi_finalize_current_message() so the subsystem can issue the next
258 * @unprepare_transfer_hardware: there are currently no more messages on the
259 * queue so the subsystem notifies the driver that it may relax the
260 * hardware by issuing this call
262 * Each SPI master controller can communicate with one or more @spi_device
263 * children. These make a small bus, sharing MOSI, MISO and SCK signals
264 * but not chip select signals. Each device may be configured to use a
265 * different clock rate, since those shared signals are ignored unless
266 * the chip is selected.
268 * The driver for an SPI controller manages access to those devices through
269 * a queue of spi_message transactions, copying data between CPU memory and
270 * an SPI slave device. For each such message it queues, it calls the
271 * message's completion function when the transaction completes.
276 struct list_head list;
278 /* other than negative (== assign one dynamically), bus_num is fully
279 * board-specific. usually that simplifies to being SOC-specific.
280 * example: one SOC has three SPI controllers, numbered 0..2,
281 * and one board's schematics might show it using SPI-2. software
282 * would normally use bus_num=2 for that controller.
286 /* chipselects will be integral to many controllers; some others
287 * might use board-specific GPIOs.
291 /* some SPI controllers pose alignment requirements on DMAable
292 * buffers; let protocol drivers know about these requirements.
296 /* spi_device.mode flags understood by this controller driver */
299 /* other constraints relevant to this driver */
301 #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
302 #define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */
303 #define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
305 /* lock and mutex for SPI bus locking */
306 spinlock_t bus_lock_spinlock;
307 struct mutex bus_lock_mutex;
309 /* flag indicating that the SPI bus is locked for exclusive use */
312 /* Setup mode and clock, etc (spi driver may call many times).
314 * IMPORTANT: this may be called when transfers to another
315 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
316 * which could break those transfers.
318 int (*setup)(struct spi_device *spi);
320 /* bidirectional bulk transfers
322 * + The transfer() method may not sleep; its main role is
323 * just to add the message to the queue.
324 * + For now there's no remove-from-queue operation, or
325 * any other request management
326 * + To a given spi_device, message queueing is pure fifo
328 * + The master's main job is to process its message queue,
329 * selecting a chip then transferring data
330 * + If there are multiple spi_device children, the i/o queue
331 * arbitration algorithm is unspecified (round robin, fifo,
332 * priority, reservations, preemption, etc)
334 * + Chipselect stays active during the entire message
335 * (unless modified by spi_transfer.cs_change != 0).
336 * + The message transfers use clock and SPI mode parameters
337 * previously established by setup() for this device
339 int (*transfer)(struct spi_device *spi,
340 struct spi_message *mesg);
342 /* called on release() to free memory provided by spi_master */
343 void (*cleanup)(struct spi_device *spi);
346 * These hooks are for drivers that want to use the generic
347 * master transfer queueing mechanism. If these are used, the
348 * transfer() function above must NOT be specified by the driver.
349 * Over time we expect SPI drivers to be phased over to this API.
352 struct kthread_worker kworker;
353 struct task_struct *kworker_task;
354 struct kthread_work pump_messages;
355 spinlock_t queue_lock;
356 struct list_head queue;
357 struct spi_message *cur_msg;
362 int (*prepare_transfer_hardware)(struct spi_master *master);
363 int (*transfer_one_message)(struct spi_master *master,
364 struct spi_message *mesg);
365 int (*unprepare_transfer_hardware)(struct spi_master *master);
366 /* gpio chip select */
370 static inline void *spi_master_get_devdata(struct spi_master *master)
372 return dev_get_drvdata(&master->dev);
375 static inline void spi_master_set_devdata(struct spi_master *master, void *data)
377 dev_set_drvdata(&master->dev, data);
380 static inline struct spi_master *spi_master_get(struct spi_master *master)
382 if (!master || !get_device(&master->dev))
387 static inline void spi_master_put(struct spi_master *master)
390 put_device(&master->dev);
393 /* PM calls that need to be issued by the driver */
394 extern int spi_master_suspend(struct spi_master *master);
395 extern int spi_master_resume(struct spi_master *master);
397 /* Calls the driver make to interact with the message queue */
398 extern struct spi_message *spi_get_next_queued_message(struct spi_master *master);
399 extern void spi_finalize_current_message(struct spi_master *master);
401 /* the spi driver core manages memory for the spi_master classdev */
402 extern struct spi_master *
403 spi_alloc_master(struct device *host, unsigned size);
405 extern int spi_register_master(struct spi_master *master);
406 extern void spi_unregister_master(struct spi_master *master);
408 extern struct spi_master *spi_busnum_to_master(u16 busnum);
410 /*---------------------------------------------------------------------------*/
413 * I/O INTERFACE between SPI controller and protocol drivers
415 * Protocol drivers use a queue of spi_messages, each transferring data
416 * between the controller and memory buffers.
418 * The spi_messages themselves consist of a series of read+write transfer
419 * segments. Those segments always read the same number of bits as they
420 * write; but one or the other is easily ignored by passing a null buffer
421 * pointer. (This is unlike most types of I/O API, because SPI hardware
424 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
425 * up to the protocol driver, which guarantees the integrity of both (as
426 * well as the data buffers) for as long as the message is queued.
430 * struct spi_transfer - a read/write buffer pair
431 * @tx_buf: data to be written (dma-safe memory), or NULL
432 * @rx_buf: data to be read (dma-safe memory), or NULL
433 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
434 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
435 * @len: size of rx and tx buffers (in bytes)
436 * @speed_hz: Select a speed other than the device default for this
437 * transfer. If 0 the default (from @spi_device) is used.
438 * @bits_per_word: select a bits_per_word other than the device default
439 * for this transfer. If 0 the default (from @spi_device) is used.
440 * @cs_change: affects chipselect after this transfer completes
441 * @delay_usecs: microseconds to delay after this transfer before
442 * (optionally) changing the chipselect status, then starting
443 * the next transfer or completing this @spi_message.
444 * @transfer_list: transfers are sequenced through @spi_message.transfers
446 * SPI transfers always write the same number of bytes as they read.
447 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
448 * In some cases, they may also want to provide DMA addresses for
449 * the data being transferred; that may reduce overhead, when the
450 * underlying driver uses dma.
452 * If the transmit buffer is null, zeroes will be shifted out
453 * while filling @rx_buf. If the receive buffer is null, the data
454 * shifted in will be discarded. Only "len" bytes shift out (or in).
455 * It's an error to try to shift out a partial word. (For example, by
456 * shifting out three bytes with word size of sixteen or twenty bits;
457 * the former uses two bytes per word, the latter uses four bytes.)
459 * In-memory data values are always in native CPU byte order, translated
460 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
461 * for example when bits_per_word is sixteen, buffers are 2N bytes long
462 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
464 * When the word size of the SPI transfer is not a power-of-two multiple
465 * of eight bits, those in-memory words include extra bits. In-memory
466 * words are always seen by protocol drivers as right-justified, so the
467 * undefined (rx) or unused (tx) bits are always the most significant bits.
469 * All SPI transfers start with the relevant chipselect active. Normally
470 * it stays selected until after the last transfer in a message. Drivers
471 * can affect the chipselect signal using cs_change.
473 * (i) If the transfer isn't the last one in the message, this flag is
474 * used to make the chipselect briefly go inactive in the middle of the
475 * message. Toggling chipselect in this way may be needed to terminate
476 * a chip command, letting a single spi_message perform all of group of
477 * chip transactions together.
479 * (ii) When the transfer is the last one in the message, the chip may
480 * stay selected until the next transfer. On multi-device SPI busses
481 * with nothing blocking messages going to other devices, this is just
482 * a performance hint; starting a message to another device deselects
483 * this one. But in other cases, this can be used to ensure correctness.
484 * Some devices need protocol transactions to be built from a series of
485 * spi_message submissions, where the content of one message is determined
486 * by the results of previous messages and where the whole transaction
487 * ends when the chipselect goes intactive.
489 * The code that submits an spi_message (and its spi_transfers)
490 * to the lower layers is responsible for managing its memory.
491 * Zero-initialize every field you don't set up explicitly, to
492 * insulate against future API updates. After you submit a message
493 * and its transfers, ignore them until its completion callback.
495 struct spi_transfer {
496 /* it's ok if tx_buf == rx_buf (right?)
497 * for MicroWire, one buffer must be null
498 * buffers must work with dma_*map_single() calls, unless
499 * spi_message.is_dma_mapped reports a pre-existing mapping
508 unsigned cs_change:1;
513 struct list_head transfer_list;
517 * struct spi_message - one multi-segment SPI transaction
518 * @transfers: list of transfer segments in this transaction
519 * @spi: SPI device to which the transaction is queued
520 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
521 * addresses for each transfer buffer
522 * @complete: called to report transaction completions
523 * @context: the argument to complete() when it's called
524 * @actual_length: the total number of bytes that were transferred in all
525 * successful segments
526 * @status: zero for success, else negative errno
527 * @queue: for use by whichever driver currently owns the message
528 * @state: for use by whichever driver currently owns the message
530 * A @spi_message is used to execute an atomic sequence of data transfers,
531 * each represented by a struct spi_transfer. The sequence is "atomic"
532 * in the sense that no other spi_message may use that SPI bus until that
533 * sequence completes. On some systems, many such sequences can execute as
534 * as single programmed DMA transfer. On all systems, these messages are
535 * queued, and might complete after transactions to other devices. Messages
536 * sent to a given spi_device are alway executed in FIFO order.
538 * The code that submits an spi_message (and its spi_transfers)
539 * to the lower layers is responsible for managing its memory.
540 * Zero-initialize every field you don't set up explicitly, to
541 * insulate against future API updates. After you submit a message
542 * and its transfers, ignore them until its completion callback.
545 struct list_head transfers;
547 struct spi_device *spi;
549 unsigned is_dma_mapped:1;
551 /* REVISIT: we might want a flag affecting the behavior of the
552 * last transfer ... allowing things like "read 16 bit length L"
553 * immediately followed by "read L bytes". Basically imposing
554 * a specific message scheduling algorithm.
556 * Some controller drivers (message-at-a-time queue processing)
557 * could provide that as their default scheduling algorithm. But
558 * others (with multi-message pipelines) could need a flag to
559 * tell them about such special cases.
562 /* completion is reported through a callback */
563 void (*complete)(void *context);
565 unsigned actual_length;
568 /* for optional use by whatever driver currently owns the
569 * spi_message ... between calls to spi_async and then later
570 * complete(), that's the spi_master controller driver.
572 struct list_head queue;
576 static inline void spi_message_init(struct spi_message *m)
578 memset(m, 0, sizeof *m);
579 INIT_LIST_HEAD(&m->transfers);
583 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
585 list_add_tail(&t->transfer_list, &m->transfers);
589 spi_transfer_del(struct spi_transfer *t)
591 list_del(&t->transfer_list);
595 * spi_message_init_with_transfers - Initialize spi_message and append transfers
596 * @m: spi_message to be initialized
597 * @xfers: An array of spi transfers
598 * @num_xfers: Number of items in the xfer array
600 * This function initializes the given spi_message and adds each spi_transfer in
601 * the given array to the message.
604 spi_message_init_with_transfers(struct spi_message *m,
605 struct spi_transfer *xfers, unsigned int num_xfers)
610 for (i = 0; i < num_xfers; ++i)
611 spi_message_add_tail(&xfers[i], m);
614 /* It's fine to embed message and transaction structures in other data
615 * structures so long as you don't free them while they're in use.
618 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
620 struct spi_message *m;
622 m = kzalloc(sizeof(struct spi_message)
623 + ntrans * sizeof(struct spi_transfer),
627 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
629 INIT_LIST_HEAD(&m->transfers);
630 for (i = 0; i < ntrans; i++, t++)
631 spi_message_add_tail(t, m);
636 static inline void spi_message_free(struct spi_message *m)
641 extern int spi_setup(struct spi_device *spi);
642 extern int spi_async(struct spi_device *spi, struct spi_message *message);
643 extern int spi_async_locked(struct spi_device *spi,
644 struct spi_message *message);
646 /*---------------------------------------------------------------------------*/
648 /* All these synchronous SPI transfer routines are utilities layered
649 * over the core async transfer primitive. Here, "synchronous" means
650 * they will sleep uninterruptibly until the async transfer completes.
653 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
654 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
655 extern int spi_bus_lock(struct spi_master *master);
656 extern int spi_bus_unlock(struct spi_master *master);
659 * spi_write - SPI synchronous write
660 * @spi: device to which data will be written
662 * @len: data buffer size
665 * This writes the buffer and returns zero or a negative error code.
666 * Callable only from contexts that can sleep.
669 spi_write(struct spi_device *spi, const void *buf, size_t len)
671 struct spi_transfer t = {
675 struct spi_message m;
677 spi_message_init(&m);
678 spi_message_add_tail(&t, &m);
679 return spi_sync(spi, &m);
683 * spi_read - SPI synchronous read
684 * @spi: device from which data will be read
686 * @len: data buffer size
689 * This reads the buffer and returns zero or a negative error code.
690 * Callable only from contexts that can sleep.
693 spi_read(struct spi_device *spi, void *buf, size_t len)
695 struct spi_transfer t = {
699 struct spi_message m;
701 spi_message_init(&m);
702 spi_message_add_tail(&t, &m);
703 return spi_sync(spi, &m);
707 * spi_sync_transfer - synchronous SPI data transfer
708 * @spi: device with which data will be exchanged
709 * @xfers: An array of spi_transfers
710 * @num_xfers: Number of items in the xfer array
713 * Does a synchronous SPI data transfer of the given spi_transfer array.
715 * For more specific semantics see spi_sync().
717 * It returns zero on success, else a negative error code.
720 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
721 unsigned int num_xfers)
723 struct spi_message msg;
725 spi_message_init_with_transfers(&msg, xfers, num_xfers);
727 return spi_sync(spi, &msg);
730 /* this copies txbuf and rxbuf data; for small transfers only! */
731 extern int spi_write_then_read(struct spi_device *spi,
732 const void *txbuf, unsigned n_tx,
733 void *rxbuf, unsigned n_rx);
736 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
737 * @spi: device with which data will be exchanged
738 * @cmd: command to be written before data is read back
741 * This returns the (unsigned) eight bit number returned by the
742 * device, or else a negative error code. Callable only from
743 * contexts that can sleep.
745 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
750 status = spi_write_then_read(spi, &cmd, 1, &result, 1);
752 /* return negative errno or unsigned value */
753 return (status < 0) ? status : result;
757 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
758 * @spi: device with which data will be exchanged
759 * @cmd: command to be written before data is read back
762 * This returns the (unsigned) sixteen bit number returned by the
763 * device, or else a negative error code. Callable only from
764 * contexts that can sleep.
766 * The number is returned in wire-order, which is at least sometimes
769 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
774 status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2);
776 /* return negative errno or unsigned value */
777 return (status < 0) ? status : result;
780 /*---------------------------------------------------------------------------*/
783 * INTERFACE between board init code and SPI infrastructure.
785 * No SPI driver ever sees these SPI device table segments, but
786 * it's how the SPI core (or adapters that get hotplugged) grows
787 * the driver model tree.
789 * As a rule, SPI devices can't be probed. Instead, board init code
790 * provides a table listing the devices which are present, with enough
791 * information to bind and set up the device's driver. There's basic
792 * support for nonstatic configurations too; enough to handle adding
793 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
797 * struct spi_board_info - board-specific template for a SPI device
798 * @modalias: Initializes spi_device.modalias; identifies the driver.
799 * @platform_data: Initializes spi_device.platform_data; the particular
800 * data stored there is driver-specific.
801 * @controller_data: Initializes spi_device.controller_data; some
802 * controllers need hints about hardware setup, e.g. for DMA.
803 * @irq: Initializes spi_device.irq; depends on how the board is wired.
804 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
805 * from the chip datasheet and board-specific signal quality issues.
806 * @bus_num: Identifies which spi_master parents the spi_device; unused
807 * by spi_new_device(), and otherwise depends on board wiring.
808 * @chip_select: Initializes spi_device.chip_select; depends on how
809 * the board is wired.
810 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
811 * wiring (some devices support both 3WIRE and standard modes), and
812 * possibly presence of an inverter in the chipselect path.
814 * When adding new SPI devices to the device tree, these structures serve
815 * as a partial device template. They hold information which can't always
816 * be determined by drivers. Information that probe() can establish (such
817 * as the default transfer wordsize) is not included here.
819 * These structures are used in two places. Their primary role is to
820 * be stored in tables of board-specific device descriptors, which are
821 * declared early in board initialization and then used (much later) to
822 * populate a controller's device tree after the that controller's driver
823 * initializes. A secondary (and atypical) role is as a parameter to
824 * spi_new_device() call, which happens after those controller drivers
825 * are active in some dynamic board configuration models.
827 struct spi_board_info {
828 /* the device name and module name are coupled, like platform_bus;
829 * "modalias" is normally the driver name.
831 * platform_data goes to spi_device.dev.platform_data,
832 * controller_data goes to spi_device.controller_data,
835 char modalias[SPI_NAME_SIZE];
836 const void *platform_data;
837 void *controller_data;
840 /* slower signaling on noisy or low voltage boards */
844 /* bus_num is board specific and matches the bus_num of some
845 * spi_master that will probably be registered later.
847 * chip_select reflects how this chip is wired to that master;
848 * it's less than num_chipselect.
853 /* mode becomes spi_device.mode, and is essential for chips
854 * where the default of SPI_CS_HIGH = 0 is wrong.
858 /* ... may need additional spi_device chip config data here.
859 * avoid stuff protocol drivers can set; but include stuff
860 * needed to behave without being bound to a driver:
861 * - quirks like clock rate mattering when not selected
867 spi_register_board_info(struct spi_board_info const *info, unsigned n);
869 /* board init code may ignore whether SPI is configured or not */
871 spi_register_board_info(struct spi_board_info const *info, unsigned n)
876 /* If you're hotplugging an adapter with devices (parport, usb, etc)
877 * use spi_new_device() to describe each device. You can also call
878 * spi_unregister_device() to start making that device vanish, but
879 * normally that would be handled by spi_unregister_master().
881 * You can also use spi_alloc_device() and spi_add_device() to use a two
882 * stage registration sequence for each spi_device. This gives the caller
883 * some more control over the spi_device structure before it is registered,
884 * but requires that caller to initialize fields that would otherwise
885 * be defined using the board info.
887 extern struct spi_device *
888 spi_alloc_device(struct spi_master *master);
891 spi_add_device(struct spi_device *spi);
893 extern struct spi_device *
894 spi_new_device(struct spi_master *, struct spi_board_info *);
897 spi_unregister_device(struct spi_device *spi)
900 device_unregister(&spi->dev);
903 extern const struct spi_device_id *
904 spi_get_device_id(const struct spi_device *sdev);
906 #endif /* __LINUX_SPI_H */