include/linux/irq.h

   1 #ifndef _LINUX_IRQ_H
   2 #define _LINUX_IRQ_H
   3
   4 /*
   5  * Please do not include this file in generic code.  There is currently
   6  * no requirement for any architecture to implement anything held
   7  * within this file.
   8  *
   9  * Thanks. --rmk
  10  */
  11
  12 #include <linux/smp.h>
  13
  14 #ifndef CONFIG_S390
  15
  16 #include <linux/linkage.h>
  17 #include <linux/cache.h>
  18 #include <linux/spinlock.h>
  19 #include <linux/cpumask.h>
  20 #include <linux/gfp.h>
  21 #include <linux/irqreturn.h>
  22 #include <linux/irqnr.h>
  23 #include <linux/errno.h>
  24 #include <linux/topology.h>
  25
  26 #include <asm/irq.h>
  27 #include <asm/ptrace.h>
  28 #include <asm/irq_regs.h>
  29
  30 struct irq_desc;
  31 typedef void (*irq_flow_handler_t)(unsigned int irq,
  32                                             struct irq_desc *desc);
  33
  34
  35 /*
  36  * IRQ line status.
  37  *
  38  * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
  39  *
  40  * IRQ types
  41  */
  42 #define IRQ_TYPE_NONE           0x00000000      /* Default, unspecified type */
  43 #define IRQ_TYPE_EDGE_RISING    0x00000001      /* Edge rising type */
  44 #define IRQ_TYPE_EDGE_FALLING   0x00000002      /* Edge falling type */
  45 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
  46 #define IRQ_TYPE_LEVEL_HIGH     0x00000004      /* Level high type */
  47 #define IRQ_TYPE_LEVEL_LOW      0x00000008      /* Level low type */
  48 #define IRQ_TYPE_SENSE_MASK     0x0000000f      /* Mask of the above */
  49 #define IRQ_TYPE_PROBE          0x00000010      /* Probing in progress */
  50
  51 /* Internal flags */
  52 #define IRQ_INPROGRESS          0x00000100      /* IRQ handler active - do not enter! */
  53 #define IRQ_DISABLED            0x00000200      /* IRQ disabled - do not enter! */
  54 #define IRQ_PENDING             0x00000400      /* IRQ pending - replay on enable */
  55 #define IRQ_REPLAY              0x00000800      /* IRQ has been replayed but not acked yet */
  56 #define IRQ_AUTODETECT          0x00001000      /* IRQ is being autodetected */
  57 #define IRQ_WAITING             0x00002000      /* IRQ not yet seen - for autodetection */
  58 #define IRQ_LEVEL               0x00004000      /* IRQ level triggered */
  59 #define IRQ_MASKED              0x00008000      /* IRQ masked - shouldn't be seen again */
  60 #define IRQ_PER_CPU             0x00010000      /* IRQ is per CPU */
  61 #define IRQ_NOPROBE             0x00020000      /* IRQ is not valid for probing */
  62 #define IRQ_NOREQUEST           0x00040000      /* IRQ cannot be requested */
  63 #define IRQ_NOAUTOEN            0x00080000      /* IRQ will not be enabled on request irq */
  64 #define IRQ_WAKEUP              0x00100000      /* IRQ triggers system wakeup */
  65 #define IRQ_MOVE_PENDING        0x00200000      /* need to re-target IRQ destination */
  66 #define IRQ_NO_BALANCING        0x00400000      /* IRQ is excluded from balancing */
  67 #define IRQ_SPURIOUS_DISABLED   0x00800000      /* IRQ was disabled by the spurious trap */
  68 #define IRQ_MOVE_PCNTXT         0x01000000      /* IRQ migration from process context */
  69 #define IRQ_AFFINITY_SET        0x02000000      /* IRQ affinity was set from userspace*/
  70 #define IRQ_SUSPENDED           0x04000000      /* IRQ has gone through suspend sequence */
  71
  72 #ifdef CONFIG_IRQ_PER_CPU
  73 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
  74 # define IRQ_NO_BALANCING_MASK  (IRQ_PER_CPU | IRQ_NO_BALANCING)
  75 #else
  76 # define CHECK_IRQ_PER_CPU(var) 0
  77 # define IRQ_NO_BALANCING_MASK  IRQ_NO_BALANCING
  78 #endif
  79
  80 struct proc_dir_entry;
  81 struct msi_desc;
  82
  83 /**
  84  * struct irq_chip - hardware interrupt chip descriptor
  85  *
  86  * @name:               name for /proc/interrupts
  87  * @startup:            start up the interrupt (defaults to ->enable if NULL)
  88  * @shutdown:           shut down the interrupt (defaults to ->disable if NULL)
  89  * @enable:             enable the interrupt (defaults to chip->unmask if NULL)
  90  * @disable:            disable the interrupt (defaults to chip->mask if NULL)
  91  * @ack:                start of a new interrupt
  92  * @mask:               mask an interrupt source
  93  * @mask_ack:           ack and mask an interrupt source
  94  * @unmask:             unmask an interrupt source
  95  * @eoi:                end of interrupt - chip level
  96  * @end:                end of interrupt - flow level
  97  * @set_affinity:       set the CPU affinity on SMP machines
  98  * @retrigger:          resend an IRQ to the CPU
  99  * @set_type:           set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
 100  * @set_wake:           enable/disable power-management wake-on of an IRQ
 101  *
 102  * @release:            release function solely used by UML
 103  * @typename:           obsoleted by name, kept as migration helper
 104  */
 105 struct irq_chip {
 106         const char      *name;
 107         unsigned int    (*startup)(unsigned int irq);
 108         void            (*shutdown)(unsigned int irq);
 109         void            (*enable)(unsigned int irq);
 110         void            (*disable)(unsigned int irq);
 111
 112         void            (*ack)(unsigned int irq);
 113         void            (*mask)(unsigned int irq);
 114         void            (*mask_ack)(unsigned int irq);
 115         void            (*unmask)(unsigned int irq);
 116         void            (*eoi)(unsigned int irq);
 117
 118         void            (*end)(unsigned int irq);
 119         void            (*set_affinity)(unsigned int irq,
 120                                         const struct cpumask *dest);
 121         int             (*retrigger)(unsigned int irq);
 122         int             (*set_type)(unsigned int irq, unsigned int flow_type);
 123         int             (*set_wake)(unsigned int irq, unsigned int on);
 124
 125         /* Currently used only by UML, might disappear one day.*/
 126 #ifdef CONFIG_IRQ_RELEASE_METHOD
 127         void            (*release)(unsigned int irq, void *dev_id);
 128 #endif
 129         /*
 130          * For compatibility, ->typename is copied into ->name.
 131          * Will disappear.
 132          */
 133         const char      *typename;
 134 };
 135
 136 struct timer_rand_state;
 137 struct irq_2_iommu;
 138 /**
 139  * struct irq_desc - interrupt descriptor
 140  * @irq:                interrupt number for this descriptor
 141  * @timer_rand_state:   pointer to timer rand state struct
 142  * @kstat_irqs:         irq stats per cpu
 143  * @irq_2_iommu:        iommu with this irq
 144  * @handle_irq:         highlevel irq-events handler [if NULL, __do_IRQ()]
 145  * @chip:               low level interrupt hardware access
 146  * @msi_desc:           MSI descriptor
 147  * @handler_data:       per-IRQ data for the irq_chip methods
 148  * @chip_data:          platform-specific per-chip private data for the chip
 149  *                      methods, to allow shared chip implementations
 150  * @action:             the irq action chain
 151  * @status:             status information
 152  * @depth:              disable-depth, for nested irq_disable() calls
 153  * @wake_depth:         enable depth, for multiple set_irq_wake() callers
 154  * @irq_count:          stats field to detect stalled irqs
 155  * @last_unhandled:     aging timer for unhandled count
 156  * @irqs_unhandled:     stats field for spurious unhandled interrupts
 157  * @lock:               locking for SMP
 158  * @affinity:           IRQ affinity on SMP
 159  * @cpu:                cpu index useful for balancing
 160  * @pending_mask:       pending rebalanced interrupts
 161  * @dir:                /proc/irq/ procfs entry
 162  * @name:               flow handler name for /proc/interrupts output
 163  */
 164 struct irq_desc {
 165         unsigned int            irq;
 166         struct timer_rand_state *timer_rand_state;
 167         unsigned int            *kstat_irqs;
 168 #ifdef CONFIG_INTR_REMAP
 169         struct irq_2_iommu      *irq_2_iommu;
 170 #endif
 171         irq_flow_handler_t      handle_irq;
 172         struct irq_chip         *chip;
 173         struct msi_desc         *msi_desc;
 174         void                    *handler_data;
 175         void                    *chip_data;
 176         struct irqaction        *action;        /* IRQ action list */
 177         unsigned int            status;         /* IRQ status */
 178
 179         unsigned int            depth;          /* nested irq disables */
 180         unsigned int            wake_depth;     /* nested wake enables */
 181         unsigned int            irq_count;      /* For detecting broken IRQs */
 182         unsigned long           last_unhandled; /* Aging timer for unhandled count */
 183         unsigned int            irqs_unhandled;
 184         spinlock_t              lock;
 185 #ifdef CONFIG_SMP
 186         cpumask_var_t           affinity;
 187         unsigned int            cpu;
 188 #ifdef CONFIG_GENERIC_PENDING_IRQ
 189         cpumask_var_t           pending_mask;
 190 #endif
 191 #endif
 192 #ifdef CONFIG_PROC_FS
 193         struct proc_dir_entry   *dir;
 194 #endif
 195         const char              *name;
 196 } ____cacheline_internodealigned_in_smp;
 197
 198 extern void arch_init_copy_chip_data(struct irq_desc *old_desc,
 199                                         struct irq_desc *desc, int cpu);
 200 extern void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc);
 201
 202 #ifndef CONFIG_SPARSE_IRQ
 203 extern struct irq_desc irq_desc[NR_IRQS];
 204 #else /* CONFIG_SPARSE_IRQ */
 205 extern struct irq_desc *move_irq_desc(struct irq_desc *old_desc, int cpu);
 206 #endif /* CONFIG_SPARSE_IRQ */
 207
 208 extern struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu);
 209
 210 static inline struct irq_desc *
 211 irq_remap_to_desc(unsigned int irq, struct irq_desc *desc)
 212 {
 213 #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC
 214         return irq_to_desc(irq);
 215 #else
 216         return desc;
 217 #endif
 218 }
 219
 220 /*
 221  * Migration helpers for obsolete names, they will go away:
 222  */
 223 #define hw_interrupt_type       irq_chip
 224 #define no_irq_type             no_irq_chip
 225 typedef struct irq_desc         irq_desc_t;
 226
 227 /*
 228  * Pick up the arch-dependent methods:
 229  */
 230 #include <asm/hw_irq.h>
 231
 232 extern int setup_irq(unsigned int irq, struct irqaction *new);
 233 extern void remove_irq(unsigned int irq, struct irqaction *act);
 234
 235 #ifdef CONFIG_GENERIC_HARDIRQS
 236
 237 #ifdef CONFIG_SMP
 238
 239 #ifdef CONFIG_GENERIC_PENDING_IRQ
 240
 241 void move_native_irq(int irq);
 242 void move_masked_irq(int irq);
 243
 244 #else /* CONFIG_GENERIC_PENDING_IRQ */
 245
 246 static inline void move_irq(int irq)
 247 {
 248 }
 249
 250 static inline void move_native_irq(int irq)
 251 {
 252 }
 253
 254 static inline void move_masked_irq(int irq)
 255 {
 256 }
 257
 258 #endif /* CONFIG_GENERIC_PENDING_IRQ */
 259
 260 #else /* CONFIG_SMP */
 261
 262 #define move_native_irq(x)
 263 #define move_masked_irq(x)
 264
 265 #endif /* CONFIG_SMP */
 266
 267 extern int no_irq_affinity;
 268
 269 static inline int irq_balancing_disabled(unsigned int irq)
 270 {
 271         struct irq_desc *desc;
 272
 273         desc = irq_to_desc(irq);
 274         return desc->status & IRQ_NO_BALANCING_MASK;
 275 }
 276
 277 /* Handle irq action chains: */
 278 extern irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action);
 279
 280 /*
 281  * Built-in IRQ handlers for various IRQ types,
 282  * callable via desc->chip->handle_irq()
 283  */
 284 extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
 285 extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
 286 extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
 287 extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
 288 extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
 289 extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
 290
 291 /*
 292  * Monolithic do_IRQ implementation.
 293  */
 294 #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
 295 extern unsigned int __do_IRQ(unsigned int irq);
 296 #endif
 297
 298 /*
 299  * Architectures call this to let the generic IRQ layer
 300  * handle an interrupt. If the descriptor is attached to an
 301  * irqchip-style controller then we call the ->handle_irq() handler,
 302  * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
 303  */
 304 static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc)
 305 {
 306 #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
 307         desc->handle_irq(irq, desc);
 308 #else
 309         if (likely(desc->handle_irq))
 310                 desc->handle_irq(irq, desc);
 311         else
 312                 __do_IRQ(irq);
 313 #endif
 314 }
 315
 316 static inline void generic_handle_irq(unsigned int irq)
 317 {
 318         generic_handle_irq_desc(irq, irq_to_desc(irq));
 319 }
 320
 321 /* Handling of unhandled and spurious interrupts: */
 322 extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
 323                            irqreturn_t action_ret);
 324
 325 /* Resending of interrupts :*/
 326 void check_irq_resend(struct irq_desc *desc, unsigned int irq);
 327
 328 /* Enable/disable irq debugging output: */
 329 extern int noirqdebug_setup(char *str);
 330
 331 /* Checks whether the interrupt can be requested by request_irq(): */
 332 extern int can_request_irq(unsigned int irq, unsigned long irqflags);
 333
 334 /* Dummy irq-chip implementations: */
 335 extern struct irq_chip no_irq_chip;
 336 extern struct irq_chip dummy_irq_chip;
 337
 338 extern void
 339 set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
 340                          irq_flow_handler_t handle);
 341 extern void
 342 set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
 343                               irq_flow_handler_t handle, const char *name);
 344
 345 extern void
 346 __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
 347                   const char *name);
 348
 349 /* caller has locked the irq_desc and both params are valid */
 350 static inline void __set_irq_handler_unlocked(int irq,
 351                                               irq_flow_handler_t handler)
 352 {
 353         struct irq_desc *desc;
 354
 355         desc = irq_to_desc(irq);
 356         desc->handle_irq = handler;
 357 }
 358
 359 /*
 360  * Set a highlevel flow handler for a given IRQ:
 361  */
 362 static inline void
 363 set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
 364 {
 365         __set_irq_handler(irq, handle, 0, NULL);
 366 }
 367
 368 /*
 369  * Set a highlevel chained flow handler for a given IRQ.
 370  * (a chained handler is automatically enabled and set to
 371  *  IRQ_NOREQUEST and IRQ_NOPROBE)
 372  */
 373 static inline void
 374 set_irq_chained_handler(unsigned int irq,
 375                         irq_flow_handler_t handle)
 376 {
 377         __set_irq_handler(irq, handle, 1, NULL);
 378 }
 379
 380 extern void set_irq_noprobe(unsigned int irq);
 381 extern void set_irq_probe(unsigned int irq);
 382
 383 /* Handle dynamic irq creation and destruction */
 384 extern unsigned int create_irq_nr(unsigned int irq_want);
 385 extern int create_irq(void);
 386 extern void destroy_irq(unsigned int irq);
 387
 388 /* Test to see if a driver has successfully requested an irq */
 389 static inline int irq_has_action(unsigned int irq)
 390 {
 391         struct irq_desc *desc = irq_to_desc(irq);
 392         return desc->action != NULL;
 393 }
 394
 395 /* Dynamic irq helper functions */
 396 extern void dynamic_irq_init(unsigned int irq);
 397 extern void dynamic_irq_cleanup(unsigned int irq);
 398
 399 /* Set/get chip/data for an IRQ: */
 400 extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
 401 extern int set_irq_data(unsigned int irq, void *data);
 402 extern int set_irq_chip_data(unsigned int irq, void *data);
 403 extern int set_irq_type(unsigned int irq, unsigned int type);
 404 extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
 405
 406 #define get_irq_chip(irq)       (irq_to_desc(irq)->chip)
 407 #define get_irq_chip_data(irq)  (irq_to_desc(irq)->chip_data)
 408 #define get_irq_data(irq)       (irq_to_desc(irq)->handler_data)
 409 #define get_irq_msi(irq)        (irq_to_desc(irq)->msi_desc)
 410
 411 #define get_irq_desc_chip(desc)         ((desc)->chip)
 412 #define get_irq_desc_chip_data(desc)    ((desc)->chip_data)
 413 #define get_irq_desc_data(desc)         ((desc)->handler_data)
 414 #define get_irq_desc_msi(desc)          ((desc)->msi_desc)
 415
 416 #endif /* CONFIG_GENERIC_HARDIRQS */
 417
 418 #endif /* !CONFIG_S390 */
 419
 420 #ifdef CONFIG_SMP
 421 /**
 422  * init_alloc_desc_masks - allocate cpumasks for irq_desc
 423  * @desc:       pointer to irq_desc struct
 424  * @cpu:        cpu which will be handling the cpumasks
 425  * @boot:       true if need bootmem
 426  *
 427  * Allocates affinity and pending_mask cpumask if required.
 428  * Returns true if successful (or not required).
 429  * Side effect: affinity has all bits set, pending_mask has all bits clear.
 430  */
 431 static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu,
 432                                                                 bool boot)
 433 {
 434         int node;
 435
 436         if (boot) {
 437                 alloc_bootmem_cpumask_var(&desc->affinity);
 438                 cpumask_setall(desc->affinity);
 439
 440 #ifdef CONFIG_GENERIC_PENDING_IRQ
 441                 alloc_bootmem_cpumask_var(&desc->pending_mask);
 442                 cpumask_clear(desc->pending_mask);
 443 #endif
 444                 return true;
 445         }
 446
 447         node = cpu_to_node(cpu);
 448
 449         if (!alloc_cpumask_var_node(&desc->affinity, GFP_ATOMIC, node))
 450                 return false;
 451         cpumask_setall(desc->affinity);
 452
 453 #ifdef CONFIG_GENERIC_PENDING_IRQ
 454         if (!alloc_cpumask_var_node(&desc->pending_mask, GFP_ATOMIC, node)) {
 455                 free_cpumask_var(desc->affinity);
 456                 return false;
 457         }
 458         cpumask_clear(desc->pending_mask);
 459 #endif
 460         return true;
 461 }
 462
 463 /**
 464  * init_copy_desc_masks - copy cpumasks for irq_desc
 465  * @old_desc:   pointer to old irq_desc struct
 466  * @new_desc:   pointer to new irq_desc struct
 467  *
 468  * Insures affinity and pending_masks are copied to new irq_desc.
 469  * If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the
 470  * irq_desc struct so the copy is redundant.
 471  */
 472
 473 static inline void init_copy_desc_masks(struct irq_desc *old_desc,
 474                                         struct irq_desc *new_desc)
 475 {
 476 #ifdef CONFIG_CPUMASKS_OFFSTACK
 477         cpumask_copy(new_desc->affinity, old_desc->affinity);
 478
 479 #ifdef CONFIG_GENERIC_PENDING_IRQ
 480         cpumask_copy(new_desc->pending_mask, old_desc->pending_mask);
 481 #endif
 482 #endif
 483 }
 484
 485 static inline void free_desc_masks(struct irq_desc *old_desc,
 486                                    struct irq_desc *new_desc)
 487 {
 488         free_cpumask_var(old_desc->affinity);
 489
 490 #ifdef CONFIG_GENERIC_PENDING_IRQ
 491         free_cpumask_var(old_desc->pending_mask);
 492 #endif
 493 }
 494
 495 #else /* !CONFIG_SMP */
 496
 497 static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu,
 498                                                                 bool boot)
 499 {
 500         return true;
 501 }
 502
 503 static inline void init_copy_desc_masks(struct irq_desc *old_desc,
 504                                         struct irq_desc *new_desc)
 505 {
 506 }
 507
 508 static inline void free_desc_masks(struct irq_desc *old_desc,
 509                                    struct irq_desc *new_desc)
 510 {
 511 }
 512 #endif  /* CONFIG_SMP */
 513
 514 #endif /* _LINUX_IRQ_H */