include/asm-x86/paravirt.h

   1 #ifndef __ASM_PARAVIRT_H
   2 #define __ASM_PARAVIRT_H
   3 /* Various instructions on x86 need to be replaced for
   4  * para-virtualization: those hooks are defined here. */
   5
   6 #ifdef CONFIG_PARAVIRT
   7 #include <asm/page.h>
   8 #include <asm/asm.h>
   9
  10 /* Bitmask of what can be clobbered: usually at least eax. */
  11 #define CLBR_NONE 0
  12 #define CLBR_EAX  (1 << 0)
  13 #define CLBR_ECX  (1 << 1)
  14 #define CLBR_EDX  (1 << 2)
  15
  16 #ifdef CONFIG_X86_64
  17 #define CLBR_RSI  (1 << 3)
  18 #define CLBR_RDI  (1 << 4)
  19 #define CLBR_R8   (1 << 5)
  20 #define CLBR_R9   (1 << 6)
  21 #define CLBR_R10  (1 << 7)
  22 #define CLBR_R11  (1 << 8)
  23 #define CLBR_ANY  ((1 << 9) - 1)
  24 #include <asm/desc_defs.h>
  25 #else
  26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
  27 #define CLBR_ANY  ((1 << 3) - 1)
  28 #endif /* X86_64 */
  29
  30 #ifndef __ASSEMBLY__
  31 #include <linux/types.h>
  32 #include <linux/cpumask.h>
  33 #include <asm/kmap_types.h>
  34 #include <asm/desc_defs.h>
  35
  36 struct page;
  37 struct thread_struct;
  38 struct desc_ptr;
  39 struct tss_struct;
  40 struct mm_struct;
  41 struct desc_struct;
  42
  43 /* general info */
  44 struct pv_info {
  45         unsigned int kernel_rpl;
  46         int shared_kernel_pmd;
  47         int paravirt_enabled;
  48         const char *name;
  49 };
  50
  51 struct pv_init_ops {
  52         /*
  53          * Patch may replace one of the defined code sequences with
  54          * arbitrary code, subject to the same register constraints.
  55          * This generally means the code is not free to clobber any
  56          * registers other than EAX.  The patch function should return
  57          * the number of bytes of code generated, as we nop pad the
  58          * rest in generic code.
  59          */
  60         unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
  61                           unsigned long addr, unsigned len);
  62
  63         /* Basic arch-specific setup */
  64         void (*arch_setup)(void);
  65         char *(*memory_setup)(void);
  66         void (*post_allocator_init)(void);
  67
  68         /* Print a banner to identify the environment */
  69         void (*banner)(void);
  70 };
  71
  72
  73 struct pv_lazy_ops {
  74         /* Set deferred update mode, used for batching operations. */
  75         void (*enter)(void);
  76         void (*leave)(void);
  77 };
  78
  79 struct pv_time_ops {
  80         void (*time_init)(void);
  81
  82         /* Set and set time of day */
  83         unsigned long (*get_wallclock)(void);
  84         int (*set_wallclock)(unsigned long);
  85
  86         unsigned long long (*sched_clock)(void);
  87         unsigned long (*get_tsc_khz)(void);
  88 };
  89
  90 struct pv_cpu_ops {
  91         /* hooks for various privileged instructions */
  92         unsigned long (*get_debugreg)(int regno);
  93         void (*set_debugreg)(int regno, unsigned long value);
  94
  95         void (*clts)(void);
  96
  97         unsigned long (*read_cr0)(void);
  98         void (*write_cr0)(unsigned long);
  99
 100         unsigned long (*read_cr4_safe)(void);
 101         unsigned long (*read_cr4)(void);
 102         void (*write_cr4)(unsigned long);
 103
 104 #ifdef CONFIG_X86_64
 105         unsigned long (*read_cr8)(void);
 106         void (*write_cr8)(unsigned long);
 107 #endif
 108
 109         /* Segment descriptor handling */
 110         void (*load_tr_desc)(void);
 111         void (*load_gdt)(const struct desc_ptr *);
 112         void (*load_idt)(const struct desc_ptr *);
 113         void (*store_gdt)(struct desc_ptr *);
 114         void (*store_idt)(struct desc_ptr *);
 115         void (*set_ldt)(const void *desc, unsigned entries);
 116         unsigned long (*store_tr)(void);
 117         void (*load_tls)(struct thread_struct *t, unsigned int cpu);
 118 #ifdef CONFIG_X86_64
 119         void (*load_gs_index)(unsigned int idx);
 120 #endif
 121         void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
 122                                 const void *desc);
 123         void (*write_gdt_entry)(struct desc_struct *,
 124                                 int entrynum, const void *desc, int size);
 125         void (*write_idt_entry)(gate_desc *,
 126                                 int entrynum, const gate_desc *gate);
 127         void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
 128
 129         void (*set_iopl_mask)(unsigned mask);
 130
 131         void (*wbinvd)(void);
 132         void (*io_delay)(void);
 133
 134         /* cpuid emulation, mostly so that caps bits can be disabled */
 135         void (*cpuid)(unsigned int *eax, unsigned int *ebx,
 136                       unsigned int *ecx, unsigned int *edx);
 137
 138         /* MSR, PMC and TSR operations.
 139            err = 0/-EFAULT.  wrmsr returns 0/-EFAULT. */
 140         u64 (*read_msr)(unsigned int msr, int *err);
 141         int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
 142
 143         u64 (*read_tsc)(void);
 144         u64 (*read_pmc)(int counter);
 145         unsigned long long (*read_tscp)(unsigned int *aux);
 146
 147         /*
 148          * Atomically enable interrupts and return to userspace.  This
 149          * is only ever used to return to 32-bit processes; in a
 150          * 64-bit kernel, it's used for 32-on-64 compat processes, but
 151          * never native 64-bit processes.  (Jump, not call.)
 152          */
 153         void (*irq_enable_sysexit)(void);
 154
 155         /*
 156          * Switch to usermode gs and return to 64-bit usermode using
 157          * sysret.  Only used in 64-bit kernels to return to 64-bit
 158          * processes.  Usermode register state, including %rsp, must
 159          * already be restored.
 160          */
 161         void (*usergs_sysret64)(void);
 162
 163         /*
 164          * Switch to usermode gs and return to 32-bit usermode using
 165          * sysret.  Used to return to 32-on-64 compat processes.
 166          * Other usermode register state, including %esp, must already
 167          * be restored.
 168          */
 169         void (*usergs_sysret32)(void);
 170
 171         /* Normal iret.  Jump to this with the standard iret stack
 172            frame set up. */
 173         void (*iret)(void);
 174
 175         void (*swapgs)(void);
 176
 177         struct pv_lazy_ops lazy_mode;
 178 };
 179
 180 struct pv_irq_ops {
 181         void (*init_IRQ)(void);
 182
 183         /*
 184          * Get/set interrupt state.  save_fl and restore_fl are only
 185          * expected to use X86_EFLAGS_IF; all other bits
 186          * returned from save_fl are undefined, and may be ignored by
 187          * restore_fl.
 188          */
 189         unsigned long (*save_fl)(void);
 190         void (*restore_fl)(unsigned long);
 191         void (*irq_disable)(void);
 192         void (*irq_enable)(void);
 193         void (*safe_halt)(void);
 194         void (*halt)(void);
 195
 196 #ifdef CONFIG_X86_64
 197         void (*adjust_exception_frame)(void);
 198 #endif
 199 };
 200
 201 struct pv_apic_ops {
 202 #ifdef CONFIG_X86_LOCAL_APIC
 203         /*
 204          * Direct APIC operations, principally for VMI.  Ideally
 205          * these shouldn't be in this interface.
 206          */
 207         void (*apic_write)(unsigned long reg, u32 v);
 208         void (*apic_write_atomic)(unsigned long reg, u32 v);
 209         u32 (*apic_read)(unsigned long reg);
 210         void (*setup_boot_clock)(void);
 211         void (*setup_secondary_clock)(void);
 212
 213         void (*startup_ipi_hook)(int phys_apicid,
 214                                  unsigned long start_eip,
 215                                  unsigned long start_esp);
 216 #endif
 217 };
 218
 219 struct pv_mmu_ops {
 220         /*
 221          * Called before/after init_mm pagetable setup. setup_start
 222          * may reset %cr3, and may pre-install parts of the pagetable;
 223          * pagetable setup is expected to preserve any existing
 224          * mapping.
 225          */
 226         void (*pagetable_setup_start)(pgd_t *pgd_base);
 227         void (*pagetable_setup_done)(pgd_t *pgd_base);
 228
 229         unsigned long (*read_cr2)(void);
 230         void (*write_cr2)(unsigned long);
 231
 232         unsigned long (*read_cr3)(void);
 233         void (*write_cr3)(unsigned long);
 234
 235         /*
 236          * Hooks for intercepting the creation/use/destruction of an
 237          * mm_struct.
 238          */
 239         void (*activate_mm)(struct mm_struct *prev,
 240                             struct mm_struct *next);
 241         void (*dup_mmap)(struct mm_struct *oldmm,
 242                          struct mm_struct *mm);
 243         void (*exit_mmap)(struct mm_struct *mm);
 244
 245
 246         /* TLB operations */
 247         void (*flush_tlb_user)(void);
 248         void (*flush_tlb_kernel)(void);
 249         void (*flush_tlb_single)(unsigned long addr);
 250         void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
 251                                  unsigned long va);
 252
 253         /* Hooks for allocating and freeing a pagetable top-level */
 254         int  (*pgd_alloc)(struct mm_struct *mm);
 255         void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
 256
 257         /*
 258          * Hooks for allocating/releasing pagetable pages when they're
 259          * attached to a pagetable
 260          */
 261         void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
 262         void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
 263         void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
 264         void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
 265         void (*release_pte)(u32 pfn);
 266         void (*release_pmd)(u32 pfn);
 267         void (*release_pud)(u32 pfn);
 268
 269         /* Pagetable manipulation functions */
 270         void (*set_pte)(pte_t *ptep, pte_t pteval);
 271         void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
 272                            pte_t *ptep, pte_t pteval);
 273         void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
 274         void (*pte_update)(struct mm_struct *mm, unsigned long addr,
 275                            pte_t *ptep);
 276         void (*pte_update_defer)(struct mm_struct *mm,
 277                                  unsigned long addr, pte_t *ptep);
 278
 279         pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
 280                                         pte_t *ptep);
 281         void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
 282                                         pte_t *ptep, pte_t pte);
 283
 284         pteval_t (*pte_val)(pte_t);
 285         pteval_t (*pte_flags)(pte_t);
 286         pte_t (*make_pte)(pteval_t pte);
 287
 288         pgdval_t (*pgd_val)(pgd_t);
 289         pgd_t (*make_pgd)(pgdval_t pgd);
 290
 291 #if PAGETABLE_LEVELS >= 3
 292 #ifdef CONFIG_X86_PAE
 293         void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
 294         void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
 295                                 pte_t *ptep, pte_t pte);
 296         void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
 297                           pte_t *ptep);
 298         void (*pmd_clear)(pmd_t *pmdp);
 299
 300 #endif  /* CONFIG_X86_PAE */
 301
 302         void (*set_pud)(pud_t *pudp, pud_t pudval);
 303
 304         pmdval_t (*pmd_val)(pmd_t);
 305         pmd_t (*make_pmd)(pmdval_t pmd);
 306
 307 #if PAGETABLE_LEVELS == 4
 308         pudval_t (*pud_val)(pud_t);
 309         pud_t (*make_pud)(pudval_t pud);
 310
 311         void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
 312 #endif  /* PAGETABLE_LEVELS == 4 */
 313 #endif  /* PAGETABLE_LEVELS >= 3 */
 314
 315 #ifdef CONFIG_HIGHPTE
 316         void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
 317 #endif
 318
 319         struct pv_lazy_ops lazy_mode;
 320
 321         /* dom0 ops */
 322
 323         /* Sometimes the physical address is a pfn, and sometimes its
 324            an mfn.  We can tell which is which from the index. */
 325         void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
 326                            unsigned long phys, pgprot_t flags);
 327 };
 328
 329 struct raw_spinlock;
 330 struct pv_lock_ops {
 331         int (*spin_is_locked)(struct raw_spinlock *lock);
 332         int (*spin_is_contended)(struct raw_spinlock *lock);
 333         void (*spin_lock)(struct raw_spinlock *lock);
 334         int (*spin_trylock)(struct raw_spinlock *lock);
 335         void (*spin_unlock)(struct raw_spinlock *lock);
 336 };
 337
 338 /* This contains all the paravirt structures: we get a convenient
 339  * number for each function using the offset which we use to indicate
 340  * what to patch. */
 341 struct paravirt_patch_template {
 342         struct pv_init_ops pv_init_ops;
 343         struct pv_time_ops pv_time_ops;
 344         struct pv_cpu_ops pv_cpu_ops;
 345         struct pv_irq_ops pv_irq_ops;
 346         struct pv_apic_ops pv_apic_ops;
 347         struct pv_mmu_ops pv_mmu_ops;
 348         struct pv_lock_ops pv_lock_ops;
 349 };
 350
 351 extern struct pv_info pv_info;
 352 extern struct pv_init_ops pv_init_ops;
 353 extern struct pv_time_ops pv_time_ops;
 354 extern struct pv_cpu_ops pv_cpu_ops;
 355 extern struct pv_irq_ops pv_irq_ops;
 356 extern struct pv_apic_ops pv_apic_ops;
 357 extern struct pv_mmu_ops pv_mmu_ops;
 358 extern struct pv_lock_ops pv_lock_ops;
 359
 360 #define PARAVIRT_PATCH(x)                                       \
 361         (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
 362
 363 #define paravirt_type(op)                               \
 364         [paravirt_typenum] "i" (PARAVIRT_PATCH(op)),    \
 365         [paravirt_opptr] "m" (op)
 366 #define paravirt_clobber(clobber)               \
 367         [paravirt_clobber] "i" (clobber)
 368
 369 /*
 370  * Generate some code, and mark it as patchable by the
 371  * apply_paravirt() alternate instruction patcher.
 372  */
 373 #define _paravirt_alt(insn_string, type, clobber)       \
 374         "771:\n\t" insn_string "\n" "772:\n"            \
 375         ".pushsection .parainstructions,\"a\"\n"        \
 376         _ASM_ALIGN "\n"                                 \
 377         _ASM_PTR " 771b\n"                              \
 378         "  .byte " type "\n"                            \
 379         "  .byte 772b-771b\n"                           \
 380         "  .short " clobber "\n"                        \
 381         ".popsection\n"
 382
 383 /* Generate patchable code, with the default asm parameters. */
 384 #define paravirt_alt(insn_string)                                       \
 385         _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
 386
 387 /* Simple instruction patching code. */
 388 #define DEF_NATIVE(ops, name, code)                                     \
 389         extern const char start_##ops##_##name[], end_##ops##_##name[]; \
 390         asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
 391
 392 unsigned paravirt_patch_nop(void);
 393 unsigned paravirt_patch_ignore(unsigned len);
 394 unsigned paravirt_patch_call(void *insnbuf,
 395                              const void *target, u16 tgt_clobbers,
 396                              unsigned long addr, u16 site_clobbers,
 397                              unsigned len);
 398 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
 399                             unsigned long addr, unsigned len);
 400 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
 401                                 unsigned long addr, unsigned len);
 402
 403 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
 404                               const char *start, const char *end);
 405
 406 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
 407                       unsigned long addr, unsigned len);
 408
 409 int paravirt_disable_iospace(void);
 410
 411 /*
 412  * This generates an indirect call based on the operation type number.
 413  * The type number, computed in PARAVIRT_PATCH, is derived from the
 414  * offset into the paravirt_patch_template structure, and can therefore be
 415  * freely converted back into a structure offset.
 416  */
 417 #define PARAVIRT_CALL   "call *%[paravirt_opptr];"
 418
 419 /*
 420  * These macros are intended to wrap calls through one of the paravirt
 421  * ops structs, so that they can be later identified and patched at
 422  * runtime.
 423  *
 424  * Normally, a call to a pv_op function is a simple indirect call:
 425  * (pv_op_struct.operations)(args...).
 426  *
 427  * Unfortunately, this is a relatively slow operation for modern CPUs,
 428  * because it cannot necessarily determine what the destination
 429  * address is.  In this case, the address is a runtime constant, so at
 430  * the very least we can patch the call to e a simple direct call, or
 431  * ideally, patch an inline implementation into the callsite.  (Direct
 432  * calls are essentially free, because the call and return addresses
 433  * are completely predictable.)
 434  *
 435  * For i386, these macros rely on the standard gcc "regparm(3)" calling
 436  * convention, in which the first three arguments are placed in %eax,
 437  * %edx, %ecx (in that order), and the remaining arguments are placed
 438  * on the stack.  All caller-save registers (eax,edx,ecx) are expected
 439  * to be modified (either clobbered or used for return values).
 440  * X86_64, on the other hand, already specifies a register-based calling
 441  * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
 442  * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
 443  * special handling for dealing with 4 arguments, unlike i386.
 444  * However, x86_64 also have to clobber all caller saved registers, which
 445  * unfortunately, are quite a bit (r8 - r11)
 446  *
 447  * The call instruction itself is marked by placing its start address
 448  * and size into the .parainstructions section, so that
 449  * apply_paravirt() in arch/i386/kernel/alternative.c can do the
 450  * appropriate patching under the control of the backend pv_init_ops
 451  * implementation.
 452  *
 453  * Unfortunately there's no way to get gcc to generate the args setup
 454  * for the call, and then allow the call itself to be generated by an
 455  * inline asm.  Because of this, we must do the complete arg setup and
 456  * return value handling from within these macros.  This is fairly
 457  * cumbersome.
 458  *
 459  * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
 460  * It could be extended to more arguments, but there would be little
 461  * to be gained from that.  For each number of arguments, there are
 462  * the two VCALL and CALL variants for void and non-void functions.
 463  *
 464  * When there is a return value, the invoker of the macro must specify
 465  * the return type.  The macro then uses sizeof() on that type to
 466  * determine whether its a 32 or 64 bit value, and places the return
 467  * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
 468  * 64-bit). For x86_64 machines, it just returns at %rax regardless of
 469  * the return value size.
 470  *
 471  * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
 472  * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
 473  * in low,high order
 474  *
 475  * Small structures are passed and returned in registers.  The macro
 476  * calling convention can't directly deal with this, so the wrapper
 477  * functions must do this.
 478  *
 479  * These PVOP_* macros are only defined within this header.  This
 480  * means that all uses must be wrapped in inline functions.  This also
 481  * makes sure the incoming and outgoing types are always correct.
 482  */
 483 #ifdef CONFIG_X86_32
 484 #define PVOP_VCALL_ARGS                 unsigned long __eax, __edx, __ecx
 485 #define PVOP_CALL_ARGS                  PVOP_VCALL_ARGS
 486 #define PVOP_VCALL_CLOBBERS             "=a" (__eax), "=d" (__edx),     \
 487                                         "=c" (__ecx)
 488 #define PVOP_CALL_CLOBBERS              PVOP_VCALL_CLOBBERS
 489 #define EXTRA_CLOBBERS
 490 #define VEXTRA_CLOBBERS
 491 #else
 492 #define PVOP_VCALL_ARGS         unsigned long __edi, __esi, __edx, __ecx
 493 #define PVOP_CALL_ARGS          PVOP_VCALL_ARGS, __eax
 494 #define PVOP_VCALL_CLOBBERS     "=D" (__edi),                           \
 495                                 "=S" (__esi), "=d" (__edx),             \
 496                                 "=c" (__ecx)
 497
 498 #define PVOP_CALL_CLOBBERS      PVOP_VCALL_CLOBBERS, "=a" (__eax)
 499
 500 #define EXTRA_CLOBBERS   , "r8", "r9", "r10", "r11"
 501 #define VEXTRA_CLOBBERS  , "rax", "r8", "r9", "r10", "r11"
 502 #endif
 503
 504 #ifdef CONFIG_PARAVIRT_DEBUG
 505 #define PVOP_TEST_NULL(op)      BUG_ON(op == NULL)
 506 #else
 507 #define PVOP_TEST_NULL(op)      ((void)op)
 508 #endif
 509
 510 #define __PVOP_CALL(rettype, op, pre, post, ...)                        \
 511         ({                                                              \
 512                 rettype __ret;                                          \
 513                 PVOP_CALL_ARGS;                                 \
 514                 PVOP_TEST_NULL(op);                                     \
 515                 /* This is 32-bit specific, but is okay in 64-bit */    \
 516                 /* since this condition will never hold */              \
 517                 if (sizeof(rettype) > sizeof(unsigned long)) {          \
 518                         asm volatile(pre                                \
 519                                      paravirt_alt(PARAVIRT_CALL)        \
 520                                      post                               \
 521                                      : PVOP_CALL_CLOBBERS               \
 522                                      : paravirt_type(op),               \
 523                                        paravirt_clobber(CLBR_ANY),      \
 524                                        ##__VA_ARGS__                    \
 525                                      : "memory", "cc" EXTRA_CLOBBERS);  \
 526                         __ret = (rettype)((((u64)__edx) << 32) | __eax); \
 527                 } else {                                                \
 528                         asm volatile(pre                                \
 529                                      paravirt_alt(PARAVIRT_CALL)        \
 530                                      post                               \
 531                                      : PVOP_CALL_CLOBBERS               \
 532                                      : paravirt_type(op),               \
 533                                        paravirt_clobber(CLBR_ANY),      \
 534                                        ##__VA_ARGS__                    \
 535                                      : "memory", "cc" EXTRA_CLOBBERS);  \
 536                         __ret = (rettype)__eax;                         \
 537                 }                                                       \
 538                 __ret;                                                  \
 539         })
 540 #define __PVOP_VCALL(op, pre, post, ...)                                \
 541         ({                                                              \
 542                 PVOP_VCALL_ARGS;                                        \
 543                 PVOP_TEST_NULL(op);                                     \
 544                 asm volatile(pre                                        \
 545                              paravirt_alt(PARAVIRT_CALL)                \
 546                              post                                       \
 547                              : PVOP_VCALL_CLOBBERS                      \
 548                              : paravirt_type(op),                       \
 549                                paravirt_clobber(CLBR_ANY),              \
 550                                ##__VA_ARGS__                            \
 551                              : "memory", "cc" VEXTRA_CLOBBERS);         \
 552         })
 553
 554 #define PVOP_CALL0(rettype, op)                                         \
 555         __PVOP_CALL(rettype, op, "", "")
 556 #define PVOP_VCALL0(op)                                                 \
 557         __PVOP_VCALL(op, "", "")
 558
 559 #define PVOP_CALL1(rettype, op, arg1)                                   \
 560         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
 561 #define PVOP_VCALL1(op, arg1)                                           \
 562         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
 563
 564 #define PVOP_CALL2(rettype, op, arg1, arg2)                             \
 565         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
 566         "1" ((unsigned long)(arg2)))
 567 #define PVOP_VCALL2(op, arg1, arg2)                                     \
 568         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
 569         "1" ((unsigned long)(arg2)))
 570
 571 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3)                       \
 572         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
 573         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
 574 #define PVOP_VCALL3(op, arg1, arg2, arg3)                               \
 575         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
 576         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
 577
 578 /* This is the only difference in x86_64. We can make it much simpler */
 579 #ifdef CONFIG_X86_32
 580 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
 581         __PVOP_CALL(rettype, op,                                        \
 582                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
 583                     "0" ((u32)(arg1)), "1" ((u32)(arg2)),               \
 584                     "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
 585 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
 586         __PVOP_VCALL(op,                                                \
 587                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
 588                     "0" ((u32)(arg1)), "1" ((u32)(arg2)),               \
 589                     "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
 590 #else
 591 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
 592         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
 593         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)),         \
 594         "3"((unsigned long)(arg4)))
 595 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
 596         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
 597         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)),         \
 598         "3"((unsigned long)(arg4)))
 599 #endif
 600
 601 static inline int paravirt_enabled(void)
 602 {
 603         return pv_info.paravirt_enabled;
 604 }
 605
 606 static inline void load_sp0(struct tss_struct *tss,
 607                              struct thread_struct *thread)
 608 {
 609         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
 610 }
 611
 612 #define ARCH_SETUP                      pv_init_ops.arch_setup();
 613 static inline unsigned long get_wallclock(void)
 614 {
 615         return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
 616 }
 617
 618 static inline int set_wallclock(unsigned long nowtime)
 619 {
 620         return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
 621 }
 622
 623 static inline void (*choose_time_init(void))(void)
 624 {
 625         return pv_time_ops.time_init;
 626 }
 627
 628 /* The paravirtualized CPUID instruction. */
 629 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
 630                            unsigned int *ecx, unsigned int *edx)
 631 {
 632         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
 633 }
 634
 635 /*
 636  * These special macros can be used to get or set a debugging register
 637  */
 638 static inline unsigned long paravirt_get_debugreg(int reg)
 639 {
 640         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
 641 }
 642 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
 643 static inline void set_debugreg(unsigned long val, int reg)
 644 {
 645         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
 646 }
 647
 648 static inline void clts(void)
 649 {
 650         PVOP_VCALL0(pv_cpu_ops.clts);
 651 }
 652
 653 static inline unsigned long read_cr0(void)
 654 {
 655         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
 656 }
 657
 658 static inline void write_cr0(unsigned long x)
 659 {
 660         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
 661 }
 662
 663 static inline unsigned long read_cr2(void)
 664 {
 665         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
 666 }
 667
 668 static inline void write_cr2(unsigned long x)
 669 {
 670         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
 671 }
 672
 673 static inline unsigned long read_cr3(void)
 674 {
 675         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
 676 }
 677
 678 static inline void write_cr3(unsigned long x)
 679 {
 680         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
 681 }
 682
 683 static inline unsigned long read_cr4(void)
 684 {
 685         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
 686 }
 687 static inline unsigned long read_cr4_safe(void)
 688 {
 689         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
 690 }
 691
 692 static inline void write_cr4(unsigned long x)
 693 {
 694         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
 695 }
 696
 697 #ifdef CONFIG_X86_64
 698 static inline unsigned long read_cr8(void)
 699 {
 700         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
 701 }
 702
 703 static inline void write_cr8(unsigned long x)
 704 {
 705         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
 706 }
 707 #endif
 708
 709 static inline void raw_safe_halt(void)
 710 {
 711         PVOP_VCALL0(pv_irq_ops.safe_halt);
 712 }
 713
 714 static inline void halt(void)
 715 {
 716         PVOP_VCALL0(pv_irq_ops.safe_halt);
 717 }
 718
 719 static inline void wbinvd(void)
 720 {
 721         PVOP_VCALL0(pv_cpu_ops.wbinvd);
 722 }
 723
 724 #define get_kernel_rpl()  (pv_info.kernel_rpl)
 725
 726 static inline u64 paravirt_read_msr(unsigned msr, int *err)
 727 {
 728         return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
 729 }
 730 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
 731 {
 732         return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
 733 }
 734
 735 /* These should all do BUG_ON(_err), but our headers are too tangled. */
 736 #define rdmsr(msr, val1, val2)                  \
 737 do {                                            \
 738         int _err;                               \
 739         u64 _l = paravirt_read_msr(msr, &_err); \
 740         val1 = (u32)_l;                         \
 741         val2 = _l >> 32;                        \
 742 } while (0)
 743
 744 #define wrmsr(msr, val1, val2)                  \
 745 do {                                            \
 746         paravirt_write_msr(msr, val1, val2);    \
 747 } while (0)
 748
 749 #define rdmsrl(msr, val)                        \
 750 do {                                            \
 751         int _err;                               \
 752         val = paravirt_read_msr(msr, &_err);    \
 753 } while (0)
 754
 755 #define wrmsrl(msr, val)        wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
 756 #define wrmsr_safe(msr, a, b)   paravirt_write_msr(msr, a, b)
 757
 758 /* rdmsr with exception handling */
 759 #define rdmsr_safe(msr, a, b)                   \
 760 ({                                              \
 761         int _err;                               \
 762         u64 _l = paravirt_read_msr(msr, &_err); \
 763         (*a) = (u32)_l;                         \
 764         (*b) = _l >> 32;                        \
 765         _err;                                   \
 766 })
 767
 768 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 769 {
 770         int err;
 771
 772         *p = paravirt_read_msr(msr, &err);
 773         return err;
 774 }
 775
 776 static inline u64 paravirt_read_tsc(void)
 777 {
 778         return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
 779 }
 780
 781 #define rdtscl(low)                             \
 782 do {                                            \
 783         u64 _l = paravirt_read_tsc();           \
 784         low = (int)_l;                          \
 785 } while (0)
 786
 787 #define rdtscll(val) (val = paravirt_read_tsc())
 788
 789 static inline unsigned long long paravirt_sched_clock(void)
 790 {
 791         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 792 }
 793 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
 794
 795 static inline unsigned long long paravirt_read_pmc(int counter)
 796 {
 797         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
 798 }
 799
 800 #define rdpmc(counter, low, high)               \
 801 do {                                            \
 802         u64 _l = paravirt_read_pmc(counter);    \
 803         low = (u32)_l;                          \
 804         high = _l >> 32;                        \
 805 } while (0)
 806
 807 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
 808 {
 809         return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
 810 }
 811
 812 #define rdtscp(low, high, aux)                          \
 813 do {                                                    \
 814         int __aux;                                      \
 815         unsigned long __val = paravirt_rdtscp(&__aux);  \
 816         (low) = (u32)__val;                             \
 817         (high) = (u32)(__val >> 32);                    \
 818         (aux) = __aux;                                  \
 819 } while (0)
 820
 821 #define rdtscpll(val, aux)                              \
 822 do {                                                    \
 823         unsigned long __aux;                            \
 824         val = paravirt_rdtscp(&__aux);                  \
 825         (aux) = __aux;                                  \
 826 } while (0)
 827
 828 static inline void load_TR_desc(void)
 829 {
 830         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
 831 }
 832 static inline void load_gdt(const struct desc_ptr *dtr)
 833 {
 834         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
 835 }
 836 static inline void load_idt(const struct desc_ptr *dtr)
 837 {
 838         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
 839 }
 840 static inline void set_ldt(const void *addr, unsigned entries)
 841 {
 842         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
 843 }
 844 static inline void store_gdt(struct desc_ptr *dtr)
 845 {
 846         PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
 847 }
 848 static inline void store_idt(struct desc_ptr *dtr)
 849 {
 850         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
 851 }
 852 static inline unsigned long paravirt_store_tr(void)
 853 {
 854         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
 855 }
 856 #define store_tr(tr)    ((tr) = paravirt_store_tr())
 857 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
 858 {
 859         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
 860 }
 861
 862 #ifdef CONFIG_X86_64
 863 static inline void load_gs_index(unsigned int gs)
 864 {
 865         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
 866 }
 867 #endif
 868
 869 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
 870                                    const void *desc)
 871 {
 872         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
 873 }
 874
 875 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
 876                                    void *desc, int type)
 877 {
 878         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
 879 }
 880
 881 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
 882 {
 883         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
 884 }
 885 static inline void set_iopl_mask(unsigned mask)
 886 {
 887         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
 888 }
 889
 890 /* The paravirtualized I/O functions */
 891 static inline void slow_down_io(void)
 892 {
 893         pv_cpu_ops.io_delay();
 894 #ifdef REALLY_SLOW_IO
 895         pv_cpu_ops.io_delay();
 896         pv_cpu_ops.io_delay();
 897         pv_cpu_ops.io_delay();
 898 #endif
 899 }
 900
 901 #ifdef CONFIG_X86_LOCAL_APIC
 902 /*
 903  * Basic functions accessing APICs.
 904  */
 905 static inline void apic_write(unsigned long reg, u32 v)
 906 {
 907         PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
 908 }
 909
 910 static inline void apic_write_atomic(unsigned long reg, u32 v)
 911 {
 912         PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
 913 }
 914
 915 static inline u32 apic_read(unsigned long reg)
 916 {
 917         return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
 918 }
 919
 920 static inline void setup_boot_clock(void)
 921 {
 922         PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
 923 }
 924
 925 static inline void setup_secondary_clock(void)
 926 {
 927         PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
 928 }
 929 #endif
 930
 931 static inline void paravirt_post_allocator_init(void)
 932 {
 933         if (pv_init_ops.post_allocator_init)
 934                 (*pv_init_ops.post_allocator_init)();
 935 }
 936
 937 static inline void paravirt_pagetable_setup_start(pgd_t *base)
 938 {
 939         (*pv_mmu_ops.pagetable_setup_start)(base);
 940 }
 941
 942 static inline void paravirt_pagetable_setup_done(pgd_t *base)
 943 {
 944         (*pv_mmu_ops.pagetable_setup_done)(base);
 945 }
 946
 947 #ifdef CONFIG_SMP
 948 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
 949                                     unsigned long start_esp)
 950 {
 951         PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
 952                     phys_apicid, start_eip, start_esp);
 953 }
 954 #endif
 955
 956 static inline void paravirt_activate_mm(struct mm_struct *prev,
 957                                         struct mm_struct *next)
 958 {
 959         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
 960 }
 961
 962 static inline void arch_dup_mmap(struct mm_struct *oldmm,
 963                                  struct mm_struct *mm)
 964 {
 965         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
 966 }
 967
 968 static inline void arch_exit_mmap(struct mm_struct *mm)
 969 {
 970         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
 971 }
 972
 973 static inline void __flush_tlb(void)
 974 {
 975         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
 976 }
 977 static inline void __flush_tlb_global(void)
 978 {
 979         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
 980 }
 981 static inline void __flush_tlb_single(unsigned long addr)
 982 {
 983         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
 984 }
 985
 986 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
 987                                     unsigned long va)
 988 {
 989         PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
 990 }
 991
 992 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
 993 {
 994         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
 995 }
 996
 997 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 998 {
 999         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
1000 }
1001
1002 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
1003 {
1004         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
1005 }
1006 static inline void paravirt_release_pte(unsigned pfn)
1007 {
1008         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
1009 }
1010
1011 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
1012 {
1013         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
1014 }
1015
1016 static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
1017                                             unsigned start, unsigned count)
1018 {
1019         PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
1020 }
1021 static inline void paravirt_release_pmd(unsigned pfn)
1022 {
1023         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
1024 }
1025
1026 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
1027 {
1028         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1029 }
1030 static inline void paravirt_release_pud(unsigned pfn)
1031 {
1032         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1033 }
1034
1035 #ifdef CONFIG_HIGHPTE
1036 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1037 {
1038         unsigned long ret;
1039         ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1040         return (void *)ret;
1041 }
1042 #endif
1043
1044 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1045                               pte_t *ptep)
1046 {
1047         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1048 }
1049
1050 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1051                                     pte_t *ptep)
1052 {
1053         PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1054 }
1055
1056 static inline pte_t __pte(pteval_t val)
1057 {
1058         pteval_t ret;
1059
1060         if (sizeof(pteval_t) > sizeof(long))
1061                 ret = PVOP_CALL2(pteval_t,
1062                                  pv_mmu_ops.make_pte,
1063                                  val, (u64)val >> 32);
1064         else
1065                 ret = PVOP_CALL1(pteval_t,
1066                                  pv_mmu_ops.make_pte,
1067                                  val);
1068
1069         return (pte_t) { .pte = ret };
1070 }
1071
1072 static inline pteval_t pte_val(pte_t pte)
1073 {
1074         pteval_t ret;
1075
1076         if (sizeof(pteval_t) > sizeof(long))
1077                 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1078                                  pte.pte, (u64)pte.pte >> 32);
1079         else
1080                 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1081                                  pte.pte);
1082
1083         return ret;
1084 }
1085
1086 static inline pteval_t pte_flags(pte_t pte)
1087 {
1088         pteval_t ret;
1089
1090         if (sizeof(pteval_t) > sizeof(long))
1091                 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1092                                  pte.pte, (u64)pte.pte >> 32);
1093         else
1094                 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1095                                  pte.pte);
1096
1097         return ret;
1098 }
1099
1100 static inline pgd_t __pgd(pgdval_t val)
1101 {
1102         pgdval_t ret;
1103
1104         if (sizeof(pgdval_t) > sizeof(long))
1105                 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1106                                  val, (u64)val >> 32);
1107         else
1108                 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1109                                  val);
1110
1111         return (pgd_t) { ret };
1112 }
1113
1114 static inline pgdval_t pgd_val(pgd_t pgd)
1115 {
1116         pgdval_t ret;
1117
1118         if (sizeof(pgdval_t) > sizeof(long))
1119                 ret =  PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1120                                   pgd.pgd, (u64)pgd.pgd >> 32);
1121         else
1122                 ret =  PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1123                                   pgd.pgd);
1124
1125         return ret;
1126 }
1127
1128 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1129 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1130                                            pte_t *ptep)
1131 {
1132         pteval_t ret;
1133
1134         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1135                          mm, addr, ptep);
1136
1137         return (pte_t) { .pte = ret };
1138 }
1139
1140 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1141                                            pte_t *ptep, pte_t pte)
1142 {
1143         if (sizeof(pteval_t) > sizeof(long))
1144                 /* 5 arg words */
1145                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1146         else
1147                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1148                             mm, addr, ptep, pte.pte);
1149 }
1150
1151 static inline void set_pte(pte_t *ptep, pte_t pte)
1152 {
1153         if (sizeof(pteval_t) > sizeof(long))
1154                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1155                             pte.pte, (u64)pte.pte >> 32);
1156         else
1157                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1158                             pte.pte);
1159 }
1160
1161 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1162                               pte_t *ptep, pte_t pte)
1163 {
1164         if (sizeof(pteval_t) > sizeof(long))
1165                 /* 5 arg words */
1166                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1167         else
1168                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1169 }
1170
1171 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1172 {
1173         pmdval_t val = native_pmd_val(pmd);
1174
1175         if (sizeof(pmdval_t) > sizeof(long))
1176                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1177         else
1178                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1179 }
1180
1181 #if PAGETABLE_LEVELS >= 3
1182 static inline pmd_t __pmd(pmdval_t val)
1183 {
1184         pmdval_t ret;
1185
1186         if (sizeof(pmdval_t) > sizeof(long))
1187                 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1188                                  val, (u64)val >> 32);
1189         else
1190                 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1191                                  val);
1192
1193         return (pmd_t) { ret };
1194 }
1195
1196 static inline pmdval_t pmd_val(pmd_t pmd)
1197 {
1198         pmdval_t ret;
1199
1200         if (sizeof(pmdval_t) > sizeof(long))
1201                 ret =  PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1202                                   pmd.pmd, (u64)pmd.pmd >> 32);
1203         else
1204                 ret =  PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1205                                   pmd.pmd);
1206
1207         return ret;
1208 }
1209
1210 static inline void set_pud(pud_t *pudp, pud_t pud)
1211 {
1212         pudval_t val = native_pud_val(pud);
1213
1214         if (sizeof(pudval_t) > sizeof(long))
1215                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1216                             val, (u64)val >> 32);
1217         else
1218                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1219                             val);
1220 }
1221 #if PAGETABLE_LEVELS == 4
1222 static inline pud_t __pud(pudval_t val)
1223 {
1224         pudval_t ret;
1225
1226         if (sizeof(pudval_t) > sizeof(long))
1227                 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1228                                  val, (u64)val >> 32);
1229         else
1230                 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1231                                  val);
1232
1233         return (pud_t) { ret };
1234 }
1235
1236 static inline pudval_t pud_val(pud_t pud)
1237 {
1238         pudval_t ret;
1239
1240         if (sizeof(pudval_t) > sizeof(long))
1241                 ret =  PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1242                                   pud.pud, (u64)pud.pud >> 32);
1243         else
1244                 ret =  PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1245                                   pud.pud);
1246
1247         return ret;
1248 }
1249
1250 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1251 {
1252         pgdval_t val = native_pgd_val(pgd);
1253
1254         if (sizeof(pgdval_t) > sizeof(long))
1255                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1256                             val, (u64)val >> 32);
1257         else
1258                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1259                             val);
1260 }
1261
1262 static inline void pgd_clear(pgd_t *pgdp)
1263 {
1264         set_pgd(pgdp, __pgd(0));
1265 }
1266
1267 static inline void pud_clear(pud_t *pudp)
1268 {
1269         set_pud(pudp, __pud(0));
1270 }
1271
1272 #endif  /* PAGETABLE_LEVELS == 4 */
1273
1274 #endif  /* PAGETABLE_LEVELS >= 3 */
1275
1276 #ifdef CONFIG_X86_PAE
1277 /* Special-case pte-setting operations for PAE, which can't update a
1278    64-bit pte atomically */
1279 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1280 {
1281         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1282                     pte.pte, pte.pte >> 32);
1283 }
1284
1285 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1286                                    pte_t *ptep, pte_t pte)
1287 {
1288         /* 5 arg words */
1289         pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1290 }
1291
1292 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1293                              pte_t *ptep)
1294 {
1295         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1296 }
1297
1298 static inline void pmd_clear(pmd_t *pmdp)
1299 {
1300         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1301 }
1302 #else  /* !CONFIG_X86_PAE */
1303 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1304 {
1305         set_pte(ptep, pte);
1306 }
1307
1308 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1309                                    pte_t *ptep, pte_t pte)
1310 {
1311         set_pte(ptep, pte);
1312 }
1313
1314 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1315                              pte_t *ptep)
1316 {
1317         set_pte_at(mm, addr, ptep, __pte(0));
1318 }
1319
1320 static inline void pmd_clear(pmd_t *pmdp)
1321 {
1322         set_pmd(pmdp, __pmd(0));
1323 }
1324 #endif  /* CONFIG_X86_PAE */
1325
1326 /* Lazy mode for batching updates / context switch */
1327 enum paravirt_lazy_mode {
1328         PARAVIRT_LAZY_NONE,
1329         PARAVIRT_LAZY_MMU,
1330         PARAVIRT_LAZY_CPU,
1331 };
1332
1333 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1334 void paravirt_enter_lazy_cpu(void);
1335 void paravirt_leave_lazy_cpu(void);
1336 void paravirt_enter_lazy_mmu(void);
1337 void paravirt_leave_lazy_mmu(void);
1338 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1339
1340 #define  __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1341 static inline void arch_enter_lazy_cpu_mode(void)
1342 {
1343         PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1344 }
1345
1346 static inline void arch_leave_lazy_cpu_mode(void)
1347 {
1348         PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1349 }
1350
1351 static inline void arch_flush_lazy_cpu_mode(void)
1352 {
1353         if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1354                 arch_leave_lazy_cpu_mode();
1355                 arch_enter_lazy_cpu_mode();
1356         }
1357 }
1358
1359
1360 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1361 static inline void arch_enter_lazy_mmu_mode(void)
1362 {
1363         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1364 }
1365
1366 static inline void arch_leave_lazy_mmu_mode(void)
1367 {
1368         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1369 }
1370
1371 static inline void arch_flush_lazy_mmu_mode(void)
1372 {
1373         if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1374                 arch_leave_lazy_mmu_mode();
1375                 arch_enter_lazy_mmu_mode();
1376         }
1377 }
1378
1379 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1380                                 unsigned long phys, pgprot_t flags)
1381 {
1382         pv_mmu_ops.set_fixmap(idx, phys, flags);
1383 }
1384
1385 void _paravirt_nop(void);
1386 #define paravirt_nop    ((void *)_paravirt_nop)
1387
1388 void paravirt_use_bytelocks(void);
1389
1390 static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
1391 {
1392         return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
1393 }
1394
1395 static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
1396 {
1397         return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
1398 }
1399
1400 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
1401 {
1402         return PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
1403 }
1404
1405 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
1406 {
1407         return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
1408 }
1409
1410 static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
1411 {
1412         return PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
1413 }
1414
1415 /* These all sit in the .parainstructions section to tell us what to patch. */
1416 struct paravirt_patch_site {
1417         u8 *instr;              /* original instructions */
1418         u8 instrtype;           /* type of this instruction */
1419         u8 len;                 /* length of original instruction */
1420         u16 clobbers;           /* what registers you may clobber */
1421 };
1422
1423 extern struct paravirt_patch_site __parainstructions[],
1424         __parainstructions_end[];
1425
1426 #ifdef CONFIG_X86_32
1427 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1428 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1429 #define PV_FLAGS_ARG "0"
1430 #define PV_EXTRA_CLOBBERS
1431 #define PV_VEXTRA_CLOBBERS
1432 #else
1433 /* We save some registers, but all of them, that's too much. We clobber all
1434  * caller saved registers but the argument parameter */
1435 #define PV_SAVE_REGS "pushq %%rdi;"
1436 #define PV_RESTORE_REGS "popq %%rdi;"
1437 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
1438 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
1439 #define PV_FLAGS_ARG "D"
1440 #endif
1441
1442 static inline unsigned long __raw_local_save_flags(void)
1443 {
1444         unsigned long f;
1445
1446         asm volatile(paravirt_alt(PV_SAVE_REGS
1447                                   PARAVIRT_CALL
1448                                   PV_RESTORE_REGS)
1449                      : "=a"(f)
1450                      : paravirt_type(pv_irq_ops.save_fl),
1451                        paravirt_clobber(CLBR_EAX)
1452                      : "memory", "cc" PV_VEXTRA_CLOBBERS);
1453         return f;
1454 }
1455
1456 static inline void raw_local_irq_restore(unsigned long f)
1457 {
1458         asm volatile(paravirt_alt(PV_SAVE_REGS
1459                                   PARAVIRT_CALL
1460                                   PV_RESTORE_REGS)
1461                      : "=a"(f)
1462                      : PV_FLAGS_ARG(f),
1463                        paravirt_type(pv_irq_ops.restore_fl),
1464                        paravirt_clobber(CLBR_EAX)
1465                      : "memory", "cc" PV_EXTRA_CLOBBERS);
1466 }
1467
1468 static inline void raw_local_irq_disable(void)
1469 {
1470         asm volatile(paravirt_alt(PV_SAVE_REGS
1471                                   PARAVIRT_CALL
1472                                   PV_RESTORE_REGS)
1473                      :
1474                      : paravirt_type(pv_irq_ops.irq_disable),
1475                        paravirt_clobber(CLBR_EAX)
1476                      : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1477 }
1478
1479 static inline void raw_local_irq_enable(void)
1480 {
1481         asm volatile(paravirt_alt(PV_SAVE_REGS
1482                                   PARAVIRT_CALL
1483                                   PV_RESTORE_REGS)
1484                      :
1485                      : paravirt_type(pv_irq_ops.irq_enable),
1486                        paravirt_clobber(CLBR_EAX)
1487                      : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1488 }
1489
1490 static inline unsigned long __raw_local_irq_save(void)
1491 {
1492         unsigned long f;
1493
1494         f = __raw_local_save_flags();
1495         raw_local_irq_disable();
1496         return f;
1497 }
1498
1499
1500 /* Make sure as little as possible of this mess escapes. */
1501 #undef PARAVIRT_CALL
1502 #undef __PVOP_CALL
1503 #undef __PVOP_VCALL
1504 #undef PVOP_VCALL0
1505 #undef PVOP_CALL0
1506 #undef PVOP_VCALL1
1507 #undef PVOP_CALL1
1508 #undef PVOP_VCALL2
1509 #undef PVOP_CALL2
1510 #undef PVOP_VCALL3
1511 #undef PVOP_CALL3
1512 #undef PVOP_VCALL4
1513 #undef PVOP_CALL4
1514
1515 #else  /* __ASSEMBLY__ */
1516
1517 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
1518 771:;                                           \
1519         ops;                                    \
1520 772:;                                           \
1521         .pushsection .parainstructions,"a";     \
1522          .align algn;                           \
1523          word 771b;                             \
1524          .byte ptype;                           \
1525          .byte 772b-771b;                       \
1526          .short clobbers;                       \
1527         .popsection
1528
1529
1530 #ifdef CONFIG_X86_64
1531 #define PV_SAVE_REGS                            \
1532         push %rax;                              \
1533         push %rcx;                              \
1534         push %rdx;                              \
1535         push %rsi;                              \
1536         push %rdi;                              \
1537         push %r8;                               \
1538         push %r9;                               \
1539         push %r10;                              \
1540         push %r11
1541 #define PV_RESTORE_REGS                         \
1542         pop %r11;                               \
1543         pop %r10;                               \
1544         pop %r9;                                \
1545         pop %r8;                                \
1546         pop %rdi;                               \
1547         pop %rsi;                               \
1548         pop %rdx;                               \
1549         pop %rcx;                               \
1550         pop %rax
1551 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
1552 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1553 #define PARA_INDIRECT(addr)     *addr(%rip)
1554 #else
1555 #define PV_SAVE_REGS   pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1556 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1557 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
1558 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1559 #define PARA_INDIRECT(addr)     *%cs:addr
1560 #endif
1561
1562 #define INTERRUPT_RETURN                                                \
1563         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
1564                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1565
1566 #define DISABLE_INTERRUPTS(clobbers)                                    \
1567         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1568                   PV_SAVE_REGS;                                         \
1569                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
1570                   PV_RESTORE_REGS;)                     \
1571
1572 #define ENABLE_INTERRUPTS(clobbers)                                     \
1573         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
1574                   PV_SAVE_REGS;                                         \
1575                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
1576                   PV_RESTORE_REGS;)
1577
1578 #define USERGS_SYSRET32                                                 \
1579         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
1580                   CLBR_NONE,                                            \
1581                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1582
1583 #ifdef CONFIG_X86_32
1584 #define GET_CR0_INTO_EAX                                \
1585         push %ecx; push %edx;                           \
1586         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1587         pop %edx; pop %ecx
1588
1589 #define ENABLE_INTERRUPTS_SYSEXIT                                       \
1590         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1591                   CLBR_NONE,                                            \
1592                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1593
1594
1595 #else   /* !CONFIG_X86_32 */
1596
1597 /*
1598  * If swapgs is used while the userspace stack is still current,
1599  * there's no way to call a pvop.  The PV replacement *must* be
1600  * inlined, or the swapgs instruction must be trapped and emulated.
1601  */
1602 #define SWAPGS_UNSAFE_STACK                                             \
1603         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1604                   swapgs)
1605
1606 #define SWAPGS                                                          \
1607         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1608                   PV_SAVE_REGS;                                         \
1609                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs);         \
1610                   PV_RESTORE_REGS                                       \
1611                  )
1612
1613 #define GET_CR2_INTO_RCX                                \
1614         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1615         movq %rax, %rcx;                                \
1616         xorq %rax, %rax;
1617
1618 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
1619         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1620                   CLBR_NONE,                                            \
1621                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1622
1623 #define USERGS_SYSRET64                                                 \
1624         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
1625                   CLBR_NONE,                                            \
1626                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1627
1628 #define ENABLE_INTERRUPTS_SYSEXIT32                                     \
1629         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1630                   CLBR_NONE,                                            \
1631                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1632 #endif  /* CONFIG_X86_32 */
1633
1634 #endif /* __ASSEMBLY__ */
1635 #endif /* CONFIG_PARAVIRT */
1636 #endif  /* __ASM_PARAVIRT_H */