[S390] ipl/dump on panic.
[pandora-kernel.git] / include / asm-s390 / lowcore.h
1 /*
2  *  include/asm-s390/lowcore.h
3  *
4  *  S390 version
5  *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6  *    Author(s): Hartmut Penner (hp@de.ibm.com),
7  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
8  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
9  */
10
11 #ifndef _ASM_S390_LOWCORE_H
12 #define _ASM_S390_LOWCORE_H
13
14 #ifndef __s390x__
15 #define __LC_EXT_OLD_PSW                0x018
16 #define __LC_SVC_OLD_PSW                0x020
17 #define __LC_PGM_OLD_PSW                0x028
18 #define __LC_MCK_OLD_PSW                0x030
19 #define __LC_IO_OLD_PSW                 0x038
20 #define __LC_EXT_NEW_PSW                0x058
21 #define __LC_SVC_NEW_PSW                0x060
22 #define __LC_PGM_NEW_PSW                0x068
23 #define __LC_MCK_NEW_PSW                0x070
24 #define __LC_IO_NEW_PSW                 0x078
25 #else /* !__s390x__ */
26 #define __LC_EXT_OLD_PSW                0x0130
27 #define __LC_SVC_OLD_PSW                0x0140
28 #define __LC_PGM_OLD_PSW                0x0150
29 #define __LC_MCK_OLD_PSW                0x0160
30 #define __LC_IO_OLD_PSW                 0x0170
31 #define __LC_EXT_NEW_PSW                0x01b0
32 #define __LC_SVC_NEW_PSW                0x01c0
33 #define __LC_PGM_NEW_PSW                0x01d0
34 #define __LC_MCK_NEW_PSW                0x01e0
35 #define __LC_IO_NEW_PSW                 0x01f0
36 #endif /* !__s390x__ */
37
38 #define __LC_EXT_PARAMS                 0x080
39 #define __LC_CPU_ADDRESS                0x084
40 #define __LC_EXT_INT_CODE               0x086
41
42 #define __LC_SVC_ILC                    0x088
43 #define __LC_SVC_INT_CODE               0x08A
44 #define __LC_PGM_ILC                    0x08C
45 #define __LC_PGM_INT_CODE               0x08E
46
47 #define __LC_PER_ATMID                  0x096
48 #define __LC_PER_ADDRESS                0x098
49 #define __LC_PER_ACCESS_ID              0x0A1
50 #define __LC_AR_MODE_ID                 0x0A3
51
52 #define __LC_SUBCHANNEL_ID              0x0B8
53 #define __LC_SUBCHANNEL_NR              0x0BA
54 #define __LC_IO_INT_PARM                0x0BC
55 #define __LC_IO_INT_WORD                0x0C0
56 #define __LC_MCCK_CODE                  0x0E8
57
58 #define __LC_RETURN_PSW                 0x200
59
60 #define __LC_SAVE_AREA                  0xC00
61
62 #ifndef __s390x__
63 #define __LC_IRB                        0x208
64 #define __LC_SYNC_ENTER_TIMER           0x248
65 #define __LC_ASYNC_ENTER_TIMER          0x250
66 #define __LC_EXIT_TIMER                 0x258
67 #define __LC_LAST_UPDATE_TIMER          0x260
68 #define __LC_USER_TIMER                 0x268
69 #define __LC_SYSTEM_TIMER               0x270
70 #define __LC_LAST_UPDATE_CLOCK          0x278
71 #define __LC_STEAL_CLOCK                0x280
72 #define __LC_RETURN_MCCK_PSW            0x288
73 #define __LC_KERNEL_STACK               0xC40
74 #define __LC_THREAD_INFO                0xC44
75 #define __LC_ASYNC_STACK                0xC48
76 #define __LC_KERNEL_ASCE                0xC4C
77 #define __LC_USER_ASCE                  0xC50
78 #define __LC_PANIC_STACK                0xC54
79 #define __LC_CPUID                      0xC60
80 #define __LC_CPUADDR                    0xC68
81 #define __LC_IPLDEV                     0xC7C
82 #define __LC_JIFFY_TIMER                0xC80
83 #define __LC_CURRENT                    0xC90
84 #define __LC_INT_CLOCK                  0xC98
85 #else /* __s390x__ */
86 #define __LC_IRB                        0x210
87 #define __LC_SYNC_ENTER_TIMER           0x250
88 #define __LC_ASYNC_ENTER_TIMER          0x258
89 #define __LC_EXIT_TIMER                 0x260
90 #define __LC_LAST_UPDATE_TIMER          0x268
91 #define __LC_USER_TIMER                 0x270
92 #define __LC_SYSTEM_TIMER               0x278
93 #define __LC_LAST_UPDATE_CLOCK          0x280
94 #define __LC_STEAL_CLOCK                0x288
95 #define __LC_RETURN_MCCK_PSW            0x290
96 #define __LC_KERNEL_STACK               0xD40
97 #define __LC_THREAD_INFO                0xD48
98 #define __LC_ASYNC_STACK                0xD50
99 #define __LC_KERNEL_ASCE                0xD58
100 #define __LC_USER_ASCE                  0xD60
101 #define __LC_PANIC_STACK                0xD68
102 #define __LC_CPUID                      0xD80
103 #define __LC_CPUADDR                    0xD88
104 #define __LC_IPLDEV                     0xDB8
105 #define __LC_JIFFY_TIMER                0xDC0
106 #define __LC_CURRENT                    0xDD8
107 #define __LC_INT_CLOCK                  0xDE8
108 #endif /* __s390x__ */
109
110
111 #define __LC_PANIC_MAGIC                0xE00
112 #ifndef __s390x__
113 #define __LC_PFAULT_INTPARM             0x080
114 #define __LC_CPU_TIMER_SAVE_AREA        0x0D8
115 #define __LC_CLOCK_COMP_SAVE_AREA       0x0E0
116 #define __LC_PSW_SAVE_AREA              0x100
117 #define __LC_PREFIX_SAVE_AREA           0x108
118 #define __LC_AREGS_SAVE_AREA            0x120
119 #define __LC_FPREGS_SAVE_AREA           0x160
120 #define __LC_GPREGS_SAVE_AREA           0x180
121 #define __LC_CREGS_SAVE_AREA            0x1C0
122 #else /* __s390x__ */
123 #define __LC_PFAULT_INTPARM             0x11B8
124 #define __LC_FPREGS_SAVE_AREA           0x1200
125 #define __LC_GPREGS_SAVE_AREA           0x1280
126 #define __LC_PSW_SAVE_AREA              0x1300
127 #define __LC_PREFIX_SAVE_AREA           0x1318
128 #define __LC_FP_CREG_SAVE_AREA          0x131C
129 #define __LC_TODREG_SAVE_AREA           0x1324
130 #define __LC_CPU_TIMER_SAVE_AREA        0x1328
131 #define __LC_CLOCK_COMP_SAVE_AREA       0x1331
132 #define __LC_AREGS_SAVE_AREA            0x1340
133 #define __LC_CREGS_SAVE_AREA            0x1380
134 #endif /* __s390x__ */
135
136 #ifndef __ASSEMBLY__
137
138 #include <asm/processor.h>
139 #include <linux/types.h>
140 #include <asm/sigp.h>
141
142 void restart_int_handler(void);
143 void ext_int_handler(void);
144 void system_call(void);
145 void pgm_check_handler(void);
146 void mcck_int_handler(void);
147 void io_int_handler(void);
148
149 struct _lowcore
150 {
151 #ifndef __s390x__
152         /* prefix area: defined by architecture */
153         psw_t        restart_psw;              /* 0x000 */
154         __u32        ccw2[4];                  /* 0x008 */
155         psw_t        external_old_psw;         /* 0x018 */
156         psw_t        svc_old_psw;              /* 0x020 */
157         psw_t        program_old_psw;          /* 0x028 */
158         psw_t        mcck_old_psw;             /* 0x030 */
159         psw_t        io_old_psw;               /* 0x038 */
160         __u8         pad1[0x58-0x40];          /* 0x040 */
161         psw_t        external_new_psw;         /* 0x058 */
162         psw_t        svc_new_psw;              /* 0x060 */
163         psw_t        program_new_psw;          /* 0x068 */
164         psw_t        mcck_new_psw;             /* 0x070 */
165         psw_t        io_new_psw;               /* 0x078 */
166         __u32        ext_params;               /* 0x080 */
167         __u16        cpu_addr;                 /* 0x084 */
168         __u16        ext_int_code;             /* 0x086 */
169         __u16        svc_ilc;                  /* 0x088 */
170         __u16        svc_code;                 /* 0x08a */
171         __u16        pgm_ilc;                  /* 0x08c */
172         __u16        pgm_code;                 /* 0x08e */
173         __u32        trans_exc_code;           /* 0x090 */
174         __u16        mon_class_num;            /* 0x094 */
175         __u16        per_perc_atmid;           /* 0x096 */
176         __u32        per_address;              /* 0x098 */
177         __u32        monitor_code;             /* 0x09c */
178         __u8         exc_access_id;            /* 0x0a0 */
179         __u8         per_access_id;            /* 0x0a1 */
180         __u8         pad2[0xB8-0xA2];          /* 0x0a2 */
181         __u16        subchannel_id;            /* 0x0b8 */
182         __u16        subchannel_nr;            /* 0x0ba */
183         __u32        io_int_parm;              /* 0x0bc */
184         __u32        io_int_word;              /* 0x0c0 */
185         __u8         pad3[0xD4-0xC4];          /* 0x0c4 */
186         __u32        extended_save_area_addr;  /* 0x0d4 */
187         __u32        cpu_timer_save_area[2];   /* 0x0d8 */
188         __u32        clock_comp_save_area[2];  /* 0x0e0 */
189         __u32        mcck_interruption_code[2]; /* 0x0e8 */
190         __u8         pad4[0xf4-0xf0];          /* 0x0f0 */
191         __u32        external_damage_code;     /* 0x0f4 */
192         __u32        failing_storage_address;  /* 0x0f8 */
193         __u8         pad5[0x100-0xfc];         /* 0x0fc */
194         __u32        st_status_fixed_logout[4];/* 0x100 */
195         __u8         pad6[0x120-0x110];        /* 0x110 */
196         __u32        access_regs_save_area[16];/* 0x120 */
197         __u32        floating_pt_save_area[8]; /* 0x160 */
198         __u32        gpregs_save_area[16];     /* 0x180 */
199         __u32        cregs_save_area[16];      /* 0x1c0 */      
200
201         psw_t        return_psw;               /* 0x200 */
202         __u8         irb[64];                  /* 0x208 */
203         __u64        sync_enter_timer;         /* 0x248 */
204         __u64        async_enter_timer;        /* 0x250 */
205         __u64        exit_timer;               /* 0x258 */
206         __u64        last_update_timer;        /* 0x260 */
207         __u64        user_timer;               /* 0x268 */
208         __u64        system_timer;             /* 0x270 */
209         __u64        last_update_clock;        /* 0x278 */
210         __u64        steal_clock;              /* 0x280 */
211         psw_t        return_mcck_psw;          /* 0x288 */
212         __u8         pad8[0xc00-0x290];        /* 0x290 */
213
214         /* System info area */
215         __u32        save_area[16];            /* 0xc00 */
216         __u32        kernel_stack;             /* 0xc40 */
217         __u32        thread_info;              /* 0xc44 */
218         __u32        async_stack;              /* 0xc48 */
219         __u32        kernel_asce;              /* 0xc4c */
220         __u32        user_asce;                /* 0xc50 */
221         __u32        panic_stack;              /* 0xc54 */
222         __u8         pad10[0xc60-0xc58];       /* 0xc58 */
223         /* entry.S sensitive area start */
224         struct       cpuinfo_S390 cpu_data;    /* 0xc60 */
225         __u32        ipl_device;               /* 0xc7c */
226         /* entry.S sensitive area end */
227
228         /* SMP info area: defined by DJB */
229         __u64        jiffy_timer;              /* 0xc80 */
230         __u32        ext_call_fast;            /* 0xc88 */
231         __u32        percpu_offset;            /* 0xc8c */
232         __u32        current_task;             /* 0xc90 */
233         __u32        softirq_pending;          /* 0xc94 */
234         __u64        int_clock;                /* 0xc98 */
235         __u8         pad11[0xe00-0xca0];       /* 0xca0 */
236
237         /* 0xe00 is used as indicator for dump tools */
238         /* whether the kernel died with panic() or not */
239         __u32        panic_magic;              /* 0xe00 */
240
241         /* Align to the top 1k of prefix area */
242         __u8         pad12[0x1000-0xe04];      /* 0xe04 */
243 #else /* !__s390x__ */
244         /* prefix area: defined by architecture */
245         __u32        ccw1[2];                  /* 0x000 */
246         __u32        ccw2[4];                  /* 0x008 */
247         __u8         pad1[0x80-0x18];          /* 0x018 */
248         __u32        ext_params;               /* 0x080 */
249         __u16        cpu_addr;                 /* 0x084 */
250         __u16        ext_int_code;             /* 0x086 */
251         __u16        svc_ilc;                  /* 0x088 */
252         __u16        svc_code;                 /* 0x08a */
253         __u16        pgm_ilc;                  /* 0x08c */
254         __u16        pgm_code;                 /* 0x08e */
255         __u32        data_exc_code;            /* 0x090 */
256         __u16        mon_class_num;            /* 0x094 */
257         __u16        per_perc_atmid;           /* 0x096 */
258         addr_t       per_address;              /* 0x098 */
259         __u8         exc_access_id;            /* 0x0a0 */
260         __u8         per_access_id;            /* 0x0a1 */
261         __u8         op_access_id;             /* 0x0a2 */
262         __u8         ar_access_id;             /* 0x0a3 */
263         __u8         pad2[0xA8-0xA4];          /* 0x0a4 */
264         addr_t       trans_exc_code;           /* 0x0A0 */
265         addr_t       monitor_code;             /* 0x09c */
266         __u16        subchannel_id;            /* 0x0b8 */
267         __u16        subchannel_nr;            /* 0x0ba */
268         __u32        io_int_parm;              /* 0x0bc */
269         __u32        io_int_word;              /* 0x0c0 */
270         __u8         pad3[0xc8-0xc4];          /* 0x0c4 */
271         __u32        stfl_fac_list;            /* 0x0c8 */
272         __u8         pad4[0xe8-0xcc];          /* 0x0cc */
273         __u32        mcck_interruption_code[2]; /* 0x0e8 */
274         __u8         pad5[0xf4-0xf0];          /* 0x0f0 */
275         __u32        external_damage_code;     /* 0x0f4 */
276         addr_t       failing_storage_address;  /* 0x0f8 */
277         __u8         pad6[0x120-0x100];        /* 0x100 */
278         psw_t        restart_old_psw;          /* 0x120 */
279         psw_t        external_old_psw;         /* 0x130 */
280         psw_t        svc_old_psw;              /* 0x140 */
281         psw_t        program_old_psw;          /* 0x150 */
282         psw_t        mcck_old_psw;             /* 0x160 */
283         psw_t        io_old_psw;               /* 0x170 */
284         __u8         pad7[0x1a0-0x180];        /* 0x180 */
285         psw_t        restart_psw;              /* 0x1a0 */
286         psw_t        external_new_psw;         /* 0x1b0 */
287         psw_t        svc_new_psw;              /* 0x1c0 */
288         psw_t        program_new_psw;          /* 0x1d0 */
289         psw_t        mcck_new_psw;             /* 0x1e0 */
290         psw_t        io_new_psw;               /* 0x1f0 */
291         psw_t        return_psw;               /* 0x200 */
292         __u8         irb[64];                  /* 0x210 */
293         __u64        sync_enter_timer;         /* 0x250 */
294         __u64        async_enter_timer;        /* 0x258 */
295         __u64        exit_timer;               /* 0x260 */
296         __u64        last_update_timer;        /* 0x268 */
297         __u64        user_timer;               /* 0x270 */
298         __u64        system_timer;             /* 0x278 */
299         __u64        last_update_clock;        /* 0x280 */
300         __u64        steal_clock;              /* 0x288 */
301         psw_t        return_mcck_psw;          /* 0x290 */
302         __u8         pad8[0xc00-0x2a0];        /* 0x2a0 */
303         /* System info area */
304         __u64        save_area[16];            /* 0xc00 */
305         __u8         pad9[0xd40-0xc80];        /* 0xc80 */
306         __u64        kernel_stack;             /* 0xd40 */
307         __u64        thread_info;              /* 0xd48 */
308         __u64        async_stack;              /* 0xd50 */
309         __u64        kernel_asce;              /* 0xd58 */
310         __u64        user_asce;                /* 0xd60 */
311         __u64        panic_stack;              /* 0xd68 */
312         __u8         pad10[0xd80-0xd70];       /* 0xd70 */
313         /* entry.S sensitive area start */
314         struct       cpuinfo_S390 cpu_data;    /* 0xd80 */
315         __u32        ipl_device;               /* 0xdb8 */
316         __u32        pad11;                    /* 0xdbc */
317         /* entry.S sensitive area end */
318
319         /* SMP info area: defined by DJB */
320         __u64        jiffy_timer;              /* 0xdc0 */
321         __u64        ext_call_fast;            /* 0xdc8 */
322         __u64        percpu_offset;            /* 0xdd0 */
323         __u64        current_task;             /* 0xdd8 */
324         __u64        softirq_pending;          /* 0xde0 */
325         __u64        int_clock;                /* 0xde8 */
326         __u8         pad12[0xe00-0xdf0];       /* 0xdf0 */
327
328         /* 0xe00 is used as indicator for dump tools */
329         /* whether the kernel died with panic() or not */
330         __u32        panic_magic;              /* 0xe00 */
331
332         __u8         pad13[0x1200-0xe04];      /* 0xe04 */
333
334         /* System info area */ 
335
336         __u64        floating_pt_save_area[16]; /* 0x1200 */
337         __u64        gpregs_save_area[16];      /* 0x1280 */
338         __u32        st_status_fixed_logout[4]; /* 0x1300 */
339         __u8         pad14[0x1318-0x1310];      /* 0x1310 */
340         __u32        prefixreg_save_area;       /* 0x1318 */
341         __u32        fpt_creg_save_area;        /* 0x131c */
342         __u8         pad15[0x1324-0x1320];      /* 0x1320 */
343         __u32        tod_progreg_save_area;     /* 0x1324 */
344         __u32        cpu_timer_save_area[2];    /* 0x1328 */
345         __u32        clock_comp_save_area[2];   /* 0x1330 */
346         __u8         pad16[0x1340-0x1338];      /* 0x1338 */ 
347         __u32        access_regs_save_area[16]; /* 0x1340 */ 
348         __u64        cregs_save_area[16];       /* 0x1380 */
349
350         /* align to the top of the prefix area */
351
352         __u8         pad17[0x2000-0x1400];      /* 0x1400 */
353 #endif /* !__s390x__ */
354 } __attribute__((packed)); /* End structure*/
355
356 #define S390_lowcore (*((struct _lowcore *) 0))
357 extern struct _lowcore *lowcore_ptr[];
358
359 static inline void set_prefix(__u32 address)
360 {
361         __asm__ __volatile__ ("spx %0" : : "m" (address) : "memory" );
362 }
363
364 #define __PANIC_MAGIC           0xDEADC0DE
365
366 #endif
367
368 #endif