drivers/watchdog/hpwdt.c

   1 /*
   2  *      HP WatchDog Driver
   3  *      based on
   4  *
   5  *      SoftDog 0.05:   A Software Watchdog Device
   6  *
   7  *      (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
   8  *      Thomas Mingarelli <thomas.mingarelli@hp.com>
   9  *
  10  *      This program is free software; you can redistribute it and/or
  11  *      modify it under the terms of the GNU General Public License
  12  *      version 2 as published by the Free Software Foundation
  13  *
  14  */
  15
  16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  17
  18 #include <linux/device.h>
  19 #include <linux/fs.h>
  20 #include <linux/init.h>
  21 #include <linux/io.h>
  22 #include <linux/bitops.h>
  23 #include <linux/kernel.h>
  24 #include <linux/miscdevice.h>
  25 #include <linux/module.h>
  26 #include <linux/moduleparam.h>
  27 #include <linux/pci.h>
  28 #include <linux/pci_ids.h>
  29 #include <linux/types.h>
  30 #include <linux/uaccess.h>
  31 #include <linux/watchdog.h>
  32 #ifdef CONFIG_HPWDT_NMI_DECODING
  33 #include <linux/dmi.h>
  34 #include <linux/spinlock.h>
  35 #include <linux/nmi.h>
  36 #include <linux/kdebug.h>
  37 #include <linux/notifier.h>
  38 #include <asm/cacheflush.h>
  39 #endif /* CONFIG_HPWDT_NMI_DECODING */
  40 #include <asm/nmi.h>
  41
  42 #define HPWDT_VERSION                   "1.3.2"
  43 #define SECS_TO_TICKS(secs)             ((secs) * 1000 / 128)
  44 #define TICKS_TO_SECS(ticks)            ((ticks) * 128 / 1000)
  45 #define HPWDT_MAX_TIMER                 TICKS_TO_SECS(65535)
  46 #define DEFAULT_MARGIN                  30
  47
  48 static unsigned int soft_margin = DEFAULT_MARGIN;       /* in seconds */
  49 static unsigned int reload;                     /* the computed soft_margin */
  50 static bool nowayout = WATCHDOG_NOWAYOUT;
  51 static char expect_release;
  52 static unsigned long hpwdt_is_open;
  53
  54 static void __iomem *pci_mem_addr;              /* the PCI-memory address */
  55 static unsigned long __iomem *hpwdt_timer_reg;
  56 static unsigned long __iomem *hpwdt_timer_con;
  57
  58 static DEFINE_PCI_DEVICE_TABLE(hpwdt_devices) = {
  59         { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },   /* iLO2 */
  60         { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },       /* iLO3 */
  61         {0},                    /* terminate list */
  62 };
  63 MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  64
  65 #ifdef CONFIG_HPWDT_NMI_DECODING
  66 #define PCI_BIOS32_SD_VALUE             0x5F32335F      /* "_32_" */
  67 #define CRU_BIOS_SIGNATURE_VALUE        0x55524324
  68 #define PCI_BIOS32_PARAGRAPH_LEN        16
  69 #define PCI_ROM_BASE1                   0x000F0000
  70 #define ROM_SIZE                        0x10000
  71
  72 struct bios32_service_dir {
  73         u32 signature;
  74         u32 entry_point;
  75         u8 revision;
  76         u8 length;
  77         u8 checksum;
  78         u8 reserved[5];
  79 };
  80
  81 /* type 212 */
  82 struct smbios_cru64_info {
  83         u8 type;
  84         u8 byte_length;
  85         u16 handle;
  86         u32 signature;
  87         u64 physical_address;
  88         u32 double_length;
  89         u32 double_offset;
  90 };
  91 #define SMBIOS_CRU64_INFORMATION        212
  92
  93 /* type 219 */
  94 struct smbios_proliant_info {
  95         u8 type;
  96         u8 byte_length;
  97         u16 handle;
  98         u32 power_features;
  99         u32 omega_features;
 100         u32 reserved;
 101         u32 misc_features;
 102 };
 103 #define SMBIOS_ICRU_INFORMATION         219
 104
 105
 106 struct cmn_registers {
 107         union {
 108                 struct {
 109                         u8 ral;
 110                         u8 rah;
 111                         u16 rea2;
 112                 };
 113                 u32 reax;
 114         } u1;
 115         union {
 116                 struct {
 117                         u8 rbl;
 118                         u8 rbh;
 119                         u8 reb2l;
 120                         u8 reb2h;
 121                 };
 122                 u32 rebx;
 123         } u2;
 124         union {
 125                 struct {
 126                         u8 rcl;
 127                         u8 rch;
 128                         u16 rec2;
 129                 };
 130                 u32 recx;
 131         } u3;
 132         union {
 133                 struct {
 134                         u8 rdl;
 135                         u8 rdh;
 136                         u16 red2;
 137                 };
 138                 u32 redx;
 139         } u4;
 140
 141         u32 resi;
 142         u32 redi;
 143         u16 rds;
 144         u16 res;
 145         u32 reflags;
 146 }  __attribute__((packed));
 147
 148 static unsigned int hpwdt_nmi_decoding;
 149 static unsigned int allow_kdump = 1;
 150 static unsigned int is_icru;
 151 static unsigned int is_uefi;
 152 static DEFINE_SPINLOCK(rom_lock);
 153 static void *cru_rom_addr;
 154 static struct cmn_registers cmn_regs;
 155
 156 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
 157                                                 unsigned long *pRomEntry);
 158
 159 #ifdef CONFIG_X86_32
 160 /* --32 Bit Bios------------------------------------------------------------ */
 161
 162 #define HPWDT_ARCH      32
 163
 164 asm(".text                          \n\t"
 165     ".align 4                       \n"
 166     "asminline_call:                \n\t"
 167     "pushl       %ebp               \n\t"
 168     "movl        %esp, %ebp         \n\t"
 169     "pusha                          \n\t"
 170     "pushf                          \n\t"
 171     "push        %es                \n\t"
 172     "push        %ds                \n\t"
 173     "pop         %es                \n\t"
 174     "movl        8(%ebp),%eax       \n\t"
 175     "movl        4(%eax),%ebx       \n\t"
 176     "movl        8(%eax),%ecx       \n\t"
 177     "movl        12(%eax),%edx      \n\t"
 178     "movl        16(%eax),%esi      \n\t"
 179     "movl        20(%eax),%edi      \n\t"
 180     "movl        (%eax),%eax        \n\t"
 181     "push        %cs                \n\t"
 182     "call        *12(%ebp)          \n\t"
 183     "pushf                          \n\t"
 184     "pushl       %eax               \n\t"
 185     "movl        8(%ebp),%eax       \n\t"
 186     "movl        %ebx,4(%eax)       \n\t"
 187     "movl        %ecx,8(%eax)       \n\t"
 188     "movl        %edx,12(%eax)      \n\t"
 189     "movl        %esi,16(%eax)      \n\t"
 190     "movl        %edi,20(%eax)      \n\t"
 191     "movw        %ds,24(%eax)       \n\t"
 192     "movw        %es,26(%eax)       \n\t"
 193     "popl        %ebx               \n\t"
 194     "movl        %ebx,(%eax)        \n\t"
 195     "popl        %ebx               \n\t"
 196     "movl        %ebx,28(%eax)      \n\t"
 197     "pop         %es                \n\t"
 198     "popf                           \n\t"
 199     "popa                           \n\t"
 200     "leave                          \n\t"
 201     "ret                            \n\t"
 202     ".previous");
 203
 204
 205 /*
 206  *      cru_detect
 207  *
 208  *      Routine Description:
 209  *      This function uses the 32-bit BIOS Service Directory record to
 210  *      search for a $CRU record.
 211  *
 212  *      Return Value:
 213  *      0        :  SUCCESS
 214  *      <0       :  FAILURE
 215  */
 216 static int cru_detect(unsigned long map_entry,
 217         unsigned long map_offset)
 218 {
 219         void *bios32_map;
 220         unsigned long *bios32_entrypoint;
 221         unsigned long cru_physical_address;
 222         unsigned long cru_length;
 223         unsigned long physical_bios_base = 0;
 224         unsigned long physical_bios_offset = 0;
 225         int retval = -ENODEV;
 226
 227         bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
 228
 229         if (bios32_map == NULL)
 230                 return -ENODEV;
 231
 232         bios32_entrypoint = bios32_map + map_offset;
 233
 234         cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
 235
 236         set_memory_x((unsigned long)bios32_map, 2);
 237         asminline_call(&cmn_regs, bios32_entrypoint);
 238
 239         if (cmn_regs.u1.ral != 0) {
 240                 pr_warn("Call succeeded but with an error: 0x%x\n",
 241                         cmn_regs.u1.ral);
 242         } else {
 243                 physical_bios_base = cmn_regs.u2.rebx;
 244                 physical_bios_offset = cmn_regs.u4.redx;
 245                 cru_length = cmn_regs.u3.recx;
 246                 cru_physical_address =
 247                         physical_bios_base + physical_bios_offset;
 248
 249                 /* If the values look OK, then map it in. */
 250                 if ((physical_bios_base + physical_bios_offset)) {
 251                         cru_rom_addr =
 252                                 ioremap(cru_physical_address, cru_length);
 253                         if (cru_rom_addr) {
 254                                 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
 255                                         (cru_length + PAGE_SIZE - 1) >> PAGE_SHIFT);
 256                                 retval = 0;
 257                         }
 258                 }
 259
 260                 pr_debug("CRU Base Address:   0x%lx\n", physical_bios_base);
 261                 pr_debug("CRU Offset Address: 0x%lx\n", physical_bios_offset);
 262                 pr_debug("CRU Length:         0x%lx\n", cru_length);
 263                 pr_debug("CRU Mapped Address: %p\n", &cru_rom_addr);
 264         }
 265         iounmap(bios32_map);
 266         return retval;
 267 }
 268
 269 /*
 270  *      bios_checksum
 271  */
 272 static int bios_checksum(const char __iomem *ptr, int len)
 273 {
 274         char sum = 0;
 275         int i;
 276
 277         /*
 278          * calculate checksum of size bytes. This should add up
 279          * to zero if we have a valid header.
 280          */
 281         for (i = 0; i < len; i++)
 282                 sum += ptr[i];
 283
 284         return ((sum == 0) && (len > 0));
 285 }
 286
 287 /*
 288  *      bios32_present
 289  *
 290  *      Routine Description:
 291  *      This function finds the 32-bit BIOS Service Directory
 292  *
 293  *      Return Value:
 294  *      0        :  SUCCESS
 295  *      <0       :  FAILURE
 296  */
 297 static int bios32_present(const char __iomem *p)
 298 {
 299         struct bios32_service_dir *bios_32_ptr;
 300         int length;
 301         unsigned long map_entry, map_offset;
 302
 303         bios_32_ptr = (struct bios32_service_dir *) p;
 304
 305         /*
 306          * Search for signature by checking equal to the swizzled value
 307          * instead of calling another routine to perform a strcmp.
 308          */
 309         if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
 310                 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
 311                 if (bios_checksum(p, length)) {
 312                         /*
 313                          * According to the spec, we're looking for the
 314                          * first 4KB-aligned address below the entrypoint
 315                          * listed in the header. The Service Directory code
 316                          * is guaranteed to occupy no more than 2 4KB pages.
 317                          */
 318                         map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
 319                         map_offset = bios_32_ptr->entry_point - map_entry;
 320
 321                         return cru_detect(map_entry, map_offset);
 322                 }
 323         }
 324         return -ENODEV;
 325 }
 326
 327 static int detect_cru_service(void)
 328 {
 329         char __iomem *p, *q;
 330         int rc = -1;
 331
 332         /*
 333          * Search from 0x0f0000 through 0x0fffff, inclusive.
 334          */
 335         p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
 336         if (p == NULL)
 337                 return -ENOMEM;
 338
 339         for (q = p; q < p + ROM_SIZE; q += 16) {
 340                 rc = bios32_present(q);
 341                 if (!rc)
 342                         break;
 343         }
 344         iounmap(p);
 345         return rc;
 346 }
 347 /* ------------------------------------------------------------------------- */
 348 #endif /* CONFIG_X86_32 */
 349 #ifdef CONFIG_X86_64
 350 /* --64 Bit Bios------------------------------------------------------------ */
 351
 352 #define HPWDT_ARCH      64
 353
 354 asm(".text                      \n\t"
 355     ".align 4                   \n"
 356     "asminline_call:            \n\t"
 357     "pushq      %rbp            \n\t"
 358     "movq       %rsp, %rbp      \n\t"
 359     "pushq      %rax            \n\t"
 360     "pushq      %rbx            \n\t"
 361     "pushq      %rdx            \n\t"
 362     "pushq      %r12            \n\t"
 363     "pushq      %r9             \n\t"
 364     "movq       %rsi, %r12      \n\t"
 365     "movq       %rdi, %r9       \n\t"
 366     "movl       4(%r9),%ebx     \n\t"
 367     "movl       8(%r9),%ecx     \n\t"
 368     "movl       12(%r9),%edx    \n\t"
 369     "movl       16(%r9),%esi    \n\t"
 370     "movl       20(%r9),%edi    \n\t"
 371     "movl       (%r9),%eax      \n\t"
 372     "call       *%r12           \n\t"
 373     "pushfq                     \n\t"
 374     "popq        %r12           \n\t"
 375     "movl       %eax, (%r9)     \n\t"
 376     "movl       %ebx, 4(%r9)    \n\t"
 377     "movl       %ecx, 8(%r9)    \n\t"
 378     "movl       %edx, 12(%r9)   \n\t"
 379     "movl       %esi, 16(%r9)   \n\t"
 380     "movl       %edi, 20(%r9)   \n\t"
 381     "movq       %r12, %rax      \n\t"
 382     "movl       %eax, 28(%r9)   \n\t"
 383     "popq       %r9             \n\t"
 384     "popq       %r12            \n\t"
 385     "popq       %rdx            \n\t"
 386     "popq       %rbx            \n\t"
 387     "popq       %rax            \n\t"
 388     "leave                      \n\t"
 389     "ret                        \n\t"
 390     ".previous");
 391
 392 /*
 393  *      dmi_find_cru
 394  *
 395  *      Routine Description:
 396  *      This function checks whether or not a SMBIOS/DMI record is
 397  *      the 64bit CRU info or not
 398  */
 399 static void dmi_find_cru(const struct dmi_header *dm, void *dummy)
 400 {
 401         struct smbios_cru64_info *smbios_cru64_ptr;
 402         unsigned long cru_physical_address;
 403
 404         if (dm->type == SMBIOS_CRU64_INFORMATION) {
 405                 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
 406                 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
 407                         cru_physical_address =
 408                                 smbios_cru64_ptr->physical_address +
 409                                 smbios_cru64_ptr->double_offset;
 410                         cru_rom_addr = ioremap(cru_physical_address,
 411                                 smbios_cru64_ptr->double_length);
 412                         set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
 413                                 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
 414                 }
 415         }
 416 }
 417
 418 static int detect_cru_service(void)
 419 {
 420         cru_rom_addr = NULL;
 421
 422         dmi_walk(dmi_find_cru, NULL);
 423
 424         /* if cru_rom_addr has been set then we found a CRU service */
 425         return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
 426 }
 427 /* ------------------------------------------------------------------------- */
 428 #endif /* CONFIG_X86_64 */
 429 #endif /* CONFIG_HPWDT_NMI_DECODING */
 430
 431 /*
 432  *      Watchdog operations
 433  */
 434 static void hpwdt_start(void)
 435 {
 436         reload = SECS_TO_TICKS(soft_margin);
 437         iowrite16(reload, hpwdt_timer_reg);
 438         iowrite8(0x85, hpwdt_timer_con);
 439 }
 440
 441 static void hpwdt_stop(void)
 442 {
 443         unsigned long data;
 444
 445         data = ioread8(hpwdt_timer_con);
 446         data &= 0xFE;
 447         iowrite8(data, hpwdt_timer_con);
 448 }
 449
 450 static void hpwdt_ping(void)
 451 {
 452         iowrite16(reload, hpwdt_timer_reg);
 453 }
 454
 455 static int hpwdt_change_timer(int new_margin)
 456 {
 457         if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
 458                 pr_warn("New value passed in is invalid: %d seconds\n",
 459                         new_margin);
 460                 return -EINVAL;
 461         }
 462
 463         soft_margin = new_margin;
 464         pr_debug("New timer passed in is %d seconds\n", new_margin);
 465         reload = SECS_TO_TICKS(soft_margin);
 466
 467         return 0;
 468 }
 469
 470 static int hpwdt_time_left(void)
 471 {
 472         return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
 473 }
 474
 475 #ifdef CONFIG_HPWDT_NMI_DECODING
 476 /*
 477  *      NMI Handler
 478  */
 479 static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
 480 {
 481         unsigned long rom_pl;
 482         static int die_nmi_called;
 483
 484         if (!hpwdt_nmi_decoding)
 485                 goto out;
 486
 487         spin_lock_irqsave(&rom_lock, rom_pl);
 488         if (!die_nmi_called && !is_icru && !is_uefi)
 489                 asminline_call(&cmn_regs, cru_rom_addr);
 490         die_nmi_called = 1;
 491         spin_unlock_irqrestore(&rom_lock, rom_pl);
 492
 493         if (allow_kdump)
 494                 hpwdt_stop();
 495
 496         if (!is_icru && !is_uefi) {
 497                 if (cmn_regs.u1.ral == 0) {
 498                         panic("An NMI occurred, "
 499                                 "but unable to determine source.\n");
 500                 }
 501         }
 502         panic("An NMI occurred, please see the Integrated "
 503                 "Management Log for details.\n");
 504
 505 out:
 506         return NMI_DONE;
 507 }
 508 #endif /* CONFIG_HPWDT_NMI_DECODING */
 509
 510 /*
 511  *      /dev/watchdog handling
 512  */
 513 static int hpwdt_open(struct inode *inode, struct file *file)
 514 {
 515         /* /dev/watchdog can only be opened once */
 516         if (test_and_set_bit(0, &hpwdt_is_open))
 517                 return -EBUSY;
 518
 519         /* Start the watchdog */
 520         hpwdt_start();
 521         hpwdt_ping();
 522
 523         return nonseekable_open(inode, file);
 524 }
 525
 526 static int hpwdt_release(struct inode *inode, struct file *file)
 527 {
 528         /* Stop the watchdog */
 529         if (expect_release == 42) {
 530                 hpwdt_stop();
 531         } else {
 532                 pr_crit("Unexpected close, not stopping watchdog!\n");
 533                 hpwdt_ping();
 534         }
 535
 536         expect_release = 0;
 537
 538         /* /dev/watchdog is being closed, make sure it can be re-opened */
 539         clear_bit(0, &hpwdt_is_open);
 540
 541         return 0;
 542 }
 543
 544 static ssize_t hpwdt_write(struct file *file, const char __user *data,
 545         size_t len, loff_t *ppos)
 546 {
 547         /* See if we got the magic character 'V' and reload the timer */
 548         if (len) {
 549                 if (!nowayout) {
 550                         size_t i;
 551
 552                         /* note: just in case someone wrote the magic character
 553                          * five months ago... */
 554                         expect_release = 0;
 555
 556                         /* scan to see whether or not we got the magic char. */
 557                         for (i = 0; i != len; i++) {
 558                                 char c;
 559                                 if (get_user(c, data + i))
 560                                         return -EFAULT;
 561                                 if (c == 'V')
 562                                         expect_release = 42;
 563                         }
 564                 }
 565
 566                 /* someone wrote to us, we should reload the timer */
 567                 hpwdt_ping();
 568         }
 569
 570         return len;
 571 }
 572
 573 static const struct watchdog_info ident = {
 574         .options = WDIOF_SETTIMEOUT |
 575                    WDIOF_KEEPALIVEPING |
 576                    WDIOF_MAGICCLOSE,
 577         .identity = "HP iLO2+ HW Watchdog Timer",
 578 };
 579
 580 static long hpwdt_ioctl(struct file *file, unsigned int cmd,
 581         unsigned long arg)
 582 {
 583         void __user *argp = (void __user *)arg;
 584         int __user *p = argp;
 585         int new_margin;
 586         int ret = -ENOTTY;
 587
 588         switch (cmd) {
 589         case WDIOC_GETSUPPORT:
 590                 ret = 0;
 591                 if (copy_to_user(argp, &ident, sizeof(ident)))
 592                         ret = -EFAULT;
 593                 break;
 594
 595         case WDIOC_GETSTATUS:
 596         case WDIOC_GETBOOTSTATUS:
 597                 ret = put_user(0, p);
 598                 break;
 599
 600         case WDIOC_KEEPALIVE:
 601                 hpwdt_ping();
 602                 ret = 0;
 603                 break;
 604
 605         case WDIOC_SETTIMEOUT:
 606                 ret = get_user(new_margin, p);
 607                 if (ret)
 608                         break;
 609
 610                 ret = hpwdt_change_timer(new_margin);
 611                 if (ret)
 612                         break;
 613
 614                 hpwdt_ping();
 615                 /* Fall */
 616         case WDIOC_GETTIMEOUT:
 617                 ret = put_user(soft_margin, p);
 618                 break;
 619
 620         case WDIOC_GETTIMELEFT:
 621                 ret = put_user(hpwdt_time_left(), p);
 622                 break;
 623         }
 624         return ret;
 625 }
 626
 627 /*
 628  *      Kernel interfaces
 629  */
 630 static const struct file_operations hpwdt_fops = {
 631         .owner = THIS_MODULE,
 632         .llseek = no_llseek,
 633         .write = hpwdt_write,
 634         .unlocked_ioctl = hpwdt_ioctl,
 635         .open = hpwdt_open,
 636         .release = hpwdt_release,
 637 };
 638
 639 static struct miscdevice hpwdt_miscdev = {
 640         .minor = WATCHDOG_MINOR,
 641         .name = "watchdog",
 642         .fops = &hpwdt_fops,
 643 };
 644
 645 /*
 646  *      Init & Exit
 647  */
 648
 649 #ifdef CONFIG_HPWDT_NMI_DECODING
 650 #ifdef CONFIG_X86_LOCAL_APIC
 651 static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
 652 {
 653         /*
 654          * If nmi_watchdog is turned off then we can turn on
 655          * our nmi decoding capability.
 656          */
 657         hpwdt_nmi_decoding = 1;
 658 }
 659 #else
 660 static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
 661 {
 662         dev_warn(&dev->dev, "NMI decoding is disabled. "
 663                 "Your kernel does not support a NMI Watchdog.\n");
 664 }
 665 #endif /* CONFIG_X86_LOCAL_APIC */
 666
 667 /*
 668  *      dmi_find_icru
 669  *
 670  *      Routine Description:
 671  *      This function checks whether or not we are on an iCRU-based server.
 672  *      This check is independent of architecture and needs to be made for
 673  *      any ProLiant system.
 674  */
 675 static void dmi_find_icru(const struct dmi_header *dm, void *dummy)
 676 {
 677         struct smbios_proliant_info *smbios_proliant_ptr;
 678
 679         if (dm->type == SMBIOS_ICRU_INFORMATION) {
 680                 smbios_proliant_ptr = (struct smbios_proliant_info *) dm;
 681                 if (smbios_proliant_ptr->misc_features & 0x01)
 682                         is_icru = 1;
 683                 if (smbios_proliant_ptr->misc_features & 0x408)
 684                         is_uefi = 1;
 685         }
 686 }
 687
 688 static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
 689 {
 690         int retval;
 691
 692         /*
 693          * On typical CRU-based systems we need to map that service in
 694          * the BIOS. For 32 bit Operating Systems we need to go through
 695          * the 32 Bit BIOS Service Directory. For 64 bit Operating
 696          * Systems we get that service through SMBIOS.
 697          *
 698          * On systems that support the new iCRU service all we need to
 699          * do is call dmi_walk to get the supported flag value and skip
 700          * the old cru detect code.
 701          */
 702         dmi_walk(dmi_find_icru, NULL);
 703         if (!is_icru && !is_uefi) {
 704
 705                 /*
 706                 * We need to map the ROM to get the CRU service.
 707                 * For 32 bit Operating Systems we need to go through the 32 Bit
 708                 * BIOS Service Directory
 709                 * For 64 bit Operating Systems we get that service through SMBIOS.
 710                 */
 711                 retval = detect_cru_service();
 712                 if (retval < 0) {
 713                         dev_warn(&dev->dev,
 714                                 "Unable to detect the %d Bit CRU Service.\n",
 715                                 HPWDT_ARCH);
 716                         return retval;
 717                 }
 718
 719                 /*
 720                 * We know this is the only CRU call we need to make so lets keep as
 721                 * few instructions as possible once the NMI comes in.
 722                 */
 723                 cmn_regs.u1.rah = 0x0D;
 724                 cmn_regs.u1.ral = 0x02;
 725         }
 726
 727         /*
 728          * Only one function can register for NMI_UNKNOWN
 729          */
 730         retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt");
 731         if (retval)
 732                 goto error;
 733         retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt");
 734         if (retval)
 735                 goto error1;
 736         retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt");
 737         if (retval)
 738                 goto error2;
 739
 740         dev_info(&dev->dev,
 741                         "HP Watchdog Timer Driver: NMI decoding initialized"
 742                         ", allow kernel dump: %s (default = 0/OFF)\n",
 743                         (allow_kdump == 0) ? "OFF" : "ON");
 744         return 0;
 745
 746 error2:
 747         unregister_nmi_handler(NMI_SERR, "hpwdt");
 748 error1:
 749         unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
 750 error:
 751         dev_warn(&dev->dev,
 752                 "Unable to register a die notifier (err=%d).\n",
 753                 retval);
 754         if (cru_rom_addr)
 755                 iounmap(cru_rom_addr);
 756         return retval;
 757 }
 758
 759 static void hpwdt_exit_nmi_decoding(void)
 760 {
 761         unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
 762         unregister_nmi_handler(NMI_SERR, "hpwdt");
 763         unregister_nmi_handler(NMI_IO_CHECK, "hpwdt");
 764         if (cru_rom_addr)
 765                 iounmap(cru_rom_addr);
 766 }
 767 #else /* !CONFIG_HPWDT_NMI_DECODING */
 768 static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
 769 {
 770 }
 771
 772 static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
 773 {
 774         return 0;
 775 }
 776
 777 static void hpwdt_exit_nmi_decoding(void)
 778 {
 779 }
 780 #endif /* CONFIG_HPWDT_NMI_DECODING */
 781
 782 static int hpwdt_init_one(struct pci_dev *dev,
 783                                         const struct pci_device_id *ent)
 784 {
 785         int retval;
 786
 787         /*
 788          * Check if we can do NMI decoding or not
 789          */
 790         hpwdt_check_nmi_decoding(dev);
 791
 792         /*
 793          * First let's find out if we are on an iLO2+ server. We will
 794          * not run on a legacy ASM box.
 795          * So we only support the G5 ProLiant servers and higher.
 796          */
 797         if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
 798                 dev_warn(&dev->dev,
 799                         "This server does not have an iLO2+ ASIC.\n");
 800                 return -ENODEV;
 801         }
 802
 803         if (pci_enable_device(dev)) {
 804                 dev_warn(&dev->dev,
 805                         "Not possible to enable PCI Device: 0x%x:0x%x.\n",
 806                         ent->vendor, ent->device);
 807                 return -ENODEV;
 808         }
 809
 810         pci_mem_addr = pci_iomap(dev, 1, 0x80);
 811         if (!pci_mem_addr) {
 812                 dev_warn(&dev->dev,
 813                         "Unable to detect the iLO2+ server memory.\n");
 814                 retval = -ENOMEM;
 815                 goto error_pci_iomap;
 816         }
 817         hpwdt_timer_reg = pci_mem_addr + 0x70;
 818         hpwdt_timer_con = pci_mem_addr + 0x72;
 819
 820         /* Make sure that timer is disabled until /dev/watchdog is opened */
 821         hpwdt_stop();
 822
 823         /* Make sure that we have a valid soft_margin */
 824         if (hpwdt_change_timer(soft_margin))
 825                 hpwdt_change_timer(DEFAULT_MARGIN);
 826
 827         /* Initialize NMI Decoding functionality */
 828         retval = hpwdt_init_nmi_decoding(dev);
 829         if (retval != 0)
 830                 goto error_init_nmi_decoding;
 831
 832         retval = misc_register(&hpwdt_miscdev);
 833         if (retval < 0) {
 834                 dev_warn(&dev->dev,
 835                         "Unable to register miscdev on minor=%d (err=%d).\n",
 836                         WATCHDOG_MINOR, retval);
 837                 goto error_misc_register;
 838         }
 839
 840         dev_info(&dev->dev, "HP Watchdog Timer Driver: %s"
 841                         ", timer margin: %d seconds (nowayout=%d).\n",
 842                         HPWDT_VERSION, soft_margin, nowayout);
 843         return 0;
 844
 845 error_misc_register:
 846         hpwdt_exit_nmi_decoding();
 847 error_init_nmi_decoding:
 848         pci_iounmap(dev, pci_mem_addr);
 849 error_pci_iomap:
 850         pci_disable_device(dev);
 851         return retval;
 852 }
 853
 854 static void hpwdt_exit(struct pci_dev *dev)
 855 {
 856         if (!nowayout)
 857                 hpwdt_stop();
 858
 859         misc_deregister(&hpwdt_miscdev);
 860         hpwdt_exit_nmi_decoding();
 861         pci_iounmap(dev, pci_mem_addr);
 862         pci_disable_device(dev);
 863 }
 864
 865 static struct pci_driver hpwdt_driver = {
 866         .name = "hpwdt",
 867         .id_table = hpwdt_devices,
 868         .probe = hpwdt_init_one,
 869         .remove = hpwdt_exit,
 870 };
 871
 872 MODULE_AUTHOR("Tom Mingarelli");
 873 MODULE_DESCRIPTION("hp watchdog driver");
 874 MODULE_LICENSE("GPL");
 875 MODULE_VERSION(HPWDT_VERSION);
 876 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 877
 878 module_param(soft_margin, int, 0);
 879 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
 880
 881 module_param(nowayout, bool, 0);
 882 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
 883                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 884
 885 #ifdef CONFIG_HPWDT_NMI_DECODING
 886 module_param(allow_kdump, int, 0);
 887 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
 888 #endif /* !CONFIG_HPWDT_NMI_DECODING */
 889
 890 module_pci_driver(hpwdt_driver);