drivers/watchdog/hpwdt.c

   1 /*
   2  *      HP WatchDog Driver
   3  *      based on
   4  *
   5  *      SoftDog 0.05:   A Software Watchdog Device
   6  *
   7  *      (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
   8  *      Thomas Mingarelli <thomas.mingarelli@hp.com>
   9  *
  10  *      This program is free software; you can redistribute it and/or
  11  *      modify it under the terms of the GNU General Public License
  12  *      version 2 as published by the Free Software Foundation
  13  *
  14  */
  15
  16 #include <linux/device.h>
  17 #include <linux/fs.h>
  18 #include <linux/init.h>
  19 #include <linux/io.h>
  20 #include <linux/bitops.h>
  21 #include <linux/kernel.h>
  22 #include <linux/miscdevice.h>
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci_ids.h>
  27 #include <linux/types.h>
  28 #include <linux/uaccess.h>
  29 #include <linux/watchdog.h>
  30 #ifdef CONFIG_HPWDT_NMI_DECODING
  31 #include <linux/dmi.h>
  32 #include <linux/spinlock.h>
  33 #include <linux/nmi.h>
  34 #include <linux/kdebug.h>
  35 #include <linux/notifier.h>
  36 #include <asm/cacheflush.h>
  37 #endif /* CONFIG_HPWDT_NMI_DECODING */
  38 #include <asm/nmi.h>
  39
  40 #define HPWDT_VERSION                   "1.3.0"
  41 #define SECS_TO_TICKS(secs)             ((secs) * 1000 / 128)
  42 #define TICKS_TO_SECS(ticks)            ((ticks) * 128 / 1000)
  43 #define HPWDT_MAX_TIMER                 TICKS_TO_SECS(65535)
  44 #define DEFAULT_MARGIN                  30
  45
  46 static unsigned int soft_margin = DEFAULT_MARGIN;       /* in seconds */
  47 static unsigned int reload;                     /* the computed soft_margin */
  48 static int nowayout = WATCHDOG_NOWAYOUT;
  49 static char expect_release;
  50 static unsigned long hpwdt_is_open;
  51
  52 static void __iomem *pci_mem_addr;              /* the PCI-memory address */
  53 static unsigned long __iomem *hpwdt_timer_reg;
  54 static unsigned long __iomem *hpwdt_timer_con;
  55
  56 static DEFINE_PCI_DEVICE_TABLE(hpwdt_devices) = {
  57         { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },   /* iLO2 */
  58         { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },       /* iLO3 */
  59         {0},                    /* terminate list */
  60 };
  61 MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  62
  63 #ifdef CONFIG_HPWDT_NMI_DECODING
  64 #define PCI_BIOS32_SD_VALUE             0x5F32335F      /* "_32_" */
  65 #define CRU_BIOS_SIGNATURE_VALUE        0x55524324
  66 #define PCI_BIOS32_PARAGRAPH_LEN        16
  67 #define PCI_ROM_BASE1                   0x000F0000
  68 #define ROM_SIZE                        0x10000
  69
  70 struct bios32_service_dir {
  71         u32 signature;
  72         u32 entry_point;
  73         u8 revision;
  74         u8 length;
  75         u8 checksum;
  76         u8 reserved[5];
  77 };
  78
  79 /* type 212 */
  80 struct smbios_cru64_info {
  81         u8 type;
  82         u8 byte_length;
  83         u16 handle;
  84         u32 signature;
  85         u64 physical_address;
  86         u32 double_length;
  87         u32 double_offset;
  88 };
  89 #define SMBIOS_CRU64_INFORMATION        212
  90
  91 /* type 219 */
  92 struct smbios_proliant_info {
  93         u8 type;
  94         u8 byte_length;
  95         u16 handle;
  96         u32 power_features;
  97         u32 omega_features;
  98         u32 reserved;
  99         u32 misc_features;
 100 };
 101 #define SMBIOS_ICRU_INFORMATION         219
 102
 103
 104 struct cmn_registers {
 105         union {
 106                 struct {
 107                         u8 ral;
 108                         u8 rah;
 109                         u16 rea2;
 110                 };
 111                 u32 reax;
 112         } u1;
 113         union {
 114                 struct {
 115                         u8 rbl;
 116                         u8 rbh;
 117                         u8 reb2l;
 118                         u8 reb2h;
 119                 };
 120                 u32 rebx;
 121         } u2;
 122         union {
 123                 struct {
 124                         u8 rcl;
 125                         u8 rch;
 126                         u16 rec2;
 127                 };
 128                 u32 recx;
 129         } u3;
 130         union {
 131                 struct {
 132                         u8 rdl;
 133                         u8 rdh;
 134                         u16 red2;
 135                 };
 136                 u32 redx;
 137         } u4;
 138
 139         u32 resi;
 140         u32 redi;
 141         u16 rds;
 142         u16 res;
 143         u32 reflags;
 144 }  __attribute__((packed));
 145
 146 static unsigned int hpwdt_nmi_decoding;
 147 static unsigned int allow_kdump;
 148 static unsigned int priority;           /* hpwdt at end of die_notify list */
 149 static unsigned int is_icru;
 150 static DEFINE_SPINLOCK(rom_lock);
 151 static void *cru_rom_addr;
 152 static struct cmn_registers cmn_regs;
 153
 154 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
 155                                                 unsigned long *pRomEntry);
 156
 157 #ifdef CONFIG_X86_32
 158 /* --32 Bit Bios------------------------------------------------------------ */
 159
 160 #define HPWDT_ARCH      32
 161
 162 asm(".text                          \n\t"
 163     ".align 4                       \n"
 164     "asminline_call:                \n\t"
 165     "pushl       %ebp               \n\t"
 166     "movl        %esp, %ebp         \n\t"
 167     "pusha                          \n\t"
 168     "pushf                          \n\t"
 169     "push        %es                \n\t"
 170     "push        %ds                \n\t"
 171     "pop         %es                \n\t"
 172     "movl        8(%ebp),%eax       \n\t"
 173     "movl        4(%eax),%ebx       \n\t"
 174     "movl        8(%eax),%ecx       \n\t"
 175     "movl        12(%eax),%edx      \n\t"
 176     "movl        16(%eax),%esi      \n\t"
 177     "movl        20(%eax),%edi      \n\t"
 178     "movl        (%eax),%eax        \n\t"
 179     "push        %cs                \n\t"
 180     "call        *12(%ebp)          \n\t"
 181     "pushf                          \n\t"
 182     "pushl       %eax               \n\t"
 183     "movl        8(%ebp),%eax       \n\t"
 184     "movl        %ebx,4(%eax)       \n\t"
 185     "movl        %ecx,8(%eax)       \n\t"
 186     "movl        %edx,12(%eax)      \n\t"
 187     "movl        %esi,16(%eax)      \n\t"
 188     "movl        %edi,20(%eax)      \n\t"
 189     "movw        %ds,24(%eax)       \n\t"
 190     "movw        %es,26(%eax)       \n\t"
 191     "popl        %ebx               \n\t"
 192     "movl        %ebx,(%eax)        \n\t"
 193     "popl        %ebx               \n\t"
 194     "movl        %ebx,28(%eax)      \n\t"
 195     "pop         %es                \n\t"
 196     "popf                           \n\t"
 197     "popa                           \n\t"
 198     "leave                          \n\t"
 199     "ret                            \n\t"
 200     ".previous");
 201
 202
 203 /*
 204  *      cru_detect
 205  *
 206  *      Routine Description:
 207  *      This function uses the 32-bit BIOS Service Directory record to
 208  *      search for a $CRU record.
 209  *
 210  *      Return Value:
 211  *      0        :  SUCCESS
 212  *      <0       :  FAILURE
 213  */
 214 static int __devinit cru_detect(unsigned long map_entry,
 215         unsigned long map_offset)
 216 {
 217         void *bios32_map;
 218         unsigned long *bios32_entrypoint;
 219         unsigned long cru_physical_address;
 220         unsigned long cru_length;
 221         unsigned long physical_bios_base = 0;
 222         unsigned long physical_bios_offset = 0;
 223         int retval = -ENODEV;
 224
 225         bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
 226
 227         if (bios32_map == NULL)
 228                 return -ENODEV;
 229
 230         bios32_entrypoint = bios32_map + map_offset;
 231
 232         cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
 233
 234         set_memory_x((unsigned long)bios32_entrypoint, (2 * PAGE_SIZE));
 235         asminline_call(&cmn_regs, bios32_entrypoint);
 236
 237         if (cmn_regs.u1.ral != 0) {
 238                 printk(KERN_WARNING
 239                         "hpwdt: Call succeeded but with an error: 0x%x\n",
 240                         cmn_regs.u1.ral);
 241         } else {
 242                 physical_bios_base = cmn_regs.u2.rebx;
 243                 physical_bios_offset = cmn_regs.u4.redx;
 244                 cru_length = cmn_regs.u3.recx;
 245                 cru_physical_address =
 246                         physical_bios_base + physical_bios_offset;
 247
 248                 /* If the values look OK, then map it in. */
 249                 if ((physical_bios_base + physical_bios_offset)) {
 250                         cru_rom_addr =
 251                                 ioremap(cru_physical_address, cru_length);
 252                         if (cru_rom_addr) {
 253                                 set_memory_x((unsigned long)cru_rom_addr, cru_length);
 254                                 retval = 0;
 255                         }
 256                 }
 257
 258                 printk(KERN_DEBUG "hpwdt: CRU Base Address:   0x%lx\n",
 259                         physical_bios_base);
 260                 printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
 261                         physical_bios_offset);
 262                 printk(KERN_DEBUG "hpwdt: CRU Length:         0x%lx\n",
 263                         cru_length);
 264                 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n",
 265                         &cru_rom_addr);
 266         }
 267         iounmap(bios32_map);
 268         return retval;
 269 }
 270
 271 /*
 272  *      bios_checksum
 273  */
 274 static int __devinit bios_checksum(const char __iomem *ptr, int len)
 275 {
 276         char sum = 0;
 277         int i;
 278
 279         /*
 280          * calculate checksum of size bytes. This should add up
 281          * to zero if we have a valid header.
 282          */
 283         for (i = 0; i < len; i++)
 284                 sum += ptr[i];
 285
 286         return ((sum == 0) && (len > 0));
 287 }
 288
 289 /*
 290  *      bios32_present
 291  *
 292  *      Routine Description:
 293  *      This function finds the 32-bit BIOS Service Directory
 294  *
 295  *      Return Value:
 296  *      0        :  SUCCESS
 297  *      <0       :  FAILURE
 298  */
 299 static int __devinit bios32_present(const char __iomem *p)
 300 {
 301         struct bios32_service_dir *bios_32_ptr;
 302         int length;
 303         unsigned long map_entry, map_offset;
 304
 305         bios_32_ptr = (struct bios32_service_dir *) p;
 306
 307         /*
 308          * Search for signature by checking equal to the swizzled value
 309          * instead of calling another routine to perform a strcmp.
 310          */
 311         if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
 312                 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
 313                 if (bios_checksum(p, length)) {
 314                         /*
 315                          * According to the spec, we're looking for the
 316                          * first 4KB-aligned address below the entrypoint
 317                          * listed in the header. The Service Directory code
 318                          * is guaranteed to occupy no more than 2 4KB pages.
 319                          */
 320                         map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
 321                         map_offset = bios_32_ptr->entry_point - map_entry;
 322
 323                         return cru_detect(map_entry, map_offset);
 324                 }
 325         }
 326         return -ENODEV;
 327 }
 328
 329 static int __devinit detect_cru_service(void)
 330 {
 331         char __iomem *p, *q;
 332         int rc = -1;
 333
 334         /*
 335          * Search from 0x0f0000 through 0x0fffff, inclusive.
 336          */
 337         p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
 338         if (p == NULL)
 339                 return -ENOMEM;
 340
 341         for (q = p; q < p + ROM_SIZE; q += 16) {
 342                 rc = bios32_present(q);
 343                 if (!rc)
 344                         break;
 345         }
 346         iounmap(p);
 347         return rc;
 348 }
 349 /* ------------------------------------------------------------------------- */
 350 #endif /* CONFIG_X86_32 */
 351 #ifdef CONFIG_X86_64
 352 /* --64 Bit Bios------------------------------------------------------------ */
 353
 354 #define HPWDT_ARCH      64
 355
 356 asm(".text                      \n\t"
 357     ".align 4                   \n"
 358     "asminline_call:            \n\t"
 359     "pushq      %rbp            \n\t"
 360     "movq       %rsp, %rbp      \n\t"
 361     "pushq      %rax            \n\t"
 362     "pushq      %rbx            \n\t"
 363     "pushq      %rdx            \n\t"
 364     "pushq      %r12            \n\t"
 365     "pushq      %r9             \n\t"
 366     "movq       %rsi, %r12      \n\t"
 367     "movq       %rdi, %r9       \n\t"
 368     "movl       4(%r9),%ebx     \n\t"
 369     "movl       8(%r9),%ecx     \n\t"
 370     "movl       12(%r9),%edx    \n\t"
 371     "movl       16(%r9),%esi    \n\t"
 372     "movl       20(%r9),%edi    \n\t"
 373     "movl       (%r9),%eax      \n\t"
 374     "call       *%r12           \n\t"
 375     "pushfq                     \n\t"
 376     "popq        %r12           \n\t"
 377     "movl       %eax, (%r9)     \n\t"
 378     "movl       %ebx, 4(%r9)    \n\t"
 379     "movl       %ecx, 8(%r9)    \n\t"
 380     "movl       %edx, 12(%r9)   \n\t"
 381     "movl       %esi, 16(%r9)   \n\t"
 382     "movl       %edi, 20(%r9)   \n\t"
 383     "movq       %r12, %rax      \n\t"
 384     "movl       %eax, 28(%r9)   \n\t"
 385     "popq       %r9             \n\t"
 386     "popq       %r12            \n\t"
 387     "popq       %rdx            \n\t"
 388     "popq       %rbx            \n\t"
 389     "popq       %rax            \n\t"
 390     "leave                      \n\t"
 391     "ret                        \n\t"
 392     ".previous");
 393
 394 /*
 395  *      dmi_find_cru
 396  *
 397  *      Routine Description:
 398  *      This function checks whether or not a SMBIOS/DMI record is
 399  *      the 64bit CRU info or not
 400  */
 401 static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
 402 {
 403         struct smbios_cru64_info *smbios_cru64_ptr;
 404         unsigned long cru_physical_address;
 405
 406         if (dm->type == SMBIOS_CRU64_INFORMATION) {
 407                 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
 408                 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
 409                         cru_physical_address =
 410                                 smbios_cru64_ptr->physical_address +
 411                                 smbios_cru64_ptr->double_offset;
 412                         cru_rom_addr = ioremap(cru_physical_address,
 413                                 smbios_cru64_ptr->double_length);
 414                         set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
 415                                 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
 416                 }
 417         }
 418 }
 419
 420 static int __devinit detect_cru_service(void)
 421 {
 422         cru_rom_addr = NULL;
 423
 424         dmi_walk(dmi_find_cru, NULL);
 425
 426         /* if cru_rom_addr has been set then we found a CRU service */
 427         return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
 428 }
 429 /* ------------------------------------------------------------------------- */
 430 #endif /* CONFIG_X86_64 */
 431 #endif /* CONFIG_HPWDT_NMI_DECODING */
 432
 433 /*
 434  *      Watchdog operations
 435  */
 436 static void hpwdt_start(void)
 437 {
 438         reload = SECS_TO_TICKS(soft_margin);
 439         iowrite16(reload, hpwdt_timer_reg);
 440         iowrite16(0x85, hpwdt_timer_con);
 441 }
 442
 443 static void hpwdt_stop(void)
 444 {
 445         unsigned long data;
 446
 447         data = ioread16(hpwdt_timer_con);
 448         data &= 0xFE;
 449         iowrite16(data, hpwdt_timer_con);
 450 }
 451
 452 static void hpwdt_ping(void)
 453 {
 454         iowrite16(reload, hpwdt_timer_reg);
 455 }
 456
 457 static int hpwdt_change_timer(int new_margin)
 458 {
 459         if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
 460                 printk(KERN_WARNING
 461                         "hpwdt: New value passed in is invalid: %d seconds.\n",
 462                         new_margin);
 463                 return -EINVAL;
 464         }
 465
 466         soft_margin = new_margin;
 467         printk(KERN_DEBUG
 468                 "hpwdt: New timer passed in is %d seconds.\n",
 469                 new_margin);
 470         reload = SECS_TO_TICKS(soft_margin);
 471
 472         return 0;
 473 }
 474
 475 static int hpwdt_time_left(void)
 476 {
 477         return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
 478 }
 479
 480 #ifdef CONFIG_HPWDT_NMI_DECODING
 481 /*
 482  *      NMI Handler
 483  */
 484 static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
 485 {
 486         unsigned long rom_pl;
 487         static int die_nmi_called;
 488
 489         if (!hpwdt_nmi_decoding)
 490                 goto out;
 491
 492         spin_lock_irqsave(&rom_lock, rom_pl);
 493         if (!die_nmi_called && !is_icru)
 494                 asminline_call(&cmn_regs, cru_rom_addr);
 495         die_nmi_called = 1;
 496         spin_unlock_irqrestore(&rom_lock, rom_pl);
 497
 498         if (allow_kdump)
 499                 hpwdt_stop();
 500
 501         if (!is_icru) {
 502                 if (cmn_regs.u1.ral == 0) {
 503                         panic("An NMI occurred, "
 504                                 "but unable to determine source.\n");
 505                 }
 506         }
 507         panic("An NMI occurred, please see the Integrated "
 508                 "Management Log for details.\n");
 509
 510 out:
 511         return NMI_DONE;
 512 }
 513 #endif /* CONFIG_HPWDT_NMI_DECODING */
 514
 515 /*
 516  *      /dev/watchdog handling
 517  */
 518 static int hpwdt_open(struct inode *inode, struct file *file)
 519 {
 520         /* /dev/watchdog can only be opened once */
 521         if (test_and_set_bit(0, &hpwdt_is_open))
 522                 return -EBUSY;
 523
 524         /* Start the watchdog */
 525         hpwdt_start();
 526         hpwdt_ping();
 527
 528         return nonseekable_open(inode, file);
 529 }
 530
 531 static int hpwdt_release(struct inode *inode, struct file *file)
 532 {
 533         /* Stop the watchdog */
 534         if (expect_release == 42) {
 535                 hpwdt_stop();
 536         } else {
 537                 printk(KERN_CRIT
 538                         "hpwdt: Unexpected close, not stopping watchdog!\n");
 539                 hpwdt_ping();
 540         }
 541
 542         expect_release = 0;
 543
 544         /* /dev/watchdog is being closed, make sure it can be re-opened */
 545         clear_bit(0, &hpwdt_is_open);
 546
 547         return 0;
 548 }
 549
 550 static ssize_t hpwdt_write(struct file *file, const char __user *data,
 551         size_t len, loff_t *ppos)
 552 {
 553         /* See if we got the magic character 'V' and reload the timer */
 554         if (len) {
 555                 if (!nowayout) {
 556                         size_t i;
 557
 558                         /* note: just in case someone wrote the magic character
 559                          * five months ago... */
 560                         expect_release = 0;
 561
 562                         /* scan to see whether or not we got the magic char. */
 563                         for (i = 0; i != len; i++) {
 564                                 char c;
 565                                 if (get_user(c, data + i))
 566                                         return -EFAULT;
 567                                 if (c == 'V')
 568                                         expect_release = 42;
 569                         }
 570                 }
 571
 572                 /* someone wrote to us, we should reload the timer */
 573                 hpwdt_ping();
 574         }
 575
 576         return len;
 577 }
 578
 579 static const struct watchdog_info ident = {
 580         .options = WDIOF_SETTIMEOUT |
 581                    WDIOF_KEEPALIVEPING |
 582                    WDIOF_MAGICCLOSE,
 583         .identity = "HP iLO2+ HW Watchdog Timer",
 584 };
 585
 586 static long hpwdt_ioctl(struct file *file, unsigned int cmd,
 587         unsigned long arg)
 588 {
 589         void __user *argp = (void __user *)arg;
 590         int __user *p = argp;
 591         int new_margin;
 592         int ret = -ENOTTY;
 593
 594         switch (cmd) {
 595         case WDIOC_GETSUPPORT:
 596                 ret = 0;
 597                 if (copy_to_user(argp, &ident, sizeof(ident)))
 598                         ret = -EFAULT;
 599                 break;
 600
 601         case WDIOC_GETSTATUS:
 602         case WDIOC_GETBOOTSTATUS:
 603                 ret = put_user(0, p);
 604                 break;
 605
 606         case WDIOC_KEEPALIVE:
 607                 hpwdt_ping();
 608                 ret = 0;
 609                 break;
 610
 611         case WDIOC_SETTIMEOUT:
 612                 ret = get_user(new_margin, p);
 613                 if (ret)
 614                         break;
 615
 616                 ret = hpwdt_change_timer(new_margin);
 617                 if (ret)
 618                         break;
 619
 620                 hpwdt_ping();
 621                 /* Fall */
 622         case WDIOC_GETTIMEOUT:
 623                 ret = put_user(soft_margin, p);
 624                 break;
 625
 626         case WDIOC_GETTIMELEFT:
 627                 ret = put_user(hpwdt_time_left(), p);
 628                 break;
 629         }
 630         return ret;
 631 }
 632
 633 /*
 634  *      Kernel interfaces
 635  */
 636 static const struct file_operations hpwdt_fops = {
 637         .owner = THIS_MODULE,
 638         .llseek = no_llseek,
 639         .write = hpwdt_write,
 640         .unlocked_ioctl = hpwdt_ioctl,
 641         .open = hpwdt_open,
 642         .release = hpwdt_release,
 643 };
 644
 645 static struct miscdevice hpwdt_miscdev = {
 646         .minor = WATCHDOG_MINOR,
 647         .name = "watchdog",
 648         .fops = &hpwdt_fops,
 649 };
 650
 651 /*
 652  *      Init & Exit
 653  */
 654
 655 #ifdef CONFIG_HPWDT_NMI_DECODING
 656 #ifdef CONFIG_X86_LOCAL_APIC
 657 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 658 {
 659         /*
 660          * If nmi_watchdog is turned off then we can turn on
 661          * our nmi decoding capability.
 662          */
 663         hpwdt_nmi_decoding = 1;
 664 }
 665 #else
 666 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 667 {
 668         dev_warn(&dev->dev, "NMI decoding is disabled. "
 669                 "Your kernel does not support a NMI Watchdog.\n");
 670 }
 671 #endif /* CONFIG_X86_LOCAL_APIC */
 672
 673 /*
 674  *      dmi_find_icru
 675  *
 676  *      Routine Description:
 677  *      This function checks whether or not we are on an iCRU-based server.
 678  *      This check is independent of architecture and needs to be made for
 679  *      any ProLiant system.
 680  */
 681 static void __devinit dmi_find_icru(const struct dmi_header *dm, void *dummy)
 682 {
 683         struct smbios_proliant_info *smbios_proliant_ptr;
 684
 685         if (dm->type == SMBIOS_ICRU_INFORMATION) {
 686                 smbios_proliant_ptr = (struct smbios_proliant_info *) dm;
 687                 if (smbios_proliant_ptr->misc_features & 0x01)
 688                         is_icru = 1;
 689         }
 690 }
 691
 692 static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev)
 693 {
 694         int retval;
 695
 696         /*
 697          * On typical CRU-based systems we need to map that service in
 698          * the BIOS. For 32 bit Operating Systems we need to go through
 699          * the 32 Bit BIOS Service Directory. For 64 bit Operating
 700          * Systems we get that service through SMBIOS.
 701          *
 702          * On systems that support the new iCRU service all we need to
 703          * do is call dmi_walk to get the supported flag value and skip
 704          * the old cru detect code.
 705          */
 706         dmi_walk(dmi_find_icru, NULL);
 707         if (!is_icru) {
 708
 709                 /*
 710                 * We need to map the ROM to get the CRU service.
 711                 * For 32 bit Operating Systems we need to go through the 32 Bit
 712                 * BIOS Service Directory
 713                 * For 64 bit Operating Systems we get that service through SMBIOS.
 714                 */
 715                 retval = detect_cru_service();
 716                 if (retval < 0) {
 717                         dev_warn(&dev->dev,
 718                                 "Unable to detect the %d Bit CRU Service.\n",
 719                                 HPWDT_ARCH);
 720                         return retval;
 721                 }
 722
 723                 /*
 724                 * We know this is the only CRU call we need to make so lets keep as
 725                 * few instructions as possible once the NMI comes in.
 726                 */
 727                 cmn_regs.u1.rah = 0x0D;
 728                 cmn_regs.u1.ral = 0x02;
 729         }
 730
 731         /*
 732          * If the priority is set to 1, then we will be put first on the
 733          * die notify list to handle a critical NMI. The default is to
 734          * be last so other users of the NMI signal can function.
 735          */
 736         retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout,
 737                                         (priority) ? NMI_FLAG_FIRST : 0,
 738                                         "hpwdt");
 739         if (retval != 0) {
 740                 dev_warn(&dev->dev,
 741                         "Unable to register a die notifier (err=%d).\n",
 742                         retval);
 743                 if (cru_rom_addr)
 744                         iounmap(cru_rom_addr);
 745         }
 746
 747         dev_info(&dev->dev,
 748                         "HP Watchdog Timer Driver: NMI decoding initialized"
 749                         ", allow kernel dump: %s (default = 0/OFF)"
 750                         ", priority: %s (default = 0/LAST).\n",
 751                         (allow_kdump == 0) ? "OFF" : "ON",
 752                         (priority == 0) ? "LAST" : "FIRST");
 753         return 0;
 754 }
 755
 756 static void hpwdt_exit_nmi_decoding(void)
 757 {
 758         unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
 759         if (cru_rom_addr)
 760                 iounmap(cru_rom_addr);
 761 }
 762 #else /* !CONFIG_HPWDT_NMI_DECODING */
 763 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 764 {
 765 }
 766
 767 static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev)
 768 {
 769         return 0;
 770 }
 771
 772 static void hpwdt_exit_nmi_decoding(void)
 773 {
 774 }
 775 #endif /* CONFIG_HPWDT_NMI_DECODING */
 776
 777 static int __devinit hpwdt_init_one(struct pci_dev *dev,
 778                                         const struct pci_device_id *ent)
 779 {
 780         int retval;
 781
 782         /*
 783          * Check if we can do NMI decoding or not
 784          */
 785         hpwdt_check_nmi_decoding(dev);
 786
 787         /*
 788          * First let's find out if we are on an iLO2+ server. We will
 789          * not run on a legacy ASM box.
 790          * So we only support the G5 ProLiant servers and higher.
 791          */
 792         if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
 793                 dev_warn(&dev->dev,
 794                         "This server does not have an iLO2+ ASIC.\n");
 795                 return -ENODEV;
 796         }
 797
 798         if (pci_enable_device(dev)) {
 799                 dev_warn(&dev->dev,
 800                         "Not possible to enable PCI Device: 0x%x:0x%x.\n",
 801                         ent->vendor, ent->device);
 802                 return -ENODEV;
 803         }
 804
 805         pci_mem_addr = pci_iomap(dev, 1, 0x80);
 806         if (!pci_mem_addr) {
 807                 dev_warn(&dev->dev,
 808                         "Unable to detect the iLO2+ server memory.\n");
 809                 retval = -ENOMEM;
 810                 goto error_pci_iomap;
 811         }
 812         hpwdt_timer_reg = pci_mem_addr + 0x70;
 813         hpwdt_timer_con = pci_mem_addr + 0x72;
 814
 815         /* Make sure that we have a valid soft_margin */
 816         if (hpwdt_change_timer(soft_margin))
 817                 hpwdt_change_timer(DEFAULT_MARGIN);
 818
 819         /* Initialize NMI Decoding functionality */
 820         retval = hpwdt_init_nmi_decoding(dev);
 821         if (retval != 0)
 822                 goto error_init_nmi_decoding;
 823
 824         retval = misc_register(&hpwdt_miscdev);
 825         if (retval < 0) {
 826                 dev_warn(&dev->dev,
 827                         "Unable to register miscdev on minor=%d (err=%d).\n",
 828                         WATCHDOG_MINOR, retval);
 829                 goto error_misc_register;
 830         }
 831
 832         dev_info(&dev->dev, "HP Watchdog Timer Driver: %s"
 833                         ", timer margin: %d seconds (nowayout=%d).\n",
 834                         HPWDT_VERSION, soft_margin, nowayout);
 835         return 0;
 836
 837 error_misc_register:
 838         hpwdt_exit_nmi_decoding();
 839 error_init_nmi_decoding:
 840         pci_iounmap(dev, pci_mem_addr);
 841 error_pci_iomap:
 842         pci_disable_device(dev);
 843         return retval;
 844 }
 845
 846 static void __devexit hpwdt_exit(struct pci_dev *dev)
 847 {
 848         if (!nowayout)
 849                 hpwdt_stop();
 850
 851         misc_deregister(&hpwdt_miscdev);
 852         hpwdt_exit_nmi_decoding();
 853         pci_iounmap(dev, pci_mem_addr);
 854         pci_disable_device(dev);
 855 }
 856
 857 static struct pci_driver hpwdt_driver = {
 858         .name = "hpwdt",
 859         .id_table = hpwdt_devices,
 860         .probe = hpwdt_init_one,
 861         .remove = __devexit_p(hpwdt_exit),
 862 };
 863
 864 static void __exit hpwdt_cleanup(void)
 865 {
 866         pci_unregister_driver(&hpwdt_driver);
 867 }
 868
 869 static int __init hpwdt_init(void)
 870 {
 871         return pci_register_driver(&hpwdt_driver);
 872 }
 873
 874 MODULE_AUTHOR("Tom Mingarelli");
 875 MODULE_DESCRIPTION("hp watchdog driver");
 876 MODULE_LICENSE("GPL");
 877 MODULE_VERSION(HPWDT_VERSION);
 878 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 879
 880 module_param(soft_margin, int, 0);
 881 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
 882
 883 module_param(nowayout, int, 0);
 884 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
 885                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 886
 887 #ifdef CONFIG_HPWDT_NMI_DECODING
 888 module_param(allow_kdump, int, 0);
 889 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
 890
 891 module_param(priority, int, 0);
 892 MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
 893                 " (default = 0/Last)\n");
 894 #endif /* !CONFIG_HPWDT_NMI_DECODING */
 895
 896 module_init(hpwdt_init);
 897 module_exit(hpwdt_cleanup);