drivers/video/via/lcd.c

   1 /*
   2  * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
   3  * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
   4
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public
   7  * License as published by the Free Software Foundation;
   8  * either version 2, or (at your option) any later version.
   9
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
  12  * the implied warranty of MERCHANTABILITY or FITNESS FOR
  13  * A PARTICULAR PURPOSE.See the GNU General Public License
  14  * for more details.
  15
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc.,
  19  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20  */
  21 #include <linux/via-core.h>
  22 #include <linux/via_i2c.h>
  23 #include "global.h"
  24
  25 #define viafb_compact_res(x, y) (((x)<<16)|(y))
  26
  27 /* CLE266 Software Power Sequence */
  28 /* {Mask}, {Data}, {Delay} */
  29 int PowerSequenceOn[3][3] = { {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06},
  30         {0x19, 0x1FE, 0x01} };
  31 int PowerSequenceOff[3][3] = { {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00},
  32         {0xD2, 0x19, 0x01} };
  33
  34 static struct _lcd_scaling_factor lcd_scaling_factor = {
  35         /* LCD Horizontal Scaling Factor Register */
  36         {LCD_HOR_SCALING_FACTOR_REG_NUM,
  37          {{CR9F, 0, 1}, {CR77, 0, 7}, {CR79, 4, 5} } },
  38         /* LCD Vertical Scaling Factor Register */
  39         {LCD_VER_SCALING_FACTOR_REG_NUM,
  40          {{CR79, 3, 3}, {CR78, 0, 7}, {CR79, 6, 7} } }
  41 };
  42 static struct _lcd_scaling_factor lcd_scaling_factor_CLE = {
  43         /* LCD Horizontal Scaling Factor Register */
  44         {LCD_HOR_SCALING_FACTOR_REG_NUM_CLE, {{CR77, 0, 7}, {CR79, 4, 5} } },
  45         /* LCD Vertical Scaling Factor Register */
  46         {LCD_VER_SCALING_FACTOR_REG_NUM_CLE, {{CR78, 0, 7}, {CR79, 6, 7} } }
  47 };
  48
  49 static int check_lvds_chip(int device_id_subaddr, int device_id);
  50 static bool lvds_identify_integratedlvds(void);
  51 static void __devinit fp_id_to_vindex(int panel_id);
  52 static int lvds_register_read(int index);
  53 static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
  54                       int panel_vres);
  55 static void via_pitch_alignment_patch_lcd(
  56         struct lvds_setting_information *plvds_setting_info,
  57                                    struct lvds_chip_information
  58                                    *plvds_chip_info);
  59 static void lcd_patch_skew_dvp0(struct lvds_setting_information
  60                          *plvds_setting_info,
  61                          struct lvds_chip_information *plvds_chip_info);
  62 static void lcd_patch_skew_dvp1(struct lvds_setting_information
  63                          *plvds_setting_info,
  64                          struct lvds_chip_information *plvds_chip_info);
  65 static void lcd_patch_skew(struct lvds_setting_information
  66         *plvds_setting_info, struct lvds_chip_information *plvds_chip_info);
  67
  68 static void integrated_lvds_disable(struct lvds_setting_information
  69                              *plvds_setting_info,
  70                              struct lvds_chip_information *plvds_chip_info);
  71 static void integrated_lvds_enable(struct lvds_setting_information
  72                             *plvds_setting_info,
  73                             struct lvds_chip_information *plvds_chip_info);
  74 static void lcd_powersequence_off(void);
  75 static void lcd_powersequence_on(void);
  76 static void fill_lcd_format(void);
  77 static void check_diport_of_integrated_lvds(
  78         struct lvds_chip_information *plvds_chip_info,
  79                                      struct lvds_setting_information
  80                                      *plvds_setting_info);
  81 static struct display_timing lcd_centering_timging(struct display_timing
  82                                             mode_crt_reg,
  83                                            struct display_timing panel_crt_reg);
  84
  85 static int check_lvds_chip(int device_id_subaddr, int device_id)
  86 {
  87         if (lvds_register_read(device_id_subaddr) == device_id)
  88                 return OK;
  89         else
  90                 return FAIL;
  91 }
  92
  93 void __devinit viafb_init_lcd_size(void)
  94 {
  95         DEBUG_MSG(KERN_INFO "viafb_init_lcd_size()\n");
  96
  97         fp_id_to_vindex(viafb_lcd_panel_id);
  98         viaparinfo->lvds_setting_info2->lcd_panel_id =
  99                 viaparinfo->lvds_setting_info->lcd_panel_id;
 100         viaparinfo->lvds_setting_info2->lcd_panel_hres =
 101                 viaparinfo->lvds_setting_info->lcd_panel_hres;
 102         viaparinfo->lvds_setting_info2->lcd_panel_vres =
 103                 viaparinfo->lvds_setting_info->lcd_panel_vres;
 104         viaparinfo->lvds_setting_info2->device_lcd_dualedge =
 105             viaparinfo->lvds_setting_info->device_lcd_dualedge;
 106         viaparinfo->lvds_setting_info2->LCDDithering =
 107                 viaparinfo->lvds_setting_info->LCDDithering;
 108 }
 109
 110 static bool lvds_identify_integratedlvds(void)
 111 {
 112         if (viafb_display_hardware_layout == HW_LAYOUT_LCD_EXTERNAL_LCD2) {
 113                 /* Two dual channel LCD (Internal LVDS + External LVDS): */
 114                 /* If we have an external LVDS, such as VT1636, we should
 115                    have its chip ID already. */
 116                 if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
 117                         viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name =
 118                             INTEGRATED_LVDS;
 119                         DEBUG_MSG(KERN_INFO "Support two dual channel LVDS! "
 120                                   "(Internal LVDS + External LVDS)\n");
 121                 } else {
 122                         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
 123                             INTEGRATED_LVDS;
 124                         DEBUG_MSG(KERN_INFO "Not found external LVDS, "
 125                                   "so can't support two dual channel LVDS!\n");
 126                 }
 127         } else if (viafb_display_hardware_layout == HW_LAYOUT_LCD1_LCD2) {
 128                 /* Two single channel LCD (Internal LVDS + Internal LVDS): */
 129                 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
 130                 INTEGRATED_LVDS;
 131                 viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name =
 132                         INTEGRATED_LVDS;
 133                 DEBUG_MSG(KERN_INFO "Support two single channel LVDS! "
 134                           "(Internal LVDS + Internal LVDS)\n");
 135         } else if (viafb_display_hardware_layout != HW_LAYOUT_DVI_ONLY) {
 136                 /* If we have found external LVDS, just use it,
 137                    otherwise, we will use internal LVDS as default. */
 138                 if (!viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
 139                         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
 140                             INTEGRATED_LVDS;
 141                         DEBUG_MSG(KERN_INFO "Found Integrated LVDS!\n");
 142                 }
 143         } else {
 144                 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
 145                         NON_LVDS_TRANSMITTER;
 146                 DEBUG_MSG(KERN_INFO "Do not support LVDS!\n");
 147                 return false;
 148         }
 149
 150         return true;
 151 }
 152
 153 int __devinit viafb_lvds_trasmitter_identify(void)
 154 {
 155         if (viafb_lvds_identify_vt1636(VIA_PORT_31)) {
 156                 viaparinfo->chip_info->lvds_chip_info.i2c_port = VIA_PORT_31;
 157                 DEBUG_MSG(KERN_INFO
 158                           "Found VIA VT1636 LVDS on port i2c 0x31\n");
 159         } else {
 160                 if (viafb_lvds_identify_vt1636(VIA_PORT_2C)) {
 161                         viaparinfo->chip_info->lvds_chip_info.i2c_port =
 162                                 VIA_PORT_2C;
 163                         DEBUG_MSG(KERN_INFO
 164                                   "Found VIA VT1636 LVDS on port gpio 0x2c\n");
 165                 }
 166         }
 167
 168         if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700)
 169                 lvds_identify_integratedlvds();
 170
 171         if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name)
 172                 return true;
 173         /* Check for VT1631: */
 174         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = VT1631_LVDS;
 175         viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
 176                 VT1631_LVDS_I2C_ADDR;
 177
 178         if (check_lvds_chip(VT1631_DEVICE_ID_REG, VT1631_DEVICE_ID) != FAIL) {
 179                 DEBUG_MSG(KERN_INFO "\n VT1631 LVDS ! \n");
 180                 DEBUG_MSG(KERN_INFO "\n %2d",
 181                           viaparinfo->chip_info->lvds_chip_info.lvds_chip_name);
 182                 DEBUG_MSG(KERN_INFO "\n %2d",
 183                           viaparinfo->chip_info->lvds_chip_info.lvds_chip_name);
 184                 return OK;
 185         }
 186
 187         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
 188                 NON_LVDS_TRANSMITTER;
 189         viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
 190                 VT1631_LVDS_I2C_ADDR;
 191         return FAIL;
 192 }
 193
 194 static void __devinit fp_id_to_vindex(int panel_id)
 195 {
 196         DEBUG_MSG(KERN_INFO "fp_get_panel_id()\n");
 197
 198         if (panel_id > LCD_PANEL_ID_MAXIMUM)
 199                 viafb_lcd_panel_id = panel_id =
 200                 viafb_read_reg(VIACR, CR3F) & 0x0F;
 201
 202         switch (panel_id) {
 203         case 0x0:
 204                 viaparinfo->lvds_setting_info->lcd_panel_hres = 640;
 205                 viaparinfo->lvds_setting_info->lcd_panel_vres = 480;
 206                 viaparinfo->lvds_setting_info->lcd_panel_id =
 207                         LCD_PANEL_ID0_640X480;
 208                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 209                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 210                 break;
 211         case 0x1:
 212                 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
 213                 viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
 214                 viaparinfo->lvds_setting_info->lcd_panel_id =
 215                         LCD_PANEL_ID1_800X600;
 216                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 217                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 218                 break;
 219         case 0x2:
 220                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
 221                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
 222                 viaparinfo->lvds_setting_info->lcd_panel_id =
 223                         LCD_PANEL_ID2_1024X768;
 224                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 225                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 226                 break;
 227         case 0x3:
 228                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
 229                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
 230                 viaparinfo->lvds_setting_info->lcd_panel_id =
 231                         LCD_PANEL_ID3_1280X768;
 232                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 233                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 234                 break;
 235         case 0x4:
 236                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
 237                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1024;
 238                 viaparinfo->lvds_setting_info->lcd_panel_id =
 239                         LCD_PANEL_ID4_1280X1024;
 240                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
 241                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 242                 break;
 243         case 0x5:
 244                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1400;
 245                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1050;
 246                 viaparinfo->lvds_setting_info->lcd_panel_id =
 247                         LCD_PANEL_ID5_1400X1050;
 248                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
 249                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 250                 break;
 251         case 0x6:
 252                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1600;
 253                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1200;
 254                 viaparinfo->lvds_setting_info->lcd_panel_id =
 255                         LCD_PANEL_ID6_1600X1200;
 256                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
 257                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 258                 break;
 259         case 0x8:
 260                 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
 261                 viaparinfo->lvds_setting_info->lcd_panel_vres = 480;
 262                 viaparinfo->lvds_setting_info->lcd_panel_id =
 263                         LCD_PANEL_IDA_800X480;
 264                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 265                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 266                 break;
 267         case 0x9:
 268                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
 269                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
 270                 viaparinfo->lvds_setting_info->lcd_panel_id =
 271                         LCD_PANEL_ID2_1024X768;
 272                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
 273                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 274                 break;
 275         case 0xA:
 276                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
 277                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
 278                 viaparinfo->lvds_setting_info->lcd_panel_id =
 279                         LCD_PANEL_ID2_1024X768;
 280                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 281                 viaparinfo->lvds_setting_info->LCDDithering = 0;
 282                 break;
 283         case 0xB:
 284                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
 285                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
 286                 viaparinfo->lvds_setting_info->lcd_panel_id =
 287                         LCD_PANEL_ID2_1024X768;
 288                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
 289                 viaparinfo->lvds_setting_info->LCDDithering = 0;
 290                 break;
 291         case 0xC:
 292                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
 293                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
 294                 viaparinfo->lvds_setting_info->lcd_panel_id =
 295                         LCD_PANEL_ID3_1280X768;
 296                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 297                 viaparinfo->lvds_setting_info->LCDDithering = 0;
 298                 break;
 299         case 0xD:
 300                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
 301                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1024;
 302                 viaparinfo->lvds_setting_info->lcd_panel_id =
 303                         LCD_PANEL_ID4_1280X1024;
 304                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
 305                 viaparinfo->lvds_setting_info->LCDDithering = 0;
 306                 break;
 307         case 0xE:
 308                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1400;
 309                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1050;
 310                 viaparinfo->lvds_setting_info->lcd_panel_id =
 311                         LCD_PANEL_ID5_1400X1050;
 312                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
 313                 viaparinfo->lvds_setting_info->LCDDithering = 0;
 314                 break;
 315         case 0xF:
 316                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1600;
 317                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1200;
 318                 viaparinfo->lvds_setting_info->lcd_panel_id =
 319                         LCD_PANEL_ID6_1600X1200;
 320                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
 321                 viaparinfo->lvds_setting_info->LCDDithering = 0;
 322                 break;
 323         case 0x10:
 324                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1366;
 325                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
 326                 viaparinfo->lvds_setting_info->lcd_panel_id =
 327                         LCD_PANEL_ID7_1366X768;
 328                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 329                 viaparinfo->lvds_setting_info->LCDDithering = 0;
 330                 break;
 331         case 0x11:
 332                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
 333                 viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
 334                 viaparinfo->lvds_setting_info->lcd_panel_id =
 335                         LCD_PANEL_ID8_1024X600;
 336                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 337                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 338                 break;
 339         case 0x12:
 340                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
 341                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
 342                 viaparinfo->lvds_setting_info->lcd_panel_id =
 343                         LCD_PANEL_ID3_1280X768;
 344                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
 345                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 346                 break;
 347         case 0x13:
 348                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
 349                 viaparinfo->lvds_setting_info->lcd_panel_vres = 800;
 350                 viaparinfo->lvds_setting_info->lcd_panel_id =
 351                         LCD_PANEL_ID9_1280X800;
 352                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 353                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 354                 break;
 355         case 0x14:
 356                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1360;
 357                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
 358                 viaparinfo->lvds_setting_info->lcd_panel_id =
 359                         LCD_PANEL_IDB_1360X768;
 360                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 361                 viaparinfo->lvds_setting_info->LCDDithering = 0;
 362                 break;
 363         case 0x15:
 364                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
 365                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
 366                 viaparinfo->lvds_setting_info->lcd_panel_id =
 367                         LCD_PANEL_ID3_1280X768;
 368                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
 369                 viaparinfo->lvds_setting_info->LCDDithering = 0;
 370                 break;
 371         case 0x16:
 372                 viaparinfo->lvds_setting_info->lcd_panel_hres = 480;
 373                 viaparinfo->lvds_setting_info->lcd_panel_vres = 640;
 374                 viaparinfo->lvds_setting_info->lcd_panel_id =
 375                         LCD_PANEL_IDC_480X640;
 376                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 377                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 378                 break;
 379         case 0x17:
 380                 /* OLPC XO-1.5 panel */
 381                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1200;
 382                 viaparinfo->lvds_setting_info->lcd_panel_vres = 900;
 383                 viaparinfo->lvds_setting_info->lcd_panel_id =
 384                         LCD_PANEL_IDD_1200X900;
 385                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 386                 viaparinfo->lvds_setting_info->LCDDithering = 0;
 387                 break;
 388         default:
 389                 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
 390                 viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
 391                 viaparinfo->lvds_setting_info->lcd_panel_id =
 392                         LCD_PANEL_ID1_800X600;
 393                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
 394                 viaparinfo->lvds_setting_info->LCDDithering = 1;
 395         }
 396 }
 397
 398 static int lvds_register_read(int index)
 399 {
 400         u8 data;
 401
 402         viafb_i2c_readbyte(VIA_PORT_2C,
 403                         (u8) viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr,
 404                         (u8) index, &data);
 405         return data;
 406 }
 407
 408 static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
 409                       int panel_vres)
 410 {
 411         int reg_value = 0;
 412         int viafb_load_reg_num;
 413         struct io_register *reg = NULL;
 414
 415         DEBUG_MSG(KERN_INFO "load_lcd_scaling()!!\n");
 416
 417         /* LCD Scaling Enable */
 418         viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2);
 419
 420         /* Check if expansion for horizontal */
 421         if (set_hres < panel_hres) {
 422                 /* Load Horizontal Scaling Factor */
 423                 switch (viaparinfo->chip_info->gfx_chip_name) {
 424                 case UNICHROME_CLE266:
 425                 case UNICHROME_K400:
 426                         reg_value =
 427                             CLE266_LCD_HOR_SCF_FORMULA(set_hres, panel_hres);
 428                         viafb_load_reg_num =
 429                             lcd_scaling_factor_CLE.lcd_hor_scaling_factor.
 430                             reg_num;
 431                         reg = lcd_scaling_factor_CLE.lcd_hor_scaling_factor.reg;
 432                         viafb_load_reg(reg_value,
 433                                 viafb_load_reg_num, reg, VIACR);
 434                         break;
 435                 case UNICHROME_K800:
 436                 case UNICHROME_PM800:
 437                 case UNICHROME_CN700:
 438                 case UNICHROME_CX700:
 439                 case UNICHROME_K8M890:
 440                 case UNICHROME_P4M890:
 441                 case UNICHROME_P4M900:
 442                 case UNICHROME_CN750:
 443                 case UNICHROME_VX800:
 444                 case UNICHROME_VX855:
 445                 case UNICHROME_VX900:
 446                         reg_value =
 447                             K800_LCD_HOR_SCF_FORMULA(set_hres, panel_hres);
 448                         /* Horizontal scaling enabled */
 449                         viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6);
 450                         viafb_load_reg_num =
 451                             lcd_scaling_factor.lcd_hor_scaling_factor.reg_num;
 452                         reg = lcd_scaling_factor.lcd_hor_scaling_factor.reg;
 453                         viafb_load_reg(reg_value,
 454                                 viafb_load_reg_num, reg, VIACR);
 455                         break;
 456                 }
 457
 458                 DEBUG_MSG(KERN_INFO "Horizontal Scaling value = %d", reg_value);
 459         } else {
 460                 /* Horizontal scaling disabled */
 461                 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7);
 462         }
 463
 464         /* Check if expansion for vertical */
 465         if (set_vres < panel_vres) {
 466                 /* Load Vertical Scaling Factor */
 467                 switch (viaparinfo->chip_info->gfx_chip_name) {
 468                 case UNICHROME_CLE266:
 469                 case UNICHROME_K400:
 470                         reg_value =
 471                             CLE266_LCD_VER_SCF_FORMULA(set_vres, panel_vres);
 472                         viafb_load_reg_num =
 473                             lcd_scaling_factor_CLE.lcd_ver_scaling_factor.
 474                             reg_num;
 475                         reg = lcd_scaling_factor_CLE.lcd_ver_scaling_factor.reg;
 476                         viafb_load_reg(reg_value,
 477                                 viafb_load_reg_num, reg, VIACR);
 478                         break;
 479                 case UNICHROME_K800:
 480                 case UNICHROME_PM800:
 481                 case UNICHROME_CN700:
 482                 case UNICHROME_CX700:
 483                 case UNICHROME_K8M890:
 484                 case UNICHROME_P4M890:
 485                 case UNICHROME_P4M900:
 486                 case UNICHROME_CN750:
 487                 case UNICHROME_VX800:
 488                 case UNICHROME_VX855:
 489                 case UNICHROME_VX900:
 490                         reg_value =
 491                             K800_LCD_VER_SCF_FORMULA(set_vres, panel_vres);
 492                         /* Vertical scaling enabled */
 493                         viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3);
 494                         viafb_load_reg_num =
 495                             lcd_scaling_factor.lcd_ver_scaling_factor.reg_num;
 496                         reg = lcd_scaling_factor.lcd_ver_scaling_factor.reg;
 497                         viafb_load_reg(reg_value,
 498                                 viafb_load_reg_num, reg, VIACR);
 499                         break;
 500                 }
 501
 502                 DEBUG_MSG(KERN_INFO "Vertical Scaling value = %d", reg_value);
 503         } else {
 504                 /* Vertical scaling disabled */
 505                 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3);
 506         }
 507 }
 508
 509 static void via_pitch_alignment_patch_lcd(
 510         struct lvds_setting_information *plvds_setting_info,
 511                                    struct lvds_chip_information
 512                                    *plvds_chip_info)
 513 {
 514         unsigned char cr13, cr35, cr65, cr66, cr67;
 515         unsigned long dwScreenPitch = 0;
 516         unsigned long dwPitch;
 517
 518         dwPitch = plvds_setting_info->h_active * (plvds_setting_info->bpp >> 3);
 519         if (dwPitch & 0x1F) {
 520                 dwScreenPitch = ((dwPitch + 31) & ~31) >> 3;
 521                 if (plvds_setting_info->iga_path == IGA2) {
 522                         if (plvds_setting_info->bpp > 8) {
 523                                 cr66 = (unsigned char)(dwScreenPitch & 0xFF);
 524                                 viafb_write_reg(CR66, VIACR, cr66);
 525                                 cr67 = viafb_read_reg(VIACR, CR67) & 0xFC;
 526                                 cr67 |=
 527                                     (unsigned
 528                                      char)((dwScreenPitch & 0x300) >> 8);
 529                                 viafb_write_reg(CR67, VIACR, cr67);
 530                         }
 531
 532                         /* Fetch Count */
 533                         cr67 = viafb_read_reg(VIACR, CR67) & 0xF3;
 534                         cr67 |= (unsigned char)((dwScreenPitch & 0x600) >> 7);
 535                         viafb_write_reg(CR67, VIACR, cr67);
 536                         cr65 = (unsigned char)((dwScreenPitch >> 1) & 0xFF);
 537                         cr65 += 2;
 538                         viafb_write_reg(CR65, VIACR, cr65);
 539                 } else {
 540                         if (plvds_setting_info->bpp > 8) {
 541                                 cr13 = (unsigned char)(dwScreenPitch & 0xFF);
 542                                 viafb_write_reg(CR13, VIACR, cr13);
 543                                 cr35 = viafb_read_reg(VIACR, CR35) & 0x1F;
 544                                 cr35 |=
 545                                     (unsigned
 546                                      char)((dwScreenPitch & 0x700) >> 3);
 547                                 viafb_write_reg(CR35, VIACR, cr35);
 548                         }
 549                 }
 550         }
 551 }
 552 static void lcd_patch_skew_dvp0(struct lvds_setting_information
 553                          *plvds_setting_info,
 554                          struct lvds_chip_information *plvds_chip_info)
 555 {
 556         if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) {
 557                 switch (viaparinfo->chip_info->gfx_chip_name) {
 558                 case UNICHROME_P4M900:
 559                         viafb_vt1636_patch_skew_on_vt3364(plvds_setting_info,
 560                                                     plvds_chip_info);
 561                         break;
 562                 case UNICHROME_P4M890:
 563                         viafb_vt1636_patch_skew_on_vt3327(plvds_setting_info,
 564                                                     plvds_chip_info);
 565                         break;
 566                 }
 567         }
 568 }
 569 static void lcd_patch_skew_dvp1(struct lvds_setting_information
 570                          *plvds_setting_info,
 571                          struct lvds_chip_information *plvds_chip_info)
 572 {
 573         if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) {
 574                 switch (viaparinfo->chip_info->gfx_chip_name) {
 575                 case UNICHROME_CX700:
 576                         viafb_vt1636_patch_skew_on_vt3324(plvds_setting_info,
 577                                                     plvds_chip_info);
 578                         break;
 579                 }
 580         }
 581 }
 582 static void lcd_patch_skew(struct lvds_setting_information
 583         *plvds_setting_info, struct lvds_chip_information *plvds_chip_info)
 584 {
 585         DEBUG_MSG(KERN_INFO "lcd_patch_skew\n");
 586         switch (plvds_chip_info->output_interface) {
 587         case INTERFACE_DVP0:
 588                 lcd_patch_skew_dvp0(plvds_setting_info, plvds_chip_info);
 589                 break;
 590         case INTERFACE_DVP1:
 591                 lcd_patch_skew_dvp1(plvds_setting_info, plvds_chip_info);
 592                 break;
 593         case INTERFACE_DFP_LOW:
 594                 if (UNICHROME_P4M900 == viaparinfo->chip_info->gfx_chip_name) {
 595                         viafb_write_reg_mask(CR99, VIACR, 0x08,
 596                                        BIT0 + BIT1 + BIT2 + BIT3);
 597                 }
 598                 break;
 599         }
 600 }
 601
 602 /* LCD Set Mode */
 603 void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
 604                   struct lvds_setting_information *plvds_setting_info,
 605                   struct lvds_chip_information *plvds_chip_info)
 606 {
 607         int set_iga = plvds_setting_info->iga_path;
 608         int mode_bpp = plvds_setting_info->bpp;
 609         int set_hres = plvds_setting_info->h_active;
 610         int set_vres = plvds_setting_info->v_active;
 611         int panel_hres = plvds_setting_info->lcd_panel_hres;
 612         int panel_vres = plvds_setting_info->lcd_panel_vres;
 613         u32 pll_D_N;
 614         struct display_timing mode_crt_reg, panel_crt_reg;
 615         struct crt_mode_table *panel_crt_table = NULL;
 616         struct VideoModeTable *vmode_tbl = viafb_get_mode(panel_hres,
 617                 panel_vres);
 618
 619         DEBUG_MSG(KERN_INFO "viafb_lcd_set_mode!!\n");
 620         /* Get mode table */
 621         mode_crt_reg = mode_crt_table->crtc;
 622         /* Get panel table Pointer */
 623         panel_crt_table = vmode_tbl->crtc;
 624         panel_crt_reg = panel_crt_table->crtc;
 625         DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n");
 626         if (VT1636_LVDS == plvds_chip_info->lvds_chip_name)
 627                 viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info);
 628         plvds_setting_info->vclk = panel_crt_table->clk;
 629         if (set_iga == IGA1) {
 630                 /* IGA1 doesn't have LCD scaling, so set it as centering. */
 631                 viafb_load_crtc_timing(lcd_centering_timging
 632                                  (mode_crt_reg, panel_crt_reg), IGA1);
 633         } else {
 634                 /* Expansion */
 635                 if (plvds_setting_info->display_method == LCD_EXPANDSION
 636                         && (set_hres < panel_hres || set_vres < panel_vres)) {
 637                         /* expansion timing IGA2 loaded panel set timing*/
 638                         viafb_load_crtc_timing(panel_crt_reg, IGA2);
 639                         DEBUG_MSG(KERN_INFO "viafb_load_crtc_timing!!\n");
 640                         load_lcd_scaling(set_hres, set_vres, panel_hres,
 641                                          panel_vres);
 642                         DEBUG_MSG(KERN_INFO "load_lcd_scaling!!\n");
 643                 } else {        /* Centering */
 644                         /* centering timing IGA2 always loaded panel
 645                            and mode releative timing */
 646                         viafb_load_crtc_timing(lcd_centering_timging
 647                                          (mode_crt_reg, panel_crt_reg), IGA2);
 648                         viafb_write_reg_mask(CR79, VIACR, 0x00,
 649                                 BIT0 + BIT1 + BIT2);
 650                         /* LCD scaling disabled */
 651                 }
 652         }
 653
 654         /* Fetch count for IGA2 only */
 655         viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga);
 656
 657         if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
 658                 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
 659                 viafb_load_FIFO_reg(set_iga, set_hres, set_vres);
 660
 661         fill_lcd_format();
 662
 663         pll_D_N = viafb_get_clk_value(panel_crt_table[0].clk);
 664         DEBUG_MSG(KERN_INFO "PLL=0x%x", pll_D_N);
 665         viafb_set_vclock(pll_D_N, set_iga);
 666         lcd_patch_skew(plvds_setting_info, plvds_chip_info);
 667
 668         /* If K8M800, enable LCD Prefetch Mode. */
 669         if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800)
 670             || (UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name))
 671                 viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0);
 672
 673         /* Patch for non 32bit alignment mode */
 674         via_pitch_alignment_patch_lcd(plvds_setting_info, plvds_chip_info);
 675 }
 676
 677 static void integrated_lvds_disable(struct lvds_setting_information
 678                              *plvds_setting_info,
 679                              struct lvds_chip_information *plvds_chip_info)
 680 {
 681         bool turn_off_first_powersequence = false;
 682         bool turn_off_second_powersequence = false;
 683         if (INTERFACE_LVDS0LVDS1 == plvds_chip_info->output_interface)
 684                 turn_off_first_powersequence = true;
 685         if (INTERFACE_LVDS0 == plvds_chip_info->output_interface)
 686                 turn_off_first_powersequence = true;
 687         if (INTERFACE_LVDS1 == plvds_chip_info->output_interface)
 688                 turn_off_second_powersequence = true;
 689         if (turn_off_second_powersequence) {
 690                 /* Use second power sequence control: */
 691
 692                 /* Turn off power sequence. */
 693                 viafb_write_reg_mask(CRD4, VIACR, 0, BIT1);
 694
 695                 /* Turn off back light. */
 696                 viafb_write_reg_mask(CRD3, VIACR, 0xC0, BIT6 + BIT7);
 697         }
 698         if (turn_off_first_powersequence) {
 699                 /* Use first power sequence control: */
 700
 701                 /* Turn off power sequence. */
 702                 viafb_write_reg_mask(CR6A, VIACR, 0, BIT3);
 703
 704                 /* Turn off back light. */
 705                 viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7);
 706         }
 707
 708         /* Power off LVDS channel. */
 709         switch (plvds_chip_info->output_interface) {
 710         case INTERFACE_LVDS0:
 711                 {
 712                         viafb_write_reg_mask(CRD2, VIACR, 0x80, BIT7);
 713                         break;
 714                 }
 715
 716         case INTERFACE_LVDS1:
 717                 {
 718                         viafb_write_reg_mask(CRD2, VIACR, 0x40, BIT6);
 719                         break;
 720                 }
 721
 722         case INTERFACE_LVDS0LVDS1:
 723                 {
 724                         viafb_write_reg_mask(CRD2, VIACR, 0xC0, BIT6 + BIT7);
 725                         break;
 726                 }
 727         }
 728 }
 729
 730 static void integrated_lvds_enable(struct lvds_setting_information
 731                             *plvds_setting_info,
 732                             struct lvds_chip_information *plvds_chip_info)
 733 {
 734         DEBUG_MSG(KERN_INFO "integrated_lvds_enable, out_interface:%d\n",
 735                   plvds_chip_info->output_interface);
 736         if (plvds_setting_info->lcd_mode == LCD_SPWG)
 737                 viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT0 + BIT1);
 738         else
 739                 viafb_write_reg_mask(CRD2, VIACR, 0x03, BIT0 + BIT1);
 740
 741         switch (plvds_chip_info->output_interface) {
 742         case INTERFACE_LVDS0LVDS1:
 743         case INTERFACE_LVDS0:
 744                 /* Use first power sequence control: */
 745                 /* Use hardware control power sequence. */
 746                 viafb_write_reg_mask(CR91, VIACR, 0, BIT0);
 747                 /* Turn on back light. */
 748                 viafb_write_reg_mask(CR91, VIACR, 0, BIT6 + BIT7);
 749                 /* Turn on hardware power sequence. */
 750                 viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
 751                 break;
 752         case INTERFACE_LVDS1:
 753                 /* Use second power sequence control: */
 754                 /* Use hardware control power sequence. */
 755                 viafb_write_reg_mask(CRD3, VIACR, 0, BIT0);
 756                 /* Turn on back light. */
 757                 viafb_write_reg_mask(CRD3, VIACR, 0, BIT6 + BIT7);
 758                 /* Turn on hardware power sequence. */
 759                 viafb_write_reg_mask(CRD4, VIACR, 0x02, BIT1);
 760                 break;
 761         }
 762
 763         /* Power on LVDS channel. */
 764         switch (plvds_chip_info->output_interface) {
 765         case INTERFACE_LVDS0:
 766                 {
 767                         viafb_write_reg_mask(CRD2, VIACR, 0, BIT7);
 768                         break;
 769                 }
 770
 771         case INTERFACE_LVDS1:
 772                 {
 773                         viafb_write_reg_mask(CRD2, VIACR, 0, BIT6);
 774                         break;
 775                 }
 776
 777         case INTERFACE_LVDS0LVDS1:
 778                 {
 779                         viafb_write_reg_mask(CRD2, VIACR, 0, BIT6 + BIT7);
 780                         break;
 781                 }
 782         }
 783 }
 784
 785 void viafb_lcd_disable(void)
 786 {
 787
 788         if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
 789                 lcd_powersequence_off();
 790                 /* DI1 pad off */
 791                 viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30);
 792         } else if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) {
 793                 if (viafb_LCD2_ON
 794                     && (INTEGRATED_LVDS ==
 795                         viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name))
 796                         integrated_lvds_disable(viaparinfo->lvds_setting_info,
 797                                 &viaparinfo->chip_info->lvds_chip_info2);
 798                 if (INTEGRATED_LVDS ==
 799                         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name)
 800                         integrated_lvds_disable(viaparinfo->lvds_setting_info,
 801                                 &viaparinfo->chip_info->lvds_chip_info);
 802                 if (VT1636_LVDS == viaparinfo->chip_info->
 803                         lvds_chip_info.lvds_chip_name)
 804                         viafb_disable_lvds_vt1636(viaparinfo->lvds_setting_info,
 805                                 &viaparinfo->chip_info->lvds_chip_info);
 806         } else if (VT1636_LVDS ==
 807         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
 808                 viafb_disable_lvds_vt1636(viaparinfo->lvds_setting_info,
 809                                     &viaparinfo->chip_info->lvds_chip_info);
 810         } else {
 811                 /* Backlight off           */
 812                 viafb_write_reg_mask(SR3D, VIASR, 0x00, 0x20);
 813                 /* 24 bit DI data paht off */
 814                 viafb_write_reg_mask(CR91, VIACR, 0x80, 0x80);
 815         }
 816
 817         /* Disable expansion bit   */
 818         viafb_write_reg_mask(CR79, VIACR, 0x00, 0x01);
 819         /* Simultaneout disabled   */
 820         viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08);
 821 }
 822
 823 static void set_lcd_output_path(int set_iga, int output_interface)
 824 {
 825         switch (output_interface) {
 826         case INTERFACE_DFP:
 827                 if ((UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name)
 828                     || (UNICHROME_P4M890 ==
 829                     viaparinfo->chip_info->gfx_chip_name))
 830                         viafb_write_reg_mask(CR97, VIACR, 0x84,
 831                                        BIT7 + BIT2 + BIT1 + BIT0);
 832         case INTERFACE_DVP0:
 833         case INTERFACE_DVP1:
 834         case INTERFACE_DFP_HIGH:
 835         case INTERFACE_DFP_LOW:
 836                 if (set_iga == IGA2)
 837                         viafb_write_reg(CR91, VIACR, 0x00);
 838                 break;
 839         }
 840 }
 841
 842 void viafb_lcd_enable(void)
 843 {
 844         viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3);
 845         viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
 846         set_lcd_output_path(viaparinfo->lvds_setting_info->iga_path,
 847                 viaparinfo->chip_info->lvds_chip_info.output_interface);
 848         if (viafb_LCD2_ON)
 849                 set_lcd_output_path(viaparinfo->lvds_setting_info2->iga_path,
 850                         viaparinfo->chip_info->
 851                         lvds_chip_info2.output_interface);
 852
 853         if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
 854                 /* DI1 pad on */
 855                 viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30);
 856                 lcd_powersequence_on();
 857         } else if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) {
 858                 if (viafb_LCD2_ON && (INTEGRATED_LVDS ==
 859                         viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name))
 860                         integrated_lvds_enable(viaparinfo->lvds_setting_info2, \
 861                                 &viaparinfo->chip_info->lvds_chip_info2);
 862                 if (INTEGRATED_LVDS ==
 863                         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name)
 864                         integrated_lvds_enable(viaparinfo->lvds_setting_info,
 865                                 &viaparinfo->chip_info->lvds_chip_info);
 866                 if (VT1636_LVDS == viaparinfo->chip_info->
 867                         lvds_chip_info.lvds_chip_name)
 868                         viafb_enable_lvds_vt1636(viaparinfo->
 869                         lvds_setting_info, &viaparinfo->chip_info->
 870                         lvds_chip_info);
 871         } else if (VT1636_LVDS ==
 872         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
 873                 viafb_enable_lvds_vt1636(viaparinfo->lvds_setting_info,
 874                                    &viaparinfo->chip_info->lvds_chip_info);
 875         } else {
 876                 /* Backlight on            */
 877                 viafb_write_reg_mask(SR3D, VIASR, 0x20, 0x20);
 878                 /* 24 bit DI data paht on  */
 879                 viafb_write_reg_mask(CR91, VIACR, 0x00, 0x80);
 880                 /* LCD enabled             */
 881                 viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48);
 882         }
 883 }
 884
 885 static void lcd_powersequence_off(void)
 886 {
 887         int i, mask, data;
 888
 889         /* Software control power sequence */
 890         viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11);
 891
 892         for (i = 0; i < 3; i++) {
 893                 mask = PowerSequenceOff[0][i];
 894                 data = PowerSequenceOff[1][i] & mask;
 895                 viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask);
 896                 udelay(PowerSequenceOff[2][i]);
 897         }
 898
 899         /* Disable LCD */
 900         viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x08);
 901 }
 902
 903 static void lcd_powersequence_on(void)
 904 {
 905         int i, mask, data;
 906
 907         /* Software control power sequence */
 908         viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11);
 909
 910         /* Enable LCD */
 911         viafb_write_reg_mask(CR6A, VIACR, 0x08, 0x08);
 912
 913         for (i = 0; i < 3; i++) {
 914                 mask = PowerSequenceOn[0][i];
 915                 data = PowerSequenceOn[1][i] & mask;
 916                 viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask);
 917                 udelay(PowerSequenceOn[2][i]);
 918         }
 919
 920         udelay(1);
 921 }
 922
 923 static void fill_lcd_format(void)
 924 {
 925         u8 bdithering = 0, bdual = 0;
 926
 927         if (viaparinfo->lvds_setting_info->device_lcd_dualedge)
 928                 bdual = BIT4;
 929         if (viaparinfo->lvds_setting_info->LCDDithering)
 930                 bdithering = BIT0;
 931         /* Dual & Dithering */
 932         viafb_write_reg_mask(CR88, VIACR, (bdithering | bdual), BIT4 + BIT0);
 933 }
 934
 935 static void check_diport_of_integrated_lvds(
 936         struct lvds_chip_information *plvds_chip_info,
 937                                      struct lvds_setting_information
 938                                      *plvds_setting_info)
 939 {
 940         /* Determine LCD DI Port by hardware layout. */
 941         switch (viafb_display_hardware_layout) {
 942         case HW_LAYOUT_LCD_ONLY:
 943                 {
 944                         if (plvds_setting_info->device_lcd_dualedge) {
 945                                 plvds_chip_info->output_interface =
 946                                     INTERFACE_LVDS0LVDS1;
 947                         } else {
 948                                 plvds_chip_info->output_interface =
 949                                     INTERFACE_LVDS0;
 950                         }
 951
 952                         break;
 953                 }
 954
 955         case HW_LAYOUT_DVI_ONLY:
 956                 {
 957                         plvds_chip_info->output_interface = INTERFACE_NONE;
 958                         break;
 959                 }
 960
 961         case HW_LAYOUT_LCD1_LCD2:
 962         case HW_LAYOUT_LCD_EXTERNAL_LCD2:
 963                 {
 964                         plvds_chip_info->output_interface =
 965                             INTERFACE_LVDS0LVDS1;
 966                         break;
 967                 }
 968
 969         case HW_LAYOUT_LCD_DVI:
 970                 {
 971                         plvds_chip_info->output_interface = INTERFACE_LVDS1;
 972                         break;
 973                 }
 974
 975         default:
 976                 {
 977                         plvds_chip_info->output_interface = INTERFACE_LVDS1;
 978                         break;
 979                 }
 980         }
 981
 982         DEBUG_MSG(KERN_INFO
 983                   "Display Hardware Layout: 0x%x, LCD DI Port: 0x%x\n",
 984                   viafb_display_hardware_layout,
 985                   plvds_chip_info->output_interface);
 986 }
 987
 988 void __devinit viafb_init_lvds_output_interface(struct lvds_chip_information
 989                                 *plvds_chip_info,
 990                                 struct lvds_setting_information
 991                                 *plvds_setting_info)
 992 {
 993         if (INTERFACE_NONE != plvds_chip_info->output_interface) {
 994                 /*Do nothing, lcd port is specified by module parameter */
 995                 return;
 996         }
 997
 998         switch (plvds_chip_info->lvds_chip_name) {
 999
1000         case VT1636_LVDS:
1001                 switch (viaparinfo->chip_info->gfx_chip_name) {
1002                 case UNICHROME_CX700:
1003                         plvds_chip_info->output_interface = INTERFACE_DVP1;
1004                         break;
1005                 case UNICHROME_CN700:
1006                         plvds_chip_info->output_interface = INTERFACE_DFP_LOW;
1007                         break;
1008                 default:
1009                         plvds_chip_info->output_interface = INTERFACE_DVP0;
1010                         break;
1011                 }
1012                 break;
1013
1014         case INTEGRATED_LVDS:
1015                 check_diport_of_integrated_lvds(plvds_chip_info,
1016                                                 plvds_setting_info);
1017                 break;
1018
1019         default:
1020                 switch (viaparinfo->chip_info->gfx_chip_name) {
1021                 case UNICHROME_K8M890:
1022                 case UNICHROME_P4M900:
1023                 case UNICHROME_P4M890:
1024                         plvds_chip_info->output_interface = INTERFACE_DFP_LOW;
1025                         break;
1026                 default:
1027                         plvds_chip_info->output_interface = INTERFACE_DFP;
1028                         break;
1029                 }
1030                 break;
1031         }
1032 }
1033
1034 static struct display_timing lcd_centering_timging(struct display_timing
1035                                             mode_crt_reg,
1036                                             struct display_timing panel_crt_reg)
1037 {
1038         struct display_timing crt_reg;
1039
1040         crt_reg.hor_total = panel_crt_reg.hor_total;
1041         crt_reg.hor_addr = mode_crt_reg.hor_addr;
1042         crt_reg.hor_blank_start =
1043             (panel_crt_reg.hor_addr - mode_crt_reg.hor_addr) / 2 +
1044             crt_reg.hor_addr;
1045         crt_reg.hor_blank_end = panel_crt_reg.hor_blank_end;
1046         crt_reg.hor_sync_start =
1047             (panel_crt_reg.hor_sync_start -
1048              panel_crt_reg.hor_blank_start) + crt_reg.hor_blank_start;
1049         crt_reg.hor_sync_end = panel_crt_reg.hor_sync_end;
1050
1051         crt_reg.ver_total = panel_crt_reg.ver_total;
1052         crt_reg.ver_addr = mode_crt_reg.ver_addr;
1053         crt_reg.ver_blank_start =
1054             (panel_crt_reg.ver_addr - mode_crt_reg.ver_addr) / 2 +
1055             crt_reg.ver_addr;
1056         crt_reg.ver_blank_end = panel_crt_reg.ver_blank_end;
1057         crt_reg.ver_sync_start =
1058             (panel_crt_reg.ver_sync_start -
1059              panel_crt_reg.ver_blank_start) + crt_reg.ver_blank_start;
1060         crt_reg.ver_sync_end = panel_crt_reg.ver_sync_end;
1061
1062         return crt_reg;
1063 }
1064
1065 bool viafb_lcd_get_mobile_state(bool *mobile)
1066 {
1067         unsigned char *romptr, *tableptr;
1068         u8 core_base;
1069         unsigned char *biosptr;
1070         /* Rom address */
1071         u32 romaddr = 0x000C0000;
1072         u16 start_pattern = 0;
1073
1074         biosptr = ioremap(romaddr, 0x10000);
1075
1076         memcpy(&start_pattern, biosptr, 2);
1077         /* Compare pattern */
1078         if (start_pattern == 0xAA55) {
1079                 /* Get the start of Table */
1080                 /* 0x1B means BIOS offset position */
1081                 romptr = biosptr + 0x1B;
1082                 tableptr = biosptr + *((u16 *) romptr);
1083
1084                 /* Get the start of biosver structure */
1085                 /* 18 means BIOS version position. */
1086                 romptr = tableptr + 18;
1087                 romptr = biosptr + *((u16 *) romptr);
1088
1089                 /* The offset should be 44, but the
1090                    actual image is less three char. */
1091                 /* pRom += 44; */
1092                 romptr += 41;
1093
1094                 core_base = *romptr++;
1095
1096                 if (core_base & 0x8)
1097                         *mobile = false;
1098                 else
1099                         *mobile = true;
1100                 /* release memory */
1101                 iounmap(biosptr);
1102
1103                 return true;
1104         } else {
1105                 iounmap(biosptr);
1106                 return false;
1107         }
1108 }