drivers/video/omap2/dss/rfbi.c

   1 /*
   2  * linux/drivers/video/omap2/dss/rfbi.c
   3  *
   4  * Copyright (C) 2009 Nokia Corporation
   5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
   6  *
   7  * Some code and ideas taken from drivers/video/omap/ driver
   8  * by Imre Deak.
   9  *
  10  * This program is free software; you can redistribute it and/or modify it
  11  * under the terms of the GNU General Public License version 2 as published by
  12  * the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but WITHOUT
  15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  17  * more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along with
  20  * this program.  If not, see <http://www.gnu.org/licenses/>.
  21  */
  22
  23 #define DSS_SUBSYS_NAME "RFBI"
  24
  25 #include <linux/kernel.h>
  26 #include <linux/dma-mapping.h>
  27 #include <linux/vmalloc.h>
  28 #include <linux/clk.h>
  29 #include <linux/io.h>
  30 #include <linux/delay.h>
  31 #include <linux/kfifo.h>
  32 #include <linux/ktime.h>
  33 #include <linux/hrtimer.h>
  34 #include <linux/seq_file.h>
  35
  36 #include <mach/board.h>
  37 #include <mach/display.h>
  38 #include "dss.h"
  39
  40 /*#define MEASURE_PERF*/
  41
  42 #define RFBI_BASE               0x48050800
  43
  44 struct rfbi_reg { u16 idx; };
  45
  46 #define RFBI_REG(idx)           ((const struct rfbi_reg) { idx })
  47
  48 #define RFBI_REVISION           RFBI_REG(0x0000)
  49 #define RFBI_SYSCONFIG          RFBI_REG(0x0010)
  50 #define RFBI_SYSSTATUS          RFBI_REG(0x0014)
  51 #define RFBI_CONTROL            RFBI_REG(0x0040)
  52 #define RFBI_PIXEL_CNT          RFBI_REG(0x0044)
  53 #define RFBI_LINE_NUMBER        RFBI_REG(0x0048)
  54 #define RFBI_CMD                RFBI_REG(0x004c)
  55 #define RFBI_PARAM              RFBI_REG(0x0050)
  56 #define RFBI_DATA               RFBI_REG(0x0054)
  57 #define RFBI_READ               RFBI_REG(0x0058)
  58 #define RFBI_STATUS             RFBI_REG(0x005c)
  59
  60 #define RFBI_CONFIG(n)          RFBI_REG(0x0060 + (n)*0x18)
  61 #define RFBI_ONOFF_TIME(n)      RFBI_REG(0x0064 + (n)*0x18)
  62 #define RFBI_CYCLE_TIME(n)      RFBI_REG(0x0068 + (n)*0x18)
  63 #define RFBI_DATA_CYCLE1(n)     RFBI_REG(0x006c + (n)*0x18)
  64 #define RFBI_DATA_CYCLE2(n)     RFBI_REG(0x0070 + (n)*0x18)
  65 #define RFBI_DATA_CYCLE3(n)     RFBI_REG(0x0074 + (n)*0x18)
  66
  67 #define RFBI_VSYNC_WIDTH        RFBI_REG(0x0090)
  68 #define RFBI_HSYNC_WIDTH        RFBI_REG(0x0094)
  69
  70 #define RFBI_CMD_FIFO_LEN_BYTES (16 * sizeof(struct update_param))
  71
  72 #define REG_FLD_MOD(idx, val, start, end) \
  73         rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
  74
  75 /* To work around an RFBI transfer rate limitation */
  76 #define OMAP_RFBI_RATE_LIMIT    1
  77
  78 enum omap_rfbi_cycleformat {
  79         OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
  80         OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
  81         OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2,
  82         OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3,
  83 };
  84
  85 enum omap_rfbi_datatype {
  86         OMAP_DSS_RFBI_DATATYPE_12 = 0,
  87         OMAP_DSS_RFBI_DATATYPE_16 = 1,
  88         OMAP_DSS_RFBI_DATATYPE_18 = 2,
  89         OMAP_DSS_RFBI_DATATYPE_24 = 3,
  90 };
  91
  92 enum omap_rfbi_parallelmode {
  93         OMAP_DSS_RFBI_PARALLELMODE_8 = 0,
  94         OMAP_DSS_RFBI_PARALLELMODE_9 = 1,
  95         OMAP_DSS_RFBI_PARALLELMODE_12 = 2,
  96         OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
  97 };
  98
  99 enum update_cmd {
 100         RFBI_CMD_UPDATE = 0,
 101         RFBI_CMD_SYNC   = 1,
 102 };
 103
 104 static int rfbi_convert_timings(struct rfbi_timings *t);
 105 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
 106 static void process_cmd_fifo(void);
 107
 108 static struct {
 109         void __iomem    *base;
 110
 111         unsigned long   l4_khz;
 112
 113         enum omap_rfbi_datatype datatype;
 114         enum omap_rfbi_parallelmode parallelmode;
 115
 116         enum omap_rfbi_te_mode te_mode;
 117         int te_enabled;
 118
 119         void (*framedone_callback)(void *data);
 120         void *framedone_callback_data;
 121
 122         struct omap_display *display[2];
 123
 124         struct kfifo      *cmd_fifo;
 125         spinlock_t        cmd_lock;
 126         struct completion cmd_done;
 127         atomic_t          cmd_fifo_full;
 128         atomic_t          cmd_pending;
 129 #ifdef MEASURE_PERF
 130         unsigned perf_bytes;
 131         ktime_t perf_setup_time;
 132         ktime_t perf_start_time;
 133 #endif
 134 } rfbi;
 135
 136 struct update_region {
 137         u16     x;
 138         u16     y;
 139         u16     w;
 140         u16     h;
 141 };
 142
 143 struct update_param {
 144         u8 rfbi_module;
 145         u8 cmd;
 146
 147         union {
 148                 struct update_region r;
 149                 struct completion *sync;
 150         } par;
 151 };
 152
 153 static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
 154 {
 155         __raw_writel(val, rfbi.base + idx.idx);
 156 }
 157
 158 static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
 159 {
 160         return __raw_readl(rfbi.base + idx.idx);
 161 }
 162
 163 static void rfbi_enable_clocks(bool enable)
 164 {
 165         if (enable)
 166                 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
 167         else
 168                 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
 169 }
 170
 171 void omap_rfbi_write_command(const void *buf, u32 len)
 172 {
 173         rfbi_enable_clocks(1);
 174         switch (rfbi.parallelmode) {
 175         case OMAP_DSS_RFBI_PARALLELMODE_8:
 176         {
 177                 const u8 *b = buf;
 178                 for (; len; len--)
 179                         rfbi_write_reg(RFBI_CMD, *b++);
 180                 break;
 181         }
 182
 183         case OMAP_DSS_RFBI_PARALLELMODE_16:
 184         {
 185                 const u16 *w = buf;
 186                 BUG_ON(len & 1);
 187                 for (; len; len -= 2)
 188                         rfbi_write_reg(RFBI_CMD, *w++);
 189                 break;
 190         }
 191
 192         case OMAP_DSS_RFBI_PARALLELMODE_9:
 193         case OMAP_DSS_RFBI_PARALLELMODE_12:
 194         default:
 195                 BUG();
 196         }
 197         rfbi_enable_clocks(0);
 198 }
 199 EXPORT_SYMBOL(omap_rfbi_write_command);
 200
 201 void omap_rfbi_read_data(void *buf, u32 len)
 202 {
 203         rfbi_enable_clocks(1);
 204         switch (rfbi.parallelmode) {
 205         case OMAP_DSS_RFBI_PARALLELMODE_8:
 206         {
 207                 u8 *b = buf;
 208                 for (; len; len--) {
 209                         rfbi_write_reg(RFBI_READ, 0);
 210                         *b++ = rfbi_read_reg(RFBI_READ);
 211                 }
 212                 break;
 213         }
 214
 215         case OMAP_DSS_RFBI_PARALLELMODE_16:
 216         {
 217                 u16 *w = buf;
 218                 BUG_ON(len & ~1);
 219                 for (; len; len -= 2) {
 220                         rfbi_write_reg(RFBI_READ, 0);
 221                         *w++ = rfbi_read_reg(RFBI_READ);
 222                 }
 223                 break;
 224         }
 225
 226         case OMAP_DSS_RFBI_PARALLELMODE_9:
 227         case OMAP_DSS_RFBI_PARALLELMODE_12:
 228         default:
 229                 BUG();
 230         }
 231         rfbi_enable_clocks(0);
 232 }
 233 EXPORT_SYMBOL(omap_rfbi_read_data);
 234
 235 void omap_rfbi_write_data(const void *buf, u32 len)
 236 {
 237         rfbi_enable_clocks(1);
 238         switch (rfbi.parallelmode) {
 239         case OMAP_DSS_RFBI_PARALLELMODE_8:
 240         {
 241                 const u8 *b = buf;
 242                 for (; len; len--)
 243                         rfbi_write_reg(RFBI_PARAM, *b++);
 244                 break;
 245         }
 246
 247         case OMAP_DSS_RFBI_PARALLELMODE_16:
 248         {
 249                 const u16 *w = buf;
 250                 BUG_ON(len & 1);
 251                 for (; len; len -= 2)
 252                         rfbi_write_reg(RFBI_PARAM, *w++);
 253                 break;
 254         }
 255
 256         case OMAP_DSS_RFBI_PARALLELMODE_9:
 257         case OMAP_DSS_RFBI_PARALLELMODE_12:
 258         default:
 259                 BUG();
 260
 261         }
 262         rfbi_enable_clocks(0);
 263 }
 264 EXPORT_SYMBOL(omap_rfbi_write_data);
 265
 266 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
 267                 u16 x, u16 y,
 268                 u16 w, u16 h)
 269 {
 270         int start_offset = scr_width * y + x;
 271         int horiz_offset = scr_width - w;
 272         int i;
 273
 274         rfbi_enable_clocks(1);
 275
 276         if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
 277            rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
 278                 const u16 __iomem *pd = buf;
 279                 pd += start_offset;
 280
 281                 for (; h; --h) {
 282                         for (i = 0; i < w; ++i) {
 283                                 const u8 __iomem *b = (const u8 __iomem *)pd;
 284                                 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
 285                                 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
 286                                 ++pd;
 287                         }
 288                         pd += horiz_offset;
 289                 }
 290         } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 &&
 291            rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
 292                 const u32 __iomem *pd = buf;
 293                 pd += start_offset;
 294
 295                 for (; h; --h) {
 296                         for (i = 0; i < w; ++i) {
 297                                 const u8 __iomem *b = (const u8 __iomem *)pd;
 298                                 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
 299                                 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
 300                                 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
 301                                 ++pd;
 302                         }
 303                         pd += horiz_offset;
 304                 }
 305         } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
 306            rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) {
 307                 const u16 __iomem *pd = buf;
 308                 pd += start_offset;
 309
 310                 for (; h; --h) {
 311                         for (i = 0; i < w; ++i) {
 312                                 rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
 313                                 ++pd;
 314                         }
 315                         pd += horiz_offset;
 316                 }
 317         } else {
 318                 BUG();
 319         }
 320
 321         rfbi_enable_clocks(0);
 322 }
 323 EXPORT_SYMBOL(omap_rfbi_write_pixels);
 324
 325 #ifdef MEASURE_PERF
 326 static void perf_mark_setup(void)
 327 {
 328         rfbi.perf_setup_time = ktime_get();
 329 }
 330
 331 static void perf_mark_start(void)
 332 {
 333         rfbi.perf_start_time = ktime_get();
 334 }
 335
 336 static void perf_show(const char *name)
 337 {
 338         ktime_t t, setup_time, trans_time;
 339         u32 total_bytes;
 340         u32 setup_us, trans_us, total_us;
 341
 342         t = ktime_get();
 343
 344         setup_time = ktime_sub(rfbi.perf_start_time, rfbi.perf_setup_time);
 345         setup_us = (u32)ktime_to_us(setup_time);
 346         if (setup_us == 0)
 347                 setup_us = 1;
 348
 349         trans_time = ktime_sub(t, rfbi.perf_start_time);
 350         trans_us = (u32)ktime_to_us(trans_time);
 351         if (trans_us == 0)
 352                 trans_us = 1;
 353
 354         total_us = setup_us + trans_us;
 355
 356         total_bytes = rfbi.perf_bytes;
 357
 358         DSSINFO("%s update %u us + %u us = %u us (%uHz), %u bytes, "
 359                         "%u kbytes/sec\n",
 360                         name,
 361                         setup_us,
 362                         trans_us,
 363                         total_us,
 364                         1000*1000 / total_us,
 365                         total_bytes,
 366                         total_bytes * 1000 / total_us);
 367 }
 368 #else
 369 #define perf_mark_setup()
 370 #define perf_mark_start()
 371 #define perf_show(x)
 372 #endif
 373
 374 void rfbi_transfer_area(u16 width, u16 height,
 375                              void (callback)(void *data), void *data)
 376 {
 377         u32 l;
 378
 379         /*BUG_ON(callback == 0);*/
 380         BUG_ON(rfbi.framedone_callback != NULL);
 381
 382         DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
 383
 384         dispc_set_lcd_size(width, height);
 385
 386         dispc_enable_lcd_out(1);
 387
 388         rfbi.framedone_callback = callback;
 389         rfbi.framedone_callback_data = data;
 390
 391         rfbi_enable_clocks(1);
 392
 393         rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
 394
 395         l = rfbi_read_reg(RFBI_CONTROL);
 396         l = FLD_MOD(l, 1, 0, 0); /* enable */
 397         if (!rfbi.te_enabled)
 398                 l = FLD_MOD(l, 1, 4, 4); /* ITE */
 399
 400         perf_mark_start();
 401
 402         rfbi_write_reg(RFBI_CONTROL, l);
 403 }
 404
 405 static void framedone_callback(void *data, u32 mask)
 406 {
 407         void (*callback)(void *data);
 408
 409         DSSDBG("FRAMEDONE\n");
 410
 411         perf_show("DISPC");
 412
 413         REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
 414
 415         rfbi_enable_clocks(0);
 416
 417         callback = rfbi.framedone_callback;
 418         rfbi.framedone_callback = NULL;
 419
 420         /*callback(rfbi.framedone_callback_data);*/
 421
 422         atomic_set(&rfbi.cmd_pending, 0);
 423
 424         process_cmd_fifo();
 425 }
 426
 427 #if 1 /* VERBOSE */
 428 static void rfbi_print_timings(void)
 429 {
 430         u32 l;
 431         u32 time;
 432
 433         l = rfbi_read_reg(RFBI_CONFIG(0));
 434         time = 1000000000 / rfbi.l4_khz;
 435         if (l & (1 << 4))
 436                 time *= 2;
 437
 438         DSSDBG("Tick time %u ps\n", time);
 439         l = rfbi_read_reg(RFBI_ONOFF_TIME(0));
 440         DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
 441                 "REONTIME %d, REOFFTIME %d\n",
 442                 l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
 443                 (l >> 20) & 0x0f, (l >> 24) & 0x3f);
 444
 445         l = rfbi_read_reg(RFBI_CYCLE_TIME(0));
 446         DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
 447                 "ACCESSTIME %d\n",
 448                 (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
 449                 (l >> 22) & 0x3f);
 450 }
 451 #else
 452 static void rfbi_print_timings(void) {}
 453 #endif
 454
 455
 456
 457
 458 static u32 extif_clk_period;
 459
 460 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
 461 {
 462         int bus_tick = extif_clk_period * div;
 463         return (ps + bus_tick - 1) / bus_tick * bus_tick;
 464 }
 465
 466 static int calc_reg_timing(struct rfbi_timings *t, int div)
 467 {
 468         t->clk_div = div;
 469
 470         t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div);
 471
 472         t->we_on_time = round_to_extif_ticks(t->we_on_time, div);
 473         t->we_off_time = round_to_extif_ticks(t->we_off_time, div);
 474         t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div);
 475
 476         t->re_on_time = round_to_extif_ticks(t->re_on_time, div);
 477         t->re_off_time = round_to_extif_ticks(t->re_off_time, div);
 478         t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div);
 479
 480         t->access_time = round_to_extif_ticks(t->access_time, div);
 481         t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div);
 482         t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div);
 483
 484         DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n",
 485                t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
 486         DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n",
 487                t->we_on_time, t->we_off_time, t->re_cycle_time,
 488                t->we_cycle_time);
 489         DSSDBG("[reg]rdaccess %d cspulse %d\n",
 490                t->access_time, t->cs_pulse_width);
 491
 492         return rfbi_convert_timings(t);
 493 }
 494
 495 static int calc_extif_timings(struct rfbi_timings *t)
 496 {
 497         u32 max_clk_div;
 498         int div;
 499
 500         rfbi_get_clk_info(&extif_clk_period, &max_clk_div);
 501         for (div = 1; div <= max_clk_div; div++) {
 502                 if (calc_reg_timing(t, div) == 0)
 503                         break;
 504         }
 505
 506         if (div <= max_clk_div)
 507                 return 0;
 508
 509         DSSERR("can't setup timings\n");
 510         return -1;
 511 }
 512
 513
 514 void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
 515 {
 516         int r;
 517
 518         if (!t->converted) {
 519                 r = calc_extif_timings(t);
 520                 if (r < 0)
 521                         DSSERR("Failed to calc timings\n");
 522         }
 523
 524         BUG_ON(!t->converted);
 525
 526         rfbi_enable_clocks(1);
 527         rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]);
 528         rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]);
 529
 530         /* TIMEGRANULARITY */
 531         REG_FLD_MOD(RFBI_CONFIG(rfbi_module),
 532                     (t->tim[2] ? 1 : 0), 4, 4);
 533
 534         rfbi_print_timings();
 535         rfbi_enable_clocks(0);
 536 }
 537
 538 static int ps_to_rfbi_ticks(int time, int div)
 539 {
 540         unsigned long tick_ps;
 541         int ret;
 542
 543         /* Calculate in picosecs to yield more exact results */
 544         tick_ps = 1000000000 / (rfbi.l4_khz) * div;
 545
 546         ret = (time + tick_ps - 1) / tick_ps;
 547
 548         return ret;
 549 }
 550
 551 #ifdef OMAP_RFBI_RATE_LIMIT
 552 unsigned long rfbi_get_max_tx_rate(void)
 553 {
 554         unsigned long   l4_rate, dss1_rate;
 555         int             min_l4_ticks = 0;
 556         int             i;
 557
 558         /* According to TI this can't be calculated so make the
 559          * adjustments for a couple of known frequencies and warn for
 560          * others.
 561          */
 562         static const struct {
 563                 unsigned long l4_clk;           /* HZ */
 564                 unsigned long dss1_clk;         /* HZ */
 565                 unsigned long min_l4_ticks;
 566         } ftab[] = {
 567                 { 55,   132,    7, },           /* 7.86 MPix/s */
 568                 { 110,  110,    12, },          /* 9.16 MPix/s */
 569                 { 110,  132,    10, },          /* 11   Mpix/s */
 570                 { 120,  120,    10, },          /* 12   Mpix/s */
 571                 { 133,  133,    10, },          /* 13.3 Mpix/s */
 572         };
 573
 574         l4_rate = rfbi.l4_khz / 1000;
 575         dss1_rate = dss_clk_get_rate(DSS_CLK_FCK1) / 1000000;
 576
 577         for (i = 0; i < ARRAY_SIZE(ftab); i++) {
 578                 /* Use a window instead of an exact match, to account
 579                  * for different DPLL multiplier / divider pairs.
 580                  */
 581                 if (abs(ftab[i].l4_clk - l4_rate) < 3 &&
 582                     abs(ftab[i].dss1_clk - dss1_rate) < 3) {
 583                         min_l4_ticks = ftab[i].min_l4_ticks;
 584                         break;
 585                 }
 586         }
 587         if (i == ARRAY_SIZE(ftab)) {
 588                 /* Can't be sure, return anyway the maximum not
 589                  * rate-limited. This might cause a problem only for the
 590                  * tearing synchronisation.
 591                  */
 592                 DSSERR("can't determine maximum RFBI transfer rate\n");
 593                 return rfbi.l4_khz * 1000;
 594         }
 595         return rfbi.l4_khz * 1000 / min_l4_ticks;
 596 }
 597 #else
 598 int rfbi_get_max_tx_rate(void)
 599 {
 600         return rfbi.l4_khz * 1000;
 601 }
 602 #endif
 603
 604 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
 605 {
 606         *clk_period = 1000000000 / rfbi.l4_khz;
 607         *max_clk_div = 2;
 608 }
 609
 610 static int rfbi_convert_timings(struct rfbi_timings *t)
 611 {
 612         u32 l;
 613         int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
 614         int actim, recyc, wecyc;
 615         int div = t->clk_div;
 616
 617         if (div <= 0 || div > 2)
 618                 return -1;
 619
 620         /* Make sure that after conversion it still holds that:
 621          * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
 622          * csoff > cson, csoff >= max(weoff, reoff), actim > reon
 623          */
 624         weon = ps_to_rfbi_ticks(t->we_on_time, div);
 625         weoff = ps_to_rfbi_ticks(t->we_off_time, div);
 626         if (weoff <= weon)
 627                 weoff = weon + 1;
 628         if (weon > 0x0f)
 629                 return -1;
 630         if (weoff > 0x3f)
 631                 return -1;
 632
 633         reon = ps_to_rfbi_ticks(t->re_on_time, div);
 634         reoff = ps_to_rfbi_ticks(t->re_off_time, div);
 635         if (reoff <= reon)
 636                 reoff = reon + 1;
 637         if (reon > 0x0f)
 638                 return -1;
 639         if (reoff > 0x3f)
 640                 return -1;
 641
 642         cson = ps_to_rfbi_ticks(t->cs_on_time, div);
 643         csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
 644         if (csoff <= cson)
 645                 csoff = cson + 1;
 646         if (csoff < max(weoff, reoff))
 647                 csoff = max(weoff, reoff);
 648         if (cson > 0x0f)
 649                 return -1;
 650         if (csoff > 0x3f)
 651                 return -1;
 652
 653         l =  cson;
 654         l |= csoff << 4;
 655         l |= weon  << 10;
 656         l |= weoff << 14;
 657         l |= reon  << 20;
 658         l |= reoff << 24;
 659
 660         t->tim[0] = l;
 661
 662         actim = ps_to_rfbi_ticks(t->access_time, div);
 663         if (actim <= reon)
 664                 actim = reon + 1;
 665         if (actim > 0x3f)
 666                 return -1;
 667
 668         wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
 669         if (wecyc < weoff)
 670                 wecyc = weoff;
 671         if (wecyc > 0x3f)
 672                 return -1;
 673
 674         recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
 675         if (recyc < reoff)
 676                 recyc = reoff;
 677         if (recyc > 0x3f)
 678                 return -1;
 679
 680         cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
 681         if (cs_pulse > 0x3f)
 682                 return -1;
 683
 684         l =  wecyc;
 685         l |= recyc    << 6;
 686         l |= cs_pulse << 12;
 687         l |= actim    << 22;
 688
 689         t->tim[1] = l;
 690
 691         t->tim[2] = div - 1;
 692
 693         t->converted = 1;
 694
 695         return 0;
 696 }
 697
 698 /* xxx FIX module selection missing */
 699 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
 700                              unsigned hs_pulse_time, unsigned vs_pulse_time,
 701                              int hs_pol_inv, int vs_pol_inv, int extif_div)
 702 {
 703         int hs, vs;
 704         int min;
 705         u32 l;
 706
 707         hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
 708         vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
 709         if (hs < 2)
 710                 return -EDOM;
 711         if (mode == OMAP_DSS_RFBI_TE_MODE_2)
 712                 min = 2;
 713         else /* OMAP_DSS_RFBI_TE_MODE_1 */
 714                 min = 4;
 715         if (vs < min)
 716                 return -EDOM;
 717         if (vs == hs)
 718                 return -EINVAL;
 719         rfbi.te_mode = mode;
 720         DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n",
 721                 mode, hs, vs, hs_pol_inv, vs_pol_inv);
 722
 723         rfbi_enable_clocks(1);
 724         rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
 725         rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
 726
 727         l = rfbi_read_reg(RFBI_CONFIG(0));
 728         if (hs_pol_inv)
 729                 l &= ~(1 << 21);
 730         else
 731                 l |= 1 << 21;
 732         if (vs_pol_inv)
 733                 l &= ~(1 << 20);
 734         else
 735                 l |= 1 << 20;
 736         rfbi_enable_clocks(0);
 737
 738         return 0;
 739 }
 740 EXPORT_SYMBOL(omap_rfbi_setup_te);
 741
 742 /* xxx FIX module selection missing */
 743 int omap_rfbi_enable_te(bool enable, unsigned line)
 744 {
 745         u32 l;
 746
 747         DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode);
 748         if (line > (1 << 11) - 1)
 749                 return -EINVAL;
 750
 751         rfbi_enable_clocks(1);
 752         l = rfbi_read_reg(RFBI_CONFIG(0));
 753         l &= ~(0x3 << 2);
 754         if (enable) {
 755                 rfbi.te_enabled = 1;
 756                 l |= rfbi.te_mode << 2;
 757         } else
 758                 rfbi.te_enabled = 0;
 759         rfbi_write_reg(RFBI_CONFIG(0), l);
 760         rfbi_write_reg(RFBI_LINE_NUMBER, line);
 761         rfbi_enable_clocks(0);
 762
 763         return 0;
 764 }
 765 EXPORT_SYMBOL(omap_rfbi_enable_te);
 766
 767 #if 0
 768 static void rfbi_enable_config(int enable1, int enable2)
 769 {
 770         u32 l;
 771         int cs = 0;
 772
 773         if (enable1)
 774                 cs |= 1<<0;
 775         if (enable2)
 776                 cs |= 1<<1;
 777
 778         rfbi_enable_clocks(1);
 779
 780         l = rfbi_read_reg(RFBI_CONTROL);
 781
 782         l = FLD_MOD(l, cs, 3, 2);
 783         l = FLD_MOD(l, 0, 1, 1);
 784
 785         rfbi_write_reg(RFBI_CONTROL, l);
 786
 787
 788         l = rfbi_read_reg(RFBI_CONFIG(0));
 789         l = FLD_MOD(l, 0, 3, 2); /* TRIGGERMODE: ITE */
 790         /*l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
 791         /*l |= FLD_VAL(0, 8, 7); */ /* L4FORMAT, 1pix/L4 */
 792
 793         l = FLD_MOD(l, 0, 16, 16); /* A0POLARITY */
 794         l = FLD_MOD(l, 1, 20, 20); /* TE_VSYNC_POLARITY */
 795         l = FLD_MOD(l, 1, 21, 21); /* HSYNCPOLARITY */
 796
 797         l = FLD_MOD(l, OMAP_DSS_RFBI_PARALLELMODE_8, 1, 0);
 798         rfbi_write_reg(RFBI_CONFIG(0), l);
 799
 800         rfbi_enable_clocks(0);
 801 }
 802 #endif
 803
 804 int rfbi_configure(int rfbi_module, int bpp, int lines)
 805 {
 806         u32 l;
 807         int cycle1 = 0, cycle2 = 0, cycle3 = 0;
 808         enum omap_rfbi_cycleformat cycleformat;
 809         enum omap_rfbi_datatype datatype;
 810         enum omap_rfbi_parallelmode parallelmode;
 811
 812         switch (bpp) {
 813         case 12:
 814                 datatype = OMAP_DSS_RFBI_DATATYPE_12;
 815                 break;
 816         case 16:
 817                 datatype = OMAP_DSS_RFBI_DATATYPE_16;
 818                 break;
 819         case 18:
 820                 datatype = OMAP_DSS_RFBI_DATATYPE_18;
 821                 break;
 822         case 24:
 823                 datatype = OMAP_DSS_RFBI_DATATYPE_24;
 824                 break;
 825         default:
 826                 BUG();
 827                 return 1;
 828         }
 829         rfbi.datatype = datatype;
 830
 831         switch (lines) {
 832         case 8:
 833                 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8;
 834                 break;
 835         case 9:
 836                 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9;
 837                 break;
 838         case 12:
 839                 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12;
 840                 break;
 841         case 16:
 842                 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16;
 843                 break;
 844         default:
 845                 BUG();
 846                 return 1;
 847         }
 848         rfbi.parallelmode = parallelmode;
 849
 850         if ((bpp % lines) == 0) {
 851                 switch (bpp / lines) {
 852                 case 1:
 853                         cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1;
 854                         break;
 855                 case 2:
 856                         cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1;
 857                         break;
 858                 case 3:
 859                         cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1;
 860                         break;
 861                 default:
 862                         BUG();
 863                         return 1;
 864                 }
 865         } else if ((2 * bpp % lines) == 0) {
 866                 if ((2 * bpp / lines) == 3)
 867                         cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2;
 868                 else {
 869                         BUG();
 870                         return 1;
 871                 }
 872         } else {
 873                 BUG();
 874                 return 1;
 875         }
 876
 877         switch (cycleformat) {
 878         case OMAP_DSS_RFBI_CYCLEFORMAT_1_1:
 879                 cycle1 = lines;
 880                 break;
 881
 882         case OMAP_DSS_RFBI_CYCLEFORMAT_2_1:
 883                 cycle1 = lines;
 884                 cycle2 = lines;
 885                 break;
 886
 887         case OMAP_DSS_RFBI_CYCLEFORMAT_3_1:
 888                 cycle1 = lines;
 889                 cycle2 = lines;
 890                 cycle3 = lines;
 891                 break;
 892
 893         case OMAP_DSS_RFBI_CYCLEFORMAT_3_2:
 894                 cycle1 = lines;
 895                 cycle2 = (lines / 2) | ((lines / 2) << 16);
 896                 cycle3 = (lines << 16);
 897                 break;
 898         }
 899
 900         rfbi_enable_clocks(1);
 901
 902         REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */
 903
 904         l = 0;
 905         l |= FLD_VAL(parallelmode, 1, 0);
 906         l |= FLD_VAL(0, 3, 2);          /* TRIGGERMODE: ITE */
 907         l |= FLD_VAL(0, 4, 4);          /* TIMEGRANULARITY */
 908         l |= FLD_VAL(datatype, 6, 5);
 909         /* l |= FLD_VAL(2, 8, 7); */    /* L4FORMAT, 2pix/L4 */
 910         l |= FLD_VAL(0, 8, 7);  /* L4FORMAT, 1pix/L4 */
 911         l |= FLD_VAL(cycleformat, 10, 9);
 912         l |= FLD_VAL(0, 12, 11);        /* UNUSEDBITS */
 913         l |= FLD_VAL(0, 16, 16);        /* A0POLARITY */
 914         l |= FLD_VAL(0, 17, 17);        /* REPOLARITY */
 915         l |= FLD_VAL(0, 18, 18);        /* WEPOLARITY */
 916         l |= FLD_VAL(0, 19, 19);        /* CSPOLARITY */
 917         l |= FLD_VAL(1, 20, 20);        /* TE_VSYNC_POLARITY */
 918         l |= FLD_VAL(1, 21, 21);        /* HSYNCPOLARITY */
 919         rfbi_write_reg(RFBI_CONFIG(rfbi_module), l);
 920
 921         rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1);
 922         rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2);
 923         rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3);
 924
 925
 926         l = rfbi_read_reg(RFBI_CONTROL);
 927         l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */
 928         l = FLD_MOD(l, 0, 1, 1); /* clear bypass */
 929         rfbi_write_reg(RFBI_CONTROL, l);
 930
 931
 932         DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n",
 933                bpp, lines, cycle1, cycle2, cycle3);
 934
 935         rfbi_enable_clocks(0);
 936
 937         return 0;
 938 }
 939 EXPORT_SYMBOL(rfbi_configure);
 940
 941 static int rfbi_find_display(struct omap_display *disp)
 942 {
 943         if (disp == rfbi.display[0])
 944                 return 0;
 945
 946         if (disp == rfbi.display[1])
 947                 return 1;
 948
 949         BUG();
 950         return -1;
 951 }
 952
 953
 954 static void signal_fifo_waiters(void)
 955 {
 956         if (atomic_read(&rfbi.cmd_fifo_full) > 0) {
 957                 /* DSSDBG("SIGNALING: Fifo not full for waiter!\n"); */
 958                 complete(&rfbi.cmd_done);
 959                 atomic_dec(&rfbi.cmd_fifo_full);
 960         }
 961 }
 962
 963 /* returns 1 for async op, and 0 for sync op */
 964 static int do_update(struct omap_display *display, struct update_region *upd)
 965 {
 966         u16 x = upd->x;
 967         u16 y = upd->y;
 968         u16 w = upd->w;
 969         u16 h = upd->h;
 970
 971         perf_mark_setup();
 972
 973         if (display->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
 974                 /*display->ctrl->enable_te(display, 1); */
 975                 dispc_setup_partial_planes(display, &x, &y, &w, &h);
 976         }
 977
 978 #ifdef MEASURE_PERF
 979         rfbi.perf_bytes = w * h * 2; /* XXX always 16bit */
 980 #endif
 981
 982         display->ctrl->setup_update(display, x, y, w, h);
 983
 984         if (display->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
 985                 rfbi_transfer_area(w, h, NULL, NULL);
 986                 return 1;
 987         } else {
 988                 struct omap_overlay *ovl;
 989                 void __iomem *addr;
 990                 int scr_width;
 991
 992                 ovl = display->manager->overlays[0];
 993                 scr_width = ovl->info.screen_width;
 994                 addr = ovl->info.vaddr;
 995
 996                 omap_rfbi_write_pixels(addr, scr_width, x, y, w, h);
 997
 998                 perf_show("L4");
 999
1000                 return 0;
1001         }
1002 }
1003
1004 static void process_cmd_fifo(void)
1005 {
1006         int len;
1007         struct update_param p;
1008         struct omap_display *display;
1009         unsigned long flags;
1010
1011         if (atomic_inc_return(&rfbi.cmd_pending) != 1)
1012                 return;
1013
1014         while (true) {
1015                 spin_lock_irqsave(rfbi.cmd_fifo->lock, flags);
1016
1017                 len = __kfifo_get(rfbi.cmd_fifo, (unsigned char *)&p,
1018                                   sizeof(struct update_param));
1019                 if (len == 0) {
1020                         DSSDBG("nothing more in fifo\n");
1021                         atomic_set(&rfbi.cmd_pending, 0);
1022                         spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1023                         break;
1024                 }
1025
1026                 /* DSSDBG("fifo full %d\n", rfbi.cmd_fifo_full.counter);*/
1027
1028                 spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1029
1030                 BUG_ON(len != sizeof(struct update_param));
1031                 BUG_ON(p.rfbi_module > 1);
1032
1033                 display = rfbi.display[p.rfbi_module];
1034
1035                 if (p.cmd == RFBI_CMD_UPDATE) {
1036                         if (do_update(display, &p.par.r))
1037                                 break; /* async op */
1038                 } else if (p.cmd == RFBI_CMD_SYNC) {
1039                         DSSDBG("Signaling SYNC done!\n");
1040                         complete(p.par.sync);
1041                 } else
1042                         BUG();
1043         }
1044
1045         signal_fifo_waiters();
1046 }
1047
1048 static void rfbi_push_cmd(struct update_param *p)
1049 {
1050         int ret;
1051
1052         while (1) {
1053                 unsigned long flags;
1054                 int available;
1055
1056                 spin_lock_irqsave(rfbi.cmd_fifo->lock, flags);
1057                 available = RFBI_CMD_FIFO_LEN_BYTES -
1058                         __kfifo_len(rfbi.cmd_fifo);
1059
1060 /*              DSSDBG("%d bytes left in fifo\n", available); */
1061                 if (available < sizeof(struct update_param)) {
1062                         DSSDBG("Going to wait because FIFO FULL..\n");
1063                         spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1064                         atomic_inc(&rfbi.cmd_fifo_full);
1065                         wait_for_completion(&rfbi.cmd_done);
1066                         /*DSSDBG("Woke up because fifo not full anymore\n");*/
1067                         continue;
1068                 }
1069
1070                 ret = __kfifo_put(rfbi.cmd_fifo, (unsigned char *)p,
1071                                   sizeof(struct update_param));
1072 /*              DSSDBG("pushed %d bytes\n", ret);*/
1073
1074                 spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1075
1076                 BUG_ON(ret != sizeof(struct update_param));
1077
1078                 break;
1079         }
1080 }
1081
1082 static void rfbi_push_update(int rfbi_module, int x, int y, int w, int h)
1083 {
1084         struct update_param p;
1085
1086         p.rfbi_module = rfbi_module;
1087         p.cmd = RFBI_CMD_UPDATE;
1088
1089         p.par.r.x = x;
1090         p.par.r.y = y;
1091         p.par.r.w = w;
1092         p.par.r.h = h;
1093
1094         DSSDBG("RFBI pushed %d,%d %dx%d\n", x, y, w, h);
1095
1096         rfbi_push_cmd(&p);
1097
1098         process_cmd_fifo();
1099 }
1100
1101 static void rfbi_push_sync(int rfbi_module, struct completion *sync_comp)
1102 {
1103         struct update_param p;
1104
1105         p.rfbi_module = rfbi_module;
1106         p.cmd = RFBI_CMD_SYNC;
1107         p.par.sync = sync_comp;
1108
1109         rfbi_push_cmd(&p);
1110
1111         DSSDBG("RFBI sync pushed to cmd fifo\n");
1112
1113         process_cmd_fifo();
1114 }
1115
1116 void rfbi_dump_regs(struct seq_file *s)
1117 {
1118 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
1119
1120         dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
1121
1122         DUMPREG(RFBI_REVISION);
1123         DUMPREG(RFBI_SYSCONFIG);
1124         DUMPREG(RFBI_SYSSTATUS);
1125         DUMPREG(RFBI_CONTROL);
1126         DUMPREG(RFBI_PIXEL_CNT);
1127         DUMPREG(RFBI_LINE_NUMBER);
1128         DUMPREG(RFBI_CMD);
1129         DUMPREG(RFBI_PARAM);
1130         DUMPREG(RFBI_DATA);
1131         DUMPREG(RFBI_READ);
1132         DUMPREG(RFBI_STATUS);
1133
1134         DUMPREG(RFBI_CONFIG(0));
1135         DUMPREG(RFBI_ONOFF_TIME(0));
1136         DUMPREG(RFBI_CYCLE_TIME(0));
1137         DUMPREG(RFBI_DATA_CYCLE1(0));
1138         DUMPREG(RFBI_DATA_CYCLE2(0));
1139         DUMPREG(RFBI_DATA_CYCLE3(0));
1140
1141         DUMPREG(RFBI_CONFIG(1));
1142         DUMPREG(RFBI_ONOFF_TIME(1));
1143         DUMPREG(RFBI_CYCLE_TIME(1));
1144         DUMPREG(RFBI_DATA_CYCLE1(1));
1145         DUMPREG(RFBI_DATA_CYCLE2(1));
1146         DUMPREG(RFBI_DATA_CYCLE3(1));
1147
1148         DUMPREG(RFBI_VSYNC_WIDTH);
1149         DUMPREG(RFBI_HSYNC_WIDTH);
1150
1151         dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
1152 #undef DUMPREG
1153 }
1154
1155 int rfbi_init(void)
1156 {
1157         u32 rev;
1158         u32 l;
1159
1160         spin_lock_init(&rfbi.cmd_lock);
1161         rfbi.cmd_fifo = kfifo_alloc(RFBI_CMD_FIFO_LEN_BYTES, GFP_KERNEL,
1162                                     &rfbi.cmd_lock);
1163         if (IS_ERR(rfbi.cmd_fifo))
1164                 return -ENOMEM;
1165
1166         init_completion(&rfbi.cmd_done);
1167         atomic_set(&rfbi.cmd_fifo_full, 0);
1168         atomic_set(&rfbi.cmd_pending, 0);
1169
1170         rfbi.base = ioremap(RFBI_BASE, SZ_256);
1171         if (!rfbi.base) {
1172                 DSSERR("can't ioremap RFBI\n");
1173                 return -ENOMEM;
1174         }
1175
1176         rfbi_enable_clocks(1);
1177
1178         msleep(10);
1179
1180         rfbi.l4_khz = dss_clk_get_rate(DSS_CLK_ICK) / 1000;
1181
1182         /* Enable autoidle and smart-idle */
1183         l = rfbi_read_reg(RFBI_SYSCONFIG);
1184         l |= (1 << 0) | (2 << 3);
1185         rfbi_write_reg(RFBI_SYSCONFIG, l);
1186
1187         rev = rfbi_read_reg(RFBI_REVISION);
1188         printk(KERN_INFO "OMAP RFBI rev %d.%d\n",
1189                FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
1190
1191         rfbi_enable_clocks(0);
1192
1193         return 0;
1194 }
1195
1196 void rfbi_exit(void)
1197 {
1198         DSSDBG("rfbi_exit\n");
1199
1200         kfifo_free(rfbi.cmd_fifo);
1201
1202         iounmap(rfbi.base);
1203 }
1204
1205 /* struct omap_display support */
1206 static int rfbi_display_update(struct omap_display *display,
1207                         u16 x, u16 y, u16 w, u16 h)
1208 {
1209         int rfbi_module;
1210
1211         if (w == 0 || h == 0)
1212                 return 0;
1213
1214         rfbi_module = rfbi_find_display(display);
1215
1216         rfbi_push_update(rfbi_module, x, y, w, h);
1217
1218         return 0;
1219 }
1220
1221 static int rfbi_display_sync(struct omap_display *display)
1222 {
1223         struct completion sync_comp;
1224         int rfbi_module;
1225
1226         rfbi_module = rfbi_find_display(display);
1227
1228         init_completion(&sync_comp);
1229         rfbi_push_sync(rfbi_module, &sync_comp);
1230         DSSDBG("Waiting for SYNC to happen...\n");
1231         wait_for_completion(&sync_comp);
1232         DSSDBG("Released from SYNC\n");
1233         return 0;
1234 }
1235
1236 static int rfbi_display_enable_te(struct omap_display *display, bool enable)
1237 {
1238         display->ctrl->enable_te(display, enable);
1239         return 0;
1240 }
1241
1242 static int rfbi_display_enable(struct omap_display *display)
1243 {
1244         int r;
1245
1246         BUG_ON(display->panel == NULL || display->ctrl == NULL);
1247
1248         r = omap_dispc_register_isr(framedone_callback, NULL,
1249                         DISPC_IRQ_FRAMEDONE);
1250         if (r) {
1251                 DSSERR("can't get FRAMEDONE irq\n");
1252                 return r;
1253         }
1254
1255         dispc_set_lcd_display_type(OMAP_DSS_LCD_DISPLAY_TFT);
1256
1257         dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_RFBI);
1258
1259         dispc_set_tft_data_lines(display->ctrl->pixel_size);
1260
1261         rfbi_configure(display->hw_config.u.rfbi.channel,
1262                                display->ctrl->pixel_size,
1263                                display->hw_config.u.rfbi.data_lines);
1264
1265         rfbi_set_timings(display->hw_config.u.rfbi.channel,
1266                          &display->ctrl->timings);
1267
1268
1269         if (display->ctrl && display->ctrl->enable) {
1270                 r = display->ctrl->enable(display);
1271                 if (r)
1272                         goto err;
1273         }
1274
1275         if (display->panel && display->panel->enable) {
1276                 r = display->panel->enable(display);
1277                 if (r)
1278                         goto err;
1279         }
1280
1281         return 0;
1282 err:
1283         return -ENODEV;
1284 }
1285
1286 static void rfbi_display_disable(struct omap_display *display)
1287 {
1288         display->ctrl->disable(display);
1289         omap_dispc_unregister_isr(framedone_callback, NULL,
1290                         DISPC_IRQ_FRAMEDONE);
1291 }
1292
1293 void rfbi_init_display(struct omap_display *display)
1294 {
1295         display->enable = rfbi_display_enable;
1296         display->disable = rfbi_display_disable;
1297         display->update = rfbi_display_update;
1298         display->sync = rfbi_display_sync;
1299         display->enable_te = rfbi_display_enable_te;
1300
1301         rfbi.display[display->hw_config.u.rfbi.channel] = display;
1302
1303         display->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
1304 }