Merge branch 'devicetree/next' into spi/next
[pandora-kernel.git] / drivers / video / omap2 / dss / dpi.c
1 /*
2  * linux/drivers/video/omap2/dss/dpi.c
3  *
4  * Copyright (C) 2009 Nokia Corporation
5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6  *
7  * Some code and ideas taken from drivers/video/omap/ driver
8  * by Imre Deak.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms of the GNU General Public License version 2 as published by
12  * the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but WITHOUT
15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17  * more details.
18  *
19  * You should have received a copy of the GNU General Public License along with
20  * this program.  If not, see <http://www.gnu.org/licenses/>.
21  */
22
23 #define DSS_SUBSYS_NAME "DPI"
24
25 #include <linux/kernel.h>
26 #include <linux/clk.h>
27 #include <linux/delay.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32
33 #include <plat/display.h>
34 #include <plat/cpu.h>
35
36 #include "dss.h"
37
38 static struct {
39         struct regulator *vdds_dsi_reg;
40 } dpi;
41
42 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
43 static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
44                 unsigned long pck_req, unsigned long *fck, int *lck_div,
45                 int *pck_div)
46 {
47         struct dsi_clock_info dsi_cinfo;
48         struct dispc_clock_info dispc_cinfo;
49         int r;
50
51         r = dsi_pll_calc_clock_div_pck(is_tft, pck_req, &dsi_cinfo,
52                         &dispc_cinfo);
53         if (r)
54                 return r;
55
56         r = dsi_pll_set_clock_div(&dsi_cinfo);
57         if (r)
58                 return r;
59
60         dss_select_dispc_clk_source(DSS_SRC_DSI1_PLL_FCLK);
61
62         r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo);
63         if (r)
64                 return r;
65
66         *fck = dsi_cinfo.dsi1_pll_fclk;
67         *lck_div = dispc_cinfo.lck_div;
68         *pck_div = dispc_cinfo.pck_div;
69
70         return 0;
71 }
72 #else
73 static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
74                 unsigned long pck_req, unsigned long *fck, int *lck_div,
75                 int *pck_div)
76 {
77         struct dss_clock_info dss_cinfo;
78         struct dispc_clock_info dispc_cinfo;
79         int r;
80
81         r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo);
82         if (r)
83                 return r;
84
85         r = dss_set_clock_div(&dss_cinfo);
86         if (r)
87                 return r;
88
89         r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo);
90         if (r)
91                 return r;
92
93         *fck = dss_cinfo.fck;
94         *lck_div = dispc_cinfo.lck_div;
95         *pck_div = dispc_cinfo.pck_div;
96
97         return 0;
98 }
99 #endif
100
101 static int dpi_set_mode(struct omap_dss_device *dssdev)
102 {
103         struct omap_video_timings *t = &dssdev->panel.timings;
104         int lck_div, pck_div;
105         unsigned long fck;
106         unsigned long pck;
107         bool is_tft;
108         int r = 0;
109
110         dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
111
112         dispc_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
113                         dssdev->panel.acbi, dssdev->panel.acb);
114
115         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
116
117 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
118         r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000, &fck,
119                         &lck_div, &pck_div);
120 #else
121         r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000, &fck,
122                         &lck_div, &pck_div);
123 #endif
124         if (r)
125                 goto err0;
126
127         pck = fck / lck_div / pck_div / 1000;
128
129         if (pck != t->pixel_clock) {
130                 DSSWARN("Could not find exact pixel clock. "
131                                 "Requested %d kHz, got %lu kHz\n",
132                                 t->pixel_clock, pck);
133
134                 t->pixel_clock = pck;
135         }
136
137         dispc_set_lcd_timings(dssdev->manager->id, t);
138
139 err0:
140         dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
141         return r;
142 }
143
144 static int dpi_basic_init(struct omap_dss_device *dssdev)
145 {
146         bool is_tft;
147
148         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
149
150         dispc_set_parallel_interface_mode(dssdev->manager->id,
151                         OMAP_DSS_PARALLELMODE_BYPASS);
152         dispc_set_lcd_display_type(dssdev->manager->id, is_tft ?
153                         OMAP_DSS_LCD_DISPLAY_TFT : OMAP_DSS_LCD_DISPLAY_STN);
154         dispc_set_tft_data_lines(dssdev->manager->id,
155                         dssdev->phy.dpi.data_lines);
156
157         return 0;
158 }
159
160 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
161 {
162         int r;
163
164         r = omap_dss_start_device(dssdev);
165         if (r) {
166                 DSSERR("failed to start device\n");
167                 goto err0;
168         }
169
170         if (cpu_is_omap34xx()) {
171                 r = regulator_enable(dpi.vdds_dsi_reg);
172                 if (r)
173                         goto err1;
174         }
175
176         dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
177
178         r = dpi_basic_init(dssdev);
179         if (r)
180                 goto err2;
181
182 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
183         dss_clk_enable(DSS_CLK_FCK2);
184         r = dsi_pll_init(dssdev, 0, 1);
185         if (r)
186                 goto err3;
187 #endif
188         r = dpi_set_mode(dssdev);
189         if (r)
190                 goto err4;
191
192         mdelay(2);
193
194         dssdev->manager->enable(dssdev->manager);
195
196         return 0;
197
198 err4:
199 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
200         dsi_pll_uninit();
201 err3:
202         dss_clk_disable(DSS_CLK_FCK2);
203 #endif
204 err2:
205         dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
206         if (cpu_is_omap34xx())
207                 regulator_disable(dpi.vdds_dsi_reg);
208 err1:
209         omap_dss_stop_device(dssdev);
210 err0:
211         return r;
212 }
213 EXPORT_SYMBOL(omapdss_dpi_display_enable);
214
215 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
216 {
217         dssdev->manager->disable(dssdev->manager);
218
219 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
220         dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK);
221         dsi_pll_uninit();
222         dss_clk_disable(DSS_CLK_FCK2);
223 #endif
224
225         dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
226
227         if (cpu_is_omap34xx())
228                 regulator_disable(dpi.vdds_dsi_reg);
229
230         omap_dss_stop_device(dssdev);
231 }
232 EXPORT_SYMBOL(omapdss_dpi_display_disable);
233
234 void dpi_set_timings(struct omap_dss_device *dssdev,
235                         struct omap_video_timings *timings)
236 {
237         DSSDBG("dpi_set_timings\n");
238         dssdev->panel.timings = *timings;
239         if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
240                 dpi_set_mode(dssdev);
241                 dispc_go(dssdev->manager->id);
242         }
243 }
244 EXPORT_SYMBOL(dpi_set_timings);
245
246 int dpi_check_timings(struct omap_dss_device *dssdev,
247                         struct omap_video_timings *timings)
248 {
249         bool is_tft;
250         int r;
251         int lck_div, pck_div;
252         unsigned long fck;
253         unsigned long pck;
254
255         if (!dispc_lcd_timings_ok(timings))
256                 return -EINVAL;
257
258         if (timings->pixel_clock == 0)
259                 return -EINVAL;
260
261         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
262
263 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
264         {
265                 struct dsi_clock_info dsi_cinfo;
266                 struct dispc_clock_info dispc_cinfo;
267                 r = dsi_pll_calc_clock_div_pck(is_tft,
268                                 timings->pixel_clock * 1000,
269                                 &dsi_cinfo, &dispc_cinfo);
270
271                 if (r)
272                         return r;
273
274                 fck = dsi_cinfo.dsi1_pll_fclk;
275                 lck_div = dispc_cinfo.lck_div;
276                 pck_div = dispc_cinfo.pck_div;
277         }
278 #else
279         {
280                 struct dss_clock_info dss_cinfo;
281                 struct dispc_clock_info dispc_cinfo;
282                 r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
283                                 &dss_cinfo, &dispc_cinfo);
284
285                 if (r)
286                         return r;
287
288                 fck = dss_cinfo.fck;
289                 lck_div = dispc_cinfo.lck_div;
290                 pck_div = dispc_cinfo.pck_div;
291         }
292 #endif
293
294         pck = fck / lck_div / pck_div / 1000;
295
296         timings->pixel_clock = pck;
297
298         return 0;
299 }
300 EXPORT_SYMBOL(dpi_check_timings);
301
302 int dpi_init_display(struct omap_dss_device *dssdev)
303 {
304         DSSDBG("init_display\n");
305
306         return 0;
307 }
308
309 int dpi_init(struct platform_device *pdev)
310 {
311         if (cpu_is_omap34xx()) {
312                 dpi.vdds_dsi_reg = dss_get_vdds_dsi();
313                 if (IS_ERR(dpi.vdds_dsi_reg)) {
314                         DSSERR("can't get VDDS_DSI regulator\n");
315                         return PTR_ERR(dpi.vdds_dsi_reg);
316                 }
317         }
318
319         return 0;
320 }
321
322 void dpi_exit(void)
323 {
324 }
325