2 * linux/drivers/video/omap2/dss/dpi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "DPI"
25 #include <linux/kernel.h>
26 #include <linux/clk.h>
27 #include <linux/delay.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
33 #include <plat/display.h>
39 struct regulator *vdds_dsi_reg;
42 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
43 static int dpi_set_dsi_clk(bool is_tft, unsigned long pck_req,
44 unsigned long *fck, int *lck_div, int *pck_div)
46 struct dsi_clock_info dsi_cinfo;
47 struct dispc_clock_info dispc_cinfo;
50 r = dsi_pll_calc_clock_div_pck(is_tft, pck_req, &dsi_cinfo,
55 r = dsi_pll_set_clock_div(&dsi_cinfo);
59 dss_select_dispc_clk_source(DSS_SRC_DSI1_PLL_FCLK);
61 r = dispc_set_clock_div(&dispc_cinfo);
65 *fck = dsi_cinfo.dsi1_pll_fclk;
66 *lck_div = dispc_cinfo.lck_div;
67 *pck_div = dispc_cinfo.pck_div;
72 static int dpi_set_dispc_clk(bool is_tft, unsigned long pck_req,
73 unsigned long *fck, int *lck_div, int *pck_div)
75 struct dss_clock_info dss_cinfo;
76 struct dispc_clock_info dispc_cinfo;
79 r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo);
83 r = dss_set_clock_div(&dss_cinfo);
87 r = dispc_set_clock_div(&dispc_cinfo);
92 *lck_div = dispc_cinfo.lck_div;
93 *pck_div = dispc_cinfo.pck_div;
99 static int dpi_set_mode(struct omap_dss_device *dssdev)
101 struct omap_video_timings *t = &dssdev->panel.timings;
102 int lck_div, pck_div;
108 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
110 dispc_set_pol_freq(dssdev->panel.config, dssdev->panel.acbi,
113 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
115 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
116 r = dpi_set_dsi_clk(is_tft, t->pixel_clock * 1000,
117 &fck, &lck_div, &pck_div);
119 r = dpi_set_dispc_clk(is_tft, t->pixel_clock * 1000,
120 &fck, &lck_div, &pck_div);
125 pck = fck / lck_div / pck_div / 1000;
127 if (pck != t->pixel_clock) {
128 DSSWARN("Could not find exact pixel clock. "
129 "Requested %d kHz, got %lu kHz\n",
130 t->pixel_clock, pck);
132 t->pixel_clock = pck;
135 dispc_set_lcd_timings(t);
138 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
142 static int dpi_basic_init(struct omap_dss_device *dssdev)
146 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
148 dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_BYPASS);
149 dispc_set_lcd_display_type(is_tft ? OMAP_DSS_LCD_DISPLAY_TFT :
150 OMAP_DSS_LCD_DISPLAY_STN);
151 dispc_set_tft_data_lines(dssdev->phy.dpi.data_lines);
156 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
160 r = omap_dss_start_device(dssdev);
162 DSSERR("failed to start device\n");
166 if (cpu_is_omap34xx()) {
167 r = regulator_enable(dpi.vdds_dsi_reg);
172 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
174 r = dpi_basic_init(dssdev);
178 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
179 dss_clk_enable(DSS_CLK_FCK2);
180 r = dsi_pll_init(dssdev, 0, 1);
184 r = dpi_set_mode(dssdev);
190 dssdev->manager->enable(dssdev->manager);
195 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
198 dss_clk_disable(DSS_CLK_FCK2);
201 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
202 if (cpu_is_omap34xx())
203 regulator_disable(dpi.vdds_dsi_reg);
205 omap_dss_stop_device(dssdev);
209 EXPORT_SYMBOL(omapdss_dpi_display_enable);
211 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
213 dssdev->manager->disable(dssdev->manager);
215 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
216 dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK);
218 dss_clk_disable(DSS_CLK_FCK2);
221 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
223 if (cpu_is_omap34xx())
224 regulator_disable(dpi.vdds_dsi_reg);
226 omap_dss_stop_device(dssdev);
228 EXPORT_SYMBOL(omapdss_dpi_display_disable);
230 void dpi_set_timings(struct omap_dss_device *dssdev,
231 struct omap_video_timings *timings)
233 DSSDBG("dpi_set_timings\n");
234 dssdev->panel.timings = *timings;
235 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
236 dpi_set_mode(dssdev);
237 dispc_go(OMAP_DSS_CHANNEL_LCD);
240 EXPORT_SYMBOL(dpi_set_timings);
242 int dpi_check_timings(struct omap_dss_device *dssdev,
243 struct omap_video_timings *timings)
247 int lck_div, pck_div;
251 if (!dispc_lcd_timings_ok(timings))
254 if (timings->pixel_clock == 0)
257 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
259 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
261 struct dsi_clock_info dsi_cinfo;
262 struct dispc_clock_info dispc_cinfo;
263 r = dsi_pll_calc_clock_div_pck(is_tft,
264 timings->pixel_clock * 1000,
265 &dsi_cinfo, &dispc_cinfo);
270 fck = dsi_cinfo.dsi1_pll_fclk;
271 lck_div = dispc_cinfo.lck_div;
272 pck_div = dispc_cinfo.pck_div;
276 struct dss_clock_info dss_cinfo;
277 struct dispc_clock_info dispc_cinfo;
278 r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
279 &dss_cinfo, &dispc_cinfo);
285 lck_div = dispc_cinfo.lck_div;
286 pck_div = dispc_cinfo.pck_div;
290 pck = fck / lck_div / pck_div / 1000;
292 timings->pixel_clock = pck;
296 EXPORT_SYMBOL(dpi_check_timings);
298 int dpi_init_display(struct omap_dss_device *dssdev)
300 DSSDBG("init_display\n");
305 int dpi_init(struct platform_device *pdev)
307 if (cpu_is_omap34xx()) {
308 dpi.vdds_dsi_reg = dss_get_vdds_dsi();
309 if (IS_ERR(dpi.vdds_dsi_reg)) {
310 DSSERR("can't get VDDS_DSI regulator\n");
311 return PTR_ERR(dpi.vdds_dsi_reg);