2 * linux/drivers/video/omap2/dss/dpi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #include <linux/kernel.h>
24 #include <linux/clk.h>
25 #include <linux/delay.h>
26 #include <linux/errno.h>
28 #include <mach/board.h>
29 #include <mach/display.h>
38 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
39 static int dpi_set_dsi_clk(bool is_tft, unsigned long pck_req,
40 unsigned long *fck, int *lck_div, int *pck_div)
42 struct dsi_clock_info cinfo;
45 r = dsi_pll_calc_pck(is_tft, pck_req, &cinfo);
49 r = dsi_pll_program(&cinfo);
53 dss_select_clk_source(0, 1);
55 dispc_set_lcd_divisor(cinfo.lck_div, cinfo.pck_div);
57 *fck = cinfo.dsi1_pll_fclk;
58 *lck_div = cinfo.lck_div;
59 *pck_div = cinfo.pck_div;
64 static int dpi_set_dispc_clk(bool is_tft, unsigned long pck_req,
65 unsigned long *fck, int *lck_div, int *pck_div)
67 struct dispc_clock_info cinfo;
70 r = dispc_calc_clock_div(is_tft, pck_req, &cinfo);
74 r = dispc_set_clock_div(&cinfo);
79 *lck_div = cinfo.lck_div;
80 *pck_div = cinfo.pck_div;
86 static int dpi_set_mode(struct omap_display *display)
88 struct omap_panel *panel = display->panel;
95 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
97 dispc_set_pol_freq(panel);
99 is_tft = (display->panel->config & OMAP_DSS_LCD_TFT) != 0;
101 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
102 r = dpi_set_dsi_clk(is_tft, panel->timings.pixel_clock * 1000,
103 &fck, &lck_div, &pck_div);
105 r = dpi_set_dispc_clk(is_tft, panel->timings.pixel_clock * 1000,
106 &fck, &lck_div, &pck_div);
111 pck = fck / lck_div / pck_div / 1000;
113 if (pck != panel->timings.pixel_clock) {
114 DSSWARN("Could not find exact pixel clock. "
115 "Requested %d kHz, got %lu kHz\n",
116 panel->timings.pixel_clock, pck);
118 panel->timings.pixel_clock = pck;
121 dispc_set_lcd_timings(&panel->timings);
124 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
128 static int dpi_basic_init(struct omap_display *display)
132 is_tft = (display->panel->config & OMAP_DSS_LCD_TFT) != 0;
134 dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_BYPASS);
135 dispc_set_lcd_display_type(is_tft ? OMAP_DSS_LCD_DISPLAY_TFT :
136 OMAP_DSS_LCD_DISPLAY_STN);
137 dispc_set_tft_data_lines(display->hw_config.u.dpi.data_lines);
142 static int dpi_display_enable(struct omap_display *display)
144 struct omap_panel *panel = display->panel;
147 if (display->state != OMAP_DSS_DISPLAY_DISABLED) {
148 DSSERR("display already enabled\n");
152 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
154 r = dpi_basic_init(display);
158 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
159 dss_clk_enable(DSS_CLK_FCK2);
160 r = dsi_pll_init(0, 1);
164 r = dpi_set_mode(display);
170 dispc_enable_lcd_out(1);
172 r = panel->enable(display);
176 display->state = OMAP_DSS_DISPLAY_ACTIVE;
181 dispc_enable_lcd_out(0);
183 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
186 dss_clk_disable(DSS_CLK_FCK2);
189 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
193 static int dpi_display_resume(struct omap_display *display);
195 static void dpi_display_disable(struct omap_display *display)
197 if (display->state == OMAP_DSS_DISPLAY_DISABLED)
200 if (display->state == OMAP_DSS_DISPLAY_SUSPENDED)
201 dpi_display_resume(display);
203 display->panel->disable(display);
205 dispc_enable_lcd_out(0);
207 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
208 dss_select_clk_source(0, 0);
210 dss_clk_disable(DSS_CLK_FCK2);
213 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
215 display->state = OMAP_DSS_DISPLAY_DISABLED;
218 static int dpi_display_suspend(struct omap_display *display)
220 if (display->state != OMAP_DSS_DISPLAY_ACTIVE)
223 DSSDBG("dpi_display_suspend\n");
225 if (display->panel->suspend)
226 display->panel->suspend(display);
228 dispc_enable_lcd_out(0);
230 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
232 display->state = OMAP_DSS_DISPLAY_SUSPENDED;
237 static int dpi_display_resume(struct omap_display *display)
239 if (display->state != OMAP_DSS_DISPLAY_SUSPENDED)
242 DSSDBG("dpi_display_resume\n");
244 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
246 dispc_enable_lcd_out(1);
248 if (display->panel->resume)
249 display->panel->resume(display);
251 display->state = OMAP_DSS_DISPLAY_ACTIVE;
256 static void dpi_set_timings(struct omap_display *display,
257 struct omap_video_timings *timings)
259 DSSDBG("dpi_set_timings\n");
260 display->panel->timings = *timings;
261 if (display->state == OMAP_DSS_DISPLAY_ACTIVE) {
262 dpi_set_mode(display);
263 dispc_go(OMAP_DSS_CHANNEL_LCD);
267 static int dpi_check_timings(struct omap_display *display,
268 struct omap_video_timings *timings)
272 int lck_div, pck_div;
276 if (cpu_is_omap24xx() || omap_rev() < OMAP3430_REV_ES3_0) {
277 if (timings->hsw < 1 || timings->hsw > 64 ||
278 timings->hfp < 1 || timings->hfp > 256 ||
279 timings->hbp < 1 || timings->hbp > 256) {
283 if (timings->vsw < 1 || timings->vsw > 64 ||
284 timings->vfp > 255 || timings->vbp > 255) {
288 if (timings->hsw < 1 || timings->hsw > 256 ||
289 timings->hfp < 1 || timings->hfp > 4096 ||
290 timings->hbp < 1 || timings->hbp > 4096) {
294 if (timings->vsw < 1 || timings->vsw > 64 ||
295 timings->vfp > 4095 || timings->vbp > 4095) {
300 if (timings->pixel_clock == 0)
303 is_tft = (display->panel->config & OMAP_DSS_LCD_TFT) != 0;
305 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
307 struct dsi_clock_info cinfo;
308 r = dsi_pll_calc_pck(is_tft, timings->pixel_clock * 1000,
314 fck = cinfo.dsi1_pll_fclk;
315 lck_div = cinfo.lck_div;
316 pck_div = cinfo.pck_div;
320 struct dispc_clock_info cinfo;
321 r = dispc_calc_clock_div(is_tft, timings->pixel_clock * 1000,
328 lck_div = cinfo.lck_div;
329 pck_div = cinfo.pck_div;
333 pck = fck / lck_div / pck_div / 1000;
335 timings->pixel_clock = pck;
340 static void dpi_get_timings(struct omap_display *display,
341 struct omap_video_timings *timings)
343 *timings = display->panel->timings;
346 static int dpi_display_set_update_mode(struct omap_display *display,
347 enum omap_dss_update_mode mode)
349 if (mode == OMAP_DSS_UPDATE_MANUAL)
352 if (mode == OMAP_DSS_UPDATE_DISABLED) {
353 dispc_enable_lcd_out(0);
354 dpi.update_enabled = 0;
356 dispc_enable_lcd_out(1);
357 dpi.update_enabled = 1;
363 static enum omap_dss_update_mode dpi_display_get_update_mode(
364 struct omap_display *display)
366 return dpi.update_enabled ? OMAP_DSS_UPDATE_AUTO :
367 OMAP_DSS_UPDATE_DISABLED;
370 void dpi_init_display(struct omap_display *display)
372 DSSDBG("DPI init_display\n");
374 display->enable = dpi_display_enable;
375 display->disable = dpi_display_disable;
376 display->suspend = dpi_display_suspend;
377 display->resume = dpi_display_resume;
378 display->set_timings = dpi_set_timings;
379 display->check_timings = dpi_check_timings;
380 display->get_timings = dpi_get_timings;
381 display->set_update_mode = dpi_display_set_update_mode;
382 display->get_update_mode = dpi_display_get_update_mode;