DSS2: OMAP2/3 Display Subsystem driver
[pandora-kernel.git] / drivers / video / omap2 / dss / dpi.c
1 /*
2  * linux/drivers/video/omap2/dss/dpi.c
3  *
4  * Copyright (C) 2009 Nokia Corporation
5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6  *
7  * Some code and ideas taken from drivers/video/omap/ driver
8  * by Imre Deak.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms of the GNU General Public License version 2 as published by
12  * the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but WITHOUT
15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17  * more details.
18  *
19  * You should have received a copy of the GNU General Public License along with
20  * this program.  If not, see <http://www.gnu.org/licenses/>.
21  */
22
23 #include <linux/kernel.h>
24 #include <linux/clk.h>
25 #include <linux/delay.h>
26 #include <linux/errno.h>
27
28 #include <mach/board.h>
29 #include <mach/display.h>
30 #include <mach/cpu.h>
31
32 #include "dss.h"
33
34 static struct {
35         int update_enabled;
36 } dpi;
37
38 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
39 static int dpi_set_dsi_clk(bool is_tft, unsigned long pck_req,
40                 unsigned long *fck, int *lck_div, int *pck_div)
41 {
42         struct dsi_clock_info cinfo;
43         int r;
44
45         r = dsi_pll_calc_pck(is_tft, pck_req, &cinfo);
46         if (r)
47                 return r;
48
49         r = dsi_pll_program(&cinfo);
50         if (r)
51                 return r;
52
53         dss_select_clk_source(0, 1);
54
55         dispc_set_lcd_divisor(cinfo.lck_div, cinfo.pck_div);
56
57         *fck = cinfo.dsi1_pll_fclk;
58         *lck_div = cinfo.lck_div;
59         *pck_div = cinfo.pck_div;
60
61         return 0;
62 }
63 #else
64 static int dpi_set_dispc_clk(bool is_tft, unsigned long pck_req,
65                 unsigned long *fck, int *lck_div, int *pck_div)
66 {
67         struct dispc_clock_info cinfo;
68         int r;
69
70         r = dispc_calc_clock_div(is_tft, pck_req, &cinfo);
71         if (r)
72                 return r;
73
74         r = dispc_set_clock_div(&cinfo);
75         if (r)
76                 return r;
77
78         *fck = cinfo.fck;
79         *lck_div = cinfo.lck_div;
80         *pck_div = cinfo.pck_div;
81
82         return 0;
83 }
84 #endif
85
86 static int dpi_set_mode(struct omap_display *display)
87 {
88         struct omap_panel *panel = display->panel;
89         int lck_div, pck_div;
90         unsigned long fck;
91         unsigned long pck;
92         bool is_tft;
93         int r = 0;
94
95         dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
96
97         dispc_set_pol_freq(panel);
98
99         is_tft = (display->panel->config & OMAP_DSS_LCD_TFT) != 0;
100
101 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
102         r = dpi_set_dsi_clk(is_tft, panel->timings.pixel_clock * 1000,
103                         &fck, &lck_div, &pck_div);
104 #else
105         r = dpi_set_dispc_clk(is_tft, panel->timings.pixel_clock * 1000,
106                         &fck, &lck_div, &pck_div);
107 #endif
108         if (r)
109                 goto err0;
110
111         pck = fck / lck_div / pck_div / 1000;
112
113         if (pck != panel->timings.pixel_clock) {
114                 DSSWARN("Could not find exact pixel clock. "
115                                 "Requested %d kHz, got %lu kHz\n",
116                                 panel->timings.pixel_clock, pck);
117
118                 panel->timings.pixel_clock = pck;
119         }
120
121         dispc_set_lcd_timings(&panel->timings);
122
123 err0:
124         dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
125         return r;
126 }
127
128 static int dpi_basic_init(struct omap_display *display)
129 {
130         bool is_tft;
131
132         is_tft = (display->panel->config & OMAP_DSS_LCD_TFT) != 0;
133
134         dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_BYPASS);
135         dispc_set_lcd_display_type(is_tft ? OMAP_DSS_LCD_DISPLAY_TFT :
136                         OMAP_DSS_LCD_DISPLAY_STN);
137         dispc_set_tft_data_lines(display->hw_config.u.dpi.data_lines);
138
139         return 0;
140 }
141
142 static int dpi_display_enable(struct omap_display *display)
143 {
144         struct omap_panel *panel = display->panel;
145         int r;
146
147         if (display->state != OMAP_DSS_DISPLAY_DISABLED) {
148                 DSSERR("display already enabled\n");
149                 return -EINVAL;
150         }
151
152         dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
153
154         r = dpi_basic_init(display);
155         if (r)
156                 goto err0;
157
158 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
159         dss_clk_enable(DSS_CLK_FCK2);
160         r = dsi_pll_init(0, 1);
161         if (r)
162                 goto err1;
163 #endif
164         r = dpi_set_mode(display);
165         if (r)
166                 goto err2;
167
168         mdelay(2);
169
170         dispc_enable_lcd_out(1);
171
172         r = panel->enable(display);
173         if (r)
174                 goto err3;
175
176         display->state = OMAP_DSS_DISPLAY_ACTIVE;
177
178         return 0;
179
180 err3:
181         dispc_enable_lcd_out(0);
182 err2:
183 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
184         dsi_pll_uninit();
185 err1:
186         dss_clk_disable(DSS_CLK_FCK2);
187 #endif
188 err0:
189         dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
190         return r;
191 }
192
193 static int dpi_display_resume(struct omap_display *display);
194
195 static void dpi_display_disable(struct omap_display *display)
196 {
197         if (display->state == OMAP_DSS_DISPLAY_DISABLED)
198                 return;
199
200         if (display->state == OMAP_DSS_DISPLAY_SUSPENDED)
201                 dpi_display_resume(display);
202
203         display->panel->disable(display);
204
205         dispc_enable_lcd_out(0);
206
207 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
208         dss_select_clk_source(0, 0);
209         dsi_pll_uninit();
210         dss_clk_disable(DSS_CLK_FCK2);
211 #endif
212
213         dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
214
215         display->state = OMAP_DSS_DISPLAY_DISABLED;
216 }
217
218 static int dpi_display_suspend(struct omap_display *display)
219 {
220         if (display->state != OMAP_DSS_DISPLAY_ACTIVE)
221                 return -EINVAL;
222
223         DSSDBG("dpi_display_suspend\n");
224
225         if (display->panel->suspend)
226                 display->panel->suspend(display);
227
228         dispc_enable_lcd_out(0);
229
230         dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
231
232         display->state = OMAP_DSS_DISPLAY_SUSPENDED;
233
234         return 0;
235 }
236
237 static int dpi_display_resume(struct omap_display *display)
238 {
239         if (display->state != OMAP_DSS_DISPLAY_SUSPENDED)
240                 return -EINVAL;
241
242         DSSDBG("dpi_display_resume\n");
243
244         dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
245
246         dispc_enable_lcd_out(1);
247
248         if (display->panel->resume)
249                 display->panel->resume(display);
250
251         display->state = OMAP_DSS_DISPLAY_ACTIVE;
252
253         return 0;
254 }
255
256 static void dpi_set_timings(struct omap_display *display,
257                         struct omap_video_timings *timings)
258 {
259         DSSDBG("dpi_set_timings\n");
260         display->panel->timings = *timings;
261         if (display->state == OMAP_DSS_DISPLAY_ACTIVE) {
262                 dpi_set_mode(display);
263                 dispc_go(OMAP_DSS_CHANNEL_LCD);
264         }
265 }
266
267 static int dpi_check_timings(struct omap_display *display,
268                         struct omap_video_timings *timings)
269 {
270         bool is_tft;
271         int r;
272         int lck_div, pck_div;
273         unsigned long fck;
274         unsigned long pck;
275
276         if (cpu_is_omap24xx() || omap_rev() < OMAP3430_REV_ES3_0) {
277                 if (timings->hsw < 1 || timings->hsw > 64 ||
278                                 timings->hfp < 1 || timings->hfp > 256 ||
279                                 timings->hbp < 1 || timings->hbp > 256) {
280                         return -EINVAL;
281                 }
282
283                 if (timings->vsw < 1 || timings->vsw > 64 ||
284                                 timings->vfp > 255 || timings->vbp > 255) {
285                         return -EINVAL;
286                 }
287         } else {
288                 if (timings->hsw < 1 || timings->hsw > 256 ||
289                                 timings->hfp < 1 || timings->hfp > 4096 ||
290                                 timings->hbp < 1 || timings->hbp > 4096) {
291                         return -EINVAL;
292                 }
293
294                 if (timings->vsw < 1 || timings->vsw > 64 ||
295                                 timings->vfp > 4095 || timings->vbp > 4095) {
296                         return -EINVAL;
297                 }
298         }
299
300         if (timings->pixel_clock == 0)
301                 return -EINVAL;
302
303         is_tft = (display->panel->config & OMAP_DSS_LCD_TFT) != 0;
304
305 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
306         {
307                 struct dsi_clock_info cinfo;
308                 r = dsi_pll_calc_pck(is_tft, timings->pixel_clock * 1000,
309                                 &cinfo);
310
311                 if (r)
312                         return r;
313
314                 fck = cinfo.dsi1_pll_fclk;
315                 lck_div = cinfo.lck_div;
316                 pck_div = cinfo.pck_div;
317         }
318 #else
319         {
320                 struct dispc_clock_info cinfo;
321                 r = dispc_calc_clock_div(is_tft, timings->pixel_clock * 1000,
322                                 &cinfo);
323
324                 if (r)
325                         return r;
326
327                 fck = cinfo.fck;
328                 lck_div = cinfo.lck_div;
329                 pck_div = cinfo.pck_div;
330         }
331 #endif
332
333         pck = fck / lck_div / pck_div / 1000;
334
335         timings->pixel_clock = pck;
336
337         return 0;
338 }
339
340 static void dpi_get_timings(struct omap_display *display,
341                         struct omap_video_timings *timings)
342 {
343         *timings = display->panel->timings;
344 }
345
346 static int dpi_display_set_update_mode(struct omap_display *display,
347                 enum omap_dss_update_mode mode)
348 {
349         if (mode == OMAP_DSS_UPDATE_MANUAL)
350                 return -EINVAL;
351
352         if (mode == OMAP_DSS_UPDATE_DISABLED) {
353                 dispc_enable_lcd_out(0);
354                 dpi.update_enabled = 0;
355         } else {
356                 dispc_enable_lcd_out(1);
357                 dpi.update_enabled = 1;
358         }
359
360         return 0;
361 }
362
363 static enum omap_dss_update_mode dpi_display_get_update_mode(
364                 struct omap_display *display)
365 {
366         return dpi.update_enabled ? OMAP_DSS_UPDATE_AUTO :
367                 OMAP_DSS_UPDATE_DISABLED;
368 }
369
370 void dpi_init_display(struct omap_display *display)
371 {
372         DSSDBG("DPI init_display\n");
373
374         display->enable = dpi_display_enable;
375         display->disable = dpi_display_disable;
376         display->suspend = dpi_display_suspend;
377         display->resume = dpi_display_resume;
378         display->set_timings = dpi_set_timings;
379         display->check_timings = dpi_check_timings;
380         display->get_timings = dpi_get_timings;
381         display->set_update_mode = dpi_display_set_update_mode;
382         display->get_update_mode = dpi_display_get_update_mode;
383 }
384
385 int dpi_init(void)
386 {
387         return 0;
388 }
389
390 void dpi_exit(void)
391 {
392 }
393