drivers/video/atmel_lcdfb.c

   1 /*
   2  *  Driver for AT91/AT32 LCD Controller
   3  *
   4  *  Copyright (C) 2007 Atmel Corporation
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file COPYING in the main directory of this archive for
   8  * more details.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/dma-mapping.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/clk.h>
  16 #include <linux/fb.h>
  17 #include <linux/init.h>
  18 #include <linux/delay.h>
  19 #include <linux/backlight.h>
  20 #include <linux/gfp.h>
  21
  22 #include <mach/board.h>
  23 #include <mach/cpu.h>
  24 #include <mach/gpio.h>
  25
  26 #include <video/atmel_lcdc.h>
  27
  28 #define lcdc_readl(sinfo, reg)          __raw_readl((sinfo)->mmio+(reg))
  29 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
  30
  31 /* configurable parameters */
  32 #define ATMEL_LCDC_CVAL_DEFAULT         0xc8
  33 #define ATMEL_LCDC_DMA_BURST_LEN        8       /* words */
  34 #define ATMEL_LCDC_FIFO_SIZE            512     /* words */
  35
  36 #if defined(CONFIG_ARCH_AT91)
  37 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
  38                                          | FBINFO_PARTIAL_PAN_OK \
  39                                          | FBINFO_HWACCEL_YPAN)
  40
  41 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  42                                         struct fb_var_screeninfo *var)
  43 {
  44
  45 }
  46 #elif defined(CONFIG_AVR32)
  47 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
  48                                         | FBINFO_PARTIAL_PAN_OK \
  49                                         | FBINFO_HWACCEL_XPAN \
  50                                         | FBINFO_HWACCEL_YPAN)
  51
  52 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  53                                      struct fb_var_screeninfo *var)
  54 {
  55         u32 dma2dcfg;
  56         u32 pixeloff;
  57
  58         pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
  59
  60         dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
  61         dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
  62         lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
  63
  64         /* Update configuration */
  65         lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
  66                     lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
  67                     | ATMEL_LCDC_DMAUPDT);
  68 }
  69 #endif
  70
  71 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
  72                 | ATMEL_LCDC_POL_POSITIVE
  73                 | ATMEL_LCDC_ENA_PWMENABLE;
  74
  75 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
  76
  77 /* some bl->props field just changed */
  78 static int atmel_bl_update_status(struct backlight_device *bl)
  79 {
  80         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  81         int                     power = sinfo->bl_power;
  82         int                     brightness = bl->props.brightness;
  83
  84         /* REVISIT there may be a meaningful difference between
  85          * fb_blank and power ... there seem to be some cases
  86          * this doesn't handle correctly.
  87          */
  88         if (bl->props.fb_blank != sinfo->bl_power)
  89                 power = bl->props.fb_blank;
  90         else if (bl->props.power != sinfo->bl_power)
  91                 power = bl->props.power;
  92
  93         if (brightness < 0 && power == FB_BLANK_UNBLANK)
  94                 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  95         else if (power != FB_BLANK_UNBLANK)
  96                 brightness = 0;
  97
  98         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
  99         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
 100                         brightness ? contrast_ctr : 0);
 101
 102         bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
 103
 104         return 0;
 105 }
 106
 107 static int atmel_bl_get_brightness(struct backlight_device *bl)
 108 {
 109         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
 110
 111         return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
 112 }
 113
 114 static const struct backlight_ops atmel_lcdc_bl_ops = {
 115         .update_status = atmel_bl_update_status,
 116         .get_brightness = atmel_bl_get_brightness,
 117 };
 118
 119 static void init_backlight(struct atmel_lcdfb_info *sinfo)
 120 {
 121         struct backlight_properties props;
 122         struct backlight_device *bl;
 123
 124         sinfo->bl_power = FB_BLANK_UNBLANK;
 125
 126         if (sinfo->backlight)
 127                 return;
 128
 129         memset(&props, 0, sizeof(struct backlight_properties));
 130         props.max_brightness = 0xff;
 131         bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
 132                                        &atmel_lcdc_bl_ops, &props);
 133         if (IS_ERR(bl)) {
 134                 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
 135                                 PTR_ERR(bl));
 136                 return;
 137         }
 138         sinfo->backlight = bl;
 139
 140         bl->props.power = FB_BLANK_UNBLANK;
 141         bl->props.fb_blank = FB_BLANK_UNBLANK;
 142         bl->props.brightness = atmel_bl_get_brightness(bl);
 143 }
 144
 145 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
 146 {
 147         if (sinfo->backlight)
 148                 backlight_device_unregister(sinfo->backlight);
 149 }
 150
 151 #else
 152
 153 static void init_backlight(struct atmel_lcdfb_info *sinfo)
 154 {
 155         dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
 156 }
 157
 158 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
 159 {
 160 }
 161
 162 #endif
 163
 164 static void init_contrast(struct atmel_lcdfb_info *sinfo)
 165 {
 166         /* contrast pwm can be 'inverted' */
 167         if (sinfo->lcdcon_pol_negative)
 168                         contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
 169
 170         /* have some default contrast/backlight settings */
 171         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
 172         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
 173
 174         if (sinfo->lcdcon_is_backlight)
 175                 init_backlight(sinfo);
 176 }
 177
 178
 179 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
 180         .type           = FB_TYPE_PACKED_PIXELS,
 181         .visual         = FB_VISUAL_TRUECOLOR,
 182         .xpanstep       = 0,
 183         .ypanstep       = 1,
 184         .ywrapstep      = 0,
 185         .accel          = FB_ACCEL_NONE,
 186 };
 187
 188 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
 189 {
 190         unsigned long value;
 191
 192         if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
 193                 || cpu_is_at32ap7000()))
 194                 return xres;
 195
 196         value = xres;
 197         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
 198                 /* STN display */
 199                 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
 200                         value *= 3;
 201                 }
 202                 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
 203                    || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
 204                       && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
 205                         value = DIV_ROUND_UP(value, 4);
 206                 else
 207                         value = DIV_ROUND_UP(value, 8);
 208         }
 209
 210         return value;
 211 }
 212
 213 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
 214 {
 215         /* Turn off the LCD controller and the DMA controller */
 216         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
 217                         sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
 218
 219         /* Wait for the LCDC core to become idle */
 220         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
 221                 msleep(10);
 222
 223         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
 224 }
 225
 226 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
 227 {
 228         atmel_lcdfb_stop_nowait(sinfo);
 229
 230         /* Wait for DMA engine to become idle... */
 231         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
 232                 msleep(10);
 233 }
 234
 235 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
 236 {
 237         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
 238         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
 239                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
 240                 | ATMEL_LCDC_PWR);
 241 }
 242
 243 static void atmel_lcdfb_update_dma(struct fb_info *info,
 244                                struct fb_var_screeninfo *var)
 245 {
 246         struct atmel_lcdfb_info *sinfo = info->par;
 247         struct fb_fix_screeninfo *fix = &info->fix;
 248         unsigned long dma_addr;
 249
 250         dma_addr = (fix->smem_start + var->yoffset * fix->line_length
 251                     + var->xoffset * var->bits_per_pixel / 8);
 252
 253         dma_addr &= ~3UL;
 254
 255         /* Set framebuffer DMA base address and pixel offset */
 256         lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
 257
 258         atmel_lcdfb_update_dma2d(sinfo, var);
 259 }
 260
 261 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
 262 {
 263         struct fb_info *info = sinfo->info;
 264
 265         dma_free_writecombine(info->device, info->fix.smem_len,
 266                                 info->screen_base, info->fix.smem_start);
 267 }
 268
 269 /**
 270  *      atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
 271  *      @sinfo: the frame buffer to allocate memory for
 272  *
 273  *      This function is called only from the atmel_lcdfb_probe()
 274  *      so no locking by fb_info->mm_lock around smem_len setting is needed.
 275  */
 276 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
 277 {
 278         struct fb_info *info = sinfo->info;
 279         struct fb_var_screeninfo *var = &info->var;
 280         unsigned int smem_len;
 281
 282         smem_len = (var->xres_virtual * var->yres_virtual
 283                     * ((var->bits_per_pixel + 7) / 8));
 284         info->fix.smem_len = max(smem_len, sinfo->smem_len);
 285
 286         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
 287                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
 288
 289         if (!info->screen_base) {
 290                 return -ENOMEM;
 291         }
 292
 293         memset(info->screen_base, 0, info->fix.smem_len);
 294
 295         return 0;
 296 }
 297
 298 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
 299                                                      struct fb_info *info)
 300 {
 301         struct fb_videomode varfbmode;
 302         const struct fb_videomode *fbmode = NULL;
 303
 304         fb_var_to_videomode(&varfbmode, var);
 305         fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
 306         if (fbmode)
 307                 fb_videomode_to_var(var, fbmode);
 308         return fbmode;
 309 }
 310
 311
 312 /**
 313  *      atmel_lcdfb_check_var - Validates a var passed in.
 314  *      @var: frame buffer variable screen structure
 315  *      @info: frame buffer structure that represents a single frame buffer
 316  *
 317  *      Checks to see if the hardware supports the state requested by
 318  *      var passed in. This function does not alter the hardware
 319  *      state!!!  This means the data stored in struct fb_info and
 320  *      struct atmel_lcdfb_info do not change. This includes the var
 321  *      inside of struct fb_info.  Do NOT change these. This function
 322  *      can be called on its own if we intent to only test a mode and
 323  *      not actually set it. The stuff in modedb.c is a example of
 324  *      this. If the var passed in is slightly off by what the
 325  *      hardware can support then we alter the var PASSED in to what
 326  *      we can do. If the hardware doesn't support mode change a
 327  *      -EINVAL will be returned by the upper layers. You don't need
 328  *      to implement this function then. If you hardware doesn't
 329  *      support changing the resolution then this function is not
 330  *      needed. In this case the driver would just provide a var that
 331  *      represents the static state the screen is in.
 332  *
 333  *      Returns negative errno on error, or zero on success.
 334  */
 335 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
 336                              struct fb_info *info)
 337 {
 338         struct device *dev = info->device;
 339         struct atmel_lcdfb_info *sinfo = info->par;
 340         unsigned long clk_value_khz;
 341
 342         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
 343
 344         dev_dbg(dev, "%s:\n", __func__);
 345
 346         if (!(var->pixclock && var->bits_per_pixel)) {
 347                 /* choose a suitable mode if possible */
 348                 if (!atmel_lcdfb_choose_mode(var, info)) {
 349                         dev_err(dev, "needed value not specified\n");
 350                         return -EINVAL;
 351                 }
 352         }
 353
 354         dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
 355         dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
 356         dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
 357         dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
 358
 359         if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
 360                 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
 361                 return -EINVAL;
 362         }
 363
 364         /* Do not allow to have real resoulution larger than virtual */
 365         if (var->xres > var->xres_virtual)
 366                 var->xres_virtual = var->xres;
 367
 368         if (var->yres > var->yres_virtual)
 369                 var->yres_virtual = var->yres;
 370
 371         /* Force same alignment for each line */
 372         var->xres = (var->xres + 3) & ~3UL;
 373         var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
 374
 375         var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
 376         var->transp.msb_right = 0;
 377         var->transp.offset = var->transp.length = 0;
 378         var->xoffset = var->yoffset = 0;
 379
 380         if (info->fix.smem_len) {
 381                 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
 382                                          * ((var->bits_per_pixel + 7) / 8));
 383                 if (smem_len > info->fix.smem_len)
 384                         return -EINVAL;
 385         }
 386
 387         /* Saturate vertical and horizontal timings at maximum values */
 388         var->vsync_len = min_t(u32, var->vsync_len,
 389                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
 390         var->upper_margin = min_t(u32, var->upper_margin,
 391                         ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
 392         var->lower_margin = min_t(u32, var->lower_margin,
 393                         ATMEL_LCDC_VFP);
 394         var->right_margin = min_t(u32, var->right_margin,
 395                         (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
 396         var->hsync_len = min_t(u32, var->hsync_len,
 397                         (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
 398         var->left_margin = min_t(u32, var->left_margin,
 399                         ATMEL_LCDC_HBP + 1);
 400
 401         /* Some parameters can't be zero */
 402         var->vsync_len = max_t(u32, var->vsync_len, 1);
 403         var->right_margin = max_t(u32, var->right_margin, 1);
 404         var->hsync_len = max_t(u32, var->hsync_len, 1);
 405         var->left_margin = max_t(u32, var->left_margin, 1);
 406
 407         switch (var->bits_per_pixel) {
 408         case 1:
 409         case 2:
 410         case 4:
 411         case 8:
 412                 var->red.offset = var->green.offset = var->blue.offset = 0;
 413                 var->red.length = var->green.length = var->blue.length
 414                         = var->bits_per_pixel;
 415                 break;
 416         case 15:
 417         case 16:
 418                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
 419                         /* RGB:565 mode */
 420                         var->red.offset = 11;
 421                         var->blue.offset = 0;
 422                         var->green.length = 6;
 423                 } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
 424                         var->red.offset = 10;
 425                         var->blue.offset = 0;
 426                         var->green.length = 5;
 427                 } else {
 428                         /* BGR:555 mode */
 429                         var->red.offset = 0;
 430                         var->blue.offset = 10;
 431                         var->green.length = 5;
 432                 }
 433                 var->green.offset = 5;
 434                 var->red.length = var->blue.length = 5;
 435                 break;
 436         case 32:
 437                 var->transp.offset = 24;
 438                 var->transp.length = 8;
 439                 /* fall through */
 440         case 24:
 441                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
 442                         /* RGB:888 mode */
 443                         var->red.offset = 16;
 444                         var->blue.offset = 0;
 445                 } else {
 446                         /* BGR:888 mode */
 447                         var->red.offset = 0;
 448                         var->blue.offset = 16;
 449                 }
 450                 var->green.offset = 8;
 451                 var->red.length = var->green.length = var->blue.length = 8;
 452                 break;
 453         default:
 454                 dev_err(dev, "color depth %d not supported\n",
 455                                         var->bits_per_pixel);
 456                 return -EINVAL;
 457         }
 458
 459         return 0;
 460 }
 461
 462 /*
 463  * LCD reset sequence
 464  */
 465 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
 466 {
 467         might_sleep();
 468
 469         atmel_lcdfb_stop(sinfo);
 470         atmel_lcdfb_start(sinfo);
 471 }
 472
 473 /**
 474  *      atmel_lcdfb_set_par - Alters the hardware state.
 475  *      @info: frame buffer structure that represents a single frame buffer
 476  *
 477  *      Using the fb_var_screeninfo in fb_info we set the resolution
 478  *      of the this particular framebuffer. This function alters the
 479  *      par AND the fb_fix_screeninfo stored in fb_info. It doesn't
 480  *      not alter var in fb_info since we are using that data. This
 481  *      means we depend on the data in var inside fb_info to be
 482  *      supported by the hardware.  atmel_lcdfb_check_var is always called
 483  *      before atmel_lcdfb_set_par to ensure this.  Again if you can't
 484  *      change the resolution you don't need this function.
 485  *
 486  */
 487 static int atmel_lcdfb_set_par(struct fb_info *info)
 488 {
 489         struct atmel_lcdfb_info *sinfo = info->par;
 490         unsigned long hozval_linesz;
 491         unsigned long value;
 492         unsigned long clk_value_khz;
 493         unsigned long bits_per_line;
 494         unsigned long pix_factor = 2;
 495
 496         might_sleep();
 497
 498         dev_dbg(info->device, "%s:\n", __func__);
 499         dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
 500                  info->var.xres, info->var.yres,
 501                  info->var.xres_virtual, info->var.yres_virtual);
 502
 503         atmel_lcdfb_stop_nowait(sinfo);
 504
 505         if (info->var.bits_per_pixel == 1)
 506                 info->fix.visual = FB_VISUAL_MONO01;
 507         else if (info->var.bits_per_pixel <= 8)
 508                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 509         else
 510                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 511
 512         bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
 513         info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
 514
 515         /* Re-initialize the DMA engine... */
 516         dev_dbg(info->device, "  * update DMA engine\n");
 517         atmel_lcdfb_update_dma(info, &info->var);
 518
 519         /* ...set frame size and burst length = 8 words (?) */
 520         value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
 521         value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
 522         lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
 523
 524         /* Now, the LCDC core... */
 525
 526         /* Set pixel clock */
 527         if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
 528                 pix_factor = 1;
 529
 530         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
 531
 532         value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
 533
 534         if (value < pix_factor) {
 535                 dev_notice(info->device, "Bypassing pixel clock divider\n");
 536                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
 537         } else {
 538                 value = (value / pix_factor) - 1;
 539                 dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
 540                                 value);
 541                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
 542                                 value << ATMEL_LCDC_CLKVAL_OFFSET);
 543                 info->var.pixclock =
 544                         KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
 545                 dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
 546                                         PICOS2KHZ(info->var.pixclock));
 547         }
 548
 549
 550         /* Initialize control register 2 */
 551         value = sinfo->default_lcdcon2;
 552
 553         if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
 554                 value |= ATMEL_LCDC_INVLINE_INVERTED;
 555         if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
 556                 value |= ATMEL_LCDC_INVFRAME_INVERTED;
 557
 558         switch (info->var.bits_per_pixel) {
 559                 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
 560                 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
 561                 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
 562                 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
 563                 case 15: /* fall through */
 564                 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
 565                 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
 566                 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
 567                 default: BUG(); break;
 568         }
 569         dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
 570         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
 571
 572         /* Vertical timing */
 573         value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
 574         value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
 575         value |= info->var.lower_margin;
 576         dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
 577         lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
 578
 579         /* Horizontal timing */
 580         value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
 581         value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
 582         value |= (info->var.left_margin - 1);
 583         dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
 584         lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
 585
 586         /* Horizontal value (aka line size) */
 587         hozval_linesz = compute_hozval(info->var.xres,
 588                                         lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
 589
 590         /* Display size */
 591         value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
 592         value |= info->var.yres - 1;
 593         dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
 594         lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
 595
 596         /* FIFO Threshold: Use formula from data sheet */
 597         value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
 598         lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
 599
 600         /* Toggle LCD_MODE every frame */
 601         lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
 602
 603         /* Disable all interrupts */
 604         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
 605         /* Enable FIFO & DMA errors */
 606         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
 607
 608         /* ...wait for DMA engine to become idle... */
 609         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
 610                 msleep(10);
 611
 612         atmel_lcdfb_start(sinfo);
 613
 614         dev_dbg(info->device, "  * DONE\n");
 615
 616         return 0;
 617 }
 618
 619 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
 620 {
 621         chan &= 0xffff;
 622         chan >>= 16 - bf->length;
 623         return chan << bf->offset;
 624 }
 625
 626 /**
 627  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
 628  *      @regno: Which register in the CLUT we are programming
 629  *      @red: The red value which can be up to 16 bits wide
 630  *      @green: The green value which can be up to 16 bits wide
 631  *      @blue:  The blue value which can be up to 16 bits wide.
 632  *      @transp: If supported the alpha value which can be up to 16 bits wide.
 633  *      @info: frame buffer info structure
 634  *
 635  *      Set a single color register. The values supplied have a 16 bit
 636  *      magnitude which needs to be scaled in this function for the hardware.
 637  *      Things to take into consideration are how many color registers, if
 638  *      any, are supported with the current color visual. With truecolor mode
 639  *      no color palettes are supported. Here a psuedo palette is created
 640  *      which we store the value in pseudo_palette in struct fb_info. For
 641  *      pseudocolor mode we have a limited color palette. To deal with this
 642  *      we can program what color is displayed for a particular pixel value.
 643  *      DirectColor is similar in that we can program each color field. If
 644  *      we have a static colormap we don't need to implement this function.
 645  *
 646  *      Returns negative errno on error, or zero on success. In an
 647  *      ideal world, this would have been the case, but as it turns
 648  *      out, the other drivers return 1 on failure, so that's what
 649  *      we're going to do.
 650  */
 651 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
 652                              unsigned int green, unsigned int blue,
 653                              unsigned int transp, struct fb_info *info)
 654 {
 655         struct atmel_lcdfb_info *sinfo = info->par;
 656         unsigned int val;
 657         u32 *pal;
 658         int ret = 1;
 659
 660         if (info->var.grayscale)
 661                 red = green = blue = (19595 * red + 38470 * green
 662                                       + 7471 * blue) >> 16;
 663
 664         switch (info->fix.visual) {
 665         case FB_VISUAL_TRUECOLOR:
 666                 if (regno < 16) {
 667                         pal = info->pseudo_palette;
 668
 669                         val  = chan_to_field(red, &info->var.red);
 670                         val |= chan_to_field(green, &info->var.green);
 671                         val |= chan_to_field(blue, &info->var.blue);
 672
 673                         pal[regno] = val;
 674                         ret = 0;
 675                 }
 676                 break;
 677
 678         case FB_VISUAL_PSEUDOCOLOR:
 679                 if (regno < 256) {
 680                         val  = ((red   >> 11) & 0x001f);
 681                         val |= ((green >>  6) & 0x03e0);
 682                         val |= ((blue  >>  1) & 0x7c00);
 683
 684                         /*
 685                          * TODO: intensity bit. Maybe something like
 686                          *   ~(red[10] ^ green[10] ^ blue[10]) & 1
 687                          */
 688
 689                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
 690                         ret = 0;
 691                 }
 692                 break;
 693
 694         case FB_VISUAL_MONO01:
 695                 if (regno < 2) {
 696                         val = (regno == 0) ? 0x00 : 0x1F;
 697                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
 698                         ret = 0;
 699                 }
 700                 break;
 701
 702         }
 703
 704         return ret;
 705 }
 706
 707 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
 708                                struct fb_info *info)
 709 {
 710         dev_dbg(info->device, "%s\n", __func__);
 711
 712         atmel_lcdfb_update_dma(info, var);
 713
 714         return 0;
 715 }
 716
 717 static struct fb_ops atmel_lcdfb_ops = {
 718         .owner          = THIS_MODULE,
 719         .fb_check_var   = atmel_lcdfb_check_var,
 720         .fb_set_par     = atmel_lcdfb_set_par,
 721         .fb_setcolreg   = atmel_lcdfb_setcolreg,
 722         .fb_pan_display = atmel_lcdfb_pan_display,
 723         .fb_fillrect    = cfb_fillrect,
 724         .fb_copyarea    = cfb_copyarea,
 725         .fb_imageblit   = cfb_imageblit,
 726 };
 727
 728 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
 729 {
 730         struct fb_info *info = dev_id;
 731         struct atmel_lcdfb_info *sinfo = info->par;
 732         u32 status;
 733
 734         status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
 735         if (status & ATMEL_LCDC_UFLWI) {
 736                 dev_warn(info->device, "FIFO underflow %#x\n", status);
 737                 /* reset DMA and FIFO to avoid screen shifting */
 738                 schedule_work(&sinfo->task);
 739         }
 740         lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
 741         return IRQ_HANDLED;
 742 }
 743
 744 /*
 745  * LCD controller task (to reset the LCD)
 746  */
 747 static void atmel_lcdfb_task(struct work_struct *work)
 748 {
 749         struct atmel_lcdfb_info *sinfo =
 750                 container_of(work, struct atmel_lcdfb_info, task);
 751
 752         atmel_lcdfb_reset(sinfo);
 753 }
 754
 755 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
 756 {
 757         struct fb_info *info = sinfo->info;
 758         int ret = 0;
 759
 760         info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
 761
 762         dev_info(info->device,
 763                "%luKiB frame buffer at %08lx (mapped at %p)\n",
 764                (unsigned long)info->fix.smem_len / 1024,
 765                (unsigned long)info->fix.smem_start,
 766                info->screen_base);
 767
 768         /* Allocate colormap */
 769         ret = fb_alloc_cmap(&info->cmap, 256, 0);
 770         if (ret < 0)
 771                 dev_err(info->device, "Alloc color map failed\n");
 772
 773         return ret;
 774 }
 775
 776 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
 777 {
 778         if (sinfo->bus_clk)
 779                 clk_enable(sinfo->bus_clk);
 780         clk_enable(sinfo->lcdc_clk);
 781 }
 782
 783 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
 784 {
 785         if (sinfo->bus_clk)
 786                 clk_disable(sinfo->bus_clk);
 787         clk_disable(sinfo->lcdc_clk);
 788 }
 789
 790
 791 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
 792 {
 793         struct device *dev = &pdev->dev;
 794         struct fb_info *info;
 795         struct atmel_lcdfb_info *sinfo;
 796         struct atmel_lcdfb_info *pdata_sinfo;
 797         struct fb_videomode fbmode;
 798         struct resource *regs = NULL;
 799         struct resource *map = NULL;
 800         int ret;
 801
 802         dev_dbg(dev, "%s BEGIN\n", __func__);
 803
 804         ret = -ENOMEM;
 805         info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
 806         if (!info) {
 807                 dev_err(dev, "cannot allocate memory\n");
 808                 goto out;
 809         }
 810
 811         sinfo = info->par;
 812
 813         if (dev->platform_data) {
 814                 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
 815                 sinfo->default_bpp = pdata_sinfo->default_bpp;
 816                 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
 817                 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
 818                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
 819                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
 820                 sinfo->guard_time = pdata_sinfo->guard_time;
 821                 sinfo->smem_len = pdata_sinfo->smem_len;
 822                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
 823                 sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative;
 824                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
 825         } else {
 826                 dev_err(dev, "cannot get default configuration\n");
 827                 goto free_info;
 828         }
 829         sinfo->info = info;
 830         sinfo->pdev = pdev;
 831
 832         strcpy(info->fix.id, sinfo->pdev->name);
 833         info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
 834         info->pseudo_palette = sinfo->pseudo_palette;
 835         info->fbops = &atmel_lcdfb_ops;
 836
 837         memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
 838         info->fix = atmel_lcdfb_fix;
 839
 840         /* Enable LCDC Clocks */
 841         if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
 842          || cpu_is_at32ap7000()) {
 843                 sinfo->bus_clk = clk_get(dev, "hck1");
 844                 if (IS_ERR(sinfo->bus_clk)) {
 845                         ret = PTR_ERR(sinfo->bus_clk);
 846                         goto free_info;
 847                 }
 848         }
 849         sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
 850         if (IS_ERR(sinfo->lcdc_clk)) {
 851                 ret = PTR_ERR(sinfo->lcdc_clk);
 852                 goto put_bus_clk;
 853         }
 854         atmel_lcdfb_start_clock(sinfo);
 855
 856         ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
 857                         info->monspecs.modedb_len, info->monspecs.modedb,
 858                         sinfo->default_bpp);
 859         if (!ret) {
 860                 dev_err(dev, "no suitable video mode found\n");
 861                 goto stop_clk;
 862         }
 863
 864
 865         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 866         if (!regs) {
 867                 dev_err(dev, "resources unusable\n");
 868                 ret = -ENXIO;
 869                 goto stop_clk;
 870         }
 871
 872         sinfo->irq_base = platform_get_irq(pdev, 0);
 873         if (sinfo->irq_base < 0) {
 874                 dev_err(dev, "unable to get irq\n");
 875                 ret = sinfo->irq_base;
 876                 goto stop_clk;
 877         }
 878
 879         /* Initialize video memory */
 880         map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 881         if (map) {
 882                 /* use a pre-allocated memory buffer */
 883                 info->fix.smem_start = map->start;
 884                 info->fix.smem_len = map->end - map->start + 1;
 885                 if (!request_mem_region(info->fix.smem_start,
 886                                         info->fix.smem_len, pdev->name)) {
 887                         ret = -EBUSY;
 888                         goto stop_clk;
 889                 }
 890
 891                 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
 892                 if (!info->screen_base)
 893                         goto release_intmem;
 894
 895                 /*
 896                  * Don't clear the framebuffer -- someone may have set
 897                  * up a splash image.
 898                  */
 899         } else {
 900                 /* alocate memory buffer */
 901                 ret = atmel_lcdfb_alloc_video_memory(sinfo);
 902                 if (ret < 0) {
 903                         dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
 904                         goto stop_clk;
 905                 }
 906         }
 907
 908         /* LCDC registers */
 909         info->fix.mmio_start = regs->start;
 910         info->fix.mmio_len = regs->end - regs->start + 1;
 911
 912         if (!request_mem_region(info->fix.mmio_start,
 913                                 info->fix.mmio_len, pdev->name)) {
 914                 ret = -EBUSY;
 915                 goto free_fb;
 916         }
 917
 918         sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
 919         if (!sinfo->mmio) {
 920                 dev_err(dev, "cannot map LCDC registers\n");
 921                 goto release_mem;
 922         }
 923
 924         /* Initialize PWM for contrast or backlight ("off") */
 925         init_contrast(sinfo);
 926
 927         /* interrupt */
 928         ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
 929         if (ret) {
 930                 dev_err(dev, "request_irq failed: %d\n", ret);
 931                 goto unmap_mmio;
 932         }
 933
 934         /* Some operations on the LCDC might sleep and
 935          * require a preemptible task context */
 936         INIT_WORK(&sinfo->task, atmel_lcdfb_task);
 937
 938         ret = atmel_lcdfb_init_fbinfo(sinfo);
 939         if (ret < 0) {
 940                 dev_err(dev, "init fbinfo failed: %d\n", ret);
 941                 goto unregister_irqs;
 942         }
 943
 944         /*
 945          * This makes sure that our colour bitfield
 946          * descriptors are correctly initialised.
 947          */
 948         atmel_lcdfb_check_var(&info->var, info);
 949
 950         ret = fb_set_var(info, &info->var);
 951         if (ret) {
 952                 dev_warn(dev, "unable to set display parameters\n");
 953                 goto free_cmap;
 954         }
 955
 956         dev_set_drvdata(dev, info);
 957
 958         /*
 959          * Tell the world that we're ready to go
 960          */
 961         ret = register_framebuffer(info);
 962         if (ret < 0) {
 963                 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
 964                 goto reset_drvdata;
 965         }
 966
 967         /* add selected videomode to modelist */
 968         fb_var_to_videomode(&fbmode, &info->var);
 969         fb_add_videomode(&fbmode, &info->modelist);
 970
 971         /* Power up the LCDC screen */
 972         if (sinfo->atmel_lcdfb_power_control)
 973                 sinfo->atmel_lcdfb_power_control(1);
 974
 975         dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
 976                        info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
 977
 978         return 0;
 979
 980 reset_drvdata:
 981         dev_set_drvdata(dev, NULL);
 982 free_cmap:
 983         fb_dealloc_cmap(&info->cmap);
 984 unregister_irqs:
 985         cancel_work_sync(&sinfo->task);
 986         free_irq(sinfo->irq_base, info);
 987 unmap_mmio:
 988         exit_backlight(sinfo);
 989         iounmap(sinfo->mmio);
 990 release_mem:
 991         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
 992 free_fb:
 993         if (map)
 994                 iounmap(info->screen_base);
 995         else
 996                 atmel_lcdfb_free_video_memory(sinfo);
 997
 998 release_intmem:
 999         if (map)
1000                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1001 stop_clk:
1002         atmel_lcdfb_stop_clock(sinfo);
1003         clk_put(sinfo->lcdc_clk);
1004 put_bus_clk:
1005         if (sinfo->bus_clk)
1006                 clk_put(sinfo->bus_clk);
1007 free_info:
1008         framebuffer_release(info);
1009 out:
1010         dev_dbg(dev, "%s FAILED\n", __func__);
1011         return ret;
1012 }
1013
1014 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1015 {
1016         struct device *dev = &pdev->dev;
1017         struct fb_info *info = dev_get_drvdata(dev);
1018         struct atmel_lcdfb_info *sinfo;
1019
1020         if (!info || !info->par)
1021                 return 0;
1022         sinfo = info->par;
1023
1024         cancel_work_sync(&sinfo->task);
1025         exit_backlight(sinfo);
1026         if (sinfo->atmel_lcdfb_power_control)
1027                 sinfo->atmel_lcdfb_power_control(0);
1028         unregister_framebuffer(info);
1029         atmel_lcdfb_stop_clock(sinfo);
1030         clk_put(sinfo->lcdc_clk);
1031         if (sinfo->bus_clk)
1032                 clk_put(sinfo->bus_clk);
1033         fb_dealloc_cmap(&info->cmap);
1034         free_irq(sinfo->irq_base, info);
1035         iounmap(sinfo->mmio);
1036         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1037         if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1038                 iounmap(info->screen_base);
1039                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1040         } else {
1041                 atmel_lcdfb_free_video_memory(sinfo);
1042         }
1043
1044         dev_set_drvdata(dev, NULL);
1045         framebuffer_release(info);
1046
1047         return 0;
1048 }
1049
1050 #ifdef CONFIG_PM
1051
1052 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1053 {
1054         struct fb_info *info = platform_get_drvdata(pdev);
1055         struct atmel_lcdfb_info *sinfo = info->par;
1056
1057         /*
1058          * We don't want to handle interrupts while the clock is
1059          * stopped. It may take forever.
1060          */
1061         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1062
1063         sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1064         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1065         if (sinfo->atmel_lcdfb_power_control)
1066                 sinfo->atmel_lcdfb_power_control(0);
1067
1068         atmel_lcdfb_stop(sinfo);
1069         atmel_lcdfb_stop_clock(sinfo);
1070
1071         return 0;
1072 }
1073
1074 static int atmel_lcdfb_resume(struct platform_device *pdev)
1075 {
1076         struct fb_info *info = platform_get_drvdata(pdev);
1077         struct atmel_lcdfb_info *sinfo = info->par;
1078
1079         atmel_lcdfb_start_clock(sinfo);
1080         atmel_lcdfb_start(sinfo);
1081         if (sinfo->atmel_lcdfb_power_control)
1082                 sinfo->atmel_lcdfb_power_control(1);
1083         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1084
1085         /* Enable FIFO & DMA errors */
1086         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1087                         | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1088
1089         return 0;
1090 }
1091
1092 #else
1093 #define atmel_lcdfb_suspend     NULL
1094 #define atmel_lcdfb_resume      NULL
1095 #endif
1096
1097 static struct platform_driver atmel_lcdfb_driver = {
1098         .remove         = __exit_p(atmel_lcdfb_remove),
1099         .suspend        = atmel_lcdfb_suspend,
1100         .resume         = atmel_lcdfb_resume,
1101
1102         .driver         = {
1103                 .name   = "atmel_lcdfb",
1104                 .owner  = THIS_MODULE,
1105         },
1106 };
1107
1108 static int __init atmel_lcdfb_init(void)
1109 {
1110         return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1111 }
1112
1113 static void __exit atmel_lcdfb_exit(void)
1114 {
1115         platform_driver_unregister(&atmel_lcdfb_driver);
1116 }
1117
1118 module_init(atmel_lcdfb_init);
1119 module_exit(atmel_lcdfb_exit);
1120
1121 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1122 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1123 MODULE_LICENSE("GPL");