drivers/video/amba-clcd.c

   1 /*
   2  *  linux/drivers/video/amba-clcd.c
   3  *
   4  * Copyright (C) 2001 ARM Limited, by David A Rusling
   5  * Updated to 2.5, Deep Blue Solutions Ltd.
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file COPYING in the main directory of this archive
   9  * for more details.
  10  *
  11  *  ARM PrimeCell PL110 Color LCD Controller
  12  */
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/errno.h>
  16 #include <linux/string.h>
  17 #include <linux/slab.h>
  18 #include <linux/delay.h>
  19 #include <linux/mm.h>
  20 #include <linux/fb.h>
  21 #include <linux/init.h>
  22 #include <linux/ioport.h>
  23 #include <linux/list.h>
  24 #include <linux/amba/bus.h>
  25 #include <linux/amba/clcd.h>
  26 #include <linux/clk.h>
  27 #include <linux/hardirq.h>
  28
  29 #include <asm/sizes.h>
  30
  31 #define to_clcd(info)   container_of(info, struct clcd_fb, fb)
  32
  33 /* This is limited to 16 characters when displayed by X startup */
  34 static const char *clcd_name = "CLCD FB";
  35
  36 /*
  37  * Unfortunately, the enable/disable functions may be called either from
  38  * process or IRQ context, and we _need_ to delay.  This is _not_ good.
  39  */
  40 static inline void clcdfb_sleep(unsigned int ms)
  41 {
  42         if (in_atomic()) {
  43                 mdelay(ms);
  44         } else {
  45                 msleep(ms);
  46         }
  47 }
  48
  49 static inline void clcdfb_set_start(struct clcd_fb *fb)
  50 {
  51         unsigned long ustart = fb->fb.fix.smem_start;
  52         unsigned long lstart;
  53
  54         ustart += fb->fb.var.yoffset * fb->fb.fix.line_length;
  55         lstart = ustart + fb->fb.var.yres * fb->fb.fix.line_length / 2;
  56
  57         writel(ustart, fb->regs + CLCD_UBAS);
  58         writel(lstart, fb->regs + CLCD_LBAS);
  59 }
  60
  61 static void clcdfb_disable(struct clcd_fb *fb)
  62 {
  63         u32 val;
  64
  65         if (fb->board->disable)
  66                 fb->board->disable(fb);
  67
  68         val = readl(fb->regs + fb->off_cntl);
  69         if (val & CNTL_LCDPWR) {
  70                 val &= ~CNTL_LCDPWR;
  71                 writel(val, fb->regs + fb->off_cntl);
  72
  73                 clcdfb_sleep(20);
  74         }
  75         if (val & CNTL_LCDEN) {
  76                 val &= ~CNTL_LCDEN;
  77                 writel(val, fb->regs + fb->off_cntl);
  78         }
  79
  80         /*
  81          * Disable CLCD clock source.
  82          */
  83         clk_disable(fb->clk);
  84 }
  85
  86 static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
  87 {
  88         /*
  89          * Enable the CLCD clock source.
  90          */
  91         clk_enable(fb->clk);
  92
  93         /*
  94          * Bring up by first enabling..
  95          */
  96         cntl |= CNTL_LCDEN;
  97         writel(cntl, fb->regs + fb->off_cntl);
  98
  99         clcdfb_sleep(20);
 100
 101         /*
 102          * and now apply power.
 103          */
 104         cntl |= CNTL_LCDPWR;
 105         writel(cntl, fb->regs + fb->off_cntl);
 106
 107         /*
 108          * finally, enable the interface.
 109          */
 110         if (fb->board->enable)
 111                 fb->board->enable(fb);
 112 }
 113
 114 static int
 115 clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
 116 {
 117         int ret = 0;
 118
 119         memset(&var->transp, 0, sizeof(var->transp));
 120
 121         var->red.msb_right = 0;
 122         var->green.msb_right = 0;
 123         var->blue.msb_right = 0;
 124
 125         switch (var->bits_per_pixel) {
 126         case 1:
 127         case 2:
 128         case 4:
 129         case 8:
 130                 var->red.length         = var->bits_per_pixel;
 131                 var->red.offset         = 0;
 132                 var->green.length       = var->bits_per_pixel;
 133                 var->green.offset       = 0;
 134                 var->blue.length        = var->bits_per_pixel;
 135                 var->blue.offset        = 0;
 136                 break;
 137         case 16:
 138                 var->red.length = 5;
 139                 var->blue.length = 5;
 140                 /*
 141                  * Green length can be 5 or 6 depending whether
 142                  * we're operating in RGB555 or RGB565 mode.
 143                  */
 144                 if (var->green.length != 5 && var->green.length != 6)
 145                         var->green.length = 6;
 146                 break;
 147         case 32:
 148                 if (fb->panel->cntl & CNTL_LCDTFT) {
 149                         var->red.length         = 8;
 150                         var->green.length       = 8;
 151                         var->blue.length        = 8;
 152                         break;
 153                 }
 154         default:
 155                 ret = -EINVAL;
 156                 break;
 157         }
 158
 159         /*
 160          * >= 16bpp displays have separate colour component bitfields
 161          * encoded in the pixel data.  Calculate their position from
 162          * the bitfield length defined above.
 163          */
 164         if (ret == 0 && var->bits_per_pixel >= 16) {
 165                 if (fb->panel->cntl & CNTL_BGR) {
 166                         var->blue.offset = 0;
 167                         var->green.offset = var->blue.offset + var->blue.length;
 168                         var->red.offset = var->green.offset + var->green.length;
 169                 } else {
 170                         var->red.offset = 0;
 171                         var->green.offset = var->red.offset + var->red.length;
 172                         var->blue.offset = var->green.offset + var->green.length;
 173                 }
 174         }
 175
 176         return ret;
 177 }
 178
 179 static int clcdfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 180 {
 181         struct clcd_fb *fb = to_clcd(info);
 182         int ret = -EINVAL;
 183
 184         if (fb->board->check)
 185                 ret = fb->board->check(fb, var);
 186
 187         if (ret == 0 &&
 188             var->xres_virtual * var->bits_per_pixel / 8 *
 189             var->yres_virtual > fb->fb.fix.smem_len)
 190                 ret = -EINVAL;
 191
 192         if (ret == 0)
 193                 ret = clcdfb_set_bitfields(fb, var);
 194
 195         return ret;
 196 }
 197
 198 static int clcdfb_set_par(struct fb_info *info)
 199 {
 200         struct clcd_fb *fb = to_clcd(info);
 201         struct clcd_regs regs;
 202
 203         fb->fb.fix.line_length = fb->fb.var.xres_virtual *
 204                                  fb->fb.var.bits_per_pixel / 8;
 205
 206         if (fb->fb.var.bits_per_pixel <= 8)
 207                 fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
 208         else
 209                 fb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
 210
 211         fb->board->decode(fb, &regs);
 212
 213         clcdfb_disable(fb);
 214
 215         writel(regs.tim0, fb->regs + CLCD_TIM0);
 216         writel(regs.tim1, fb->regs + CLCD_TIM1);
 217         writel(regs.tim2, fb->regs + CLCD_TIM2);
 218         writel(regs.tim3, fb->regs + CLCD_TIM3);
 219
 220         clcdfb_set_start(fb);
 221
 222         clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000);
 223
 224         fb->clcd_cntl = regs.cntl;
 225
 226         clcdfb_enable(fb, regs.cntl);
 227
 228 #ifdef DEBUG
 229         printk(KERN_INFO
 230                "CLCD: Registers set to\n"
 231                "  %08x %08x %08x %08x\n"
 232                "  %08x %08x %08x %08x\n",
 233                 readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
 234                 readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
 235                 readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
 236                 readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
 237 #endif
 238
 239         return 0;
 240 }
 241
 242 static inline u32 convert_bitfield(int val, struct fb_bitfield *bf)
 243 {
 244         unsigned int mask = (1 << bf->length) - 1;
 245
 246         return (val >> (16 - bf->length) & mask) << bf->offset;
 247 }
 248
 249 /*
 250  *  Set a single color register. The values supplied have a 16 bit
 251  *  magnitude.  Return != 0 for invalid regno.
 252  */
 253 static int
 254 clcdfb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
 255                  unsigned int blue, unsigned int transp, struct fb_info *info)
 256 {
 257         struct clcd_fb *fb = to_clcd(info);
 258
 259         if (regno < 16)
 260                 fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) |
 261                                   convert_bitfield(blue, &fb->fb.var.blue) |
 262                                   convert_bitfield(green, &fb->fb.var.green) |
 263                                   convert_bitfield(red, &fb->fb.var.red);
 264
 265         if (fb->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
 266                 int hw_reg = CLCD_PALETTE + ((regno * 2) & ~3);
 267                 u32 val, mask, newval;
 268
 269                 newval  = (red >> 11)  & 0x001f;
 270                 newval |= (green >> 6) & 0x03e0;
 271                 newval |= (blue >> 1)  & 0x7c00;
 272
 273                 /*
 274                  * 3.2.11: if we're configured for big endian
 275                  * byte order, the palette entries are swapped.
 276                  */
 277                 if (fb->clcd_cntl & CNTL_BEBO)
 278                         regno ^= 1;
 279
 280                 if (regno & 1) {
 281                         newval <<= 16;
 282                         mask = 0x0000ffff;
 283                 } else {
 284                         mask = 0xffff0000;
 285                 }
 286
 287                 val = readl(fb->regs + hw_reg) & mask;
 288                 writel(val | newval, fb->regs + hw_reg);
 289         }
 290
 291         return regno > 255;
 292 }
 293
 294 /*
 295  *  Blank the screen if blank_mode != 0, else unblank. If blank == NULL
 296  *  then the caller blanks by setting the CLUT (Color Look Up Table) to all
 297  *  black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
 298  *  to e.g. a video mode which doesn't support it. Implements VESA suspend
 299  *  and powerdown modes on hardware that supports disabling hsync/vsync:
 300  *    blank_mode == 2: suspend vsync
 301  *    blank_mode == 3: suspend hsync
 302  *    blank_mode == 4: powerdown
 303  */
 304 static int clcdfb_blank(int blank_mode, struct fb_info *info)
 305 {
 306         struct clcd_fb *fb = to_clcd(info);
 307
 308         if (blank_mode != 0) {
 309                 clcdfb_disable(fb);
 310         } else {
 311                 clcdfb_enable(fb, fb->clcd_cntl);
 312         }
 313         return 0;
 314 }
 315
 316 static int clcdfb_mmap(struct fb_info *info,
 317                        struct vm_area_struct *vma)
 318 {
 319         struct clcd_fb *fb = to_clcd(info);
 320         unsigned long len, off = vma->vm_pgoff << PAGE_SHIFT;
 321         int ret = -EINVAL;
 322
 323         len = info->fix.smem_len;
 324
 325         if (off <= len && vma->vm_end - vma->vm_start <= len - off &&
 326             fb->board->mmap)
 327                 ret = fb->board->mmap(fb, vma);
 328
 329         return ret;
 330 }
 331
 332 static struct fb_ops clcdfb_ops = {
 333         .owner          = THIS_MODULE,
 334         .fb_check_var   = clcdfb_check_var,
 335         .fb_set_par     = clcdfb_set_par,
 336         .fb_setcolreg   = clcdfb_setcolreg,
 337         .fb_blank       = clcdfb_blank,
 338         .fb_fillrect    = cfb_fillrect,
 339         .fb_copyarea    = cfb_copyarea,
 340         .fb_imageblit   = cfb_imageblit,
 341         .fb_mmap        = clcdfb_mmap,
 342 };
 343
 344 static int clcdfb_register(struct clcd_fb *fb)
 345 {
 346         int ret;
 347
 348         /*
 349          * ARM PL111 always has IENB at 0x1c; it's only PL110
 350          * which is reversed on some platforms.
 351          */
 352         if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
 353                 fb->off_ienb = CLCD_PL111_IENB;
 354                 fb->off_cntl = CLCD_PL111_CNTL;
 355         } else {
 356 #ifdef CONFIG_ARCH_VERSATILE
 357                 fb->off_ienb = CLCD_PL111_IENB;
 358                 fb->off_cntl = CLCD_PL111_CNTL;
 359 #else
 360                 fb->off_ienb = CLCD_PL110_IENB;
 361                 fb->off_cntl = CLCD_PL110_CNTL;
 362 #endif
 363         }
 364
 365         fb->clk = clk_get(&fb->dev->dev, NULL);
 366         if (IS_ERR(fb->clk)) {
 367                 ret = PTR_ERR(fb->clk);
 368                 goto out;
 369         }
 370
 371         fb->fb.fix.mmio_start   = fb->dev->res.start;
 372         fb->fb.fix.mmio_len     = resource_size(&fb->dev->res);
 373
 374         fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
 375         if (!fb->regs) {
 376                 printk(KERN_ERR "CLCD: unable to remap registers\n");
 377                 ret = -ENOMEM;
 378                 goto free_clk;
 379         }
 380
 381         fb->fb.fbops            = &clcdfb_ops;
 382         fb->fb.flags            = FBINFO_FLAG_DEFAULT;
 383         fb->fb.pseudo_palette   = fb->cmap;
 384
 385         strncpy(fb->fb.fix.id, clcd_name, sizeof(fb->fb.fix.id));
 386         fb->fb.fix.type         = FB_TYPE_PACKED_PIXELS;
 387         fb->fb.fix.type_aux     = 0;
 388         fb->fb.fix.xpanstep     = 0;
 389         fb->fb.fix.ypanstep     = 0;
 390         fb->fb.fix.ywrapstep    = 0;
 391         fb->fb.fix.accel        = FB_ACCEL_NONE;
 392
 393         fb->fb.var.xres         = fb->panel->mode.xres;
 394         fb->fb.var.yres         = fb->panel->mode.yres;
 395         fb->fb.var.xres_virtual = fb->panel->mode.xres;
 396         fb->fb.var.yres_virtual = fb->panel->mode.yres;
 397         fb->fb.var.bits_per_pixel = fb->panel->bpp;
 398         fb->fb.var.grayscale    = fb->panel->grayscale;
 399         fb->fb.var.pixclock     = fb->panel->mode.pixclock;
 400         fb->fb.var.left_margin  = fb->panel->mode.left_margin;
 401         fb->fb.var.right_margin = fb->panel->mode.right_margin;
 402         fb->fb.var.upper_margin = fb->panel->mode.upper_margin;
 403         fb->fb.var.lower_margin = fb->panel->mode.lower_margin;
 404         fb->fb.var.hsync_len    = fb->panel->mode.hsync_len;
 405         fb->fb.var.vsync_len    = fb->panel->mode.vsync_len;
 406         fb->fb.var.sync         = fb->panel->mode.sync;
 407         fb->fb.var.vmode        = fb->panel->mode.vmode;
 408         fb->fb.var.activate     = FB_ACTIVATE_NOW;
 409         fb->fb.var.nonstd       = 0;
 410         fb->fb.var.height       = fb->panel->height;
 411         fb->fb.var.width        = fb->panel->width;
 412         fb->fb.var.accel_flags  = 0;
 413
 414         fb->fb.monspecs.hfmin   = 0;
 415         fb->fb.monspecs.hfmax   = 100000;
 416         fb->fb.monspecs.vfmin   = 0;
 417         fb->fb.monspecs.vfmax   = 400;
 418         fb->fb.monspecs.dclkmin = 1000000;
 419         fb->fb.monspecs.dclkmax = 100000000;
 420
 421         /*
 422          * Make sure that the bitfields are set appropriately.
 423          */
 424         clcdfb_set_bitfields(fb, &fb->fb.var);
 425
 426         /*
 427          * Allocate colourmap.
 428          */
 429         ret = fb_alloc_cmap(&fb->fb.cmap, 256, 0);
 430         if (ret)
 431                 goto unmap;
 432
 433         /*
 434          * Ensure interrupts are disabled.
 435          */
 436         writel(0, fb->regs + fb->off_ienb);
 437
 438         fb_set_var(&fb->fb, &fb->fb.var);
 439
 440         printk(KERN_INFO "CLCD: %s hardware, %s display\n",
 441                fb->board->name, fb->panel->mode.name);
 442
 443         ret = register_framebuffer(&fb->fb);
 444         if (ret == 0)
 445                 goto out;
 446
 447         printk(KERN_ERR "CLCD: cannot register framebuffer (%d)\n", ret);
 448
 449         fb_dealloc_cmap(&fb->fb.cmap);
 450  unmap:
 451         iounmap(fb->regs);
 452  free_clk:
 453         clk_put(fb->clk);
 454  out:
 455         return ret;
 456 }
 457
 458 static int clcdfb_probe(struct amba_device *dev, struct amba_id *id)
 459 {
 460         struct clcd_board *board = dev->dev.platform_data;
 461         struct clcd_fb *fb;
 462         int ret;
 463
 464         if (!board)
 465                 return -EINVAL;
 466
 467         ret = amba_request_regions(dev, NULL);
 468         if (ret) {
 469                 printk(KERN_ERR "CLCD: unable to reserve regs region\n");
 470                 goto out;
 471         }
 472
 473         fb = kzalloc(sizeof(struct clcd_fb), GFP_KERNEL);
 474         if (!fb) {
 475                 printk(KERN_INFO "CLCD: could not allocate new clcd_fb struct\n");
 476                 ret = -ENOMEM;
 477                 goto free_region;
 478         }
 479
 480         fb->dev = dev;
 481         fb->board = board;
 482
 483         ret = fb->board->setup(fb);
 484         if (ret)
 485                 goto free_fb;
 486
 487         ret = clcdfb_register(fb);
 488         if (ret == 0) {
 489                 amba_set_drvdata(dev, fb);
 490                 goto out;
 491         }
 492
 493         fb->board->remove(fb);
 494  free_fb:
 495         kfree(fb);
 496  free_region:
 497         amba_release_regions(dev);
 498  out:
 499         return ret;
 500 }
 501
 502 static int clcdfb_remove(struct amba_device *dev)
 503 {
 504         struct clcd_fb *fb = amba_get_drvdata(dev);
 505
 506         amba_set_drvdata(dev, NULL);
 507
 508         clcdfb_disable(fb);
 509         unregister_framebuffer(&fb->fb);
 510         if (fb->fb.cmap.len)
 511                 fb_dealloc_cmap(&fb->fb.cmap);
 512         iounmap(fb->regs);
 513         clk_put(fb->clk);
 514
 515         fb->board->remove(fb);
 516
 517         kfree(fb);
 518
 519         amba_release_regions(dev);
 520
 521         return 0;
 522 }
 523
 524 static struct amba_id clcdfb_id_table[] = {
 525         {
 526                 .id     = 0x00041110,
 527                 .mask   = 0x000ffffe,
 528         },
 529         { 0, 0 },
 530 };
 531
 532 static struct amba_driver clcd_driver = {
 533         .drv            = {
 534                 .name   = "clcd-pl11x",
 535         },
 536         .probe          = clcdfb_probe,
 537         .remove         = clcdfb_remove,
 538         .id_table       = clcdfb_id_table,
 539 };
 540
 541 static int __init amba_clcdfb_init(void)
 542 {
 543         if (fb_get_options("ambafb", NULL))
 544                 return -ENODEV;
 545
 546         return amba_driver_register(&clcd_driver);
 547 }
 548
 549 module_init(amba_clcdfb_init);
 550
 551 static void __exit amba_clcdfb_exit(void)
 552 {
 553         amba_driver_unregister(&clcd_driver);
 554 }
 555
 556 module_exit(amba_clcdfb_exit);
 557
 558 MODULE_DESCRIPTION("ARM PrimeCell PL110 CLCD core driver");
 559 MODULE_LICENSE("GPL");