Merge branch 'stable-3.2' into pandora-3.2
[pandora-kernel.git] / drivers / usb / otg / twl4030-usb.c
1 /*
2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
3  *
4  * Copyright (C) 2004-2007 Texas Instruments
5  * Copyright (C) 2008 Nokia Corporation
6  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  *
22  * Current status:
23  *      - HS USB ULPI mode works.
24  *      - 3-pin mode support may be added in future.
25  */
26
27 #include <linux/module.h>
28 #include <linux/init.h>
29 #include <linux/interrupt.h>
30 #include <linux/platform_device.h>
31 #include <linux/spinlock.h>
32 #include <linux/workqueue.h>
33 #include <linux/io.h>
34 #include <linux/delay.h>
35 #include <linux/usb/otg.h>
36 #include <linux/usb/ulpi.h>
37 #include <linux/i2c/twl.h>
38 #include <linux/regulator/consumer.h>
39 #include <linux/err.h>
40 #include <linux/notifier.h>
41 #include <linux/slab.h>
42
43 /* Register defines */
44
45 #define MCPC_CTRL                       0x30
46 #define MCPC_CTRL_RTSOL                 (1 << 7)
47 #define MCPC_CTRL_EXTSWR                (1 << 6)
48 #define MCPC_CTRL_EXTSWC                (1 << 5)
49 #define MCPC_CTRL_VOICESW               (1 << 4)
50 #define MCPC_CTRL_OUT64K                (1 << 3)
51 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
52 #define MCPC_CTRL_HS_UART               (1 << 0)
53
54 #define MCPC_IO_CTRL                    0x33
55 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
56 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
57 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
58 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
59 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
60 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
61
62 #define MCPC_CTRL2                      0x36
63 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
64
65 #define OTHER_FUNC_CTRL                 0x80
66 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
67 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
68
69 #define OTHER_IFC_CTRL                  0x83
70 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
71 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
72 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
73 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
74 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
75 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
76
77 #define OTHER_INT_EN_RISE               0x86
78 #define OTHER_INT_EN_FALL               0x89
79 #define OTHER_INT_STS                   0x8C
80 #define OTHER_INT_LATCH                 0x8D
81 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
82 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
83 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
84 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
85 #define OTHER_INT_MANU                  (1 << 1)
86 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
87
88 #define ID_STATUS                       0x96
89 #define ID_RES_FLOAT                    (1 << 4)
90 #define ID_RES_440K                     (1 << 3)
91 #define ID_RES_200K                     (1 << 2)
92 #define ID_RES_102K                     (1 << 1)
93 #define ID_RES_GND                      (1 << 0)
94
95 #define POWER_CTRL                      0xAC
96 #define POWER_CTRL_OTG_ENAB             (1 << 5)
97
98 #define OTHER_IFC_CTRL2                 0xAF
99 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
100 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
101 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
102 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
103 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
104 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
105
106 #define REG_CTRL_EN                     0xB2
107 #define REG_CTRL_ERROR                  0xB5
108 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
109
110 #define OTHER_FUNC_CTRL2                0xB8
111 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
112
113 /* following registers do not have separate _clr and _set registers */
114 #define VBUS_DEBOUNCE                   0xC0
115 #define ID_DEBOUNCE                     0xC1
116 #define VBAT_TIMER                      0xD3
117 #define PHY_PWR_CTRL                    0xFD
118 #define PHY_PWR_PHYPWD                  (1 << 0)
119 #define PHY_CLK_CTRL                    0xFE
120 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
121 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
122 #define REQ_PHY_DPLL_CLK                (1 << 0)
123 #define PHY_CLK_CTRL_STS                0xFF
124 #define PHY_DPLL_CLK                    (1 << 0)
125
126 /* In module TWL4030_MODULE_PM_MASTER */
127 #define STS_HW_CONDITIONS               0x0F
128
129 /* In module TWL4030_MODULE_PM_RECEIVER */
130 #define VUSB_DEDICATED1                 0x7D
131 #define VUSB_DEDICATED2                 0x7E
132 #define VUSB1V5_DEV_GRP                 0x71
133 #define VUSB1V5_TYPE                    0x72
134 #define VUSB1V5_REMAP                   0x73
135 #define VUSB1V8_DEV_GRP                 0x74
136 #define VUSB1V8_TYPE                    0x75
137 #define VUSB1V8_REMAP                   0x76
138 #define VUSB3V1_DEV_GRP                 0x77
139 #define VUSB3V1_TYPE                    0x78
140 #define VUSB3V1_REMAP                   0x79
141
142 /* In module TWL4030_MODULE_INTBR */
143 #define PMBR1                           0x0D
144 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
145
146 struct twl4030_usb {
147         struct otg_transceiver  otg;
148         struct device           *dev;
149
150         /* TWL4030 internal USB regulator supplies */
151         struct regulator        *usb1v5;
152         struct regulator        *usb1v8;
153         struct regulator        *usb3v1;
154
155         /* for vbus reporting with irqs disabled */
156         spinlock_t              lock;
157
158         /* pin configuration */
159         enum twl4030_usb_mode   usb_mode;
160
161         int                     irq;
162         u8                      linkstat;
163         bool                    vbus_supplied;
164         u8                      asleep;
165         bool                    irq_enabled;
166
167         struct delayed_work     id_workaround_work;
168 };
169
170 /* internal define on top of container_of */
171 #define xceiv_to_twl(x)         container_of((x), struct twl4030_usb, otg)
172
173 /*-------------------------------------------------------------------------*/
174
175 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
176                 u8 module, u8 data, u8 address)
177 {
178         u8 check;
179
180         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
181             (twl_i2c_read_u8(module, &check, address) >= 0) &&
182                                                 (check == data))
183                 return 0;
184         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
185                         1, module, address, check, data);
186
187         /* Failed once: Try again */
188         if ((twl_i2c_write_u8(module, data, address) >= 0) &&
189             (twl_i2c_read_u8(module, &check, address) >= 0) &&
190                                                 (check == data))
191                 return 0;
192         dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
193                         2, module, address, check, data);
194
195         /* Failed again: Return error */
196         return -EBUSY;
197 }
198
199 #define twl4030_usb_write_verify(twl, address, data)    \
200         twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
201
202 static inline int twl4030_usb_write(struct twl4030_usb *twl,
203                 u8 address, u8 data)
204 {
205         int ret = 0;
206
207         ret = twl_i2c_write_u8(TWL4030_MODULE_USB, data, address);
208         if (ret < 0)
209                 dev_dbg(twl->dev,
210                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
211         return ret;
212 }
213
214 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
215 {
216         u8 data;
217         int ret = 0;
218
219         ret = twl_i2c_read_u8(module, &data, address);
220         if (ret >= 0)
221                 ret = data;
222         else
223                 dev_dbg(twl->dev,
224                         "TWL4030:readb[0x%x,0x%x] Error %d\n",
225                                         module, address, ret);
226
227         return ret;
228 }
229
230 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
231 {
232         return twl4030_readb(twl, TWL4030_MODULE_USB, address);
233 }
234
235 /*-------------------------------------------------------------------------*/
236
237 static inline int
238 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
239 {
240         return twl4030_usb_write(twl, ULPI_SET(reg), bits);
241 }
242
243 static inline int
244 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
245 {
246         return twl4030_usb_write(twl, ULPI_CLR(reg), bits);
247 }
248
249 /*-------------------------------------------------------------------------*/
250
251 static bool twl4030_is_driving_vbus(struct twl4030_usb *twl)
252 {
253         int ret;
254
255         ret = twl4030_usb_read(twl, PHY_CLK_CTRL_STS);
256         if (ret < 0 || !(ret & PHY_DPLL_CLK))
257                 /*
258                  * if clocks are off, registers are not updated,
259                  * but we can assume we don't drive VBUS in this case
260                  */
261                 return false;
262
263         ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
264         if (ret < 0)
265                 return false;
266
267         return (ret & (ULPI_OTG_DRVVBUS | ULPI_OTG_CHRGVBUS)) ? true : false;
268 }
269
270 static enum usb_xceiv_events twl4030_usb_linkstat(struct twl4030_usb *twl)
271 {
272         int     status;
273         int     linkstat = USB_EVENT_NONE;
274         bool    driving_vbus = false;
275
276         twl->vbus_supplied = false;
277
278         /*
279          * For ID/VBUS sensing, see manual section 15.4.8 ...
280          * except when using only battery backup power, two
281          * comparators produce VBUS_PRES and ID_PRES signals,
282          * which don't match docs elsewhere.  But ... BIT(7)
283          * and BIT(2) of STS_HW_CONDITIONS, respectively, do
284          * seem to match up.  If either is true the USB_PRES
285          * signal is active, the OTG module is activated, and
286          * its interrupt may be raised (may wake the system).
287          */
288         msleep(50);
289         status = twl4030_readb(twl, TWL4030_MODULE_PM_MASTER,
290                         STS_HW_CONDITIONS);
291         if (status < 0)
292                 dev_err(twl->dev, "USB link status err %d\n", status);
293         else if (status & (BIT(7) | BIT(2))) {
294                 if (status & BIT(7)) {
295                         driving_vbus = twl4030_is_driving_vbus(twl);
296                         if (driving_vbus)
297                                 status &= ~BIT(7);
298                 }
299
300                 if (status & BIT(2))
301                         linkstat = USB_EVENT_ID;
302                 else if (status & BIT(7)) {
303                         linkstat = USB_EVENT_VBUS;
304                         twl->vbus_supplied = true;
305                 }
306         }
307
308         dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x; link %d, driving_vbus %d\n",
309                         status, linkstat, driving_vbus);
310
311         if (twl->otg.last_event == linkstat)
312                 return linkstat;
313
314         twl->otg.last_event = linkstat;
315
316         /* REVISIT this assumes host and peripheral controllers
317          * are registered, and that both are active...
318          */
319
320         spin_lock_irq(&twl->lock);
321         twl->linkstat = linkstat;
322         if (linkstat == USB_EVENT_ID) {
323                 twl->otg.default_a = true;
324                 twl->otg.state = OTG_STATE_A_IDLE;
325         } else {
326                 twl->otg.default_a = false;
327                 twl->otg.state = OTG_STATE_B_IDLE;
328         }
329         spin_unlock_irq(&twl->lock);
330
331         return linkstat;
332 }
333
334 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
335 {
336         twl->usb_mode = mode;
337
338         switch (mode) {
339         case T2_USB_MODE_ULPI:
340                 twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL,
341                                         ULPI_IFC_CTRL_CARKITMODE);
342                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
343                 twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL,
344                                         ULPI_FUNC_CTRL_XCVRSEL_MASK |
345                                         ULPI_FUNC_CTRL_OPMODE_MASK);
346                 break;
347         case -1:
348                 /* FIXME: power on defaults */
349                 break;
350         default:
351                 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
352                                 mode);
353                 break;
354         };
355 }
356
357 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
358 {
359         unsigned long timeout;
360         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
361
362         if (val >= 0) {
363                 if (on) {
364                         /* enable DPLL to access PHY registers over I2C */
365                         val |= REQ_PHY_DPLL_CLK;
366                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
367                                                 (u8)val) < 0);
368
369                         timeout = jiffies + HZ;
370                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
371                                                         PHY_DPLL_CLK)
372                                 && time_before(jiffies, timeout))
373                                         udelay(10);
374                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
375                                                         PHY_DPLL_CLK))
376                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
377                                                 "PHY DPLL clock\n");
378                 } else {
379                         /* let ULPI control the DPLL clock */
380                         val &= ~REQ_PHY_DPLL_CLK;
381                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
382                                                 (u8)val) < 0);
383                 }
384         }
385 }
386
387 static void __twl4030_phy_power(struct twl4030_usb *twl, int on)
388 {
389         u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
390
391         if (on)
392                 pwr &= ~PHY_PWR_PHYPWD;
393         else
394                 pwr |= PHY_PWR_PHYPWD;
395
396         WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
397 }
398
399 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
400 {
401         if (on) {
402                 regulator_enable(twl->usb3v1);
403                 regulator_enable(twl->usb1v8);
404                 /*
405                  * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
406                  * in twl4030) resets the VUSB_DEDICATED2 register. This reset
407                  * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
408                  * SLEEP. We work around this by clearing the bit after usv3v1
409                  * is re-activated. This ensures that VUSB3V1 is really active.
410                  */
411                 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0,
412                                                         VUSB_DEDICATED2);
413                 regulator_enable(twl->usb1v5);
414                 __twl4030_phy_power(twl, 1);
415                 twl4030_usb_write(twl, PHY_CLK_CTRL,
416                                   twl4030_usb_read(twl, PHY_CLK_CTRL) |
417                                         (PHY_CLK_CTRL_CLOCKGATING_EN |
418                                                 PHY_CLK_CTRL_CLK32K_EN));
419         } else {
420                 __twl4030_phy_power(twl, 0);
421                 regulator_disable(twl->usb1v5);
422                 regulator_disable(twl->usb1v8);
423                 regulator_disable(twl->usb3v1);
424         }
425 }
426
427 static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
428 {
429         if (twl->asleep)
430                 return;
431
432         twl4030_phy_power(twl, 0);
433         twl->asleep = 1;
434         dev_dbg(twl->dev, "%s\n", __func__);
435 }
436
437 static void __twl4030_phy_resume(struct twl4030_usb *twl)
438 {
439         twl4030_phy_power(twl, 1);
440         twl4030_i2c_access(twl, 1);
441         twl4030_usb_set_mode(twl, twl->usb_mode);
442         if (twl->usb_mode == T2_USB_MODE_ULPI)
443                 twl4030_i2c_access(twl, 0);
444 }
445
446 static void twl4030_phy_resume(struct twl4030_usb *twl)
447 {
448         if (!twl->asleep)
449                 return;
450         __twl4030_phy_resume(twl);
451         twl->asleep = 0;
452
453         /*
454          * XXX When VBUS gets driven after musb goes to A mode,
455          * ID_PRES related interrupts no longer arrive, why?
456          * Register itself is updated fine though, so we must poll.
457          */
458         if (twl->otg.last_event == USB_EVENT_ID) {
459                 cancel_delayed_work(&twl->id_workaround_work);
460                 schedule_delayed_work(&twl->id_workaround_work, HZ);
461         }
462 }
463
464 static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
465 {
466         /* Enable writing to power configuration registers */
467         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
468                         TWL4030_PM_MASTER_KEY_CFG1,
469                         TWL4030_PM_MASTER_PROTECT_KEY);
470
471         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
472                         TWL4030_PM_MASTER_KEY_CFG2,
473                         TWL4030_PM_MASTER_PROTECT_KEY);
474
475         /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/
476         /*twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/
477
478         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
479         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
480
481         /* Initialize 3.1V regulator */
482         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
483
484         twl->usb3v1 = regulator_get(twl->dev, "usb3v1");
485         if (IS_ERR(twl->usb3v1))
486                 return -ENODEV;
487
488         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
489
490         /* Initialize 1.5V regulator */
491         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
492
493         twl->usb1v5 = regulator_get(twl->dev, "usb1v5");
494         if (IS_ERR(twl->usb1v5))
495                 goto fail1;
496
497         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
498
499         /* Initialize 1.8V regulator */
500         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
501
502         twl->usb1v8 = regulator_get(twl->dev, "usb1v8");
503         if (IS_ERR(twl->usb1v8))
504                 goto fail2;
505
506         twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
507
508         /* disable access to power configuration registers */
509         twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0,
510                         TWL4030_PM_MASTER_PROTECT_KEY);
511
512         return 0;
513
514 fail2:
515         regulator_put(twl->usb1v5);
516         twl->usb1v5 = NULL;
517 fail1:
518         regulator_put(twl->usb3v1);
519         twl->usb3v1 = NULL;
520         return -ENODEV;
521 }
522
523 static ssize_t twl4030_usb_vbus_show(struct device *dev,
524                 struct device_attribute *attr, char *buf)
525 {
526         struct twl4030_usb *twl = dev_get_drvdata(dev);
527         unsigned long flags;
528         int ret = -EINVAL;
529
530         spin_lock_irqsave(&twl->lock, flags);
531         ret = sprintf(buf, "%s\n",
532                         twl->vbus_supplied ? "on" : "off");
533         spin_unlock_irqrestore(&twl->lock, flags);
534
535         return ret;
536 }
537 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
538
539 static ssize_t twl4030_usb_id_show(struct device *dev,
540                 struct device_attribute *attr, char *buf)
541 {
542         int ret;
543         int n = 0;
544         struct twl4030_usb *twl = dev_get_drvdata(dev);
545         twl4030_i2c_access(twl, 1);
546         ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
547         if ((ret < 0) || (!(ret & ULPI_OTG_ID_PULLUP))) {
548                 /*
549                  * enable ID pullup so that the id pin state can be measured,
550                  * seems to be disabled sometimes for some reasons
551                  */
552                 dev_dbg(dev, "ULPI_OTG_ID_PULLUP not set (%x)\n", ret);
553                 twl4030_usb_set_bits(twl, ULPI_OTG_CTRL, ULPI_OTG_ID_PULLUP);
554                 mdelay(100);
555         }
556         ret = twl4030_usb_read(twl, ID_STATUS);
557         twl4030_i2c_access(twl, 0);
558         if (ret < 0)
559                 return ret;
560         if (ret & ID_RES_FLOAT)
561                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "floating");
562         else if (ret & ID_RES_440K)
563                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "440k");
564         else if (ret & ID_RES_200K)
565                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "200k");
566         else if (ret & ID_RES_102K)
567                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "102k");
568         else if (ret & ID_RES_GND)
569                 n = scnprintf(buf, PAGE_SIZE, "%s\n", "GND");
570         else
571                 n = scnprintf(buf, PAGE_SIZE, "unknown: id=0x%x\n", ret);
572         return n;
573 }
574 static DEVICE_ATTR(id, 0444, twl4030_usb_id_show, NULL);
575
576 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
577 {
578         struct twl4030_usb *twl = _twl;
579         int status_old = twl->otg.last_event;
580         int status;
581
582         status = twl4030_usb_linkstat(twl);
583         if (status >= 0) {
584                 /* FIXME add a set_power() method so that B-devices can
585                  * configure the charger appropriately.  It's not always
586                  * correct to consume VBUS power, and how much current to
587                  * consume is a function of the USB configuration chosen
588                  * by the host.
589                  *
590                  * REVISIT usb_gadget_vbus_connect(...) as needed, ditto
591                  * its disconnect() sibling, when changing to/from the
592                  * USB_LINK_VBUS state.  musb_hdrc won't care until it
593                  * starts to handle softconnect right.
594                  */
595                 if (status != status_old)
596                         atomic_notifier_call_chain(&twl->otg.notifier, status,
597                                 twl->otg.gadget);
598         }
599         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
600
601         return IRQ_HANDLED;
602 }
603
604 static void twl4030_id_workaround_work(struct work_struct *work)
605 {
606         struct twl4030_usb *twl = container_of(work, struct twl4030_usb,
607                 id_workaround_work.work);
608         int status_old = twl->otg.last_event;
609         int status;
610
611         status = twl4030_usb_linkstat(twl);
612         if (status != status_old) {
613                 dev_dbg(twl->dev, "handle missing status change: %d->%d\n",
614                         status_old, status);
615                 twl->otg.last_event = status_old;
616                 twl4030_usb_irq(0, twl);
617         }
618
619         /* don't schedule during sleep - irq works right then */
620         if (status == USB_EVENT_ID && !twl->asleep) {
621                 cancel_delayed_work(&twl->id_workaround_work);
622                 schedule_delayed_work(&twl->id_workaround_work, HZ);
623         }
624 }
625
626 static void twl4030_usb_phy_init(struct twl4030_usb *twl)
627 {
628         int status;
629
630         /*
631          * Start in sleep state, we'll get otg.set_suspend(false) call
632          * and power up when musb runtime_pm enable kicks in.
633          */
634         __twl4030_phy_power(twl, 0);
635         twl->asleep = 1;
636
637         status = twl4030_usb_linkstat(twl);
638         if (status >= 0 && status != USB_EVENT_NONE)
639                 atomic_notifier_call_chain(&twl->otg.notifier, status,
640                         twl->otg.gadget);
641
642         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
643 }
644
645 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
646 {
647         struct twl4030_usb *twl = xceiv_to_twl(x);
648
649         if (suspend)
650                 twl4030_phy_suspend(twl, 1);
651         else
652                 twl4030_phy_resume(twl);
653
654         return 0;
655 }
656
657 static int twl4030_set_peripheral(struct otg_transceiver *x,
658                 struct usb_gadget *gadget)
659 {
660         struct twl4030_usb *twl;
661
662         if (!x)
663                 return -ENODEV;
664
665         twl = xceiv_to_twl(x);
666         twl->otg.gadget = gadget;
667         if (!gadget)
668                 twl->otg.state = OTG_STATE_UNDEFINED;
669
670         return 0;
671 }
672
673 static int twl4030_set_host(struct otg_transceiver *x, struct usb_bus *host)
674 {
675         struct twl4030_usb *twl;
676
677         if (!x)
678                 return -ENODEV;
679
680         twl = xceiv_to_twl(x);
681         twl->otg.host = host;
682         if (!host)
683                 twl->otg.state = OTG_STATE_UNDEFINED;
684
685         return 0;
686 }
687
688 static int __devinit twl4030_usb_probe(struct platform_device *pdev)
689 {
690         struct twl4030_usb_data *pdata = pdev->dev.platform_data;
691         struct twl4030_usb      *twl;
692         int                     status, err;
693
694         if (!pdata) {
695                 dev_dbg(&pdev->dev, "platform_data not available\n");
696                 return -EINVAL;
697         }
698
699         twl = kzalloc(sizeof *twl, GFP_KERNEL);
700         if (!twl)
701                 return -ENOMEM;
702
703         twl->dev                = &pdev->dev;
704         twl->irq                = platform_get_irq(pdev, 0);
705         twl->otg.dev            = twl->dev;
706         twl->otg.label          = "twl4030";
707         twl->otg.set_host       = twl4030_set_host;
708         twl->otg.set_peripheral = twl4030_set_peripheral;
709         twl->otg.set_suspend    = twl4030_set_suspend;
710         twl->usb_mode           = pdata->usb_mode;
711         twl->vbus_supplied      = false;
712         twl->asleep = 1;
713
714         /* init spinlock for workqueue */
715         spin_lock_init(&twl->lock);
716
717         INIT_DELAYED_WORK(&twl->id_workaround_work, twl4030_id_workaround_work);
718
719         err = twl4030_usb_ldo_init(twl);
720         if (err) {
721                 dev_err(&pdev->dev, "ldo init failed\n");
722                 kfree(twl);
723                 return err;
724         }
725         otg_set_transceiver(&twl->otg);
726
727         platform_set_drvdata(pdev, twl);
728         if (device_create_file(&pdev->dev, &dev_attr_vbus))
729                 dev_warn(&pdev->dev, "could not create sysfs file\n");
730         if (device_create_file(&pdev->dev, &dev_attr_id))
731                 dev_warn(&pdev->dev, "could not create sysfs file\n");
732
733         ATOMIC_INIT_NOTIFIER_HEAD(&twl->otg.notifier);
734
735         /* Our job is to use irqs and status from the power module
736          * to keep the transceiver disabled when nothing's connected.
737          *
738          * FIXME we actually shouldn't start enabling it until the
739          * USB controller drivers have said they're ready, by calling
740          * set_host() and/or set_peripheral() ... OTG_capable boards
741          * need both handles, otherwise just one suffices.
742          */
743         twl->irq_enabled = true;
744         status = request_threaded_irq(twl->irq, NULL, twl4030_usb_irq,
745                         IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
746                         "twl4030_usb", twl);
747         if (status < 0) {
748                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
749                         twl->irq, status);
750                 kfree(twl);
751                 return status;
752         }
753
754         twl4030_usb_phy_init(twl);
755
756         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
757         return 0;
758 }
759
760 static int __exit twl4030_usb_remove(struct platform_device *pdev)
761 {
762         struct twl4030_usb *twl = platform_get_drvdata(pdev);
763         int val;
764
765         cancel_delayed_work(&twl->id_workaround_work);
766         free_irq(twl->irq, twl);
767         device_remove_file(twl->dev, &dev_attr_id);
768         device_remove_file(twl->dev, &dev_attr_vbus);
769
770         /* set transceiver mode to power on defaults */
771         twl4030_usb_set_mode(twl, -1);
772
773         /* autogate 60MHz ULPI clock,
774          * clear dpll clock request for i2c access,
775          * disable 32KHz
776          */
777         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
778         if (val >= 0) {
779                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
780                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
781                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
782         }
783
784         /* disable complete OTG block */
785         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
786
787         if (!twl->asleep)
788                 twl4030_phy_power(twl, 0);
789         regulator_put(twl->usb1v5);
790         regulator_put(twl->usb1v8);
791         regulator_put(twl->usb3v1);
792
793         kfree(twl);
794
795         return 0;
796 }
797
798 static struct platform_driver twl4030_usb_driver = {
799         .probe          = twl4030_usb_probe,
800         .remove         = __exit_p(twl4030_usb_remove),
801         .driver         = {
802                 .name   = "twl4030_usb",
803                 .owner  = THIS_MODULE,
804         },
805 };
806
807 static int __init twl4030_usb_init(void)
808 {
809         return platform_driver_register(&twl4030_usb_driver);
810 }
811 subsys_initcall(twl4030_usb_init);
812
813 static void __exit twl4030_usb_exit(void)
814 {
815         platform_driver_unregister(&twl4030_usb_driver);
816 }
817 module_exit(twl4030_usb_exit);
818
819 MODULE_ALIAS("platform:twl4030_usb");
820 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
821 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
822 MODULE_LICENSE("GPL");