2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55 u32 mask, u32 done, int usec)
60 result = xhci_readl(xhci, ptr);
61 if (result == ~(u32)0) /* card removed */
73 * Disable interrupts and begin the xHCI halting process.
75 void xhci_quiesce(struct xhci_hcd *xhci)
82 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
86 cmd = xhci_readl(xhci, &xhci->op_regs->command);
88 xhci_writel(xhci, cmd, &xhci->op_regs->command);
92 * Force HC into halt state.
94 * Disable any IRQs and clear the run/stop bit.
95 * HC will complete any current and actively pipelined transactions, and
96 * should halt within 16 ms of the run/stop bit being cleared.
97 * Read HC Halted bit in the status register to see when the HC is finished.
99 int xhci_halt(struct xhci_hcd *xhci)
102 xhci_dbg(xhci, "// Halt the HC\n");
105 ret = handshake(xhci, &xhci->op_regs->status,
106 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
108 xhci->xhc_state |= XHCI_STATE_HALTED;
113 * Set the run bit and wait for the host to be running.
115 static int xhci_start(struct xhci_hcd *xhci)
120 temp = xhci_readl(xhci, &xhci->op_regs->command);
122 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
124 xhci_writel(xhci, temp, &xhci->op_regs->command);
127 * Wait for the HCHalted Status bit to be 0 to indicate the host is
130 ret = handshake(xhci, &xhci->op_regs->status,
131 STS_HALT, 0, XHCI_MAX_HALT_USEC);
132 if (ret == -ETIMEDOUT)
133 xhci_err(xhci, "Host took too long to start, "
134 "waited %u microseconds.\n",
137 xhci->xhc_state &= ~XHCI_STATE_HALTED;
144 * This resets pipelines, timers, counters, state machines, etc.
145 * Transactions will be terminated immediately, and operational registers
146 * will be set to their defaults.
148 int xhci_reset(struct xhci_hcd *xhci)
154 state = xhci_readl(xhci, &xhci->op_regs->status);
155 if ((state & STS_HALT) == 0) {
156 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
160 xhci_dbg(xhci, "// Reset the HC\n");
161 command = xhci_readl(xhci, &xhci->op_regs->command);
162 command |= CMD_RESET;
163 xhci_writel(xhci, command, &xhci->op_regs->command);
165 ret = handshake(xhci, &xhci->op_regs->command,
166 CMD_RESET, 0, 10 * 1000 * 1000);
170 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
172 * xHCI cannot write to any doorbells or operational registers other
173 * than status until the "Controller Not Ready" flag is cleared.
175 return handshake(xhci, &xhci->op_regs->status,
176 STS_CNR, 0, 10 * 1000 * 1000);
180 static int xhci_free_msi(struct xhci_hcd *xhci)
184 if (!xhci->msix_entries)
187 for (i = 0; i < xhci->msix_count; i++)
188 if (xhci->msix_entries[i].vector)
189 free_irq(xhci->msix_entries[i].vector,
197 static int xhci_setup_msi(struct xhci_hcd *xhci)
200 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
202 ret = pci_enable_msi(pdev);
204 xhci_err(xhci, "failed to allocate MSI entry\n");
208 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
209 0, "xhci_hcd", xhci_to_hcd(xhci));
211 xhci_err(xhci, "disable MSI interrupt\n");
212 pci_disable_msi(pdev);
220 * free all IRQs request
222 static void xhci_free_irq(struct xhci_hcd *xhci)
224 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
227 /* return if using legacy interrupt */
228 if (xhci_to_hcd(xhci)->irq >= 0)
231 ret = xhci_free_msi(xhci);
235 free_irq(pdev->irq, xhci_to_hcd(xhci));
243 static int xhci_setup_msix(struct xhci_hcd *xhci)
246 struct usb_hcd *hcd = xhci_to_hcd(xhci);
247 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
250 * calculate number of msi-x vectors supported.
251 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
252 * with max number of interrupters based on the xhci HCSPARAMS1.
253 * - num_online_cpus: maximum msi-x vectors per CPUs core.
254 * Add additional 1 vector to ensure always available interrupt.
256 xhci->msix_count = min(num_online_cpus() + 1,
257 HCS_MAX_INTRS(xhci->hcs_params1));
260 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
262 if (!xhci->msix_entries) {
263 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
267 for (i = 0; i < xhci->msix_count; i++) {
268 xhci->msix_entries[i].entry = i;
269 xhci->msix_entries[i].vector = 0;
272 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
274 xhci_err(xhci, "Failed to enable MSI-X\n");
278 for (i = 0; i < xhci->msix_count; i++) {
279 ret = request_irq(xhci->msix_entries[i].vector,
280 (irq_handler_t)xhci_msi_irq,
281 0, "xhci_hcd", xhci_to_hcd(xhci));
286 hcd->msix_enabled = 1;
290 xhci_err(xhci, "disable MSI-X interrupt\n");
292 pci_disable_msix(pdev);
294 kfree(xhci->msix_entries);
295 xhci->msix_entries = NULL;
299 /* Free any IRQs and disable MSI-X */
300 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
302 struct usb_hcd *hcd = xhci_to_hcd(xhci);
303 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
307 if (xhci->msix_entries) {
308 pci_disable_msix(pdev);
309 kfree(xhci->msix_entries);
310 xhci->msix_entries = NULL;
312 pci_disable_msi(pdev);
315 hcd->msix_enabled = 0;
319 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
323 if (xhci->msix_entries) {
324 for (i = 0; i < xhci->msix_count; i++)
325 synchronize_irq(xhci->msix_entries[i].vector);
329 static int xhci_try_enable_msi(struct usb_hcd *hcd)
331 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
332 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
336 * Some Fresco Logic host controllers advertise MSI, but fail to
337 * generate interrupts. Don't even try to enable MSI.
339 if (xhci->quirks & XHCI_BROKEN_MSI)
342 /* unregister the legacy interrupt */
344 free_irq(hcd->irq, hcd);
347 ret = xhci_setup_msix(xhci);
349 /* fall back to msi*/
350 ret = xhci_setup_msi(xhci);
353 /* hcd->irq is -1, we have MSI */
357 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
361 /* fall back to legacy interrupt*/
362 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
363 hcd->irq_descr, hcd);
365 xhci_err(xhci, "request interrupt %d failed\n",
369 hcd->irq = pdev->irq;
375 static int xhci_try_enable_msi(struct usb_hcd *hcd)
380 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
384 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
391 * Initialize memory for HCD and xHC (one-time init).
393 * Program the PAGESIZE register, initialize the device context array, create
394 * device contexts (?), set up a command ring segment (or two?), create event
395 * ring (one for now).
397 int xhci_init(struct usb_hcd *hcd)
399 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
402 xhci_dbg(xhci, "xhci_init\n");
403 spin_lock_init(&xhci->lock);
404 if (xhci->hci_version == 0x95 && link_quirk) {
405 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
406 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
408 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
410 retval = xhci_mem_init(xhci, GFP_KERNEL);
411 xhci_dbg(xhci, "Finished xhci_init\n");
416 /*-------------------------------------------------------------------------*/
419 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
420 static void xhci_event_ring_work(unsigned long arg)
425 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
428 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
430 spin_lock_irqsave(&xhci->lock, flags);
431 temp = xhci_readl(xhci, &xhci->op_regs->status);
432 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
433 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
434 (xhci->xhc_state & XHCI_STATE_HALTED)) {
435 xhci_dbg(xhci, "HW died, polling stopped.\n");
436 spin_unlock_irqrestore(&xhci->lock, flags);
440 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
441 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
442 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
443 xhci->error_bitmask = 0;
444 xhci_dbg(xhci, "Event ring:\n");
445 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
446 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
447 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
448 temp_64 &= ~ERST_PTR_MASK;
449 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
450 xhci_dbg(xhci, "Command ring:\n");
451 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
452 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
453 xhci_dbg_cmd_ptrs(xhci);
454 for (i = 0; i < MAX_HC_SLOTS; ++i) {
457 for (j = 0; j < 31; ++j) {
458 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
461 spin_unlock_irqrestore(&xhci->lock, flags);
464 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
466 xhci_dbg(xhci, "Quit polling the event ring.\n");
470 static int xhci_run_finished(struct xhci_hcd *xhci)
472 if (xhci_start(xhci)) {
476 xhci->shared_hcd->state = HC_STATE_RUNNING;
478 if (xhci->quirks & XHCI_NEC_HOST)
479 xhci_ring_cmd_db(xhci);
481 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
486 * Start the HC after it was halted.
488 * This function is called by the USB core when the HC driver is added.
489 * Its opposite is xhci_stop().
491 * xhci_init() must be called once before this function can be called.
492 * Reset the HC, enable device slot contexts, program DCBAAP, and
493 * set command ring pointer and event ring pointer.
495 * Setup MSI-X vectors and enable interrupts.
497 int xhci_run(struct usb_hcd *hcd)
502 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
504 /* Start the xHCI host controller running only after the USB 2.0 roothub
508 hcd->uses_new_polling = 1;
509 if (!usb_hcd_is_primary_hcd(hcd))
510 return xhci_run_finished(xhci);
512 xhci_dbg(xhci, "xhci_run\n");
514 ret = xhci_try_enable_msi(hcd);
518 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
519 init_timer(&xhci->event_ring_timer);
520 xhci->event_ring_timer.data = (unsigned long) xhci;
521 xhci->event_ring_timer.function = xhci_event_ring_work;
522 /* Poll the event ring */
523 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
525 xhci_dbg(xhci, "Setting event ring polling timer\n");
526 add_timer(&xhci->event_ring_timer);
529 xhci_dbg(xhci, "Command ring memory map follows:\n");
530 xhci_debug_ring(xhci, xhci->cmd_ring);
531 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
532 xhci_dbg_cmd_ptrs(xhci);
534 xhci_dbg(xhci, "ERST memory map follows:\n");
535 xhci_dbg_erst(xhci, &xhci->erst);
536 xhci_dbg(xhci, "Event ring:\n");
537 xhci_debug_ring(xhci, xhci->event_ring);
538 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
539 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
540 temp_64 &= ~ERST_PTR_MASK;
541 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
543 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
544 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
545 temp &= ~ER_IRQ_INTERVAL_MASK;
547 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
549 /* Set the HCD state before we enable the irqs */
550 temp = xhci_readl(xhci, &xhci->op_regs->command);
552 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
554 xhci_writel(xhci, temp, &xhci->op_regs->command);
556 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
557 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
558 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
559 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
560 &xhci->ir_set->irq_pending);
561 xhci_print_ir_set(xhci, 0);
563 if (xhci->quirks & XHCI_NEC_HOST)
564 xhci_queue_vendor_command(xhci, 0, 0, 0,
565 TRB_TYPE(TRB_NEC_GET_FW));
567 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
571 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
573 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
575 spin_lock_irq(&xhci->lock);
578 /* The shared_hcd is going to be deallocated shortly (the USB core only
579 * calls this function when allocation fails in usb_add_hcd(), or
580 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
582 xhci->shared_hcd = NULL;
583 spin_unlock_irq(&xhci->lock);
589 * This function is called by the USB core when the HC driver is removed.
590 * Its opposite is xhci_run().
592 * Disable device contexts, disable IRQs, and quiesce the HC.
593 * Reset the HC, finish any completed transactions, and cleanup memory.
595 void xhci_stop(struct usb_hcd *hcd)
598 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
600 if (!usb_hcd_is_primary_hcd(hcd)) {
601 xhci_only_stop_hcd(xhci->shared_hcd);
605 spin_lock_irq(&xhci->lock);
606 /* Make sure the xHC is halted for a USB3 roothub
607 * (xhci_stop() could be called as part of failed init).
611 spin_unlock_irq(&xhci->lock);
613 xhci_cleanup_msix(xhci);
615 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
616 /* Tell the event ring poll function not to reschedule */
618 del_timer_sync(&xhci->event_ring_timer);
621 if (xhci->quirks & XHCI_AMD_PLL_FIX)
624 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
625 temp = xhci_readl(xhci, &xhci->op_regs->status);
626 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
627 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
628 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
629 &xhci->ir_set->irq_pending);
630 xhci_print_ir_set(xhci, 0);
632 xhci_dbg(xhci, "cleaning up memory\n");
633 xhci_mem_cleanup(xhci);
634 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
635 xhci_readl(xhci, &xhci->op_regs->status));
639 * Shutdown HC (not bus-specific)
641 * This is called when the machine is rebooting or halting. We assume that the
642 * machine will be powered off, and the HC's internal state will be reset.
643 * Don't bother to free memory.
645 * This will only ever be called with the main usb_hcd (the USB3 roothub).
647 void xhci_shutdown(struct usb_hcd *hcd)
649 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
651 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
652 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
654 spin_lock_irq(&xhci->lock);
656 spin_unlock_irq(&xhci->lock);
658 xhci_cleanup_msix(xhci);
660 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
661 xhci_readl(xhci, &xhci->op_regs->status));
665 static void xhci_save_registers(struct xhci_hcd *xhci)
667 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
668 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
669 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
670 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
671 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
672 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
673 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
674 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
675 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
678 static void xhci_restore_registers(struct xhci_hcd *xhci)
680 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
681 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
682 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
683 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
684 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
685 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
686 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
687 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
688 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
691 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
695 /* step 2: initialize command ring buffer */
696 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
697 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
698 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
699 xhci->cmd_ring->dequeue) &
700 (u64) ~CMD_RING_RSVD_BITS) |
701 xhci->cmd_ring->cycle_state;
702 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
703 (long unsigned long) val_64);
704 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
708 * The whole command ring must be cleared to zero when we suspend the host.
710 * The host doesn't save the command ring pointer in the suspend well, so we
711 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
712 * aligned, because of the reserved bits in the command ring dequeue pointer
713 * register. Therefore, we can't just set the dequeue pointer back in the
714 * middle of the ring (TRBs are 16-byte aligned).
716 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
718 struct xhci_ring *ring;
719 struct xhci_segment *seg;
721 ring = xhci->cmd_ring;
725 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
726 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
727 cpu_to_le32(~TRB_CYCLE);
729 } while (seg != ring->deq_seg);
731 /* Reset the software enqueue and dequeue pointers */
732 ring->deq_seg = ring->first_seg;
733 ring->dequeue = ring->first_seg->trbs;
734 ring->enq_seg = ring->deq_seg;
735 ring->enqueue = ring->dequeue;
738 * Ring is now zeroed, so the HW should look for change of ownership
739 * when the cycle bit is set to 1.
741 ring->cycle_state = 1;
744 * Reset the hardware dequeue pointer.
745 * Yes, this will need to be re-written after resume, but we're paranoid
746 * and want to make sure the hardware doesn't access bogus memory
747 * because, say, the BIOS or an SMI started the host without changing
748 * the command ring pointers.
750 xhci_set_cmd_ring_deq(xhci);
754 * Stop HC (not bus-specific)
756 * This is called when the machine transition into S3/S4 mode.
759 int xhci_suspend(struct xhci_hcd *xhci)
762 struct usb_hcd *hcd = xhci_to_hcd(xhci);
765 spin_lock_irq(&xhci->lock);
766 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
767 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
768 /* step 1: stop endpoint */
769 /* skipped assuming that port suspend has done */
771 /* step 2: clear Run/Stop bit */
772 command = xhci_readl(xhci, &xhci->op_regs->command);
774 xhci_writel(xhci, command, &xhci->op_regs->command);
775 if (handshake(xhci, &xhci->op_regs->status,
776 STS_HALT, STS_HALT, 100*100)) {
777 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
778 spin_unlock_irq(&xhci->lock);
781 xhci_clear_command_ring(xhci);
783 /* step 3: save registers */
784 xhci_save_registers(xhci);
786 /* step 4: set CSS flag */
787 command = xhci_readl(xhci, &xhci->op_regs->command);
789 xhci_writel(xhci, command, &xhci->op_regs->command);
790 if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) {
791 xhci_warn(xhci, "WARN: xHC save state timeout\n");
792 spin_unlock_irq(&xhci->lock);
795 spin_unlock_irq(&xhci->lock);
797 /* step 5: remove core well power */
798 /* synchronize irq when using MSI-X */
799 xhci_msix_sync_irqs(xhci);
805 * start xHC (not bus-specific)
807 * This is called when the machine transition from S3/S4 mode.
810 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
812 u32 command, temp = 0;
813 struct usb_hcd *hcd = xhci_to_hcd(xhci);
814 struct usb_hcd *secondary_hcd;
817 /* Wait a bit if either of the roothubs need to settle from the
818 * transition into bus suspend.
820 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
822 xhci->bus_state[1].next_statechange))
825 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
826 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
828 spin_lock_irq(&xhci->lock);
829 if (xhci->quirks & XHCI_RESET_ON_RESUME)
833 /* step 1: restore register */
834 xhci_restore_registers(xhci);
835 /* step 2: initialize command ring buffer */
836 xhci_set_cmd_ring_deq(xhci);
837 /* step 3: restore state and start state*/
838 /* step 3: set CRS flag */
839 command = xhci_readl(xhci, &xhci->op_regs->command);
841 xhci_writel(xhci, command, &xhci->op_regs->command);
842 if (handshake(xhci, &xhci->op_regs->status,
843 STS_RESTORE, 0, 10 * 1000)) {
844 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
845 spin_unlock_irq(&xhci->lock);
848 temp = xhci_readl(xhci, &xhci->op_regs->status);
851 /* If restore operation fails, re-initialize the HC during resume */
852 if ((temp & STS_SRE) || hibernated) {
853 /* Let the USB core know _both_ roothubs lost power. */
854 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
855 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
857 xhci_dbg(xhci, "Stop HCD\n");
860 spin_unlock_irq(&xhci->lock);
861 xhci_cleanup_msix(xhci);
863 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
864 /* Tell the event ring poll function not to reschedule */
866 del_timer_sync(&xhci->event_ring_timer);
869 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
870 temp = xhci_readl(xhci, &xhci->op_regs->status);
871 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
872 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
873 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
874 &xhci->ir_set->irq_pending);
875 xhci_print_ir_set(xhci, 0);
877 xhci_dbg(xhci, "cleaning up memory\n");
878 xhci_mem_cleanup(xhci);
879 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
880 xhci_readl(xhci, &xhci->op_regs->status));
882 /* USB core calls the PCI reinit and start functions twice:
883 * first with the primary HCD, and then with the secondary HCD.
884 * If we don't do the same, the host will never be started.
886 if (!usb_hcd_is_primary_hcd(hcd))
889 secondary_hcd = xhci->shared_hcd;
891 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
892 retval = xhci_init(hcd->primary_hcd);
895 xhci_dbg(xhci, "Start the primary HCD\n");
896 retval = xhci_run(hcd->primary_hcd);
898 xhci_dbg(xhci, "Start the secondary HCD\n");
899 retval = xhci_run(secondary_hcd);
901 hcd->state = HC_STATE_SUSPENDED;
902 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
906 /* step 4: set Run/Stop bit */
907 command = xhci_readl(xhci, &xhci->op_regs->command);
909 xhci_writel(xhci, command, &xhci->op_regs->command);
910 handshake(xhci, &xhci->op_regs->status, STS_HALT,
913 /* step 5: walk topology and initialize portsc,
914 * portpmsc and portli
916 /* this is done in bus_resume */
918 /* step 6: restart each of the previously
919 * Running endpoints by ringing their doorbells
922 spin_unlock_irq(&xhci->lock);
926 usb_hcd_resume_root_hub(hcd);
927 usb_hcd_resume_root_hub(xhci->shared_hcd);
931 #endif /* CONFIG_PM */
933 /*-------------------------------------------------------------------------*/
936 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
937 * HCDs. Find the index for an endpoint given its descriptor. Use the return
938 * value to right shift 1 for the bitmask.
940 * Index = (epnum * 2) + direction - 1,
941 * where direction = 0 for OUT, 1 for IN.
942 * For control endpoints, the IN index is used (OUT index is unused), so
943 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
945 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
948 if (usb_endpoint_xfer_control(desc))
949 index = (unsigned int) (usb_endpoint_num(desc)*2);
951 index = (unsigned int) (usb_endpoint_num(desc)*2) +
952 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
956 /* Find the flag for this endpoint (for use in the control context). Use the
957 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
960 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
962 return 1 << (xhci_get_endpoint_index(desc) + 1);
965 /* Find the flag for this endpoint (for use in the control context). Use the
966 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
969 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
971 return 1 << (ep_index + 1);
974 /* Compute the last valid endpoint context index. Basically, this is the
975 * endpoint index plus one. For slot contexts with more than valid endpoint,
976 * we find the most significant bit set in the added contexts flags.
977 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
978 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
980 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
982 return fls(added_ctxs) - 1;
985 /* Returns 1 if the arguments are OK;
986 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
988 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
989 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
991 struct xhci_hcd *xhci;
992 struct xhci_virt_device *virt_dev;
994 if (!hcd || (check_ep && !ep) || !udev) {
995 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1000 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1005 xhci = hcd_to_xhci(hcd);
1006 if (xhci->xhc_state & XHCI_STATE_HALTED)
1009 if (check_virt_dev) {
1010 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1011 printk(KERN_DEBUG "xHCI %s called with unaddressed "
1016 virt_dev = xhci->devs[udev->slot_id];
1017 if (virt_dev->udev != udev) {
1018 printk(KERN_DEBUG "xHCI %s called with udev and "
1019 "virt_dev does not match\n", func);
1027 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1028 struct usb_device *udev, struct xhci_command *command,
1029 bool ctx_change, bool must_succeed);
1032 * Full speed devices may have a max packet size greater than 8 bytes, but the
1033 * USB core doesn't know that until it reads the first 8 bytes of the
1034 * descriptor. If the usb_device's max packet size changes after that point,
1035 * we need to issue an evaluate context command and wait on it.
1037 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1038 unsigned int ep_index, struct urb *urb)
1040 struct xhci_container_ctx *in_ctx;
1041 struct xhci_container_ctx *out_ctx;
1042 struct xhci_input_control_ctx *ctrl_ctx;
1043 struct xhci_ep_ctx *ep_ctx;
1044 int max_packet_size;
1045 int hw_max_packet_size;
1048 out_ctx = xhci->devs[slot_id]->out_ctx;
1049 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1050 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1051 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1052 if (hw_max_packet_size != max_packet_size) {
1053 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1054 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1056 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1057 hw_max_packet_size);
1058 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1060 /* Set up the modified control endpoint 0 */
1061 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1062 xhci->devs[slot_id]->out_ctx, ep_index);
1063 in_ctx = xhci->devs[slot_id]->in_ctx;
1064 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1065 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1066 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1068 /* Set up the input context flags for the command */
1069 /* FIXME: This won't work if a non-default control endpoint
1070 * changes max packet sizes.
1072 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1073 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1074 ctrl_ctx->drop_flags = 0;
1076 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1077 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1078 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1079 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1081 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1084 /* Clean up the input context for later use by bandwidth
1087 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1093 * non-error returns are a promise to giveback() the urb later
1094 * we drop ownership so next owner (or urb unlink) can get it
1096 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1098 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1099 struct xhci_td *buffer;
1100 unsigned long flags;
1102 unsigned int slot_id, ep_index;
1103 struct urb_priv *urb_priv;
1106 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1107 true, true, __func__) <= 0)
1110 slot_id = urb->dev->slot_id;
1111 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1113 if (!HCD_HW_ACCESSIBLE(hcd)) {
1114 if (!in_interrupt())
1115 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1120 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1121 size = urb->number_of_packets;
1125 urb_priv = kzalloc(sizeof(struct urb_priv) +
1126 size * sizeof(struct xhci_td *), mem_flags);
1130 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1136 for (i = 0; i < size; i++) {
1137 urb_priv->td[i] = buffer;
1141 urb_priv->length = size;
1142 urb_priv->td_cnt = 0;
1143 urb->hcpriv = urb_priv;
1145 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1146 /* Check to see if the max packet size for the default control
1147 * endpoint changed during FS device enumeration
1149 if (urb->dev->speed == USB_SPEED_FULL) {
1150 ret = xhci_check_maxpacket(xhci, slot_id,
1153 xhci_urb_free_priv(xhci, urb_priv);
1159 /* We have a spinlock and interrupts disabled, so we must pass
1160 * atomic context to this function, which may allocate memory.
1162 spin_lock_irqsave(&xhci->lock, flags);
1163 if (xhci->xhc_state & XHCI_STATE_DYING)
1165 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1169 spin_unlock_irqrestore(&xhci->lock, flags);
1170 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1171 spin_lock_irqsave(&xhci->lock, flags);
1172 if (xhci->xhc_state & XHCI_STATE_DYING)
1174 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1175 EP_GETTING_STREAMS) {
1176 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1177 "is transitioning to using streams.\n");
1179 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1180 EP_GETTING_NO_STREAMS) {
1181 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1182 "is transitioning to "
1183 "not having streams.\n");
1186 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1191 spin_unlock_irqrestore(&xhci->lock, flags);
1192 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1193 spin_lock_irqsave(&xhci->lock, flags);
1194 if (xhci->xhc_state & XHCI_STATE_DYING)
1196 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1200 spin_unlock_irqrestore(&xhci->lock, flags);
1202 spin_lock_irqsave(&xhci->lock, flags);
1203 if (xhci->xhc_state & XHCI_STATE_DYING)
1205 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1209 spin_unlock_irqrestore(&xhci->lock, flags);
1214 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1215 "non-responsive xHCI host.\n",
1216 urb->ep->desc.bEndpointAddress, urb);
1219 xhci_urb_free_priv(xhci, urb_priv);
1221 spin_unlock_irqrestore(&xhci->lock, flags);
1225 /* Get the right ring for the given URB.
1226 * If the endpoint supports streams, boundary check the URB's stream ID.
1227 * If the endpoint doesn't support streams, return the singular endpoint ring.
1229 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1232 unsigned int slot_id;
1233 unsigned int ep_index;
1234 unsigned int stream_id;
1235 struct xhci_virt_ep *ep;
1237 slot_id = urb->dev->slot_id;
1238 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1239 stream_id = urb->stream_id;
1240 ep = &xhci->devs[slot_id]->eps[ep_index];
1241 /* Common case: no streams */
1242 if (!(ep->ep_state & EP_HAS_STREAMS))
1245 if (stream_id == 0) {
1247 "WARN: Slot ID %u, ep index %u has streams, "
1248 "but URB has no stream ID.\n",
1253 if (stream_id < ep->stream_info->num_streams)
1254 return ep->stream_info->stream_rings[stream_id];
1257 "WARN: Slot ID %u, ep index %u has "
1258 "stream IDs 1 to %u allocated, "
1259 "but stream ID %u is requested.\n",
1261 ep->stream_info->num_streams - 1,
1267 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1268 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1269 * should pick up where it left off in the TD, unless a Set Transfer Ring
1270 * Dequeue Pointer is issued.
1272 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1273 * the ring. Since the ring is a contiguous structure, they can't be physically
1274 * removed. Instead, there are two options:
1276 * 1) If the HC is in the middle of processing the URB to be canceled, we
1277 * simply move the ring's dequeue pointer past those TRBs using the Set
1278 * Transfer Ring Dequeue Pointer command. This will be the common case,
1279 * when drivers timeout on the last submitted URB and attempt to cancel.
1281 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1282 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1283 * HC will need to invalidate the any TRBs it has cached after the stop
1284 * endpoint command, as noted in the xHCI 0.95 errata.
1286 * 3) The TD may have completed by the time the Stop Endpoint Command
1287 * completes, so software needs to handle that case too.
1289 * This function should protect against the TD enqueueing code ringing the
1290 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1291 * It also needs to account for multiple cancellations on happening at the same
1292 * time for the same endpoint.
1294 * Note that this function can be called in any context, or so says
1295 * usb_hcd_unlink_urb()
1297 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1299 unsigned long flags;
1302 struct xhci_hcd *xhci;
1303 struct urb_priv *urb_priv;
1305 unsigned int ep_index;
1306 struct xhci_ring *ep_ring;
1307 struct xhci_virt_ep *ep;
1309 xhci = hcd_to_xhci(hcd);
1310 spin_lock_irqsave(&xhci->lock, flags);
1311 /* Make sure the URB hasn't completed or been unlinked already */
1312 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1313 if (ret || !urb->hcpriv)
1315 temp = xhci_readl(xhci, &xhci->op_regs->status);
1316 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1317 xhci_dbg(xhci, "HW died, freeing TD.\n");
1318 urb_priv = urb->hcpriv;
1319 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1320 td = urb_priv->td[i];
1321 if (!list_empty(&td->td_list))
1322 list_del_init(&td->td_list);
1323 if (!list_empty(&td->cancelled_td_list))
1324 list_del_init(&td->cancelled_td_list);
1327 usb_hcd_unlink_urb_from_ep(hcd, urb);
1328 spin_unlock_irqrestore(&xhci->lock, flags);
1329 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1330 xhci_urb_free_priv(xhci, urb_priv);
1333 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1334 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1335 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1336 "non-responsive xHCI host.\n",
1337 urb->ep->desc.bEndpointAddress, urb);
1338 /* Let the stop endpoint command watchdog timer (which set this
1339 * state) finish cleaning up the endpoint TD lists. We must
1340 * have caught it in the middle of dropping a lock and giving
1346 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1347 xhci_dbg(xhci, "Event ring:\n");
1348 xhci_debug_ring(xhci, xhci->event_ring);
1349 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1350 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1351 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1357 xhci_dbg(xhci, "Endpoint ring:\n");
1358 xhci_debug_ring(xhci, ep_ring);
1360 urb_priv = urb->hcpriv;
1362 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1363 td = urb_priv->td[i];
1364 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1367 /* Queue a stop endpoint command, but only if this is
1368 * the first cancellation to be handled.
1370 if (!(ep->ep_state & EP_HALT_PENDING)) {
1371 ep->ep_state |= EP_HALT_PENDING;
1372 ep->stop_cmds_pending++;
1373 ep->stop_cmd_timer.expires = jiffies +
1374 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1375 add_timer(&ep->stop_cmd_timer);
1376 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1377 xhci_ring_cmd_db(xhci);
1380 spin_unlock_irqrestore(&xhci->lock, flags);
1384 /* Drop an endpoint from a new bandwidth configuration for this device.
1385 * Only one call to this function is allowed per endpoint before
1386 * check_bandwidth() or reset_bandwidth() must be called.
1387 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1388 * add the endpoint to the schedule with possibly new parameters denoted by a
1389 * different endpoint descriptor in usb_host_endpoint.
1390 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1393 * The USB core will not allow URBs to be queued to an endpoint that is being
1394 * disabled, so there's no need for mutual exclusion to protect
1395 * the xhci->devs[slot_id] structure.
1397 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1398 struct usb_host_endpoint *ep)
1400 struct xhci_hcd *xhci;
1401 struct xhci_container_ctx *in_ctx, *out_ctx;
1402 struct xhci_input_control_ctx *ctrl_ctx;
1403 struct xhci_slot_ctx *slot_ctx;
1404 unsigned int last_ctx;
1405 unsigned int ep_index;
1406 struct xhci_ep_ctx *ep_ctx;
1408 u32 new_add_flags, new_drop_flags, new_slot_info;
1411 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1414 xhci = hcd_to_xhci(hcd);
1415 if (xhci->xhc_state & XHCI_STATE_DYING)
1418 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1419 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1420 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1421 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1422 __func__, drop_flag);
1426 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1427 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1428 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1429 ep_index = xhci_get_endpoint_index(&ep->desc);
1430 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1431 /* If the HC already knows the endpoint is disabled,
1432 * or the HCD has noted it is disabled, ignore this request
1434 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1435 cpu_to_le32(EP_STATE_DISABLED)) ||
1436 le32_to_cpu(ctrl_ctx->drop_flags) &
1437 xhci_get_endpoint_flag(&ep->desc)) {
1438 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1443 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1444 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1446 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1447 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1449 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1450 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1451 /* Update the last valid endpoint context, if we deleted the last one */
1452 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1453 LAST_CTX(last_ctx)) {
1454 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1455 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1457 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1459 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1461 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1462 (unsigned int) ep->desc.bEndpointAddress,
1464 (unsigned int) new_drop_flags,
1465 (unsigned int) new_add_flags,
1466 (unsigned int) new_slot_info);
1470 /* Add an endpoint to a new possible bandwidth configuration for this device.
1471 * Only one call to this function is allowed per endpoint before
1472 * check_bandwidth() or reset_bandwidth() must be called.
1473 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1474 * add the endpoint to the schedule with possibly new parameters denoted by a
1475 * different endpoint descriptor in usb_host_endpoint.
1476 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1479 * The USB core will not allow URBs to be queued to an endpoint until the
1480 * configuration or alt setting is installed in the device, so there's no need
1481 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1483 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1484 struct usb_host_endpoint *ep)
1486 struct xhci_hcd *xhci;
1487 struct xhci_container_ctx *in_ctx, *out_ctx;
1488 unsigned int ep_index;
1489 struct xhci_ep_ctx *ep_ctx;
1490 struct xhci_slot_ctx *slot_ctx;
1491 struct xhci_input_control_ctx *ctrl_ctx;
1493 unsigned int last_ctx;
1494 u32 new_add_flags, new_drop_flags, new_slot_info;
1495 struct xhci_virt_device *virt_dev;
1498 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1500 /* So we won't queue a reset ep command for a root hub */
1504 xhci = hcd_to_xhci(hcd);
1505 if (xhci->xhc_state & XHCI_STATE_DYING)
1508 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1509 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1510 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1511 /* FIXME when we have to issue an evaluate endpoint command to
1512 * deal with ep0 max packet size changing once we get the
1515 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1516 __func__, added_ctxs);
1520 virt_dev = xhci->devs[udev->slot_id];
1521 in_ctx = virt_dev->in_ctx;
1522 out_ctx = virt_dev->out_ctx;
1523 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1524 ep_index = xhci_get_endpoint_index(&ep->desc);
1525 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1527 /* If this endpoint is already in use, and the upper layers are trying
1528 * to add it again without dropping it, reject the addition.
1530 if (virt_dev->eps[ep_index].ring &&
1531 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1532 xhci_get_endpoint_flag(&ep->desc))) {
1533 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1534 "without dropping it.\n",
1535 (unsigned int) ep->desc.bEndpointAddress);
1539 /* If the HCD has already noted the endpoint is enabled,
1540 * ignore this request.
1542 if (le32_to_cpu(ctrl_ctx->add_flags) &
1543 xhci_get_endpoint_flag(&ep->desc)) {
1544 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1550 * Configuration and alternate setting changes must be done in
1551 * process context, not interrupt context (or so documenation
1552 * for usb_set_interface() and usb_set_configuration() claim).
1554 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1555 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1556 __func__, ep->desc.bEndpointAddress);
1560 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1561 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1563 /* If xhci_endpoint_disable() was called for this endpoint, but the
1564 * xHC hasn't been notified yet through the check_bandwidth() call,
1565 * this re-adds a new state for the endpoint from the new endpoint
1566 * descriptors. We must drop and re-add this endpoint, so we leave the
1569 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1571 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1572 /* Update the last valid endpoint context, if we just added one past */
1573 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1574 LAST_CTX(last_ctx)) {
1575 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1576 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1578 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1580 /* Store the usb_device pointer for later use */
1583 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1584 (unsigned int) ep->desc.bEndpointAddress,
1586 (unsigned int) new_drop_flags,
1587 (unsigned int) new_add_flags,
1588 (unsigned int) new_slot_info);
1592 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1594 struct xhci_input_control_ctx *ctrl_ctx;
1595 struct xhci_ep_ctx *ep_ctx;
1596 struct xhci_slot_ctx *slot_ctx;
1599 /* When a device's add flag and drop flag are zero, any subsequent
1600 * configure endpoint command will leave that endpoint's state
1601 * untouched. Make sure we don't leave any old state in the input
1602 * endpoint contexts.
1604 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1605 ctrl_ctx->drop_flags = 0;
1606 ctrl_ctx->add_flags = 0;
1607 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1608 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1609 /* Endpoint 0 is always valid */
1610 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1611 for (i = 1; i < 31; ++i) {
1612 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1613 ep_ctx->ep_info = 0;
1614 ep_ctx->ep_info2 = 0;
1616 ep_ctx->tx_info = 0;
1620 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1621 struct usb_device *udev, u32 *cmd_status)
1625 switch (*cmd_status) {
1627 dev_warn(&udev->dev, "Not enough host controller resources "
1628 "for new device state.\n");
1630 /* FIXME: can we allocate more resources for the HC? */
1633 case COMP_2ND_BW_ERR:
1634 dev_warn(&udev->dev, "Not enough bandwidth "
1635 "for new device state.\n");
1637 /* FIXME: can we go back to the old state? */
1640 /* the HCD set up something wrong */
1641 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1643 "and endpoint is not disabled.\n");
1647 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1648 "configure command.\n");
1652 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1656 xhci_err(xhci, "ERROR: unexpected command completion "
1657 "code 0x%x.\n", *cmd_status);
1664 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1665 struct usb_device *udev, u32 *cmd_status)
1668 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1670 switch (*cmd_status) {
1672 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1673 "context command.\n");
1677 dev_warn(&udev->dev, "WARN: slot not enabled for"
1678 "evaluate context command.\n");
1679 case COMP_CTX_STATE:
1680 dev_warn(&udev->dev, "WARN: invalid context state for "
1681 "evaluate context command.\n");
1682 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1686 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1687 "context command.\n");
1691 /* Max Exit Latency too large error */
1692 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1696 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1700 xhci_err(xhci, "ERROR: unexpected command completion "
1701 "code 0x%x.\n", *cmd_status);
1708 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1709 struct xhci_container_ctx *in_ctx)
1711 struct xhci_input_control_ctx *ctrl_ctx;
1712 u32 valid_add_flags;
1713 u32 valid_drop_flags;
1715 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1716 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1717 * (bit 1). The default control endpoint is added during the Address
1718 * Device command and is never removed until the slot is disabled.
1720 valid_add_flags = ctrl_ctx->add_flags >> 2;
1721 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1723 /* Use hweight32 to count the number of ones in the add flags, or
1724 * number of endpoints added. Don't count endpoints that are changed
1725 * (both added and dropped).
1727 return hweight32(valid_add_flags) -
1728 hweight32(valid_add_flags & valid_drop_flags);
1731 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1732 struct xhci_container_ctx *in_ctx)
1734 struct xhci_input_control_ctx *ctrl_ctx;
1735 u32 valid_add_flags;
1736 u32 valid_drop_flags;
1738 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1739 valid_add_flags = ctrl_ctx->add_flags >> 2;
1740 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1742 return hweight32(valid_drop_flags) -
1743 hweight32(valid_add_flags & valid_drop_flags);
1747 * We need to reserve the new number of endpoints before the configure endpoint
1748 * command completes. We can't subtract the dropped endpoints from the number
1749 * of active endpoints until the command completes because we can oversubscribe
1750 * the host in this case:
1752 * - the first configure endpoint command drops more endpoints than it adds
1753 * - a second configure endpoint command that adds more endpoints is queued
1754 * - the first configure endpoint command fails, so the config is unchanged
1755 * - the second command may succeed, even though there isn't enough resources
1757 * Must be called with xhci->lock held.
1759 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1760 struct xhci_container_ctx *in_ctx)
1764 added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1765 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1766 xhci_dbg(xhci, "Not enough ep ctxs: "
1767 "%u active, need to add %u, limit is %u.\n",
1768 xhci->num_active_eps, added_eps,
1769 xhci->limit_active_eps);
1772 xhci->num_active_eps += added_eps;
1773 xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1774 xhci->num_active_eps);
1779 * The configure endpoint was failed by the xHC for some other reason, so we
1780 * need to revert the resources that failed configuration would have used.
1782 * Must be called with xhci->lock held.
1784 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1785 struct xhci_container_ctx *in_ctx)
1789 num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1790 xhci->num_active_eps -= num_failed_eps;
1791 xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1793 xhci->num_active_eps);
1797 * Now that the command has completed, clean up the active endpoint count by
1798 * subtracting out the endpoints that were dropped (but not changed).
1800 * Must be called with xhci->lock held.
1802 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1803 struct xhci_container_ctx *in_ctx)
1805 u32 num_dropped_eps;
1807 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1808 xhci->num_active_eps -= num_dropped_eps;
1809 if (num_dropped_eps)
1810 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1812 xhci->num_active_eps);
1815 unsigned int xhci_get_block_size(struct usb_device *udev)
1817 switch (udev->speed) {
1819 case USB_SPEED_FULL:
1821 case USB_SPEED_HIGH:
1823 case USB_SPEED_SUPER:
1825 case USB_SPEED_UNKNOWN:
1826 case USB_SPEED_WIRELESS:
1828 /* Should never happen */
1833 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1835 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1837 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
1842 /* If we are changing a LS/FS device under a HS hub,
1843 * make sure (if we are activating a new TT) that the HS bus has enough
1844 * bandwidth for this new TT.
1846 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
1847 struct xhci_virt_device *virt_dev,
1850 struct xhci_interval_bw_table *bw_table;
1851 struct xhci_tt_bw_info *tt_info;
1853 /* Find the bandwidth table for the root port this TT is attached to. */
1854 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
1855 tt_info = virt_dev->tt_info;
1856 /* If this TT already had active endpoints, the bandwidth for this TT
1857 * has already been added. Removing all periodic endpoints (and thus
1858 * making the TT enactive) will only decrease the bandwidth used.
1862 if (old_active_eps == 0 && tt_info->active_eps != 0) {
1863 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
1867 /* Not sure why we would have no new active endpoints...
1869 * Maybe because of an Evaluate Context change for a hub update or a
1870 * control endpoint 0 max packet size change?
1871 * FIXME: skip the bandwidth calculation in that case.
1876 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
1877 struct xhci_virt_device *virt_dev)
1879 unsigned int bw_reserved;
1881 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
1882 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
1885 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
1886 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
1893 * This algorithm is a very conservative estimate of the worst-case scheduling
1894 * scenario for any one interval. The hardware dynamically schedules the
1895 * packets, so we can't tell which microframe could be the limiting factor in
1896 * the bandwidth scheduling. This only takes into account periodic endpoints.
1898 * Obviously, we can't solve an NP complete problem to find the minimum worst
1899 * case scenario. Instead, we come up with an estimate that is no less than
1900 * the worst case bandwidth used for any one microframe, but may be an
1903 * We walk the requirements for each endpoint by interval, starting with the
1904 * smallest interval, and place packets in the schedule where there is only one
1905 * possible way to schedule packets for that interval. In order to simplify
1906 * this algorithm, we record the largest max packet size for each interval, and
1907 * assume all packets will be that size.
1909 * For interval 0, we obviously must schedule all packets for each interval.
1910 * The bandwidth for interval 0 is just the amount of data to be transmitted
1911 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
1912 * the number of packets).
1914 * For interval 1, we have two possible microframes to schedule those packets
1915 * in. For this algorithm, if we can schedule the same number of packets for
1916 * each possible scheduling opportunity (each microframe), we will do so. The
1917 * remaining number of packets will be saved to be transmitted in the gaps in
1918 * the next interval's scheduling sequence.
1920 * As we move those remaining packets to be scheduled with interval 2 packets,
1921 * we have to double the number of remaining packets to transmit. This is
1922 * because the intervals are actually powers of 2, and we would be transmitting
1923 * the previous interval's packets twice in this interval. We also have to be
1924 * sure that when we look at the largest max packet size for this interval, we
1925 * also look at the largest max packet size for the remaining packets and take
1926 * the greater of the two.
1928 * The algorithm continues to evenly distribute packets in each scheduling
1929 * opportunity, and push the remaining packets out, until we get to the last
1930 * interval. Then those packets and their associated overhead are just added
1931 * to the bandwidth used.
1933 static int xhci_check_bw_table(struct xhci_hcd *xhci,
1934 struct xhci_virt_device *virt_dev,
1937 unsigned int bw_reserved;
1938 unsigned int max_bandwidth;
1939 unsigned int bw_used;
1940 unsigned int block_size;
1941 struct xhci_interval_bw_table *bw_table;
1942 unsigned int packet_size = 0;
1943 unsigned int overhead = 0;
1944 unsigned int packets_transmitted = 0;
1945 unsigned int packets_remaining = 0;
1948 if (virt_dev->udev->speed == USB_SPEED_SUPER)
1949 return xhci_check_ss_bw(xhci, virt_dev);
1951 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
1952 max_bandwidth = HS_BW_LIMIT;
1953 /* Convert percent of bus BW reserved to blocks reserved */
1954 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
1956 max_bandwidth = FS_BW_LIMIT;
1957 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
1960 bw_table = virt_dev->bw_table;
1961 /* We need to translate the max packet size and max ESIT payloads into
1962 * the units the hardware uses.
1964 block_size = xhci_get_block_size(virt_dev->udev);
1966 /* If we are manipulating a LS/FS device under a HS hub, double check
1967 * that the HS bus has enough bandwidth if we are activing a new TT.
1969 if (virt_dev->tt_info) {
1970 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1971 virt_dev->real_port);
1972 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
1973 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
1974 "newly activated TT.\n");
1977 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
1978 virt_dev->tt_info->slot_id,
1979 virt_dev->tt_info->ttport);
1981 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1982 virt_dev->real_port);
1985 /* Add in how much bandwidth will be used for interval zero, or the
1986 * rounded max ESIT payload + number of packets * largest overhead.
1988 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
1989 bw_table->interval_bw[0].num_packets *
1990 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
1992 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
1993 unsigned int bw_added;
1994 unsigned int largest_mps;
1995 unsigned int interval_overhead;
1998 * How many packets could we transmit in this interval?
1999 * If packets didn't fit in the previous interval, we will need
2000 * to transmit that many packets twice within this interval.
2002 packets_remaining = 2 * packets_remaining +
2003 bw_table->interval_bw[i].num_packets;
2005 /* Find the largest max packet size of this or the previous
2008 if (list_empty(&bw_table->interval_bw[i].endpoints))
2011 struct xhci_virt_ep *virt_ep;
2012 struct list_head *ep_entry;
2014 ep_entry = bw_table->interval_bw[i].endpoints.next;
2015 virt_ep = list_entry(ep_entry,
2016 struct xhci_virt_ep, bw_endpoint_list);
2017 /* Convert to blocks, rounding up */
2018 largest_mps = DIV_ROUND_UP(
2019 virt_ep->bw_info.max_packet_size,
2022 if (largest_mps > packet_size)
2023 packet_size = largest_mps;
2025 /* Use the larger overhead of this or the previous interval. */
2026 interval_overhead = xhci_get_largest_overhead(
2027 &bw_table->interval_bw[i]);
2028 if (interval_overhead > overhead)
2029 overhead = interval_overhead;
2031 /* How many packets can we evenly distribute across
2032 * (1 << (i + 1)) possible scheduling opportunities?
2034 packets_transmitted = packets_remaining >> (i + 1);
2036 /* Add in the bandwidth used for those scheduled packets */
2037 bw_added = packets_transmitted * (overhead + packet_size);
2039 /* How many packets do we have remaining to transmit? */
2040 packets_remaining = packets_remaining % (1 << (i + 1));
2042 /* What largest max packet size should those packets have? */
2043 /* If we've transmitted all packets, don't carry over the
2044 * largest packet size.
2046 if (packets_remaining == 0) {
2049 } else if (packets_transmitted > 0) {
2050 /* Otherwise if we do have remaining packets, and we've
2051 * scheduled some packets in this interval, take the
2052 * largest max packet size from endpoints with this
2055 packet_size = largest_mps;
2056 overhead = interval_overhead;
2058 /* Otherwise carry over packet_size and overhead from the last
2059 * time we had a remainder.
2061 bw_used += bw_added;
2062 if (bw_used > max_bandwidth) {
2063 xhci_warn(xhci, "Not enough bandwidth. "
2064 "Proposed: %u, Max: %u\n",
2065 bw_used, max_bandwidth);
2070 * Ok, we know we have some packets left over after even-handedly
2071 * scheduling interval 15. We don't know which microframes they will
2072 * fit into, so we over-schedule and say they will be scheduled every
2075 if (packets_remaining > 0)
2076 bw_used += overhead + packet_size;
2078 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2079 unsigned int port_index = virt_dev->real_port - 1;
2081 /* OK, we're manipulating a HS device attached to a
2082 * root port bandwidth domain. Include the number of active TTs
2083 * in the bandwidth used.
2085 bw_used += TT_HS_OVERHEAD *
2086 xhci->rh_bw[port_index].num_active_tts;
2089 xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2090 "Available: %u " "percent\n",
2091 bw_used, max_bandwidth, bw_reserved,
2092 (max_bandwidth - bw_used - bw_reserved) * 100 /
2095 bw_used += bw_reserved;
2096 if (bw_used > max_bandwidth) {
2097 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2098 bw_used, max_bandwidth);
2102 bw_table->bw_used = bw_used;
2106 static bool xhci_is_async_ep(unsigned int ep_type)
2108 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2109 ep_type != ISOC_IN_EP &&
2110 ep_type != INT_IN_EP);
2113 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2115 return (ep_type == ISOC_IN_EP || ep_type != INT_IN_EP);
2118 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2120 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2122 if (ep_bw->ep_interval == 0)
2123 return SS_OVERHEAD_BURST +
2124 (ep_bw->mult * ep_bw->num_packets *
2125 (SS_OVERHEAD + mps));
2126 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2127 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2128 1 << ep_bw->ep_interval);
2132 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2133 struct xhci_bw_info *ep_bw,
2134 struct xhci_interval_bw_table *bw_table,
2135 struct usb_device *udev,
2136 struct xhci_virt_ep *virt_ep,
2137 struct xhci_tt_bw_info *tt_info)
2139 struct xhci_interval_bw *interval_bw;
2140 int normalized_interval;
2142 if (xhci_is_async_ep(ep_bw->type))
2145 if (udev->speed == USB_SPEED_SUPER) {
2146 if (xhci_is_sync_in_ep(ep_bw->type))
2147 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2148 xhci_get_ss_bw_consumed(ep_bw);
2150 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2151 xhci_get_ss_bw_consumed(ep_bw);
2155 /* SuperSpeed endpoints never get added to intervals in the table, so
2156 * this check is only valid for HS/FS/LS devices.
2158 if (list_empty(&virt_ep->bw_endpoint_list))
2160 /* For LS/FS devices, we need to translate the interval expressed in
2161 * microframes to frames.
2163 if (udev->speed == USB_SPEED_HIGH)
2164 normalized_interval = ep_bw->ep_interval;
2166 normalized_interval = ep_bw->ep_interval - 3;
2168 if (normalized_interval == 0)
2169 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2170 interval_bw = &bw_table->interval_bw[normalized_interval];
2171 interval_bw->num_packets -= ep_bw->num_packets;
2172 switch (udev->speed) {
2174 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2176 case USB_SPEED_FULL:
2177 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2179 case USB_SPEED_HIGH:
2180 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2182 case USB_SPEED_SUPER:
2183 case USB_SPEED_UNKNOWN:
2184 case USB_SPEED_WIRELESS:
2185 /* Should never happen because only LS/FS/HS endpoints will get
2186 * added to the endpoint list.
2191 tt_info->active_eps -= 1;
2192 list_del_init(&virt_ep->bw_endpoint_list);
2195 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2196 struct xhci_bw_info *ep_bw,
2197 struct xhci_interval_bw_table *bw_table,
2198 struct usb_device *udev,
2199 struct xhci_virt_ep *virt_ep,
2200 struct xhci_tt_bw_info *tt_info)
2202 struct xhci_interval_bw *interval_bw;
2203 struct xhci_virt_ep *smaller_ep;
2204 int normalized_interval;
2206 if (xhci_is_async_ep(ep_bw->type))
2209 if (udev->speed == USB_SPEED_SUPER) {
2210 if (xhci_is_sync_in_ep(ep_bw->type))
2211 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2212 xhci_get_ss_bw_consumed(ep_bw);
2214 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2215 xhci_get_ss_bw_consumed(ep_bw);
2219 /* For LS/FS devices, we need to translate the interval expressed in
2220 * microframes to frames.
2222 if (udev->speed == USB_SPEED_HIGH)
2223 normalized_interval = ep_bw->ep_interval;
2225 normalized_interval = ep_bw->ep_interval - 3;
2227 if (normalized_interval == 0)
2228 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2229 interval_bw = &bw_table->interval_bw[normalized_interval];
2230 interval_bw->num_packets += ep_bw->num_packets;
2231 switch (udev->speed) {
2233 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2235 case USB_SPEED_FULL:
2236 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2238 case USB_SPEED_HIGH:
2239 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2241 case USB_SPEED_SUPER:
2242 case USB_SPEED_UNKNOWN:
2243 case USB_SPEED_WIRELESS:
2244 /* Should never happen because only LS/FS/HS endpoints will get
2245 * added to the endpoint list.
2251 tt_info->active_eps += 1;
2252 /* Insert the endpoint into the list, largest max packet size first. */
2253 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2255 if (ep_bw->max_packet_size >=
2256 smaller_ep->bw_info.max_packet_size) {
2257 /* Add the new ep before the smaller endpoint */
2258 list_add_tail(&virt_ep->bw_endpoint_list,
2259 &smaller_ep->bw_endpoint_list);
2263 /* Add the new endpoint at the end of the list. */
2264 list_add_tail(&virt_ep->bw_endpoint_list,
2265 &interval_bw->endpoints);
2268 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2269 struct xhci_virt_device *virt_dev,
2272 struct xhci_root_port_bw_info *rh_bw_info;
2273 if (!virt_dev->tt_info)
2276 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2277 if (old_active_eps == 0 &&
2278 virt_dev->tt_info->active_eps != 0) {
2279 rh_bw_info->num_active_tts += 1;
2280 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2281 } else if (old_active_eps != 0 &&
2282 virt_dev->tt_info->active_eps == 0) {
2283 rh_bw_info->num_active_tts -= 1;
2284 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2288 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2289 struct xhci_virt_device *virt_dev,
2290 struct xhci_container_ctx *in_ctx)
2292 struct xhci_bw_info ep_bw_info[31];
2294 struct xhci_input_control_ctx *ctrl_ctx;
2295 int old_active_eps = 0;
2297 if (virt_dev->tt_info)
2298 old_active_eps = virt_dev->tt_info->active_eps;
2300 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2302 for (i = 0; i < 31; i++) {
2303 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2306 /* Make a copy of the BW info in case we need to revert this */
2307 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2308 sizeof(ep_bw_info[i]));
2309 /* Drop the endpoint from the interval table if the endpoint is
2310 * being dropped or changed.
2312 if (EP_IS_DROPPED(ctrl_ctx, i))
2313 xhci_drop_ep_from_interval_table(xhci,
2314 &virt_dev->eps[i].bw_info,
2320 /* Overwrite the information stored in the endpoints' bw_info */
2321 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2322 for (i = 0; i < 31; i++) {
2323 /* Add any changed or added endpoints to the interval table */
2324 if (EP_IS_ADDED(ctrl_ctx, i))
2325 xhci_add_ep_to_interval_table(xhci,
2326 &virt_dev->eps[i].bw_info,
2333 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2334 /* Ok, this fits in the bandwidth we have.
2335 * Update the number of active TTs.
2337 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2341 /* We don't have enough bandwidth for this, revert the stored info. */
2342 for (i = 0; i < 31; i++) {
2343 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2346 /* Drop the new copies of any added or changed endpoints from
2347 * the interval table.
2349 if (EP_IS_ADDED(ctrl_ctx, i)) {
2350 xhci_drop_ep_from_interval_table(xhci,
2351 &virt_dev->eps[i].bw_info,
2357 /* Revert the endpoint back to its old information */
2358 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2359 sizeof(ep_bw_info[i]));
2360 /* Add any changed or dropped endpoints back into the table */
2361 if (EP_IS_DROPPED(ctrl_ctx, i))
2362 xhci_add_ep_to_interval_table(xhci,
2363 &virt_dev->eps[i].bw_info,
2373 /* Issue a configure endpoint command or evaluate context command
2374 * and wait for it to finish.
2376 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2377 struct usb_device *udev,
2378 struct xhci_command *command,
2379 bool ctx_change, bool must_succeed)
2383 unsigned long flags;
2384 struct xhci_container_ctx *in_ctx;
2385 struct completion *cmd_completion;
2387 struct xhci_virt_device *virt_dev;
2389 spin_lock_irqsave(&xhci->lock, flags);
2390 virt_dev = xhci->devs[udev->slot_id];
2393 in_ctx = command->in_ctx;
2395 in_ctx = virt_dev->in_ctx;
2397 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2398 xhci_reserve_host_resources(xhci, in_ctx)) {
2399 spin_unlock_irqrestore(&xhci->lock, flags);
2400 xhci_warn(xhci, "Not enough host resources, "
2401 "active endpoint contexts = %u\n",
2402 xhci->num_active_eps);
2405 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2406 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2407 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2408 xhci_free_host_resources(xhci, in_ctx);
2409 spin_unlock_irqrestore(&xhci->lock, flags);
2410 xhci_warn(xhci, "Not enough bandwidth\n");
2415 cmd_completion = command->completion;
2416 cmd_status = &command->status;
2417 command->command_trb = xhci->cmd_ring->enqueue;
2419 /* Enqueue pointer can be left pointing to the link TRB,
2420 * we must handle that
2422 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2423 command->command_trb =
2424 xhci->cmd_ring->enq_seg->next->trbs;
2426 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2428 cmd_completion = &virt_dev->cmd_completion;
2429 cmd_status = &virt_dev->cmd_status;
2431 init_completion(cmd_completion);
2434 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2435 udev->slot_id, must_succeed);
2437 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2441 list_del(&command->cmd_list);
2442 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2443 xhci_free_host_resources(xhci, in_ctx);
2444 spin_unlock_irqrestore(&xhci->lock, flags);
2445 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2448 xhci_ring_cmd_db(xhci);
2449 spin_unlock_irqrestore(&xhci->lock, flags);
2451 /* Wait for the configure endpoint command to complete */
2452 timeleft = wait_for_completion_interruptible_timeout(
2454 USB_CTRL_SET_TIMEOUT);
2455 if (timeleft <= 0) {
2456 xhci_warn(xhci, "%s while waiting for %s command\n",
2457 timeleft == 0 ? "Timeout" : "Signal",
2459 "configure endpoint" :
2460 "evaluate context");
2461 /* FIXME cancel the configure endpoint command */
2466 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2468 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2470 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2471 spin_lock_irqsave(&xhci->lock, flags);
2472 /* If the command failed, remove the reserved resources.
2473 * Otherwise, clean up the estimate to include dropped eps.
2476 xhci_free_host_resources(xhci, in_ctx);
2478 xhci_finish_resource_reservation(xhci, in_ctx);
2479 spin_unlock_irqrestore(&xhci->lock, flags);
2484 /* Called after one or more calls to xhci_add_endpoint() or
2485 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2486 * to call xhci_reset_bandwidth().
2488 * Since we are in the middle of changing either configuration or
2489 * installing a new alt setting, the USB core won't allow URBs to be
2490 * enqueued for any endpoint on the old config or interface. Nothing
2491 * else should be touching the xhci->devs[slot_id] structure, so we
2492 * don't need to take the xhci->lock for manipulating that.
2494 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2498 struct xhci_hcd *xhci;
2499 struct xhci_virt_device *virt_dev;
2500 struct xhci_input_control_ctx *ctrl_ctx;
2501 struct xhci_slot_ctx *slot_ctx;
2503 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2506 xhci = hcd_to_xhci(hcd);
2507 if (xhci->xhc_state & XHCI_STATE_DYING)
2510 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2511 virt_dev = xhci->devs[udev->slot_id];
2513 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2514 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2515 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2516 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2517 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2519 /* Don't issue the command if there's no endpoints to update. */
2520 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2521 ctrl_ctx->drop_flags == 0)
2524 xhci_dbg(xhci, "New Input Control Context:\n");
2525 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2526 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2527 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2529 ret = xhci_configure_endpoint(xhci, udev, NULL,
2532 /* Callee should call reset_bandwidth() */
2536 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2537 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2538 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2540 /* Free any rings that were dropped, but not changed. */
2541 for (i = 1; i < 31; ++i) {
2542 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2543 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2544 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2546 xhci_zero_in_ctx(xhci, virt_dev);
2548 * Install any rings for completely new endpoints or changed endpoints,
2549 * and free or cache any old rings from changed endpoints.
2551 for (i = 1; i < 31; ++i) {
2552 if (!virt_dev->eps[i].new_ring)
2554 /* Only cache or free the old ring if it exists.
2555 * It may not if this is the first add of an endpoint.
2557 if (virt_dev->eps[i].ring) {
2558 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2560 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2561 virt_dev->eps[i].new_ring = NULL;
2567 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2569 struct xhci_hcd *xhci;
2570 struct xhci_virt_device *virt_dev;
2573 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2576 xhci = hcd_to_xhci(hcd);
2578 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2579 virt_dev = xhci->devs[udev->slot_id];
2580 /* Free any rings allocated for added endpoints */
2581 for (i = 0; i < 31; ++i) {
2582 if (virt_dev->eps[i].new_ring) {
2583 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2584 virt_dev->eps[i].new_ring = NULL;
2587 xhci_zero_in_ctx(xhci, virt_dev);
2590 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2591 struct xhci_container_ctx *in_ctx,
2592 struct xhci_container_ctx *out_ctx,
2593 u32 add_flags, u32 drop_flags)
2595 struct xhci_input_control_ctx *ctrl_ctx;
2596 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2597 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2598 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2599 xhci_slot_copy(xhci, in_ctx, out_ctx);
2600 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2602 xhci_dbg(xhci, "Input Context:\n");
2603 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2606 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2607 unsigned int slot_id, unsigned int ep_index,
2608 struct xhci_dequeue_state *deq_state)
2610 struct xhci_container_ctx *in_ctx;
2611 struct xhci_ep_ctx *ep_ctx;
2615 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2616 xhci->devs[slot_id]->out_ctx, ep_index);
2617 in_ctx = xhci->devs[slot_id]->in_ctx;
2618 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2619 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2620 deq_state->new_deq_ptr);
2622 xhci_warn(xhci, "WARN Cannot submit config ep after "
2623 "reset ep command\n");
2624 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2625 deq_state->new_deq_seg,
2626 deq_state->new_deq_ptr);
2629 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2631 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2632 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2633 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2636 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2637 struct usb_device *udev, unsigned int ep_index)
2639 struct xhci_dequeue_state deq_state;
2640 struct xhci_virt_ep *ep;
2642 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2643 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2644 /* We need to move the HW's dequeue pointer past this TD,
2645 * or it will attempt to resend it on the next doorbell ring.
2647 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2648 ep_index, ep->stopped_stream, ep->stopped_td,
2651 /* HW with the reset endpoint quirk will use the saved dequeue state to
2652 * issue a configure endpoint command later.
2654 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2655 xhci_dbg(xhci, "Queueing new dequeue state\n");
2656 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2657 ep_index, ep->stopped_stream, &deq_state);
2659 /* Better hope no one uses the input context between now and the
2660 * reset endpoint completion!
2661 * XXX: No idea how this hardware will react when stream rings
2664 xhci_dbg(xhci, "Setting up input context for "
2665 "configure endpoint command\n");
2666 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2667 ep_index, &deq_state);
2671 /* Deal with stalled endpoints. The core should have sent the control message
2672 * to clear the halt condition. However, we need to make the xHCI hardware
2673 * reset its sequence number, since a device will expect a sequence number of
2674 * zero after the halt condition is cleared.
2675 * Context: in_interrupt
2677 void xhci_endpoint_reset(struct usb_hcd *hcd,
2678 struct usb_host_endpoint *ep)
2680 struct xhci_hcd *xhci;
2681 struct usb_device *udev;
2682 unsigned int ep_index;
2683 unsigned long flags;
2685 struct xhci_virt_ep *virt_ep;
2687 xhci = hcd_to_xhci(hcd);
2688 udev = (struct usb_device *) ep->hcpriv;
2689 /* Called with a root hub endpoint (or an endpoint that wasn't added
2690 * with xhci_add_endpoint()
2694 ep_index = xhci_get_endpoint_index(&ep->desc);
2695 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2696 if (!virt_ep->stopped_td) {
2697 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2698 ep->desc.bEndpointAddress);
2701 if (usb_endpoint_xfer_control(&ep->desc)) {
2702 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2706 xhci_dbg(xhci, "Queueing reset endpoint command\n");
2707 spin_lock_irqsave(&xhci->lock, flags);
2708 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2710 * Can't change the ring dequeue pointer until it's transitioned to the
2711 * stopped state, which is only upon a successful reset endpoint
2712 * command. Better hope that last command worked!
2715 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2716 kfree(virt_ep->stopped_td);
2717 xhci_ring_cmd_db(xhci);
2719 virt_ep->stopped_td = NULL;
2720 virt_ep->stopped_trb = NULL;
2721 virt_ep->stopped_stream = 0;
2722 spin_unlock_irqrestore(&xhci->lock, flags);
2725 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2728 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2729 struct usb_device *udev, struct usb_host_endpoint *ep,
2730 unsigned int slot_id)
2733 unsigned int ep_index;
2734 unsigned int ep_state;
2738 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2741 if (ep->ss_ep_comp.bmAttributes == 0) {
2742 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2743 " descriptor for ep 0x%x does not support streams\n",
2744 ep->desc.bEndpointAddress);
2748 ep_index = xhci_get_endpoint_index(&ep->desc);
2749 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2750 if (ep_state & EP_HAS_STREAMS ||
2751 ep_state & EP_GETTING_STREAMS) {
2752 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2753 "already has streams set up.\n",
2754 ep->desc.bEndpointAddress);
2755 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2756 "dynamic stream context array reallocation.\n");
2759 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2760 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2761 "endpoint 0x%x; URBs are pending.\n",
2762 ep->desc.bEndpointAddress);
2768 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2769 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2771 unsigned int max_streams;
2773 /* The stream context array size must be a power of two */
2774 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2776 * Find out how many primary stream array entries the host controller
2777 * supports. Later we may use secondary stream arrays (similar to 2nd
2778 * level page entries), but that's an optional feature for xHCI host
2779 * controllers. xHCs must support at least 4 stream IDs.
2781 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2782 if (*num_stream_ctxs > max_streams) {
2783 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2785 *num_stream_ctxs = max_streams;
2786 *num_streams = max_streams;
2790 /* Returns an error code if one of the endpoint already has streams.
2791 * This does not change any data structures, it only checks and gathers
2794 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2795 struct usb_device *udev,
2796 struct usb_host_endpoint **eps, unsigned int num_eps,
2797 unsigned int *num_streams, u32 *changed_ep_bitmask)
2799 unsigned int max_streams;
2800 unsigned int endpoint_flag;
2804 for (i = 0; i < num_eps; i++) {
2805 ret = xhci_check_streams_endpoint(xhci, udev,
2806 eps[i], udev->slot_id);
2810 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2811 if (max_streams < (*num_streams - 1)) {
2812 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2813 eps[i]->desc.bEndpointAddress,
2815 *num_streams = max_streams+1;
2818 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2819 if (*changed_ep_bitmask & endpoint_flag)
2821 *changed_ep_bitmask |= endpoint_flag;
2826 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2827 struct usb_device *udev,
2828 struct usb_host_endpoint **eps, unsigned int num_eps)
2830 u32 changed_ep_bitmask = 0;
2831 unsigned int slot_id;
2832 unsigned int ep_index;
2833 unsigned int ep_state;
2836 slot_id = udev->slot_id;
2837 if (!xhci->devs[slot_id])
2840 for (i = 0; i < num_eps; i++) {
2841 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2842 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2843 /* Are streams already being freed for the endpoint? */
2844 if (ep_state & EP_GETTING_NO_STREAMS) {
2845 xhci_warn(xhci, "WARN Can't disable streams for "
2847 "streams are being disabled already.",
2848 eps[i]->desc.bEndpointAddress);
2851 /* Are there actually any streams to free? */
2852 if (!(ep_state & EP_HAS_STREAMS) &&
2853 !(ep_state & EP_GETTING_STREAMS)) {
2854 xhci_warn(xhci, "WARN Can't disable streams for "
2856 "streams are already disabled!",
2857 eps[i]->desc.bEndpointAddress);
2858 xhci_warn(xhci, "WARN xhci_free_streams() called "
2859 "with non-streams endpoint\n");
2862 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2864 return changed_ep_bitmask;
2868 * The USB device drivers use this function (though the HCD interface in USB
2869 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
2870 * coordinate mass storage command queueing across multiple endpoints (basically
2871 * a stream ID == a task ID).
2873 * Setting up streams involves allocating the same size stream context array
2874 * for each endpoint and issuing a configure endpoint command for all endpoints.
2876 * Don't allow the call to succeed if one endpoint only supports one stream
2877 * (which means it doesn't support streams at all).
2879 * Drivers may get less stream IDs than they asked for, if the host controller
2880 * hardware or endpoints claim they can't support the number of requested
2883 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2884 struct usb_host_endpoint **eps, unsigned int num_eps,
2885 unsigned int num_streams, gfp_t mem_flags)
2888 struct xhci_hcd *xhci;
2889 struct xhci_virt_device *vdev;
2890 struct xhci_command *config_cmd;
2891 unsigned int ep_index;
2892 unsigned int num_stream_ctxs;
2893 unsigned long flags;
2894 u32 changed_ep_bitmask = 0;
2899 /* Add one to the number of streams requested to account for
2900 * stream 0 that is reserved for xHCI usage.
2903 xhci = hcd_to_xhci(hcd);
2904 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2907 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2909 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2913 /* Check to make sure all endpoints are not already configured for
2914 * streams. While we're at it, find the maximum number of streams that
2915 * all the endpoints will support and check for duplicate endpoints.
2917 spin_lock_irqsave(&xhci->lock, flags);
2918 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2919 num_eps, &num_streams, &changed_ep_bitmask);
2921 xhci_free_command(xhci, config_cmd);
2922 spin_unlock_irqrestore(&xhci->lock, flags);
2925 if (num_streams <= 1) {
2926 xhci_warn(xhci, "WARN: endpoints can't handle "
2927 "more than one stream.\n");
2928 xhci_free_command(xhci, config_cmd);
2929 spin_unlock_irqrestore(&xhci->lock, flags);
2932 vdev = xhci->devs[udev->slot_id];
2933 /* Mark each endpoint as being in transition, so
2934 * xhci_urb_enqueue() will reject all URBs.
2936 for (i = 0; i < num_eps; i++) {
2937 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2938 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2940 spin_unlock_irqrestore(&xhci->lock, flags);
2942 /* Setup internal data structures and allocate HW data structures for
2943 * streams (but don't install the HW structures in the input context
2944 * until we're sure all memory allocation succeeded).
2946 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2947 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2948 num_stream_ctxs, num_streams);
2950 for (i = 0; i < num_eps; i++) {
2951 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2952 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2954 num_streams, mem_flags);
2955 if (!vdev->eps[ep_index].stream_info)
2957 /* Set maxPstreams in endpoint context and update deq ptr to
2958 * point to stream context array. FIXME
2962 /* Set up the input context for a configure endpoint command. */
2963 for (i = 0; i < num_eps; i++) {
2964 struct xhci_ep_ctx *ep_ctx;
2966 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2967 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2969 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2970 vdev->out_ctx, ep_index);
2971 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2972 vdev->eps[ep_index].stream_info);
2974 /* Tell the HW to drop its old copy of the endpoint context info
2975 * and add the updated copy from the input context.
2977 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2978 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2980 /* Issue and wait for the configure endpoint command */
2981 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2984 /* xHC rejected the configure endpoint command for some reason, so we
2985 * leave the old ring intact and free our internal streams data
2991 spin_lock_irqsave(&xhci->lock, flags);
2992 for (i = 0; i < num_eps; i++) {
2993 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2994 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2995 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2996 udev->slot_id, ep_index);
2997 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2999 xhci_free_command(xhci, config_cmd);
3000 spin_unlock_irqrestore(&xhci->lock, flags);
3002 /* Subtract 1 for stream 0, which drivers can't use */
3003 return num_streams - 1;
3006 /* If it didn't work, free the streams! */
3007 for (i = 0; i < num_eps; i++) {
3008 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3009 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3010 vdev->eps[ep_index].stream_info = NULL;
3011 /* FIXME Unset maxPstreams in endpoint context and
3012 * update deq ptr to point to normal string ring.
3014 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3015 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3016 xhci_endpoint_zero(xhci, vdev, eps[i]);
3018 xhci_free_command(xhci, config_cmd);
3022 /* Transition the endpoint from using streams to being a "normal" endpoint
3025 * Modify the endpoint context state, submit a configure endpoint command,
3026 * and free all endpoint rings for streams if that completes successfully.
3028 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3029 struct usb_host_endpoint **eps, unsigned int num_eps,
3033 struct xhci_hcd *xhci;
3034 struct xhci_virt_device *vdev;
3035 struct xhci_command *command;
3036 unsigned int ep_index;
3037 unsigned long flags;
3038 u32 changed_ep_bitmask;
3040 xhci = hcd_to_xhci(hcd);
3041 vdev = xhci->devs[udev->slot_id];
3043 /* Set up a configure endpoint command to remove the streams rings */
3044 spin_lock_irqsave(&xhci->lock, flags);
3045 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3046 udev, eps, num_eps);
3047 if (changed_ep_bitmask == 0) {
3048 spin_unlock_irqrestore(&xhci->lock, flags);
3052 /* Use the xhci_command structure from the first endpoint. We may have
3053 * allocated too many, but the driver may call xhci_free_streams() for
3054 * each endpoint it grouped into one call to xhci_alloc_streams().
3056 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3057 command = vdev->eps[ep_index].stream_info->free_streams_command;
3058 for (i = 0; i < num_eps; i++) {
3059 struct xhci_ep_ctx *ep_ctx;
3061 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3062 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3063 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3064 EP_GETTING_NO_STREAMS;
3066 xhci_endpoint_copy(xhci, command->in_ctx,
3067 vdev->out_ctx, ep_index);
3068 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3069 &vdev->eps[ep_index]);
3071 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3072 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3073 spin_unlock_irqrestore(&xhci->lock, flags);
3075 /* Issue and wait for the configure endpoint command,
3076 * which must succeed.
3078 ret = xhci_configure_endpoint(xhci, udev, command,
3081 /* xHC rejected the configure endpoint command for some reason, so we
3082 * leave the streams rings intact.
3087 spin_lock_irqsave(&xhci->lock, flags);
3088 for (i = 0; i < num_eps; i++) {
3089 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3090 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3091 vdev->eps[ep_index].stream_info = NULL;
3092 /* FIXME Unset maxPstreams in endpoint context and
3093 * update deq ptr to point to normal string ring.
3095 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3096 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3098 spin_unlock_irqrestore(&xhci->lock, flags);
3104 * Deletes endpoint resources for endpoints that were active before a Reset
3105 * Device command, or a Disable Slot command. The Reset Device command leaves
3106 * the control endpoint intact, whereas the Disable Slot command deletes it.
3108 * Must be called with xhci->lock held.
3110 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3111 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3114 unsigned int num_dropped_eps = 0;
3115 unsigned int drop_flags = 0;
3117 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3118 if (virt_dev->eps[i].ring) {
3119 drop_flags |= 1 << i;
3123 xhci->num_active_eps -= num_dropped_eps;
3124 if (num_dropped_eps)
3125 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3127 num_dropped_eps, drop_flags,
3128 xhci->num_active_eps);
3132 * This submits a Reset Device Command, which will set the device state to 0,
3133 * set the device address to 0, and disable all the endpoints except the default
3134 * control endpoint. The USB core should come back and call
3135 * xhci_address_device(), and then re-set up the configuration. If this is
3136 * called because of a usb_reset_and_verify_device(), then the old alternate
3137 * settings will be re-installed through the normal bandwidth allocation
3140 * Wait for the Reset Device command to finish. Remove all structures
3141 * associated with the endpoints that were disabled. Clear the input device
3142 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3144 * If the virt_dev to be reset does not exist or does not match the udev,
3145 * it means the device is lost, possibly due to the xHC restore error and
3146 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3147 * re-allocate the device.
3149 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3152 unsigned long flags;
3153 struct xhci_hcd *xhci;
3154 unsigned int slot_id;
3155 struct xhci_virt_device *virt_dev;
3156 struct xhci_command *reset_device_cmd;
3158 int last_freed_endpoint;
3159 struct xhci_slot_ctx *slot_ctx;
3160 int old_active_eps = 0;
3162 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3165 xhci = hcd_to_xhci(hcd);
3166 slot_id = udev->slot_id;
3167 virt_dev = xhci->devs[slot_id];
3169 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3170 "not exist. Re-allocate the device\n", slot_id);
3171 ret = xhci_alloc_dev(hcd, udev);
3178 if (virt_dev->udev != udev) {
3179 /* If the virt_dev and the udev does not match, this virt_dev
3180 * may belong to another udev.
3181 * Re-allocate the device.
3183 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3184 "not match the udev. Re-allocate the device\n",
3186 ret = xhci_alloc_dev(hcd, udev);
3193 /* If device is not setup, there is no point in resetting it */
3194 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3195 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3196 SLOT_STATE_DISABLED)
3199 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3200 /* Allocate the command structure that holds the struct completion.
3201 * Assume we're in process context, since the normal device reset
3202 * process has to wait for the device anyway. Storage devices are
3203 * reset as part of error handling, so use GFP_NOIO instead of
3206 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3207 if (!reset_device_cmd) {
3208 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3212 /* Attempt to submit the Reset Device command to the command ring */
3213 spin_lock_irqsave(&xhci->lock, flags);
3214 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3216 /* Enqueue pointer can be left pointing to the link TRB,
3217 * we must handle that
3219 if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3220 reset_device_cmd->command_trb =
3221 xhci->cmd_ring->enq_seg->next->trbs;
3223 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3224 ret = xhci_queue_reset_device(xhci, slot_id);
3226 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3227 list_del(&reset_device_cmd->cmd_list);
3228 spin_unlock_irqrestore(&xhci->lock, flags);
3229 goto command_cleanup;
3231 xhci_ring_cmd_db(xhci);
3232 spin_unlock_irqrestore(&xhci->lock, flags);
3234 /* Wait for the Reset Device command to finish */
3235 timeleft = wait_for_completion_interruptible_timeout(
3236 reset_device_cmd->completion,
3237 USB_CTRL_SET_TIMEOUT);
3238 if (timeleft <= 0) {
3239 xhci_warn(xhci, "%s while waiting for reset device command\n",
3240 timeleft == 0 ? "Timeout" : "Signal");
3241 spin_lock_irqsave(&xhci->lock, flags);
3242 /* The timeout might have raced with the event ring handler, so
3243 * only delete from the list if the item isn't poisoned.
3245 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3246 list_del(&reset_device_cmd->cmd_list);
3247 spin_unlock_irqrestore(&xhci->lock, flags);
3249 goto command_cleanup;
3252 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3253 * unless we tried to reset a slot ID that wasn't enabled,
3254 * or the device wasn't in the addressed or configured state.
3256 ret = reset_device_cmd->status;
3258 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3259 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3260 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3262 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3263 xhci_info(xhci, "Not freeing device rings.\n");
3264 /* Don't treat this as an error. May change my mind later. */
3266 goto command_cleanup;
3268 xhci_dbg(xhci, "Successful reset device command.\n");
3271 if (xhci_is_vendor_info_code(xhci, ret))
3273 xhci_warn(xhci, "Unknown completion code %u for "
3274 "reset device command.\n", ret);
3276 goto command_cleanup;
3279 /* Free up host controller endpoint resources */
3280 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3281 spin_lock_irqsave(&xhci->lock, flags);
3282 /* Don't delete the default control endpoint resources */
3283 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3284 spin_unlock_irqrestore(&xhci->lock, flags);
3287 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3288 last_freed_endpoint = 1;
3289 for (i = 1; i < 31; ++i) {
3290 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3292 if (ep->ep_state & EP_HAS_STREAMS) {
3293 xhci_free_stream_info(xhci, ep->stream_info);
3294 ep->stream_info = NULL;
3295 ep->ep_state &= ~EP_HAS_STREAMS;
3299 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3300 last_freed_endpoint = i;
3302 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3303 xhci_drop_ep_from_interval_table(xhci,
3304 &virt_dev->eps[i].bw_info,
3309 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3311 /* If necessary, update the number of active TTs on this root port */
3312 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3314 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3315 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3319 xhci_free_command(xhci, reset_device_cmd);
3324 * At this point, the struct usb_device is about to go away, the device has
3325 * disconnected, and all traffic has been stopped and the endpoints have been
3326 * disabled. Free any HC data structures associated with that device.
3328 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3330 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3331 struct xhci_virt_device *virt_dev;
3332 unsigned long flags;
3336 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3337 /* If the host is halted due to driver unload, we still need to free the
3340 if (ret <= 0 && ret != -ENODEV)
3343 virt_dev = xhci->devs[udev->slot_id];
3345 /* Stop any wayward timer functions (which may grab the lock) */
3346 for (i = 0; i < 31; ++i) {
3347 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3348 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3351 if (udev->usb2_hw_lpm_enabled) {
3352 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3353 udev->usb2_hw_lpm_enabled = 0;
3356 spin_lock_irqsave(&xhci->lock, flags);
3357 /* Don't disable the slot if the host controller is dead. */
3358 state = xhci_readl(xhci, &xhci->op_regs->status);
3359 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3360 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3361 xhci_free_virt_device(xhci, udev->slot_id);
3362 spin_unlock_irqrestore(&xhci->lock, flags);
3366 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3367 spin_unlock_irqrestore(&xhci->lock, flags);
3368 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3371 xhci_ring_cmd_db(xhci);
3372 spin_unlock_irqrestore(&xhci->lock, flags);
3374 * Event command completion handler will free any data structures
3375 * associated with the slot. XXX Can free sleep?
3380 * Checks if we have enough host controller resources for the default control
3383 * Must be called with xhci->lock held.
3385 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3387 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3388 xhci_dbg(xhci, "Not enough ep ctxs: "
3389 "%u active, need to add 1, limit is %u.\n",
3390 xhci->num_active_eps, xhci->limit_active_eps);
3393 xhci->num_active_eps += 1;
3394 xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3395 xhci->num_active_eps);
3401 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3402 * timed out, or allocating memory failed. Returns 1 on success.
3404 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3406 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3407 unsigned long flags;
3411 spin_lock_irqsave(&xhci->lock, flags);
3412 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3414 spin_unlock_irqrestore(&xhci->lock, flags);
3415 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3418 xhci_ring_cmd_db(xhci);
3419 spin_unlock_irqrestore(&xhci->lock, flags);
3421 /* XXX: how much time for xHC slot assignment? */
3422 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3423 USB_CTRL_SET_TIMEOUT);
3424 if (timeleft <= 0) {
3425 xhci_warn(xhci, "%s while waiting for a slot\n",
3426 timeleft == 0 ? "Timeout" : "Signal");
3427 /* FIXME cancel the enable slot request */
3431 if (!xhci->slot_id) {
3432 xhci_err(xhci, "Error while assigning device slot ID\n");
3436 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3437 spin_lock_irqsave(&xhci->lock, flags);
3438 ret = xhci_reserve_host_control_ep_resources(xhci);
3440 spin_unlock_irqrestore(&xhci->lock, flags);
3441 xhci_warn(xhci, "Not enough host resources, "
3442 "active endpoint contexts = %u\n",
3443 xhci->num_active_eps);
3446 spin_unlock_irqrestore(&xhci->lock, flags);
3448 /* Use GFP_NOIO, since this function can be called from
3449 * xhci_discover_or_reset_device(), which may be called as part of
3450 * mass storage driver error handling.
3452 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3453 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3456 udev->slot_id = xhci->slot_id;
3457 /* Is this a LS or FS device under a HS hub? */
3458 /* Hub or peripherial? */
3462 /* Disable slot, if we can do it without mem alloc */
3463 spin_lock_irqsave(&xhci->lock, flags);
3464 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3465 xhci_ring_cmd_db(xhci);
3466 spin_unlock_irqrestore(&xhci->lock, flags);
3471 * Issue an Address Device command (which will issue a SetAddress request to
3473 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3474 * we should only issue and wait on one address command at the same time.
3476 * We add one to the device address issued by the hardware because the USB core
3477 * uses address 1 for the root hubs (even though they're not really devices).
3479 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3481 unsigned long flags;
3483 struct xhci_virt_device *virt_dev;
3485 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3486 struct xhci_slot_ctx *slot_ctx;
3487 struct xhci_input_control_ctx *ctrl_ctx;
3490 if (!udev->slot_id) {
3491 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3495 virt_dev = xhci->devs[udev->slot_id];
3497 if (WARN_ON(!virt_dev)) {
3499 * In plug/unplug torture test with an NEC controller,
3500 * a zero-dereference was observed once due to virt_dev = 0.
3501 * Print useful debug rather than crash if it is observed again!
3503 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3508 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3510 * If this is the first Set Address since device plug-in or
3511 * virt_device realloaction after a resume with an xHCI power loss,
3512 * then set up the slot context.
3514 if (!slot_ctx->dev_info)
3515 xhci_setup_addressable_virt_dev(xhci, udev);
3516 /* Otherwise, update the control endpoint ring enqueue pointer. */
3518 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3519 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3520 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3521 ctrl_ctx->drop_flags = 0;
3523 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3524 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3526 spin_lock_irqsave(&xhci->lock, flags);
3527 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3530 spin_unlock_irqrestore(&xhci->lock, flags);
3531 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3534 xhci_ring_cmd_db(xhci);
3535 spin_unlock_irqrestore(&xhci->lock, flags);
3537 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3538 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3539 USB_CTRL_SET_TIMEOUT);
3540 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3541 * the SetAddress() "recovery interval" required by USB and aborting the
3542 * command on a timeout.
3544 if (timeleft <= 0) {
3545 xhci_warn(xhci, "%s while waiting for address device command\n",
3546 timeleft == 0 ? "Timeout" : "Signal");
3547 /* FIXME cancel the address device command */
3551 switch (virt_dev->cmd_status) {
3552 case COMP_CTX_STATE:
3554 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3559 dev_warn(&udev->dev, "Device not responding to set address.\n");
3563 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3564 "device command.\n");
3568 xhci_dbg(xhci, "Successful Address Device command\n");
3571 xhci_err(xhci, "ERROR: unexpected command completion "
3572 "code 0x%x.\n", virt_dev->cmd_status);
3573 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3574 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3581 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3582 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3583 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3585 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3586 (unsigned long long)
3587 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3588 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3589 (unsigned long long)virt_dev->out_ctx->dma);
3590 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3591 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3592 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3593 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3595 * USB core uses address 1 for the roothubs, so we add one to the
3596 * address given back to us by the HC.
3598 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3599 /* Use kernel assigned address for devices; store xHC assigned
3600 * address locally. */
3601 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3603 /* Zero the input context control for later use */
3604 ctrl_ctx->add_flags = 0;
3605 ctrl_ctx->drop_flags = 0;
3607 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3612 #ifdef CONFIG_USB_SUSPEND
3614 /* BESL to HIRD Encoding array for USB2 LPM */
3615 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3616 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3618 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3619 static int xhci_calculate_hird_besl(int u2del, bool use_besl)
3624 for (hird = 0; hird < 16; hird++) {
3625 if (xhci_besl_encoding[hird] >= u2del)
3632 hird = (u2del - 51) / 75 + 1;
3641 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
3642 struct usb_device *udev)
3644 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3645 struct dev_info *dev_info;
3646 __le32 __iomem **port_array;
3647 __le32 __iomem *addr, *pm_addr;
3649 unsigned int port_num;
3650 unsigned long flags;
3654 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
3658 /* we only support lpm for non-hub device connected to root hub yet */
3659 if (!udev->parent || udev->parent->parent ||
3660 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3663 spin_lock_irqsave(&xhci->lock, flags);
3665 /* Look for devices in lpm_failed_devs list */
3666 dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
3667 le16_to_cpu(udev->descriptor.idProduct);
3668 list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
3669 if (dev_info->dev_id == dev_id) {
3675 port_array = xhci->usb2_ports;
3676 port_num = udev->portnum - 1;
3678 if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
3679 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
3685 * Test USB 2.0 software LPM.
3686 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3687 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3688 * in the June 2011 errata release.
3690 xhci_dbg(xhci, "test port %d software LPM\n", port_num);
3692 * Set L1 Device Slot and HIRD/BESL.
3693 * Check device's USB 2.0 extension descriptor to determine whether
3694 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3696 pm_addr = port_array[port_num] + 1;
3697 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3698 if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3699 hird = xhci_calculate_hird_besl(u2del, 1);
3701 hird = xhci_calculate_hird_besl(u2del, 0);
3703 temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
3704 xhci_writel(xhci, temp, pm_addr);
3706 /* Set port link state to U2(L1) */
3707 addr = port_array[port_num];
3708 xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
3711 spin_unlock_irqrestore(&xhci->lock, flags);
3713 spin_lock_irqsave(&xhci->lock, flags);
3715 /* Check L1 Status */
3716 ret = handshake(xhci, pm_addr, PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
3717 if (ret != -ETIMEDOUT) {
3718 /* enter L1 successfully */
3719 temp = xhci_readl(xhci, addr);
3720 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
3724 temp = xhci_readl(xhci, pm_addr);
3725 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
3726 port_num, temp & PORT_L1S_MASK);
3730 /* Resume the port */
3731 xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
3733 spin_unlock_irqrestore(&xhci->lock, flags);
3735 spin_lock_irqsave(&xhci->lock, flags);
3738 xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
3740 /* Check PORTSC to make sure the device is in the right state */
3742 temp = xhci_readl(xhci, addr);
3743 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
3744 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
3745 (temp & PORT_PLS_MASK) != XDEV_U0) {
3746 xhci_dbg(xhci, "port L1 resume fail\n");
3752 /* Insert dev to lpm_failed_devs list */
3753 xhci_warn(xhci, "device LPM test failed, may disconnect and "
3755 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
3760 dev_info->dev_id = dev_id;
3761 INIT_LIST_HEAD(&dev_info->list);
3762 list_add(&dev_info->list, &xhci->lpm_failed_devs);
3764 xhci_ring_device(xhci, udev->slot_id);
3768 spin_unlock_irqrestore(&xhci->lock, flags);
3772 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3773 struct usb_device *udev, int enable)
3775 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3776 __le32 __iomem **port_array;
3777 __le32 __iomem *pm_addr;
3779 unsigned int port_num;
3780 unsigned long flags;
3783 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
3787 if (!udev->parent || udev->parent->parent ||
3788 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3791 if (udev->usb2_hw_lpm_capable != 1)
3794 spin_lock_irqsave(&xhci->lock, flags);
3796 port_array = xhci->usb2_ports;
3797 port_num = udev->portnum - 1;
3798 pm_addr = port_array[port_num] + 1;
3799 temp = xhci_readl(xhci, pm_addr);
3801 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
3802 enable ? "enable" : "disable", port_num);
3804 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3805 if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3806 hird = xhci_calculate_hird_besl(u2del, 1);
3808 hird = xhci_calculate_hird_besl(u2del, 0);
3811 temp &= ~PORT_HIRD_MASK;
3812 temp |= PORT_HIRD(hird) | PORT_RWE;
3813 xhci_writel(xhci, temp, pm_addr);
3814 temp = xhci_readl(xhci, pm_addr);
3816 xhci_writel(xhci, temp, pm_addr);
3818 temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
3819 xhci_writel(xhci, temp, pm_addr);
3822 spin_unlock_irqrestore(&xhci->lock, flags);
3826 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3828 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3831 ret = xhci_usb2_software_lpm_test(hcd, udev);
3833 xhci_dbg(xhci, "software LPM test succeed\n");
3834 if (xhci->hw_lpm_support == 1) {
3835 udev->usb2_hw_lpm_capable = 1;
3836 ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
3838 udev->usb2_hw_lpm_enabled = 1;
3847 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3848 struct usb_device *udev, int enable)
3853 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3858 #endif /* CONFIG_USB_SUSPEND */
3860 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
3861 * internal data structures for the device.
3863 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
3864 struct usb_tt *tt, gfp_t mem_flags)
3866 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3867 struct xhci_virt_device *vdev;
3868 struct xhci_command *config_cmd;
3869 struct xhci_input_control_ctx *ctrl_ctx;
3870 struct xhci_slot_ctx *slot_ctx;
3871 unsigned long flags;
3872 unsigned think_time;
3875 /* Ignore root hubs */
3879 vdev = xhci->devs[hdev->slot_id];
3881 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
3884 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3886 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3890 spin_lock_irqsave(&xhci->lock, flags);
3891 if (hdev->speed == USB_SPEED_HIGH &&
3892 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
3893 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
3894 xhci_free_command(xhci, config_cmd);
3895 spin_unlock_irqrestore(&xhci->lock, flags);
3899 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
3900 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3901 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3902 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
3903 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
3905 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
3906 if (xhci->hci_version > 0x95) {
3907 xhci_dbg(xhci, "xHCI version %x needs hub "
3908 "TT think time and number of ports\n",
3909 (unsigned int) xhci->hci_version);
3910 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
3911 /* Set TT think time - convert from ns to FS bit times.
3912 * 0 = 8 FS bit times, 1 = 16 FS bit times,
3913 * 2 = 24 FS bit times, 3 = 32 FS bit times.
3915 * xHCI 1.0: this field shall be 0 if the device is not a
3918 think_time = tt->think_time;
3919 if (think_time != 0)
3920 think_time = (think_time / 666) - 1;
3921 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
3922 slot_ctx->tt_info |=
3923 cpu_to_le32(TT_THINK_TIME(think_time));
3925 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
3926 "TT think time or number of ports\n",
3927 (unsigned int) xhci->hci_version);
3929 slot_ctx->dev_state = 0;
3930 spin_unlock_irqrestore(&xhci->lock, flags);
3932 xhci_dbg(xhci, "Set up %s for hub device.\n",
3933 (xhci->hci_version > 0x95) ?
3934 "configure endpoint" : "evaluate context");
3935 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
3936 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
3938 /* Issue and wait for the configure endpoint or
3939 * evaluate context command.
3941 if (xhci->hci_version > 0x95)
3942 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3945 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3948 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
3949 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
3951 xhci_free_command(xhci, config_cmd);
3955 int xhci_get_frame(struct usb_hcd *hcd)
3957 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3958 /* EHCI mods by the periodic size. Why? */
3959 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
3962 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
3964 struct xhci_hcd *xhci;
3965 struct device *dev = hcd->self.controller;
3969 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
3971 if (usb_hcd_is_primary_hcd(hcd)) {
3972 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
3975 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
3976 xhci->main_hcd = hcd;
3977 /* Mark the first roothub as being USB 2.0.
3978 * The xHCI driver will register the USB 3.0 roothub.
3980 hcd->speed = HCD_USB2;
3981 hcd->self.root_hub->speed = USB_SPEED_HIGH;
3983 * USB 2.0 roothub under xHCI has an integrated TT,
3984 * (rate matching hub) as opposed to having an OHCI/UHCI
3985 * companion controller.
3989 /* xHCI private pointer was set in xhci_pci_probe for the second
3990 * registered roothub.
3992 xhci = hcd_to_xhci(hcd);
3993 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
3994 if (HCC_64BIT_ADDR(temp)) {
3995 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
3996 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
3998 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4003 xhci->cap_regs = hcd->regs;
4004 xhci->op_regs = hcd->regs +
4005 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4006 xhci->run_regs = hcd->regs +
4007 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4008 /* Cache read-only capability registers */
4009 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4010 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4011 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4012 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4013 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4014 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4015 xhci_print_registers(xhci);
4017 get_quirks(dev, xhci);
4019 /* Make sure the HC is halted. */
4020 retval = xhci_halt(xhci);
4024 xhci_dbg(xhci, "Resetting HCD\n");
4025 /* Reset the internal HC memory state and registers. */
4026 retval = xhci_reset(xhci);
4029 xhci_dbg(xhci, "Reset complete\n");
4031 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4032 if (HCC_64BIT_ADDR(temp)) {
4033 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4034 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4036 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4039 xhci_dbg(xhci, "Calling HCD init\n");
4040 /* Initialize HCD and host controller data structures. */
4041 retval = xhci_init(hcd);
4044 xhci_dbg(xhci, "Called HCD init\n");
4051 MODULE_DESCRIPTION(DRIVER_DESC);
4052 MODULE_AUTHOR(DRIVER_AUTHOR);
4053 MODULE_LICENSE("GPL");
4055 static int __init xhci_hcd_init(void)
4059 retval = xhci_register_pci();
4061 printk(KERN_DEBUG "Problem registering PCI driver.");
4065 * Check the compiler generated sizes of structures that must be laid
4066 * out in specific ways for hardware access.
4068 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4069 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4070 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4071 /* xhci_device_control has eight fields, and also
4072 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4074 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4075 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4076 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4077 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4078 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4079 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4080 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4081 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4084 module_init(xhci_hcd_init);
4086 static void __exit xhci_hcd_cleanup(void)
4088 xhci_unregister_pci();
4090 module_exit(xhci_hcd_cleanup);