2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
36 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
38 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
39 static int link_quirk;
40 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
41 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
43 /* TODO: copied from ehci-hcd.c - can this be refactored? */
45 * handshake - spin reading hc until handshake completes or fails
46 * @ptr: address of hc register to be read
47 * @mask: bits to look at in result of read
48 * @done: value of those bits when handshake succeeds
49 * @usec: timeout in microseconds
51 * Returns negative errno, or zero on success
53 * Success happens when the "mask" bits have the specified value (hardware
54 * handshake done). There are two failure modes: "usec" have passed (major
55 * hardware flakeout), or the register reads as all-ones (hardware removed).
57 int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
58 u32 mask, u32 done, int usec)
63 result = xhci_readl(xhci, ptr);
64 if (result == ~(u32)0) /* card removed */
76 * Disable interrupts and begin the xHCI halting process.
78 void xhci_quiesce(struct xhci_hcd *xhci)
85 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
89 cmd = xhci_readl(xhci, &xhci->op_regs->command);
91 xhci_writel(xhci, cmd, &xhci->op_regs->command);
95 * Force HC into halt state.
97 * Disable any IRQs and clear the run/stop bit.
98 * HC will complete any current and actively pipelined transactions, and
99 * should halt within 16 ms of the run/stop bit being cleared.
100 * Read HC Halted bit in the status register to see when the HC is finished.
102 int xhci_halt(struct xhci_hcd *xhci)
105 xhci_dbg(xhci, "// Halt the HC\n");
108 ret = handshake(xhci, &xhci->op_regs->status,
109 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
111 xhci->xhc_state |= XHCI_STATE_HALTED;
112 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
114 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
120 * Set the run bit and wait for the host to be running.
122 static int xhci_start(struct xhci_hcd *xhci)
127 temp = xhci_readl(xhci, &xhci->op_regs->command);
129 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
131 xhci_writel(xhci, temp, &xhci->op_regs->command);
134 * Wait for the HCHalted Status bit to be 0 to indicate the host is
137 ret = handshake(xhci, &xhci->op_regs->status,
138 STS_HALT, 0, XHCI_MAX_HALT_USEC);
139 if (ret == -ETIMEDOUT)
140 xhci_err(xhci, "Host took too long to start, "
141 "waited %u microseconds.\n",
144 xhci->xhc_state &= ~XHCI_STATE_HALTED;
151 * This resets pipelines, timers, counters, state machines, etc.
152 * Transactions will be terminated immediately, and operational registers
153 * will be set to their defaults.
155 int xhci_reset(struct xhci_hcd *xhci)
161 state = xhci_readl(xhci, &xhci->op_regs->status);
162 if ((state & STS_HALT) == 0) {
163 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
167 xhci_dbg(xhci, "// Reset the HC\n");
168 command = xhci_readl(xhci, &xhci->op_regs->command);
169 command |= CMD_RESET;
170 xhci_writel(xhci, command, &xhci->op_regs->command);
172 ret = handshake(xhci, &xhci->op_regs->command,
173 CMD_RESET, 0, 10 * 1000 * 1000);
177 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
179 * xHCI cannot write to any doorbells or operational registers other
180 * than status until the "Controller Not Ready" flag is cleared.
182 return handshake(xhci, &xhci->op_regs->status,
183 STS_CNR, 0, 10 * 1000 * 1000);
187 static int xhci_free_msi(struct xhci_hcd *xhci)
191 if (!xhci->msix_entries)
194 for (i = 0; i < xhci->msix_count; i++)
195 if (xhci->msix_entries[i].vector)
196 free_irq(xhci->msix_entries[i].vector,
204 static int xhci_setup_msi(struct xhci_hcd *xhci)
207 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
209 ret = pci_enable_msi(pdev);
211 xhci_dbg(xhci, "failed to allocate MSI entry\n");
215 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
216 0, "xhci_hcd", xhci_to_hcd(xhci));
218 xhci_dbg(xhci, "disable MSI interrupt\n");
219 pci_disable_msi(pdev);
227 * free all IRQs request
229 static void xhci_free_irq(struct xhci_hcd *xhci)
231 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
234 /* return if using legacy interrupt */
235 if (xhci_to_hcd(xhci)->irq >= 0)
238 ret = xhci_free_msi(xhci);
242 free_irq(pdev->irq, xhci_to_hcd(xhci));
250 static int xhci_setup_msix(struct xhci_hcd *xhci)
253 struct usb_hcd *hcd = xhci_to_hcd(xhci);
254 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
257 * calculate number of msi-x vectors supported.
258 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
259 * with max number of interrupters based on the xhci HCSPARAMS1.
260 * - num_online_cpus: maximum msi-x vectors per CPUs core.
261 * Add additional 1 vector to ensure always available interrupt.
263 xhci->msix_count = min(num_online_cpus() + 1,
264 HCS_MAX_INTRS(xhci->hcs_params1));
267 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
269 if (!xhci->msix_entries) {
270 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
274 for (i = 0; i < xhci->msix_count; i++) {
275 xhci->msix_entries[i].entry = i;
276 xhci->msix_entries[i].vector = 0;
279 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
281 xhci_dbg(xhci, "Failed to enable MSI-X\n");
285 for (i = 0; i < xhci->msix_count; i++) {
286 ret = request_irq(xhci->msix_entries[i].vector,
287 (irq_handler_t)xhci_msi_irq,
288 0, "xhci_hcd", xhci_to_hcd(xhci));
293 hcd->msix_enabled = 1;
297 xhci_dbg(xhci, "disable MSI-X interrupt\n");
299 pci_disable_msix(pdev);
301 kfree(xhci->msix_entries);
302 xhci->msix_entries = NULL;
306 /* Free any IRQs and disable MSI-X */
307 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
309 struct usb_hcd *hcd = xhci_to_hcd(xhci);
310 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
314 if (xhci->msix_entries) {
315 pci_disable_msix(pdev);
316 kfree(xhci->msix_entries);
317 xhci->msix_entries = NULL;
319 pci_disable_msi(pdev);
322 hcd->msix_enabled = 0;
326 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
330 if (xhci->msix_entries) {
331 for (i = 0; i < xhci->msix_count; i++)
332 synchronize_irq(xhci->msix_entries[i].vector);
336 static int xhci_try_enable_msi(struct usb_hcd *hcd)
338 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
339 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
343 * Some Fresco Logic host controllers advertise MSI, but fail to
344 * generate interrupts. Don't even try to enable MSI.
346 if (xhci->quirks & XHCI_BROKEN_MSI)
349 /* unregister the legacy interrupt */
351 free_irq(hcd->irq, hcd);
354 ret = xhci_setup_msix(xhci);
356 /* fall back to msi*/
357 ret = xhci_setup_msi(xhci);
360 /* hcd->irq is -1, we have MSI */
364 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
369 /* fall back to legacy interrupt*/
370 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
371 hcd->irq_descr, hcd);
373 xhci_err(xhci, "request interrupt %d failed\n",
377 hcd->irq = pdev->irq;
383 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
388 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
392 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
398 static void compliance_mode_recovery(unsigned long arg)
400 struct xhci_hcd *xhci;
405 xhci = (struct xhci_hcd *)arg;
407 for (i = 0; i < xhci->num_usb3_ports; i++) {
408 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
409 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
411 * Compliance Mode Detected. Letting USB Core
412 * handle the Warm Reset
414 xhci_dbg(xhci, "Compliance Mode Detected->Port %d!\n",
416 xhci_dbg(xhci, "Attempting Recovery routine!\n");
417 hcd = xhci->shared_hcd;
419 if (hcd->state == HC_STATE_SUSPENDED)
420 usb_hcd_resume_root_hub(hcd);
422 usb_hcd_poll_rh_status(hcd);
426 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
427 mod_timer(&xhci->comp_mode_recovery_timer,
428 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
432 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
433 * that causes ports behind that hardware to enter compliance mode sometimes.
434 * The quirk creates a timer that polls every 2 seconds the link state of
435 * each host controller's port and recovers it by issuing a Warm reset
436 * if Compliance mode is detected, otherwise the port will become "dead" (no
437 * device connections or disconnections will be detected anymore). Becasue no
438 * status event is generated when entering compliance mode (per xhci spec),
439 * this quirk is needed on systems that have the failing hardware installed.
441 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
443 xhci->port_status_u0 = 0;
444 init_timer(&xhci->comp_mode_recovery_timer);
446 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
447 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
448 xhci->comp_mode_recovery_timer.expires = jiffies +
449 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
451 set_timer_slack(&xhci->comp_mode_recovery_timer,
452 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
453 add_timer(&xhci->comp_mode_recovery_timer);
454 xhci_dbg(xhci, "Compliance Mode Recovery Timer Initialized.\n");
458 * This function identifies the systems that have installed the SN65LVPE502CP
459 * USB3.0 re-driver and that need the Compliance Mode Quirk.
461 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
463 static bool compliance_mode_recovery_timer_quirk_check(void)
465 const char *dmi_product_name, *dmi_sys_vendor;
467 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
468 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
469 if (!dmi_product_name || !dmi_sys_vendor)
472 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
475 if (strstr(dmi_product_name, "Z420") ||
476 strstr(dmi_product_name, "Z620") ||
477 strstr(dmi_product_name, "Z820") ||
478 strstr(dmi_product_name, "Z1 Workstation"))
484 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
486 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
491 * Initialize memory for HCD and xHC (one-time init).
493 * Program the PAGESIZE register, initialize the device context array, create
494 * device contexts (?), set up a command ring segment (or two?), create event
495 * ring (one for now).
497 int xhci_init(struct usb_hcd *hcd)
499 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
502 xhci_dbg(xhci, "xhci_init\n");
503 spin_lock_init(&xhci->lock);
504 if (xhci->hci_version == 0x95 && link_quirk) {
505 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
506 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
508 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
510 retval = xhci_mem_init(xhci, GFP_KERNEL);
511 xhci_dbg(xhci, "Finished xhci_init\n");
513 /* Initializing Compliance Mode Recovery Data If Needed */
514 if (compliance_mode_recovery_timer_quirk_check()) {
515 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
516 compliance_mode_recovery_timer_init(xhci);
522 /*-------------------------------------------------------------------------*/
525 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
526 static void xhci_event_ring_work(unsigned long arg)
531 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
534 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
536 spin_lock_irqsave(&xhci->lock, flags);
537 temp = xhci_readl(xhci, &xhci->op_regs->status);
538 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
539 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
540 (xhci->xhc_state & XHCI_STATE_HALTED)) {
541 xhci_dbg(xhci, "HW died, polling stopped.\n");
542 spin_unlock_irqrestore(&xhci->lock, flags);
546 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
547 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
548 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
549 xhci->error_bitmask = 0;
550 xhci_dbg(xhci, "Event ring:\n");
551 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
552 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
553 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
554 temp_64 &= ~ERST_PTR_MASK;
555 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
556 xhci_dbg(xhci, "Command ring:\n");
557 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
558 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
559 xhci_dbg_cmd_ptrs(xhci);
560 for (i = 0; i < MAX_HC_SLOTS; ++i) {
563 for (j = 0; j < 31; ++j) {
564 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
567 spin_unlock_irqrestore(&xhci->lock, flags);
570 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
572 xhci_dbg(xhci, "Quit polling the event ring.\n");
576 static int xhci_run_finished(struct xhci_hcd *xhci)
578 if (xhci_start(xhci)) {
582 xhci->shared_hcd->state = HC_STATE_RUNNING;
583 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
585 if (xhci->quirks & XHCI_NEC_HOST)
586 xhci_ring_cmd_db(xhci);
588 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
593 * Start the HC after it was halted.
595 * This function is called by the USB core when the HC driver is added.
596 * Its opposite is xhci_stop().
598 * xhci_init() must be called once before this function can be called.
599 * Reset the HC, enable device slot contexts, program DCBAAP, and
600 * set command ring pointer and event ring pointer.
602 * Setup MSI-X vectors and enable interrupts.
604 int xhci_run(struct usb_hcd *hcd)
609 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
611 /* Start the xHCI host controller running only after the USB 2.0 roothub
615 hcd->uses_new_polling = 1;
616 if (!usb_hcd_is_primary_hcd(hcd))
617 return xhci_run_finished(xhci);
619 xhci_dbg(xhci, "xhci_run\n");
621 ret = xhci_try_enable_msi(hcd);
625 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
626 init_timer(&xhci->event_ring_timer);
627 xhci->event_ring_timer.data = (unsigned long) xhci;
628 xhci->event_ring_timer.function = xhci_event_ring_work;
629 /* Poll the event ring */
630 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
632 xhci_dbg(xhci, "Setting event ring polling timer\n");
633 add_timer(&xhci->event_ring_timer);
636 xhci_dbg(xhci, "Command ring memory map follows:\n");
637 xhci_debug_ring(xhci, xhci->cmd_ring);
638 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
639 xhci_dbg_cmd_ptrs(xhci);
641 xhci_dbg(xhci, "ERST memory map follows:\n");
642 xhci_dbg_erst(xhci, &xhci->erst);
643 xhci_dbg(xhci, "Event ring:\n");
644 xhci_debug_ring(xhci, xhci->event_ring);
645 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
646 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
647 temp_64 &= ~ERST_PTR_MASK;
648 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
650 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
651 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
652 temp &= ~ER_IRQ_INTERVAL_MASK;
654 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
656 /* Set the HCD state before we enable the irqs */
657 temp = xhci_readl(xhci, &xhci->op_regs->command);
659 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
661 xhci_writel(xhci, temp, &xhci->op_regs->command);
663 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
664 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
665 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
666 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
667 &xhci->ir_set->irq_pending);
668 xhci_print_ir_set(xhci, 0);
670 if (xhci->quirks & XHCI_NEC_HOST)
671 xhci_queue_vendor_command(xhci, 0, 0, 0,
672 TRB_TYPE(TRB_NEC_GET_FW));
674 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
678 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
680 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
682 spin_lock_irq(&xhci->lock);
685 /* The shared_hcd is going to be deallocated shortly (the USB core only
686 * calls this function when allocation fails in usb_add_hcd(), or
687 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
689 xhci->shared_hcd = NULL;
690 spin_unlock_irq(&xhci->lock);
696 * This function is called by the USB core when the HC driver is removed.
697 * Its opposite is xhci_run().
699 * Disable device contexts, disable IRQs, and quiesce the HC.
700 * Reset the HC, finish any completed transactions, and cleanup memory.
702 void xhci_stop(struct usb_hcd *hcd)
705 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
707 if (!usb_hcd_is_primary_hcd(hcd)) {
708 xhci_only_stop_hcd(xhci->shared_hcd);
712 spin_lock_irq(&xhci->lock);
713 /* Make sure the xHC is halted for a USB3 roothub
714 * (xhci_stop() could be called as part of failed init).
718 spin_unlock_irq(&xhci->lock);
720 xhci_cleanup_msix(xhci);
722 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
723 /* Tell the event ring poll function not to reschedule */
725 del_timer_sync(&xhci->event_ring_timer);
728 /* Deleting Compliance Mode Recovery Timer */
729 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
730 (!(xhci_all_ports_seen_u0(xhci))))
731 del_timer_sync(&xhci->comp_mode_recovery_timer);
733 if (xhci->quirks & XHCI_AMD_PLL_FIX)
736 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
737 temp = xhci_readl(xhci, &xhci->op_regs->status);
738 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
739 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
740 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
741 &xhci->ir_set->irq_pending);
742 xhci_print_ir_set(xhci, 0);
744 xhci_dbg(xhci, "cleaning up memory\n");
745 xhci_mem_cleanup(xhci);
746 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
747 xhci_readl(xhci, &xhci->op_regs->status));
751 * Shutdown HC (not bus-specific)
753 * This is called when the machine is rebooting or halting. We assume that the
754 * machine will be powered off, and the HC's internal state will be reset.
755 * Don't bother to free memory.
757 * This will only ever be called with the main usb_hcd (the USB3 roothub).
759 void xhci_shutdown(struct usb_hcd *hcd)
761 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
763 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
764 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
766 spin_lock_irq(&xhci->lock);
768 /* Workaround for spurious wakeups at shutdown with HSW */
769 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
771 spin_unlock_irq(&xhci->lock);
773 xhci_cleanup_msix(xhci);
775 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
776 xhci_readl(xhci, &xhci->op_regs->status));
778 /* Yet another workaround for spurious wakeups at shutdown with HSW */
779 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
780 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
784 static void xhci_save_registers(struct xhci_hcd *xhci)
786 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
787 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
788 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
789 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
790 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
791 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
792 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
793 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
794 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
797 static void xhci_restore_registers(struct xhci_hcd *xhci)
799 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
800 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
801 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
802 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
803 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
804 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
805 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
806 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
807 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
810 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
814 /* step 2: initialize command ring buffer */
815 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
816 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
817 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
818 xhci->cmd_ring->dequeue) &
819 (u64) ~CMD_RING_RSVD_BITS) |
820 xhci->cmd_ring->cycle_state;
821 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
822 (long unsigned long) val_64);
823 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
827 * The whole command ring must be cleared to zero when we suspend the host.
829 * The host doesn't save the command ring pointer in the suspend well, so we
830 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
831 * aligned, because of the reserved bits in the command ring dequeue pointer
832 * register. Therefore, we can't just set the dequeue pointer back in the
833 * middle of the ring (TRBs are 16-byte aligned).
835 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
837 struct xhci_ring *ring;
838 struct xhci_segment *seg;
840 ring = xhci->cmd_ring;
844 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
845 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
846 cpu_to_le32(~TRB_CYCLE);
848 } while (seg != ring->deq_seg);
850 /* Reset the software enqueue and dequeue pointers */
851 ring->deq_seg = ring->first_seg;
852 ring->dequeue = ring->first_seg->trbs;
853 ring->enq_seg = ring->deq_seg;
854 ring->enqueue = ring->dequeue;
857 * Ring is now zeroed, so the HW should look for change of ownership
858 * when the cycle bit is set to 1.
860 ring->cycle_state = 1;
863 * Reset the hardware dequeue pointer.
864 * Yes, this will need to be re-written after resume, but we're paranoid
865 * and want to make sure the hardware doesn't access bogus memory
866 * because, say, the BIOS or an SMI started the host without changing
867 * the command ring pointers.
869 xhci_set_cmd_ring_deq(xhci);
872 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
875 __le32 __iomem **port_array;
879 spin_lock_irqsave(&xhci->lock, flags);
881 /* disble usb3 ports Wake bits*/
882 port_index = xhci->num_usb3_ports;
883 port_array = xhci->usb3_ports;
884 while (port_index--) {
885 t1 = readl(port_array[port_index]);
886 t1 = xhci_port_state_to_neutral(t1);
887 t2 = t1 & ~PORT_WAKE_BITS;
889 writel(t2, port_array[port_index]);
892 /* disble usb2 ports Wake bits*/
893 port_index = xhci->num_usb2_ports;
894 port_array = xhci->usb2_ports;
895 while (port_index--) {
896 t1 = readl(port_array[port_index]);
897 t1 = xhci_port_state_to_neutral(t1);
898 t2 = t1 & ~PORT_WAKE_BITS;
900 writel(t2, port_array[port_index]);
903 spin_unlock_irqrestore(&xhci->lock, flags);
907 * Stop HC (not bus-specific)
909 * This is called when the machine transition into S3/S4 mode.
912 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
915 unsigned int delay = XHCI_MAX_HALT_USEC;
916 struct usb_hcd *hcd = xhci_to_hcd(xhci);
919 /* Clear root port wake on bits if wakeup not allowed. */
921 xhci_disable_port_wake_on_bits(xhci);
923 /* Don't poll the roothubs on bus suspend. */
924 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
925 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
926 del_timer_sync(&hcd->rh_timer);
928 spin_lock_irq(&xhci->lock);
929 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
930 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
931 /* step 1: stop endpoint */
932 /* skipped assuming that port suspend has done */
934 /* step 2: clear Run/Stop bit */
935 command = xhci_readl(xhci, &xhci->op_regs->command);
937 xhci_writel(xhci, command, &xhci->op_regs->command);
939 /* Some chips from Fresco Logic need an extraordinary delay */
940 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
942 if (handshake(xhci, &xhci->op_regs->status,
943 STS_HALT, STS_HALT, delay)) {
944 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
945 spin_unlock_irq(&xhci->lock);
948 xhci_clear_command_ring(xhci);
950 /* step 3: save registers */
951 xhci_save_registers(xhci);
953 /* step 4: set CSS flag */
954 command = xhci_readl(xhci, &xhci->op_regs->command);
956 xhci_writel(xhci, command, &xhci->op_regs->command);
957 if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) {
958 xhci_warn(xhci, "WARN: xHC save state timeout\n");
959 spin_unlock_irq(&xhci->lock);
962 spin_unlock_irq(&xhci->lock);
965 * Deleting Compliance Mode Recovery Timer because the xHCI Host
966 * is about to be suspended.
968 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
969 (!(xhci_all_ports_seen_u0(xhci)))) {
970 del_timer_sync(&xhci->comp_mode_recovery_timer);
971 xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted!\n");
974 /* step 5: remove core well power */
975 /* synchronize irq when using MSI-X */
976 xhci_msix_sync_irqs(xhci);
982 * start xHC (not bus-specific)
984 * This is called when the machine transition from S3/S4 mode.
987 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
989 u32 command, temp = 0, status;
990 struct usb_hcd *hcd = xhci_to_hcd(xhci);
991 struct usb_hcd *secondary_hcd;
993 bool comp_timer_running = false;
995 /* Wait a bit if either of the roothubs need to settle from the
996 * transition into bus suspend.
998 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
1000 xhci->bus_state[1].next_statechange))
1003 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1004 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
1006 spin_lock_irq(&xhci->lock);
1007 if (xhci->quirks & XHCI_RESET_ON_RESUME)
1011 /* step 1: restore register */
1012 xhci_restore_registers(xhci);
1013 /* step 2: initialize command ring buffer */
1014 xhci_set_cmd_ring_deq(xhci);
1015 /* step 3: restore state and start state*/
1016 /* step 3: set CRS flag */
1017 command = xhci_readl(xhci, &xhci->op_regs->command);
1019 xhci_writel(xhci, command, &xhci->op_regs->command);
1020 if (handshake(xhci, &xhci->op_regs->status,
1021 STS_RESTORE, 0, 10 * 1000)) {
1022 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
1023 spin_unlock_irq(&xhci->lock);
1026 temp = xhci_readl(xhci, &xhci->op_regs->status);
1029 /* If restore operation fails, re-initialize the HC during resume */
1030 if ((temp & STS_SRE) || hibernated) {
1032 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1033 !(xhci_all_ports_seen_u0(xhci))) {
1034 del_timer_sync(&xhci->comp_mode_recovery_timer);
1035 xhci_dbg(xhci, "Compliance Mode Recovery Timer deleted!\n");
1038 /* Let the USB core know _both_ roothubs lost power. */
1039 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1040 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1042 xhci_dbg(xhci, "Stop HCD\n");
1045 spin_unlock_irq(&xhci->lock);
1046 xhci_cleanup_msix(xhci);
1048 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
1049 /* Tell the event ring poll function not to reschedule */
1051 del_timer_sync(&xhci->event_ring_timer);
1054 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1055 temp = xhci_readl(xhci, &xhci->op_regs->status);
1056 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
1057 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
1058 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
1059 &xhci->ir_set->irq_pending);
1060 xhci_print_ir_set(xhci, 0);
1062 xhci_dbg(xhci, "cleaning up memory\n");
1063 xhci_mem_cleanup(xhci);
1064 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1065 xhci_readl(xhci, &xhci->op_regs->status));
1067 /* USB core calls the PCI reinit and start functions twice:
1068 * first with the primary HCD, and then with the secondary HCD.
1069 * If we don't do the same, the host will never be started.
1071 if (!usb_hcd_is_primary_hcd(hcd))
1072 secondary_hcd = hcd;
1074 secondary_hcd = xhci->shared_hcd;
1076 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1077 retval = xhci_init(hcd->primary_hcd);
1080 comp_timer_running = true;
1082 xhci_dbg(xhci, "Start the primary HCD\n");
1083 retval = xhci_run(hcd->primary_hcd);
1085 xhci_dbg(xhci, "Start the secondary HCD\n");
1086 retval = xhci_run(secondary_hcd);
1088 hcd->state = HC_STATE_SUSPENDED;
1089 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1093 /* step 4: set Run/Stop bit */
1094 command = xhci_readl(xhci, &xhci->op_regs->command);
1096 xhci_writel(xhci, command, &xhci->op_regs->command);
1097 handshake(xhci, &xhci->op_regs->status, STS_HALT,
1100 /* step 5: walk topology and initialize portsc,
1101 * portpmsc and portli
1103 /* this is done in bus_resume */
1105 /* step 6: restart each of the previously
1106 * Running endpoints by ringing their doorbells
1109 spin_unlock_irq(&xhci->lock);
1113 /* Resume root hubs only when have pending events. */
1114 status = readl(&xhci->op_regs->status);
1115 if (status & STS_EINT) {
1116 usb_hcd_resume_root_hub(hcd);
1117 usb_hcd_resume_root_hub(xhci->shared_hcd);
1122 * If system is subject to the Quirk, Compliance Mode Timer needs to
1123 * be re-initialized Always after a system resume. Ports are subject
1124 * to suffer the Compliance Mode issue again. It doesn't matter if
1125 * ports have entered previously to U0 before system's suspension.
1127 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1128 compliance_mode_recovery_timer_init(xhci);
1130 /* Re-enable port polling. */
1131 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1132 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1133 usb_hcd_poll_rh_status(hcd);
1137 #endif /* CONFIG_PM */
1139 /*-------------------------------------------------------------------------*/
1142 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1143 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1144 * value to right shift 1 for the bitmask.
1146 * Index = (epnum * 2) + direction - 1,
1147 * where direction = 0 for OUT, 1 for IN.
1148 * For control endpoints, the IN index is used (OUT index is unused), so
1149 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1151 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1154 if (usb_endpoint_xfer_control(desc))
1155 index = (unsigned int) (usb_endpoint_num(desc)*2);
1157 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1158 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1162 /* Find the flag for this endpoint (for use in the control context). Use the
1163 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1166 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1168 return 1 << (xhci_get_endpoint_index(desc) + 1);
1171 /* Find the flag for this endpoint (for use in the control context). Use the
1172 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1175 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1177 return 1 << (ep_index + 1);
1180 /* Compute the last valid endpoint context index. Basically, this is the
1181 * endpoint index plus one. For slot contexts with more than valid endpoint,
1182 * we find the most significant bit set in the added contexts flags.
1183 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1184 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1186 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1188 return fls(added_ctxs) - 1;
1191 /* Returns 1 if the arguments are OK;
1192 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1194 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1195 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1197 struct xhci_hcd *xhci;
1198 struct xhci_virt_device *virt_dev;
1200 if (!hcd || (check_ep && !ep) || !udev) {
1201 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1205 if (!udev->parent) {
1206 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1211 xhci = hcd_to_xhci(hcd);
1212 if (check_virt_dev) {
1213 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1214 printk(KERN_DEBUG "xHCI %s called with unaddressed "
1219 virt_dev = xhci->devs[udev->slot_id];
1220 if (virt_dev->udev != udev) {
1221 printk(KERN_DEBUG "xHCI %s called with udev and "
1222 "virt_dev does not match\n", func);
1227 if (xhci->xhc_state & XHCI_STATE_HALTED)
1233 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1234 struct usb_device *udev, struct xhci_command *command,
1235 bool ctx_change, bool must_succeed);
1238 * Full speed devices may have a max packet size greater than 8 bytes, but the
1239 * USB core doesn't know that until it reads the first 8 bytes of the
1240 * descriptor. If the usb_device's max packet size changes after that point,
1241 * we need to issue an evaluate context command and wait on it.
1243 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1244 unsigned int ep_index, struct urb *urb)
1246 struct xhci_container_ctx *in_ctx;
1247 struct xhci_container_ctx *out_ctx;
1248 struct xhci_input_control_ctx *ctrl_ctx;
1249 struct xhci_ep_ctx *ep_ctx;
1250 int max_packet_size;
1251 int hw_max_packet_size;
1254 out_ctx = xhci->devs[slot_id]->out_ctx;
1255 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1256 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1257 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1258 if (hw_max_packet_size != max_packet_size) {
1259 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1260 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1262 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1263 hw_max_packet_size);
1264 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1266 /* Set up the modified control endpoint 0 */
1267 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1268 xhci->devs[slot_id]->out_ctx, ep_index);
1269 in_ctx = xhci->devs[slot_id]->in_ctx;
1270 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1271 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1272 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1274 /* Set up the input context flags for the command */
1275 /* FIXME: This won't work if a non-default control endpoint
1276 * changes max packet sizes.
1278 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1279 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1280 ctrl_ctx->drop_flags = 0;
1282 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1283 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1284 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1285 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1287 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1290 /* Clean up the input context for later use by bandwidth
1293 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1299 * non-error returns are a promise to giveback() the urb later
1300 * we drop ownership so next owner (or urb unlink) can get it
1302 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1304 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1305 struct xhci_td *buffer;
1306 unsigned long flags;
1308 unsigned int slot_id, ep_index;
1309 struct urb_priv *urb_priv;
1312 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1313 true, true, __func__) <= 0)
1316 slot_id = urb->dev->slot_id;
1317 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1319 if (!HCD_HW_ACCESSIBLE(hcd)) {
1320 if (!in_interrupt())
1321 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1326 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1327 size = urb->number_of_packets;
1331 urb_priv = kzalloc(sizeof(struct urb_priv) +
1332 size * sizeof(struct xhci_td *), mem_flags);
1336 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1342 for (i = 0; i < size; i++) {
1343 urb_priv->td[i] = buffer;
1347 urb_priv->length = size;
1348 urb_priv->td_cnt = 0;
1349 urb->hcpriv = urb_priv;
1351 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1352 /* Check to see if the max packet size for the default control
1353 * endpoint changed during FS device enumeration
1355 if (urb->dev->speed == USB_SPEED_FULL) {
1356 ret = xhci_check_maxpacket(xhci, slot_id,
1359 xhci_urb_free_priv(xhci, urb_priv);
1365 /* We have a spinlock and interrupts disabled, so we must pass
1366 * atomic context to this function, which may allocate memory.
1368 spin_lock_irqsave(&xhci->lock, flags);
1369 if (xhci->xhc_state & XHCI_STATE_DYING)
1371 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1375 spin_unlock_irqrestore(&xhci->lock, flags);
1376 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1377 spin_lock_irqsave(&xhci->lock, flags);
1378 if (xhci->xhc_state & XHCI_STATE_DYING)
1380 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1381 EP_GETTING_STREAMS) {
1382 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1383 "is transitioning to using streams.\n");
1385 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1386 EP_GETTING_NO_STREAMS) {
1387 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1388 "is transitioning to "
1389 "not having streams.\n");
1392 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1397 spin_unlock_irqrestore(&xhci->lock, flags);
1398 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1399 spin_lock_irqsave(&xhci->lock, flags);
1400 if (xhci->xhc_state & XHCI_STATE_DYING)
1402 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1406 spin_unlock_irqrestore(&xhci->lock, flags);
1408 spin_lock_irqsave(&xhci->lock, flags);
1409 if (xhci->xhc_state & XHCI_STATE_DYING)
1411 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1415 spin_unlock_irqrestore(&xhci->lock, flags);
1420 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1421 "non-responsive xHCI host.\n",
1422 urb->ep->desc.bEndpointAddress, urb);
1425 xhci_urb_free_priv(xhci, urb_priv);
1427 spin_unlock_irqrestore(&xhci->lock, flags);
1431 /* Get the right ring for the given URB.
1432 * If the endpoint supports streams, boundary check the URB's stream ID.
1433 * If the endpoint doesn't support streams, return the singular endpoint ring.
1435 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1438 unsigned int slot_id;
1439 unsigned int ep_index;
1440 unsigned int stream_id;
1441 struct xhci_virt_ep *ep;
1443 slot_id = urb->dev->slot_id;
1444 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1445 stream_id = urb->stream_id;
1446 ep = &xhci->devs[slot_id]->eps[ep_index];
1447 /* Common case: no streams */
1448 if (!(ep->ep_state & EP_HAS_STREAMS))
1451 if (stream_id == 0) {
1453 "WARN: Slot ID %u, ep index %u has streams, "
1454 "but URB has no stream ID.\n",
1459 if (stream_id < ep->stream_info->num_streams)
1460 return ep->stream_info->stream_rings[stream_id];
1463 "WARN: Slot ID %u, ep index %u has "
1464 "stream IDs 1 to %u allocated, "
1465 "but stream ID %u is requested.\n",
1467 ep->stream_info->num_streams - 1,
1473 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1474 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1475 * should pick up where it left off in the TD, unless a Set Transfer Ring
1476 * Dequeue Pointer is issued.
1478 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1479 * the ring. Since the ring is a contiguous structure, they can't be physically
1480 * removed. Instead, there are two options:
1482 * 1) If the HC is in the middle of processing the URB to be canceled, we
1483 * simply move the ring's dequeue pointer past those TRBs using the Set
1484 * Transfer Ring Dequeue Pointer command. This will be the common case,
1485 * when drivers timeout on the last submitted URB and attempt to cancel.
1487 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1488 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1489 * HC will need to invalidate the any TRBs it has cached after the stop
1490 * endpoint command, as noted in the xHCI 0.95 errata.
1492 * 3) The TD may have completed by the time the Stop Endpoint Command
1493 * completes, so software needs to handle that case too.
1495 * This function should protect against the TD enqueueing code ringing the
1496 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1497 * It also needs to account for multiple cancellations on happening at the same
1498 * time for the same endpoint.
1500 * Note that this function can be called in any context, or so says
1501 * usb_hcd_unlink_urb()
1503 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1505 unsigned long flags;
1508 struct xhci_hcd *xhci;
1509 struct urb_priv *urb_priv;
1511 unsigned int ep_index;
1512 struct xhci_ring *ep_ring;
1513 struct xhci_virt_ep *ep;
1515 xhci = hcd_to_xhci(hcd);
1516 spin_lock_irqsave(&xhci->lock, flags);
1517 /* Make sure the URB hasn't completed or been unlinked already */
1518 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1519 if (ret || !urb->hcpriv)
1521 temp = xhci_readl(xhci, &xhci->op_regs->status);
1522 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1523 xhci_dbg(xhci, "HW died, freeing TD.\n");
1524 urb_priv = urb->hcpriv;
1525 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1526 td = urb_priv->td[i];
1527 if (!list_empty(&td->td_list))
1528 list_del_init(&td->td_list);
1529 if (!list_empty(&td->cancelled_td_list))
1530 list_del_init(&td->cancelled_td_list);
1533 usb_hcd_unlink_urb_from_ep(hcd, urb);
1534 spin_unlock_irqrestore(&xhci->lock, flags);
1535 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1536 xhci_urb_free_priv(xhci, urb_priv);
1539 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1540 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1541 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1542 "non-responsive xHCI host.\n",
1543 urb->ep->desc.bEndpointAddress, urb);
1544 /* Let the stop endpoint command watchdog timer (which set this
1545 * state) finish cleaning up the endpoint TD lists. We must
1546 * have caught it in the middle of dropping a lock and giving
1552 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1553 xhci_dbg(xhci, "Event ring:\n");
1554 xhci_debug_ring(xhci, xhci->event_ring);
1555 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1556 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1557 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1563 xhci_dbg(xhci, "Endpoint ring:\n");
1564 xhci_debug_ring(xhci, ep_ring);
1566 urb_priv = urb->hcpriv;
1568 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1569 td = urb_priv->td[i];
1570 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1573 /* Queue a stop endpoint command, but only if this is
1574 * the first cancellation to be handled.
1576 if (!(ep->ep_state & EP_HALT_PENDING)) {
1577 ep->ep_state |= EP_HALT_PENDING;
1578 ep->stop_cmds_pending++;
1579 ep->stop_cmd_timer.expires = jiffies +
1580 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1581 add_timer(&ep->stop_cmd_timer);
1582 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1583 xhci_ring_cmd_db(xhci);
1586 spin_unlock_irqrestore(&xhci->lock, flags);
1590 /* Drop an endpoint from a new bandwidth configuration for this device.
1591 * Only one call to this function is allowed per endpoint before
1592 * check_bandwidth() or reset_bandwidth() must be called.
1593 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1594 * add the endpoint to the schedule with possibly new parameters denoted by a
1595 * different endpoint descriptor in usb_host_endpoint.
1596 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1599 * The USB core will not allow URBs to be queued to an endpoint that is being
1600 * disabled, so there's no need for mutual exclusion to protect
1601 * the xhci->devs[slot_id] structure.
1603 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1604 struct usb_host_endpoint *ep)
1606 struct xhci_hcd *xhci;
1607 struct xhci_container_ctx *in_ctx, *out_ctx;
1608 struct xhci_input_control_ctx *ctrl_ctx;
1609 struct xhci_slot_ctx *slot_ctx;
1610 unsigned int last_ctx;
1611 unsigned int ep_index;
1612 struct xhci_ep_ctx *ep_ctx;
1614 u32 new_add_flags, new_drop_flags, new_slot_info;
1617 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1620 xhci = hcd_to_xhci(hcd);
1621 if (xhci->xhc_state & XHCI_STATE_DYING)
1624 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1625 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1626 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1627 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1628 __func__, drop_flag);
1632 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1633 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1634 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1635 ep_index = xhci_get_endpoint_index(&ep->desc);
1636 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1637 /* If the HC already knows the endpoint is disabled,
1638 * or the HCD has noted it is disabled, ignore this request
1640 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1641 cpu_to_le32(EP_STATE_DISABLED)) ||
1642 le32_to_cpu(ctrl_ctx->drop_flags) &
1643 xhci_get_endpoint_flag(&ep->desc)) {
1644 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1649 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1650 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1652 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1653 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1655 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1656 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1657 /* Update the last valid endpoint context, if we deleted the last one */
1658 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1659 LAST_CTX(last_ctx)) {
1660 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1661 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1663 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1665 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1667 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1668 (unsigned int) ep->desc.bEndpointAddress,
1670 (unsigned int) new_drop_flags,
1671 (unsigned int) new_add_flags,
1672 (unsigned int) new_slot_info);
1676 /* Add an endpoint to a new possible bandwidth configuration for this device.
1677 * Only one call to this function is allowed per endpoint before
1678 * check_bandwidth() or reset_bandwidth() must be called.
1679 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1680 * add the endpoint to the schedule with possibly new parameters denoted by a
1681 * different endpoint descriptor in usb_host_endpoint.
1682 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1685 * The USB core will not allow URBs to be queued to an endpoint until the
1686 * configuration or alt setting is installed in the device, so there's no need
1687 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1689 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1690 struct usb_host_endpoint *ep)
1692 struct xhci_hcd *xhci;
1693 struct xhci_container_ctx *in_ctx, *out_ctx;
1694 unsigned int ep_index;
1695 struct xhci_ep_ctx *ep_ctx;
1696 struct xhci_slot_ctx *slot_ctx;
1697 struct xhci_input_control_ctx *ctrl_ctx;
1699 unsigned int last_ctx;
1700 u32 new_add_flags, new_drop_flags, new_slot_info;
1701 struct xhci_virt_device *virt_dev;
1704 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1706 /* So we won't queue a reset ep command for a root hub */
1710 xhci = hcd_to_xhci(hcd);
1711 if (xhci->xhc_state & XHCI_STATE_DYING)
1714 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1715 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1716 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1717 /* FIXME when we have to issue an evaluate endpoint command to
1718 * deal with ep0 max packet size changing once we get the
1721 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1722 __func__, added_ctxs);
1726 virt_dev = xhci->devs[udev->slot_id];
1727 in_ctx = virt_dev->in_ctx;
1728 out_ctx = virt_dev->out_ctx;
1729 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1730 ep_index = xhci_get_endpoint_index(&ep->desc);
1731 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1733 /* If this endpoint is already in use, and the upper layers are trying
1734 * to add it again without dropping it, reject the addition.
1736 if (virt_dev->eps[ep_index].ring &&
1737 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1738 xhci_get_endpoint_flag(&ep->desc))) {
1739 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1740 "without dropping it.\n",
1741 (unsigned int) ep->desc.bEndpointAddress);
1745 /* If the HCD has already noted the endpoint is enabled,
1746 * ignore this request.
1748 if (le32_to_cpu(ctrl_ctx->add_flags) &
1749 xhci_get_endpoint_flag(&ep->desc)) {
1750 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1756 * Configuration and alternate setting changes must be done in
1757 * process context, not interrupt context (or so documenation
1758 * for usb_set_interface() and usb_set_configuration() claim).
1760 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1761 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1762 __func__, ep->desc.bEndpointAddress);
1766 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1767 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1769 /* If xhci_endpoint_disable() was called for this endpoint, but the
1770 * xHC hasn't been notified yet through the check_bandwidth() call,
1771 * this re-adds a new state for the endpoint from the new endpoint
1772 * descriptors. We must drop and re-add this endpoint, so we leave the
1775 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1777 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1778 /* Update the last valid endpoint context, if we just added one past */
1779 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1780 LAST_CTX(last_ctx)) {
1781 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1782 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1784 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1786 /* Store the usb_device pointer for later use */
1789 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1790 (unsigned int) ep->desc.bEndpointAddress,
1792 (unsigned int) new_drop_flags,
1793 (unsigned int) new_add_flags,
1794 (unsigned int) new_slot_info);
1798 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1800 struct xhci_input_control_ctx *ctrl_ctx;
1801 struct xhci_ep_ctx *ep_ctx;
1802 struct xhci_slot_ctx *slot_ctx;
1805 /* When a device's add flag and drop flag are zero, any subsequent
1806 * configure endpoint command will leave that endpoint's state
1807 * untouched. Make sure we don't leave any old state in the input
1808 * endpoint contexts.
1810 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1811 ctrl_ctx->drop_flags = 0;
1812 ctrl_ctx->add_flags = 0;
1813 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1814 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1815 /* Endpoint 0 is always valid */
1816 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1817 for (i = 1; i < 31; ++i) {
1818 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1819 ep_ctx->ep_info = 0;
1820 ep_ctx->ep_info2 = 0;
1822 ep_ctx->tx_info = 0;
1826 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1827 struct usb_device *udev, u32 *cmd_status)
1831 switch (*cmd_status) {
1833 dev_warn(&udev->dev, "Not enough host controller resources "
1834 "for new device state.\n");
1836 /* FIXME: can we allocate more resources for the HC? */
1839 case COMP_2ND_BW_ERR:
1840 dev_warn(&udev->dev, "Not enough bandwidth "
1841 "for new device state.\n");
1843 /* FIXME: can we go back to the old state? */
1846 /* the HCD set up something wrong */
1847 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1849 "and endpoint is not disabled.\n");
1853 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1854 "configure command.\n");
1858 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1862 xhci_err(xhci, "ERROR: unexpected command completion "
1863 "code 0x%x.\n", *cmd_status);
1870 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1871 struct usb_device *udev, u32 *cmd_status)
1874 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1876 switch (*cmd_status) {
1878 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1879 "context command.\n");
1883 dev_warn(&udev->dev, "WARN: slot not enabled for"
1884 "evaluate context command.\n");
1885 case COMP_CTX_STATE:
1886 dev_warn(&udev->dev, "WARN: invalid context state for "
1887 "evaluate context command.\n");
1888 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1892 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1893 "context command.\n");
1897 /* Max Exit Latency too large error */
1898 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1902 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1906 xhci_err(xhci, "ERROR: unexpected command completion "
1907 "code 0x%x.\n", *cmd_status);
1914 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1915 struct xhci_container_ctx *in_ctx)
1917 struct xhci_input_control_ctx *ctrl_ctx;
1918 u32 valid_add_flags;
1919 u32 valid_drop_flags;
1921 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1922 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1923 * (bit 1). The default control endpoint is added during the Address
1924 * Device command and is never removed until the slot is disabled.
1926 valid_add_flags = ctrl_ctx->add_flags >> 2;
1927 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1929 /* Use hweight32 to count the number of ones in the add flags, or
1930 * number of endpoints added. Don't count endpoints that are changed
1931 * (both added and dropped).
1933 return hweight32(valid_add_flags) -
1934 hweight32(valid_add_flags & valid_drop_flags);
1937 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1938 struct xhci_container_ctx *in_ctx)
1940 struct xhci_input_control_ctx *ctrl_ctx;
1941 u32 valid_add_flags;
1942 u32 valid_drop_flags;
1944 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1945 valid_add_flags = ctrl_ctx->add_flags >> 2;
1946 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1948 return hweight32(valid_drop_flags) -
1949 hweight32(valid_add_flags & valid_drop_flags);
1953 * We need to reserve the new number of endpoints before the configure endpoint
1954 * command completes. We can't subtract the dropped endpoints from the number
1955 * of active endpoints until the command completes because we can oversubscribe
1956 * the host in this case:
1958 * - the first configure endpoint command drops more endpoints than it adds
1959 * - a second configure endpoint command that adds more endpoints is queued
1960 * - the first configure endpoint command fails, so the config is unchanged
1961 * - the second command may succeed, even though there isn't enough resources
1963 * Must be called with xhci->lock held.
1965 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1966 struct xhci_container_ctx *in_ctx)
1970 added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1971 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1972 xhci_dbg(xhci, "Not enough ep ctxs: "
1973 "%u active, need to add %u, limit is %u.\n",
1974 xhci->num_active_eps, added_eps,
1975 xhci->limit_active_eps);
1978 xhci->num_active_eps += added_eps;
1979 xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1980 xhci->num_active_eps);
1985 * The configure endpoint was failed by the xHC for some other reason, so we
1986 * need to revert the resources that failed configuration would have used.
1988 * Must be called with xhci->lock held.
1990 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1991 struct xhci_container_ctx *in_ctx)
1995 num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1996 xhci->num_active_eps -= num_failed_eps;
1997 xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1999 xhci->num_active_eps);
2003 * Now that the command has completed, clean up the active endpoint count by
2004 * subtracting out the endpoints that were dropped (but not changed).
2006 * Must be called with xhci->lock held.
2008 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2009 struct xhci_container_ctx *in_ctx)
2011 u32 num_dropped_eps;
2013 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
2014 xhci->num_active_eps -= num_dropped_eps;
2015 if (num_dropped_eps)
2016 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
2018 xhci->num_active_eps);
2021 unsigned int xhci_get_block_size(struct usb_device *udev)
2023 switch (udev->speed) {
2025 case USB_SPEED_FULL:
2027 case USB_SPEED_HIGH:
2029 case USB_SPEED_SUPER:
2031 case USB_SPEED_UNKNOWN:
2032 case USB_SPEED_WIRELESS:
2034 /* Should never happen */
2039 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2041 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2043 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2048 /* If we are changing a LS/FS device under a HS hub,
2049 * make sure (if we are activating a new TT) that the HS bus has enough
2050 * bandwidth for this new TT.
2052 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2053 struct xhci_virt_device *virt_dev,
2056 struct xhci_interval_bw_table *bw_table;
2057 struct xhci_tt_bw_info *tt_info;
2059 /* Find the bandwidth table for the root port this TT is attached to. */
2060 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2061 tt_info = virt_dev->tt_info;
2062 /* If this TT already had active endpoints, the bandwidth for this TT
2063 * has already been added. Removing all periodic endpoints (and thus
2064 * making the TT enactive) will only decrease the bandwidth used.
2068 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2069 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2073 /* Not sure why we would have no new active endpoints...
2075 * Maybe because of an Evaluate Context change for a hub update or a
2076 * control endpoint 0 max packet size change?
2077 * FIXME: skip the bandwidth calculation in that case.
2082 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2083 struct xhci_virt_device *virt_dev)
2085 unsigned int bw_reserved;
2087 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2088 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2091 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2092 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2099 * This algorithm is a very conservative estimate of the worst-case scheduling
2100 * scenario for any one interval. The hardware dynamically schedules the
2101 * packets, so we can't tell which microframe could be the limiting factor in
2102 * the bandwidth scheduling. This only takes into account periodic endpoints.
2104 * Obviously, we can't solve an NP complete problem to find the minimum worst
2105 * case scenario. Instead, we come up with an estimate that is no less than
2106 * the worst case bandwidth used for any one microframe, but may be an
2109 * We walk the requirements for each endpoint by interval, starting with the
2110 * smallest interval, and place packets in the schedule where there is only one
2111 * possible way to schedule packets for that interval. In order to simplify
2112 * this algorithm, we record the largest max packet size for each interval, and
2113 * assume all packets will be that size.
2115 * For interval 0, we obviously must schedule all packets for each interval.
2116 * The bandwidth for interval 0 is just the amount of data to be transmitted
2117 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2118 * the number of packets).
2120 * For interval 1, we have two possible microframes to schedule those packets
2121 * in. For this algorithm, if we can schedule the same number of packets for
2122 * each possible scheduling opportunity (each microframe), we will do so. The
2123 * remaining number of packets will be saved to be transmitted in the gaps in
2124 * the next interval's scheduling sequence.
2126 * As we move those remaining packets to be scheduled with interval 2 packets,
2127 * we have to double the number of remaining packets to transmit. This is
2128 * because the intervals are actually powers of 2, and we would be transmitting
2129 * the previous interval's packets twice in this interval. We also have to be
2130 * sure that when we look at the largest max packet size for this interval, we
2131 * also look at the largest max packet size for the remaining packets and take
2132 * the greater of the two.
2134 * The algorithm continues to evenly distribute packets in each scheduling
2135 * opportunity, and push the remaining packets out, until we get to the last
2136 * interval. Then those packets and their associated overhead are just added
2137 * to the bandwidth used.
2139 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2140 struct xhci_virt_device *virt_dev,
2143 unsigned int bw_reserved;
2144 unsigned int max_bandwidth;
2145 unsigned int bw_used;
2146 unsigned int block_size;
2147 struct xhci_interval_bw_table *bw_table;
2148 unsigned int packet_size = 0;
2149 unsigned int overhead = 0;
2150 unsigned int packets_transmitted = 0;
2151 unsigned int packets_remaining = 0;
2154 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2155 return xhci_check_ss_bw(xhci, virt_dev);
2157 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2158 max_bandwidth = HS_BW_LIMIT;
2159 /* Convert percent of bus BW reserved to blocks reserved */
2160 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2162 max_bandwidth = FS_BW_LIMIT;
2163 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2166 bw_table = virt_dev->bw_table;
2167 /* We need to translate the max packet size and max ESIT payloads into
2168 * the units the hardware uses.
2170 block_size = xhci_get_block_size(virt_dev->udev);
2172 /* If we are manipulating a LS/FS device under a HS hub, double check
2173 * that the HS bus has enough bandwidth if we are activing a new TT.
2175 if (virt_dev->tt_info) {
2176 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2177 virt_dev->real_port);
2178 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2179 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2180 "newly activated TT.\n");
2183 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
2184 virt_dev->tt_info->slot_id,
2185 virt_dev->tt_info->ttport);
2187 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2188 virt_dev->real_port);
2191 /* Add in how much bandwidth will be used for interval zero, or the
2192 * rounded max ESIT payload + number of packets * largest overhead.
2194 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2195 bw_table->interval_bw[0].num_packets *
2196 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2198 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2199 unsigned int bw_added;
2200 unsigned int largest_mps;
2201 unsigned int interval_overhead;
2204 * How many packets could we transmit in this interval?
2205 * If packets didn't fit in the previous interval, we will need
2206 * to transmit that many packets twice within this interval.
2208 packets_remaining = 2 * packets_remaining +
2209 bw_table->interval_bw[i].num_packets;
2211 /* Find the largest max packet size of this or the previous
2214 if (list_empty(&bw_table->interval_bw[i].endpoints))
2217 struct xhci_virt_ep *virt_ep;
2218 struct list_head *ep_entry;
2220 ep_entry = bw_table->interval_bw[i].endpoints.next;
2221 virt_ep = list_entry(ep_entry,
2222 struct xhci_virt_ep, bw_endpoint_list);
2223 /* Convert to blocks, rounding up */
2224 largest_mps = DIV_ROUND_UP(
2225 virt_ep->bw_info.max_packet_size,
2228 if (largest_mps > packet_size)
2229 packet_size = largest_mps;
2231 /* Use the larger overhead of this or the previous interval. */
2232 interval_overhead = xhci_get_largest_overhead(
2233 &bw_table->interval_bw[i]);
2234 if (interval_overhead > overhead)
2235 overhead = interval_overhead;
2237 /* How many packets can we evenly distribute across
2238 * (1 << (i + 1)) possible scheduling opportunities?
2240 packets_transmitted = packets_remaining >> (i + 1);
2242 /* Add in the bandwidth used for those scheduled packets */
2243 bw_added = packets_transmitted * (overhead + packet_size);
2245 /* How many packets do we have remaining to transmit? */
2246 packets_remaining = packets_remaining % (1 << (i + 1));
2248 /* What largest max packet size should those packets have? */
2249 /* If we've transmitted all packets, don't carry over the
2250 * largest packet size.
2252 if (packets_remaining == 0) {
2255 } else if (packets_transmitted > 0) {
2256 /* Otherwise if we do have remaining packets, and we've
2257 * scheduled some packets in this interval, take the
2258 * largest max packet size from endpoints with this
2261 packet_size = largest_mps;
2262 overhead = interval_overhead;
2264 /* Otherwise carry over packet_size and overhead from the last
2265 * time we had a remainder.
2267 bw_used += bw_added;
2268 if (bw_used > max_bandwidth) {
2269 xhci_warn(xhci, "Not enough bandwidth. "
2270 "Proposed: %u, Max: %u\n",
2271 bw_used, max_bandwidth);
2276 * Ok, we know we have some packets left over after even-handedly
2277 * scheduling interval 15. We don't know which microframes they will
2278 * fit into, so we over-schedule and say they will be scheduled every
2281 if (packets_remaining > 0)
2282 bw_used += overhead + packet_size;
2284 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2285 unsigned int port_index = virt_dev->real_port - 1;
2287 /* OK, we're manipulating a HS device attached to a
2288 * root port bandwidth domain. Include the number of active TTs
2289 * in the bandwidth used.
2291 bw_used += TT_HS_OVERHEAD *
2292 xhci->rh_bw[port_index].num_active_tts;
2295 xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2296 "Available: %u " "percent\n",
2297 bw_used, max_bandwidth, bw_reserved,
2298 (max_bandwidth - bw_used - bw_reserved) * 100 /
2301 bw_used += bw_reserved;
2302 if (bw_used > max_bandwidth) {
2303 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2304 bw_used, max_bandwidth);
2308 bw_table->bw_used = bw_used;
2312 static bool xhci_is_async_ep(unsigned int ep_type)
2314 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2315 ep_type != ISOC_IN_EP &&
2316 ep_type != INT_IN_EP);
2319 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2321 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2324 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2326 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2328 if (ep_bw->ep_interval == 0)
2329 return SS_OVERHEAD_BURST +
2330 (ep_bw->mult * ep_bw->num_packets *
2331 (SS_OVERHEAD + mps));
2332 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2333 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2334 1 << ep_bw->ep_interval);
2338 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2339 struct xhci_bw_info *ep_bw,
2340 struct xhci_interval_bw_table *bw_table,
2341 struct usb_device *udev,
2342 struct xhci_virt_ep *virt_ep,
2343 struct xhci_tt_bw_info *tt_info)
2345 struct xhci_interval_bw *interval_bw;
2346 int normalized_interval;
2348 if (xhci_is_async_ep(ep_bw->type))
2351 if (udev->speed == USB_SPEED_SUPER) {
2352 if (xhci_is_sync_in_ep(ep_bw->type))
2353 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2354 xhci_get_ss_bw_consumed(ep_bw);
2356 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2357 xhci_get_ss_bw_consumed(ep_bw);
2361 /* SuperSpeed endpoints never get added to intervals in the table, so
2362 * this check is only valid for HS/FS/LS devices.
2364 if (list_empty(&virt_ep->bw_endpoint_list))
2366 /* For LS/FS devices, we need to translate the interval expressed in
2367 * microframes to frames.
2369 if (udev->speed == USB_SPEED_HIGH)
2370 normalized_interval = ep_bw->ep_interval;
2372 normalized_interval = ep_bw->ep_interval - 3;
2374 if (normalized_interval == 0)
2375 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2376 interval_bw = &bw_table->interval_bw[normalized_interval];
2377 interval_bw->num_packets -= ep_bw->num_packets;
2378 switch (udev->speed) {
2380 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2382 case USB_SPEED_FULL:
2383 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2385 case USB_SPEED_HIGH:
2386 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2388 case USB_SPEED_SUPER:
2389 case USB_SPEED_UNKNOWN:
2390 case USB_SPEED_WIRELESS:
2391 /* Should never happen because only LS/FS/HS endpoints will get
2392 * added to the endpoint list.
2397 tt_info->active_eps -= 1;
2398 list_del_init(&virt_ep->bw_endpoint_list);
2401 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2402 struct xhci_bw_info *ep_bw,
2403 struct xhci_interval_bw_table *bw_table,
2404 struct usb_device *udev,
2405 struct xhci_virt_ep *virt_ep,
2406 struct xhci_tt_bw_info *tt_info)
2408 struct xhci_interval_bw *interval_bw;
2409 struct xhci_virt_ep *smaller_ep;
2410 int normalized_interval;
2412 if (xhci_is_async_ep(ep_bw->type))
2415 if (udev->speed == USB_SPEED_SUPER) {
2416 if (xhci_is_sync_in_ep(ep_bw->type))
2417 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2418 xhci_get_ss_bw_consumed(ep_bw);
2420 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2421 xhci_get_ss_bw_consumed(ep_bw);
2425 /* For LS/FS devices, we need to translate the interval expressed in
2426 * microframes to frames.
2428 if (udev->speed == USB_SPEED_HIGH)
2429 normalized_interval = ep_bw->ep_interval;
2431 normalized_interval = ep_bw->ep_interval - 3;
2433 if (normalized_interval == 0)
2434 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2435 interval_bw = &bw_table->interval_bw[normalized_interval];
2436 interval_bw->num_packets += ep_bw->num_packets;
2437 switch (udev->speed) {
2439 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2441 case USB_SPEED_FULL:
2442 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2444 case USB_SPEED_HIGH:
2445 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2447 case USB_SPEED_SUPER:
2448 case USB_SPEED_UNKNOWN:
2449 case USB_SPEED_WIRELESS:
2450 /* Should never happen because only LS/FS/HS endpoints will get
2451 * added to the endpoint list.
2457 tt_info->active_eps += 1;
2458 /* Insert the endpoint into the list, largest max packet size first. */
2459 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2461 if (ep_bw->max_packet_size >=
2462 smaller_ep->bw_info.max_packet_size) {
2463 /* Add the new ep before the smaller endpoint */
2464 list_add_tail(&virt_ep->bw_endpoint_list,
2465 &smaller_ep->bw_endpoint_list);
2469 /* Add the new endpoint at the end of the list. */
2470 list_add_tail(&virt_ep->bw_endpoint_list,
2471 &interval_bw->endpoints);
2474 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2475 struct xhci_virt_device *virt_dev,
2478 struct xhci_root_port_bw_info *rh_bw_info;
2479 if (!virt_dev->tt_info)
2482 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2483 if (old_active_eps == 0 &&
2484 virt_dev->tt_info->active_eps != 0) {
2485 rh_bw_info->num_active_tts += 1;
2486 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2487 } else if (old_active_eps != 0 &&
2488 virt_dev->tt_info->active_eps == 0) {
2489 rh_bw_info->num_active_tts -= 1;
2490 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2494 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2495 struct xhci_virt_device *virt_dev,
2496 struct xhci_container_ctx *in_ctx)
2498 struct xhci_bw_info ep_bw_info[31];
2500 struct xhci_input_control_ctx *ctrl_ctx;
2501 int old_active_eps = 0;
2503 if (virt_dev->tt_info)
2504 old_active_eps = virt_dev->tt_info->active_eps;
2506 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2508 for (i = 0; i < 31; i++) {
2509 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2512 /* Make a copy of the BW info in case we need to revert this */
2513 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2514 sizeof(ep_bw_info[i]));
2515 /* Drop the endpoint from the interval table if the endpoint is
2516 * being dropped or changed.
2518 if (EP_IS_DROPPED(ctrl_ctx, i))
2519 xhci_drop_ep_from_interval_table(xhci,
2520 &virt_dev->eps[i].bw_info,
2526 /* Overwrite the information stored in the endpoints' bw_info */
2527 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2528 for (i = 0; i < 31; i++) {
2529 /* Add any changed or added endpoints to the interval table */
2530 if (EP_IS_ADDED(ctrl_ctx, i))
2531 xhci_add_ep_to_interval_table(xhci,
2532 &virt_dev->eps[i].bw_info,
2539 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2540 /* Ok, this fits in the bandwidth we have.
2541 * Update the number of active TTs.
2543 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2547 /* We don't have enough bandwidth for this, revert the stored info. */
2548 for (i = 0; i < 31; i++) {
2549 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2552 /* Drop the new copies of any added or changed endpoints from
2553 * the interval table.
2555 if (EP_IS_ADDED(ctrl_ctx, i)) {
2556 xhci_drop_ep_from_interval_table(xhci,
2557 &virt_dev->eps[i].bw_info,
2563 /* Revert the endpoint back to its old information */
2564 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2565 sizeof(ep_bw_info[i]));
2566 /* Add any changed or dropped endpoints back into the table */
2567 if (EP_IS_DROPPED(ctrl_ctx, i))
2568 xhci_add_ep_to_interval_table(xhci,
2569 &virt_dev->eps[i].bw_info,
2579 /* Issue a configure endpoint command or evaluate context command
2580 * and wait for it to finish.
2582 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2583 struct usb_device *udev,
2584 struct xhci_command *command,
2585 bool ctx_change, bool must_succeed)
2589 unsigned long flags;
2590 struct xhci_container_ctx *in_ctx;
2591 struct completion *cmd_completion;
2593 struct xhci_virt_device *virt_dev;
2594 union xhci_trb *cmd_trb;
2596 spin_lock_irqsave(&xhci->lock, flags);
2597 virt_dev = xhci->devs[udev->slot_id];
2600 in_ctx = command->in_ctx;
2602 in_ctx = virt_dev->in_ctx;
2604 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2605 xhci_reserve_host_resources(xhci, in_ctx)) {
2606 spin_unlock_irqrestore(&xhci->lock, flags);
2607 xhci_warn(xhci, "Not enough host resources, "
2608 "active endpoint contexts = %u\n",
2609 xhci->num_active_eps);
2612 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2613 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2614 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2615 xhci_free_host_resources(xhci, in_ctx);
2616 spin_unlock_irqrestore(&xhci->lock, flags);
2617 xhci_warn(xhci, "Not enough bandwidth\n");
2622 cmd_completion = command->completion;
2623 cmd_status = &command->status;
2624 command->command_trb = xhci->cmd_ring->enqueue;
2626 /* Enqueue pointer can be left pointing to the link TRB,
2627 * we must handle that
2629 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2630 command->command_trb =
2631 xhci->cmd_ring->enq_seg->next->trbs;
2633 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2635 cmd_completion = &virt_dev->cmd_completion;
2636 cmd_status = &virt_dev->cmd_status;
2638 init_completion(cmd_completion);
2640 cmd_trb = xhci->cmd_ring->dequeue;
2642 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2643 udev->slot_id, must_succeed);
2645 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2649 list_del(&command->cmd_list);
2650 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2651 xhci_free_host_resources(xhci, in_ctx);
2652 spin_unlock_irqrestore(&xhci->lock, flags);
2653 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2656 xhci_ring_cmd_db(xhci);
2657 spin_unlock_irqrestore(&xhci->lock, flags);
2659 /* Wait for the configure endpoint command to complete */
2660 timeleft = wait_for_completion_interruptible_timeout(
2662 XHCI_CMD_DEFAULT_TIMEOUT);
2663 if (timeleft <= 0) {
2664 xhci_warn(xhci, "%s while waiting for %s command\n",
2665 timeleft == 0 ? "Timeout" : "Signal",
2667 "configure endpoint" :
2668 "evaluate context");
2669 /* cancel the configure endpoint command */
2670 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2677 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2679 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2681 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2682 spin_lock_irqsave(&xhci->lock, flags);
2683 /* If the command failed, remove the reserved resources.
2684 * Otherwise, clean up the estimate to include dropped eps.
2687 xhci_free_host_resources(xhci, in_ctx);
2689 xhci_finish_resource_reservation(xhci, in_ctx);
2690 spin_unlock_irqrestore(&xhci->lock, flags);
2695 /* Called after one or more calls to xhci_add_endpoint() or
2696 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2697 * to call xhci_reset_bandwidth().
2699 * Since we are in the middle of changing either configuration or
2700 * installing a new alt setting, the USB core won't allow URBs to be
2701 * enqueued for any endpoint on the old config or interface. Nothing
2702 * else should be touching the xhci->devs[slot_id] structure, so we
2703 * don't need to take the xhci->lock for manipulating that.
2705 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2709 struct xhci_hcd *xhci;
2710 struct xhci_virt_device *virt_dev;
2711 struct xhci_input_control_ctx *ctrl_ctx;
2712 struct xhci_slot_ctx *slot_ctx;
2714 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2717 xhci = hcd_to_xhci(hcd);
2718 if (xhci->xhc_state & XHCI_STATE_DYING)
2721 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2722 virt_dev = xhci->devs[udev->slot_id];
2724 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2725 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2726 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2727 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2728 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2730 /* Don't issue the command if there's no endpoints to update. */
2731 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2732 ctrl_ctx->drop_flags == 0)
2735 xhci_dbg(xhci, "New Input Control Context:\n");
2736 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2737 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2738 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2740 ret = xhci_configure_endpoint(xhci, udev, NULL,
2743 /* Callee should call reset_bandwidth() */
2747 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2748 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2749 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2751 /* Free any rings that were dropped, but not changed. */
2752 for (i = 1; i < 31; ++i) {
2753 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2754 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2755 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2757 xhci_zero_in_ctx(xhci, virt_dev);
2759 * Install any rings for completely new endpoints or changed endpoints,
2760 * and free or cache any old rings from changed endpoints.
2762 for (i = 1; i < 31; ++i) {
2763 if (!virt_dev->eps[i].new_ring)
2765 /* Only cache or free the old ring if it exists.
2766 * It may not if this is the first add of an endpoint.
2768 if (virt_dev->eps[i].ring) {
2769 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2771 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2772 virt_dev->eps[i].new_ring = NULL;
2778 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2780 struct xhci_hcd *xhci;
2781 struct xhci_virt_device *virt_dev;
2784 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2787 xhci = hcd_to_xhci(hcd);
2789 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2790 virt_dev = xhci->devs[udev->slot_id];
2791 /* Free any rings allocated for added endpoints */
2792 for (i = 0; i < 31; ++i) {
2793 if (virt_dev->eps[i].new_ring) {
2794 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2795 virt_dev->eps[i].new_ring = NULL;
2798 xhci_zero_in_ctx(xhci, virt_dev);
2801 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2802 struct xhci_container_ctx *in_ctx,
2803 struct xhci_container_ctx *out_ctx,
2804 u32 add_flags, u32 drop_flags)
2806 struct xhci_input_control_ctx *ctrl_ctx;
2807 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2808 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2809 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2810 xhci_slot_copy(xhci, in_ctx, out_ctx);
2811 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2813 xhci_dbg(xhci, "Input Context:\n");
2814 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2817 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2818 unsigned int slot_id, unsigned int ep_index,
2819 struct xhci_dequeue_state *deq_state)
2821 struct xhci_container_ctx *in_ctx;
2822 struct xhci_ep_ctx *ep_ctx;
2826 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2827 xhci->devs[slot_id]->out_ctx, ep_index);
2828 in_ctx = xhci->devs[slot_id]->in_ctx;
2829 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2830 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2831 deq_state->new_deq_ptr);
2833 xhci_warn(xhci, "WARN Cannot submit config ep after "
2834 "reset ep command\n");
2835 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2836 deq_state->new_deq_seg,
2837 deq_state->new_deq_ptr);
2840 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2842 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2843 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2844 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2847 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2848 struct usb_device *udev, unsigned int ep_index)
2850 struct xhci_dequeue_state deq_state;
2851 struct xhci_virt_ep *ep;
2853 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2854 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2855 /* We need to move the HW's dequeue pointer past this TD,
2856 * or it will attempt to resend it on the next doorbell ring.
2858 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2859 ep_index, ep->stopped_stream, ep->stopped_td,
2862 if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2865 /* HW with the reset endpoint quirk will use the saved dequeue state to
2866 * issue a configure endpoint command later.
2868 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2869 xhci_dbg(xhci, "Queueing new dequeue state\n");
2870 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2871 ep_index, ep->stopped_stream, &deq_state);
2873 /* Better hope no one uses the input context between now and the
2874 * reset endpoint completion!
2875 * XXX: No idea how this hardware will react when stream rings
2878 xhci_dbg(xhci, "Setting up input context for "
2879 "configure endpoint command\n");
2880 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2881 ep_index, &deq_state);
2885 /* Called when clearing halted device. The core should have sent the control
2886 * message to clear the device halt condition. The host side of the halt should
2887 * already be cleared with a reset endpoint command issued when the STALL tx
2888 * event was received.
2890 * Context: in_interrupt
2893 void xhci_endpoint_reset(struct usb_hcd *hcd,
2894 struct usb_host_endpoint *ep)
2896 struct xhci_hcd *xhci;
2898 xhci = hcd_to_xhci(hcd);
2901 * We might need to implement the config ep cmd in xhci 4.8.1 note:
2902 * The Reset Endpoint Command may only be issued to endpoints in the
2903 * Halted state. If software wishes reset the Data Toggle or Sequence
2904 * Number of an endpoint that isn't in the Halted state, then software
2905 * may issue a Configure Endpoint Command with the Drop and Add bits set
2906 * for the target endpoint. that is in the Stopped state.
2909 /* For now just print debug to follow the situation */
2910 xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
2911 ep->desc.bEndpointAddress);
2914 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2915 struct usb_device *udev, struct usb_host_endpoint *ep,
2916 unsigned int slot_id)
2919 unsigned int ep_index;
2920 unsigned int ep_state;
2924 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2927 if (ep->ss_ep_comp.bmAttributes == 0) {
2928 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2929 " descriptor for ep 0x%x does not support streams\n",
2930 ep->desc.bEndpointAddress);
2934 ep_index = xhci_get_endpoint_index(&ep->desc);
2935 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2936 if (ep_state & EP_HAS_STREAMS ||
2937 ep_state & EP_GETTING_STREAMS) {
2938 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2939 "already has streams set up.\n",
2940 ep->desc.bEndpointAddress);
2941 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2942 "dynamic stream context array reallocation.\n");
2945 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2946 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2947 "endpoint 0x%x; URBs are pending.\n",
2948 ep->desc.bEndpointAddress);
2954 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2955 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2957 unsigned int max_streams;
2959 /* The stream context array size must be a power of two */
2960 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2962 * Find out how many primary stream array entries the host controller
2963 * supports. Later we may use secondary stream arrays (similar to 2nd
2964 * level page entries), but that's an optional feature for xHCI host
2965 * controllers. xHCs must support at least 4 stream IDs.
2967 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2968 if (*num_stream_ctxs > max_streams) {
2969 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2971 *num_stream_ctxs = max_streams;
2972 *num_streams = max_streams;
2976 /* Returns an error code if one of the endpoint already has streams.
2977 * This does not change any data structures, it only checks and gathers
2980 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2981 struct usb_device *udev,
2982 struct usb_host_endpoint **eps, unsigned int num_eps,
2983 unsigned int *num_streams, u32 *changed_ep_bitmask)
2985 unsigned int max_streams;
2986 unsigned int endpoint_flag;
2990 for (i = 0; i < num_eps; i++) {
2991 ret = xhci_check_streams_endpoint(xhci, udev,
2992 eps[i], udev->slot_id);
2996 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2997 if (max_streams < (*num_streams - 1)) {
2998 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2999 eps[i]->desc.bEndpointAddress,
3001 *num_streams = max_streams+1;
3004 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3005 if (*changed_ep_bitmask & endpoint_flag)
3007 *changed_ep_bitmask |= endpoint_flag;
3012 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3013 struct usb_device *udev,
3014 struct usb_host_endpoint **eps, unsigned int num_eps)
3016 u32 changed_ep_bitmask = 0;
3017 unsigned int slot_id;
3018 unsigned int ep_index;
3019 unsigned int ep_state;
3022 slot_id = udev->slot_id;
3023 if (!xhci->devs[slot_id])
3026 for (i = 0; i < num_eps; i++) {
3027 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3028 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3029 /* Are streams already being freed for the endpoint? */
3030 if (ep_state & EP_GETTING_NO_STREAMS) {
3031 xhci_warn(xhci, "WARN Can't disable streams for "
3033 "streams are being disabled already.",
3034 eps[i]->desc.bEndpointAddress);
3037 /* Are there actually any streams to free? */
3038 if (!(ep_state & EP_HAS_STREAMS) &&
3039 !(ep_state & EP_GETTING_STREAMS)) {
3040 xhci_warn(xhci, "WARN Can't disable streams for "
3042 "streams are already disabled!",
3043 eps[i]->desc.bEndpointAddress);
3044 xhci_warn(xhci, "WARN xhci_free_streams() called "
3045 "with non-streams endpoint\n");
3048 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3050 return changed_ep_bitmask;
3054 * The USB device drivers use this function (though the HCD interface in USB
3055 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3056 * coordinate mass storage command queueing across multiple endpoints (basically
3057 * a stream ID == a task ID).
3059 * Setting up streams involves allocating the same size stream context array
3060 * for each endpoint and issuing a configure endpoint command for all endpoints.
3062 * Don't allow the call to succeed if one endpoint only supports one stream
3063 * (which means it doesn't support streams at all).
3065 * Drivers may get less stream IDs than they asked for, if the host controller
3066 * hardware or endpoints claim they can't support the number of requested
3069 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3070 struct usb_host_endpoint **eps, unsigned int num_eps,
3071 unsigned int num_streams, gfp_t mem_flags)
3074 struct xhci_hcd *xhci;
3075 struct xhci_virt_device *vdev;
3076 struct xhci_command *config_cmd;
3077 unsigned int ep_index;
3078 unsigned int num_stream_ctxs;
3079 unsigned long flags;
3080 u32 changed_ep_bitmask = 0;
3085 /* Add one to the number of streams requested to account for
3086 * stream 0 that is reserved for xHCI usage.
3089 xhci = hcd_to_xhci(hcd);
3090 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3093 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3095 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3099 /* Check to make sure all endpoints are not already configured for
3100 * streams. While we're at it, find the maximum number of streams that
3101 * all the endpoints will support and check for duplicate endpoints.
3103 spin_lock_irqsave(&xhci->lock, flags);
3104 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3105 num_eps, &num_streams, &changed_ep_bitmask);
3107 xhci_free_command(xhci, config_cmd);
3108 spin_unlock_irqrestore(&xhci->lock, flags);
3111 if (num_streams <= 1) {
3112 xhci_warn(xhci, "WARN: endpoints can't handle "
3113 "more than one stream.\n");
3114 xhci_free_command(xhci, config_cmd);
3115 spin_unlock_irqrestore(&xhci->lock, flags);
3118 vdev = xhci->devs[udev->slot_id];
3119 /* Mark each endpoint as being in transition, so
3120 * xhci_urb_enqueue() will reject all URBs.
3122 for (i = 0; i < num_eps; i++) {
3123 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3124 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3126 spin_unlock_irqrestore(&xhci->lock, flags);
3128 /* Setup internal data structures and allocate HW data structures for
3129 * streams (but don't install the HW structures in the input context
3130 * until we're sure all memory allocation succeeded).
3132 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3133 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3134 num_stream_ctxs, num_streams);
3136 for (i = 0; i < num_eps; i++) {
3137 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3138 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3140 num_streams, mem_flags);
3141 if (!vdev->eps[ep_index].stream_info)
3143 /* Set maxPstreams in endpoint context and update deq ptr to
3144 * point to stream context array. FIXME
3148 /* Set up the input context for a configure endpoint command. */
3149 for (i = 0; i < num_eps; i++) {
3150 struct xhci_ep_ctx *ep_ctx;
3152 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3153 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3155 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3156 vdev->out_ctx, ep_index);
3157 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3158 vdev->eps[ep_index].stream_info);
3160 /* Tell the HW to drop its old copy of the endpoint context info
3161 * and add the updated copy from the input context.
3163 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3164 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3166 /* Issue and wait for the configure endpoint command */
3167 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3170 /* xHC rejected the configure endpoint command for some reason, so we
3171 * leave the old ring intact and free our internal streams data
3177 spin_lock_irqsave(&xhci->lock, flags);
3178 for (i = 0; i < num_eps; i++) {
3179 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3180 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3181 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3182 udev->slot_id, ep_index);
3183 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3185 xhci_free_command(xhci, config_cmd);
3186 spin_unlock_irqrestore(&xhci->lock, flags);
3188 /* Subtract 1 for stream 0, which drivers can't use */
3189 return num_streams - 1;
3192 /* If it didn't work, free the streams! */
3193 for (i = 0; i < num_eps; i++) {
3194 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3195 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3196 vdev->eps[ep_index].stream_info = NULL;
3197 /* FIXME Unset maxPstreams in endpoint context and
3198 * update deq ptr to point to normal string ring.
3200 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3201 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3202 xhci_endpoint_zero(xhci, vdev, eps[i]);
3204 xhci_free_command(xhci, config_cmd);
3208 /* Transition the endpoint from using streams to being a "normal" endpoint
3211 * Modify the endpoint context state, submit a configure endpoint command,
3212 * and free all endpoint rings for streams if that completes successfully.
3214 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3215 struct usb_host_endpoint **eps, unsigned int num_eps,
3219 struct xhci_hcd *xhci;
3220 struct xhci_virt_device *vdev;
3221 struct xhci_command *command;
3222 unsigned int ep_index;
3223 unsigned long flags;
3224 u32 changed_ep_bitmask;
3226 xhci = hcd_to_xhci(hcd);
3227 vdev = xhci->devs[udev->slot_id];
3229 /* Set up a configure endpoint command to remove the streams rings */
3230 spin_lock_irqsave(&xhci->lock, flags);
3231 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3232 udev, eps, num_eps);
3233 if (changed_ep_bitmask == 0) {
3234 spin_unlock_irqrestore(&xhci->lock, flags);
3238 /* Use the xhci_command structure from the first endpoint. We may have
3239 * allocated too many, but the driver may call xhci_free_streams() for
3240 * each endpoint it grouped into one call to xhci_alloc_streams().
3242 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3243 command = vdev->eps[ep_index].stream_info->free_streams_command;
3244 for (i = 0; i < num_eps; i++) {
3245 struct xhci_ep_ctx *ep_ctx;
3247 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3248 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3249 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3250 EP_GETTING_NO_STREAMS;
3252 xhci_endpoint_copy(xhci, command->in_ctx,
3253 vdev->out_ctx, ep_index);
3254 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3255 &vdev->eps[ep_index]);
3257 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3258 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3259 spin_unlock_irqrestore(&xhci->lock, flags);
3261 /* Issue and wait for the configure endpoint command,
3262 * which must succeed.
3264 ret = xhci_configure_endpoint(xhci, udev, command,
3267 /* xHC rejected the configure endpoint command for some reason, so we
3268 * leave the streams rings intact.
3273 spin_lock_irqsave(&xhci->lock, flags);
3274 for (i = 0; i < num_eps; i++) {
3275 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3276 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3277 vdev->eps[ep_index].stream_info = NULL;
3278 /* FIXME Unset maxPstreams in endpoint context and
3279 * update deq ptr to point to normal string ring.
3281 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3282 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3284 spin_unlock_irqrestore(&xhci->lock, flags);
3290 * Deletes endpoint resources for endpoints that were active before a Reset
3291 * Device command, or a Disable Slot command. The Reset Device command leaves
3292 * the control endpoint intact, whereas the Disable Slot command deletes it.
3294 * Must be called with xhci->lock held.
3296 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3297 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3300 unsigned int num_dropped_eps = 0;
3301 unsigned int drop_flags = 0;
3303 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3304 if (virt_dev->eps[i].ring) {
3305 drop_flags |= 1 << i;
3309 xhci->num_active_eps -= num_dropped_eps;
3310 if (num_dropped_eps)
3311 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3313 num_dropped_eps, drop_flags,
3314 xhci->num_active_eps);
3318 * This submits a Reset Device Command, which will set the device state to 0,
3319 * set the device address to 0, and disable all the endpoints except the default
3320 * control endpoint. The USB core should come back and call
3321 * xhci_address_device(), and then re-set up the configuration. If this is
3322 * called because of a usb_reset_and_verify_device(), then the old alternate
3323 * settings will be re-installed through the normal bandwidth allocation
3326 * Wait for the Reset Device command to finish. Remove all structures
3327 * associated with the endpoints that were disabled. Clear the input device
3328 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3330 * If the virt_dev to be reset does not exist or does not match the udev,
3331 * it means the device is lost, possibly due to the xHC restore error and
3332 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3333 * re-allocate the device.
3335 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3338 unsigned long flags;
3339 struct xhci_hcd *xhci;
3340 unsigned int slot_id;
3341 struct xhci_virt_device *virt_dev;
3342 struct xhci_command *reset_device_cmd;
3344 int last_freed_endpoint;
3345 struct xhci_slot_ctx *slot_ctx;
3346 int old_active_eps = 0;
3348 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3351 xhci = hcd_to_xhci(hcd);
3352 slot_id = udev->slot_id;
3353 virt_dev = xhci->devs[slot_id];
3355 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3356 "not exist. Re-allocate the device\n", slot_id);
3357 ret = xhci_alloc_dev(hcd, udev);
3364 if (virt_dev->tt_info)
3365 old_active_eps = virt_dev->tt_info->active_eps;
3367 if (virt_dev->udev != udev) {
3368 /* If the virt_dev and the udev does not match, this virt_dev
3369 * may belong to another udev.
3370 * Re-allocate the device.
3372 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3373 "not match the udev. Re-allocate the device\n",
3375 ret = xhci_alloc_dev(hcd, udev);
3382 /* If device is not setup, there is no point in resetting it */
3383 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3384 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3385 SLOT_STATE_DISABLED)
3388 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3389 /* Allocate the command structure that holds the struct completion.
3390 * Assume we're in process context, since the normal device reset
3391 * process has to wait for the device anyway. Storage devices are
3392 * reset as part of error handling, so use GFP_NOIO instead of
3395 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3396 if (!reset_device_cmd) {
3397 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3401 /* Attempt to submit the Reset Device command to the command ring */
3402 spin_lock_irqsave(&xhci->lock, flags);
3403 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3405 /* Enqueue pointer can be left pointing to the link TRB,
3406 * we must handle that
3408 if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3409 reset_device_cmd->command_trb =
3410 xhci->cmd_ring->enq_seg->next->trbs;
3412 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3413 ret = xhci_queue_reset_device(xhci, slot_id);
3415 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3416 list_del(&reset_device_cmd->cmd_list);
3417 spin_unlock_irqrestore(&xhci->lock, flags);
3418 goto command_cleanup;
3420 xhci_ring_cmd_db(xhci);
3421 spin_unlock_irqrestore(&xhci->lock, flags);
3423 /* Wait for the Reset Device command to finish */
3424 timeleft = wait_for_completion_interruptible_timeout(
3425 reset_device_cmd->completion,
3426 USB_CTRL_SET_TIMEOUT);
3427 if (timeleft <= 0) {
3428 xhci_warn(xhci, "%s while waiting for reset device command\n",
3429 timeleft == 0 ? "Timeout" : "Signal");
3430 spin_lock_irqsave(&xhci->lock, flags);
3431 /* The timeout might have raced with the event ring handler, so
3432 * only delete from the list if the item isn't poisoned.
3434 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3435 list_del(&reset_device_cmd->cmd_list);
3436 spin_unlock_irqrestore(&xhci->lock, flags);
3438 goto command_cleanup;
3441 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3442 * unless we tried to reset a slot ID that wasn't enabled,
3443 * or the device wasn't in the addressed or configured state.
3445 ret = reset_device_cmd->status;
3447 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3448 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3449 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3451 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3452 xhci_info(xhci, "Not freeing device rings.\n");
3453 /* Don't treat this as an error. May change my mind later. */
3455 goto command_cleanup;
3457 xhci_dbg(xhci, "Successful reset device command.\n");
3460 if (xhci_is_vendor_info_code(xhci, ret))
3462 xhci_warn(xhci, "Unknown completion code %u for "
3463 "reset device command.\n", ret);
3465 goto command_cleanup;
3468 /* Free up host controller endpoint resources */
3469 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3470 spin_lock_irqsave(&xhci->lock, flags);
3471 /* Don't delete the default control endpoint resources */
3472 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3473 spin_unlock_irqrestore(&xhci->lock, flags);
3476 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3477 last_freed_endpoint = 1;
3478 for (i = 1; i < 31; ++i) {
3479 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3481 if (ep->ep_state & EP_HAS_STREAMS) {
3482 xhci_free_stream_info(xhci, ep->stream_info);
3483 ep->stream_info = NULL;
3484 ep->ep_state &= ~EP_HAS_STREAMS;
3488 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3489 last_freed_endpoint = i;
3491 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3492 xhci_drop_ep_from_interval_table(xhci,
3493 &virt_dev->eps[i].bw_info,
3498 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3500 /* If necessary, update the number of active TTs on this root port */
3501 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3503 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3504 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3508 xhci_free_command(xhci, reset_device_cmd);
3513 * At this point, the struct usb_device is about to go away, the device has
3514 * disconnected, and all traffic has been stopped and the endpoints have been
3515 * disabled. Free any HC data structures associated with that device.
3517 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3519 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3520 struct xhci_virt_device *virt_dev;
3521 struct device *dev = hcd->self.controller;
3522 unsigned long flags;
3526 #ifndef CONFIG_USB_DEFAULT_PERSIST
3528 * We called pm_runtime_get_noresume when the device was attached.
3529 * Decrement the counter here to allow controller to runtime suspend
3530 * if no devices remain.
3532 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3533 pm_runtime_put_noidle(dev);
3536 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3537 /* If the host is halted due to driver unload, we still need to free the
3540 if (ret <= 0 && ret != -ENODEV)
3543 virt_dev = xhci->devs[udev->slot_id];
3545 /* Stop any wayward timer functions (which may grab the lock) */
3546 for (i = 0; i < 31; ++i) {
3547 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3548 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3551 if (udev->usb2_hw_lpm_enabled) {
3552 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3553 udev->usb2_hw_lpm_enabled = 0;
3556 spin_lock_irqsave(&xhci->lock, flags);
3557 /* Don't disable the slot if the host controller is dead. */
3558 state = xhci_readl(xhci, &xhci->op_regs->status);
3559 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3560 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3561 xhci_free_virt_device(xhci, udev->slot_id);
3562 spin_unlock_irqrestore(&xhci->lock, flags);
3566 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3567 spin_unlock_irqrestore(&xhci->lock, flags);
3568 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3571 xhci_ring_cmd_db(xhci);
3572 spin_unlock_irqrestore(&xhci->lock, flags);
3574 * Event command completion handler will free any data structures
3575 * associated with the slot. XXX Can free sleep?
3580 * Checks if we have enough host controller resources for the default control
3583 * Must be called with xhci->lock held.
3585 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3587 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3588 xhci_dbg(xhci, "Not enough ep ctxs: "
3589 "%u active, need to add 1, limit is %u.\n",
3590 xhci->num_active_eps, xhci->limit_active_eps);
3593 xhci->num_active_eps += 1;
3594 xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3595 xhci->num_active_eps);
3601 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3602 * timed out, or allocating memory failed. Returns 1 on success.
3604 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3606 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3607 struct device *dev = hcd->self.controller;
3608 unsigned long flags;
3611 union xhci_trb *cmd_trb;
3613 spin_lock_irqsave(&xhci->lock, flags);
3614 cmd_trb = xhci->cmd_ring->dequeue;
3615 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3617 spin_unlock_irqrestore(&xhci->lock, flags);
3618 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3621 xhci_ring_cmd_db(xhci);
3622 spin_unlock_irqrestore(&xhci->lock, flags);
3624 /* XXX: how much time for xHC slot assignment? */
3625 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3626 XHCI_CMD_DEFAULT_TIMEOUT);
3627 if (timeleft <= 0) {
3628 xhci_warn(xhci, "%s while waiting for a slot\n",
3629 timeleft == 0 ? "Timeout" : "Signal");
3630 /* cancel the enable slot request */
3631 return xhci_cancel_cmd(xhci, NULL, cmd_trb);
3634 if (!xhci->slot_id) {
3635 xhci_err(xhci, "Error while assigning device slot ID\n");
3639 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3640 spin_lock_irqsave(&xhci->lock, flags);
3641 ret = xhci_reserve_host_control_ep_resources(xhci);
3643 spin_unlock_irqrestore(&xhci->lock, flags);
3644 xhci_warn(xhci, "Not enough host resources, "
3645 "active endpoint contexts = %u\n",
3646 xhci->num_active_eps);
3649 spin_unlock_irqrestore(&xhci->lock, flags);
3651 /* Use GFP_NOIO, since this function can be called from
3652 * xhci_discover_or_reset_device(), which may be called as part of
3653 * mass storage driver error handling.
3655 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3656 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3659 udev->slot_id = xhci->slot_id;
3661 #ifndef CONFIG_USB_DEFAULT_PERSIST
3663 * If resetting upon resume, we can't put the controller into runtime
3664 * suspend if there is a device attached.
3666 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3667 pm_runtime_get_noresume(dev);
3670 /* Is this a LS or FS device under a HS hub? */
3671 /* Hub or peripherial? */
3675 /* Disable slot, if we can do it without mem alloc */
3676 spin_lock_irqsave(&xhci->lock, flags);
3677 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3678 xhci_ring_cmd_db(xhci);
3679 spin_unlock_irqrestore(&xhci->lock, flags);
3684 * Issue an Address Device command (which will issue a SetAddress request to
3686 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3687 * we should only issue and wait on one address command at the same time.
3689 * We add one to the device address issued by the hardware because the USB core
3690 * uses address 1 for the root hubs (even though they're not really devices).
3692 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3694 unsigned long flags;
3696 struct xhci_virt_device *virt_dev;
3698 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3699 struct xhci_slot_ctx *slot_ctx;
3700 struct xhci_input_control_ctx *ctrl_ctx;
3702 union xhci_trb *cmd_trb;
3704 if (!udev->slot_id) {
3705 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3709 virt_dev = xhci->devs[udev->slot_id];
3711 if (WARN_ON(!virt_dev)) {
3713 * In plug/unplug torture test with an NEC controller,
3714 * a zero-dereference was observed once due to virt_dev = 0.
3715 * Print useful debug rather than crash if it is observed again!
3717 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3722 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3724 * If this is the first Set Address since device plug-in or
3725 * virt_device realloaction after a resume with an xHCI power loss,
3726 * then set up the slot context.
3728 if (!slot_ctx->dev_info)
3729 xhci_setup_addressable_virt_dev(xhci, udev);
3730 /* Otherwise, update the control endpoint ring enqueue pointer. */
3732 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3733 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3734 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3735 ctrl_ctx->drop_flags = 0;
3737 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3738 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3740 spin_lock_irqsave(&xhci->lock, flags);
3741 cmd_trb = xhci->cmd_ring->dequeue;
3742 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3745 spin_unlock_irqrestore(&xhci->lock, flags);
3746 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3749 xhci_ring_cmd_db(xhci);
3750 spin_unlock_irqrestore(&xhci->lock, flags);
3752 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3753 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3754 XHCI_CMD_DEFAULT_TIMEOUT);
3755 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3756 * the SetAddress() "recovery interval" required by USB and aborting the
3757 * command on a timeout.
3759 if (timeleft <= 0) {
3760 xhci_warn(xhci, "%s while waiting for address device command\n",
3761 timeleft == 0 ? "Timeout" : "Signal");
3762 /* cancel the address device command */
3763 ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
3769 switch (virt_dev->cmd_status) {
3770 case COMP_CTX_STATE:
3772 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3777 dev_warn(&udev->dev, "Device not responding to set address.\n");
3781 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3782 "device command.\n");
3786 xhci_dbg(xhci, "Successful Address Device command\n");
3789 xhci_err(xhci, "ERROR: unexpected command completion "
3790 "code 0x%x.\n", virt_dev->cmd_status);
3791 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3792 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3799 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3800 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3801 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3803 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3804 (unsigned long long)
3805 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3806 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3807 (unsigned long long)virt_dev->out_ctx->dma);
3808 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3809 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3810 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3811 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3813 * USB core uses address 1 for the roothubs, so we add one to the
3814 * address given back to us by the HC.
3816 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3817 /* Use kernel assigned address for devices; store xHC assigned
3818 * address locally. */
3819 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3821 /* Zero the input context control for later use */
3822 ctrl_ctx->add_flags = 0;
3823 ctrl_ctx->drop_flags = 0;
3825 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3830 #ifdef CONFIG_USB_SUSPEND
3832 /* BESL to HIRD Encoding array for USB2 LPM */
3833 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3834 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3836 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3837 static int xhci_calculate_hird_besl(int u2del, bool use_besl)
3842 for (hird = 0; hird < 16; hird++) {
3843 if (xhci_besl_encoding[hird] >= u2del)
3850 hird = (u2del - 51) / 75 + 1;
3859 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
3860 struct usb_device *udev)
3862 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3863 struct dev_info *dev_info;
3864 __le32 __iomem **port_array;
3865 __le32 __iomem *addr, *pm_addr;
3867 unsigned int port_num;
3868 unsigned long flags;
3872 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
3876 /* we only support lpm for non-hub device connected to root hub yet */
3877 if (!udev->parent || udev->parent->parent ||
3878 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3881 spin_lock_irqsave(&xhci->lock, flags);
3883 /* Look for devices in lpm_failed_devs list */
3884 dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
3885 le16_to_cpu(udev->descriptor.idProduct);
3886 list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
3887 if (dev_info->dev_id == dev_id) {
3893 port_array = xhci->usb2_ports;
3894 port_num = udev->portnum - 1;
3896 if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
3897 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
3903 * Test USB 2.0 software LPM.
3904 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3905 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3906 * in the June 2011 errata release.
3908 xhci_dbg(xhci, "test port %d software LPM\n", port_num);
3910 * Set L1 Device Slot and HIRD/BESL.
3911 * Check device's USB 2.0 extension descriptor to determine whether
3912 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3914 pm_addr = port_array[port_num] + 1;
3915 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3916 if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3917 hird = xhci_calculate_hird_besl(u2del, 1);
3919 hird = xhci_calculate_hird_besl(u2del, 0);
3921 temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
3922 xhci_writel(xhci, temp, pm_addr);
3924 /* Set port link state to U2(L1) */
3925 addr = port_array[port_num];
3926 xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
3929 spin_unlock_irqrestore(&xhci->lock, flags);
3931 spin_lock_irqsave(&xhci->lock, flags);
3933 /* Check L1 Status */
3934 ret = handshake(xhci, pm_addr, PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
3935 if (ret != -ETIMEDOUT) {
3936 /* enter L1 successfully */
3937 temp = xhci_readl(xhci, addr);
3938 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
3942 temp = xhci_readl(xhci, pm_addr);
3943 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
3944 port_num, temp & PORT_L1S_MASK);
3948 /* Resume the port */
3949 xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
3951 spin_unlock_irqrestore(&xhci->lock, flags);
3953 spin_lock_irqsave(&xhci->lock, flags);
3956 xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
3958 /* Check PORTSC to make sure the device is in the right state */
3960 temp = xhci_readl(xhci, addr);
3961 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
3962 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
3963 (temp & PORT_PLS_MASK) != XDEV_U0) {
3964 xhci_dbg(xhci, "port L1 resume fail\n");
3970 /* Insert dev to lpm_failed_devs list */
3971 xhci_warn(xhci, "device LPM test failed, may disconnect and "
3973 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
3978 dev_info->dev_id = dev_id;
3979 INIT_LIST_HEAD(&dev_info->list);
3980 list_add(&dev_info->list, &xhci->lpm_failed_devs);
3982 xhci_ring_device(xhci, udev->slot_id);
3986 spin_unlock_irqrestore(&xhci->lock, flags);
3990 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3991 struct usb_device *udev, int enable)
3993 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3994 __le32 __iomem **port_array;
3995 __le32 __iomem *pm_addr;
3997 unsigned int port_num;
3998 unsigned long flags;
4001 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4005 if (!udev->parent || udev->parent->parent ||
4006 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4009 if (udev->usb2_hw_lpm_capable != 1)
4012 spin_lock_irqsave(&xhci->lock, flags);
4014 port_array = xhci->usb2_ports;
4015 port_num = udev->portnum - 1;
4016 pm_addr = port_array[port_num] + 1;
4017 temp = xhci_readl(xhci, pm_addr);
4019 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4020 enable ? "enable" : "disable", port_num);
4022 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4023 if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
4024 hird = xhci_calculate_hird_besl(u2del, 1);
4026 hird = xhci_calculate_hird_besl(u2del, 0);
4029 temp &= ~PORT_HIRD_MASK;
4030 temp |= PORT_HIRD(hird) | PORT_RWE;
4031 xhci_writel(xhci, temp, pm_addr);
4032 temp = xhci_readl(xhci, pm_addr);
4034 xhci_writel(xhci, temp, pm_addr);
4036 temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
4037 xhci_writel(xhci, temp, pm_addr);
4040 spin_unlock_irqrestore(&xhci->lock, flags);
4044 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4046 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4049 ret = xhci_usb2_software_lpm_test(hcd, udev);
4051 xhci_dbg(xhci, "software LPM test succeed\n");
4052 if (xhci->hw_lpm_support == 1) {
4053 udev->usb2_hw_lpm_capable = 1;
4054 ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
4056 udev->usb2_hw_lpm_enabled = 1;
4065 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4066 struct usb_device *udev, int enable)
4071 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4076 #endif /* CONFIG_USB_SUSPEND */
4078 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4079 * internal data structures for the device.
4081 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4082 struct usb_tt *tt, gfp_t mem_flags)
4084 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4085 struct xhci_virt_device *vdev;
4086 struct xhci_command *config_cmd;
4087 struct xhci_input_control_ctx *ctrl_ctx;
4088 struct xhci_slot_ctx *slot_ctx;
4089 unsigned long flags;
4090 unsigned think_time;
4093 /* Ignore root hubs */
4097 vdev = xhci->devs[hdev->slot_id];
4099 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4102 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4104 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4108 spin_lock_irqsave(&xhci->lock, flags);
4109 if (hdev->speed == USB_SPEED_HIGH &&
4110 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4111 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4112 xhci_free_command(xhci, config_cmd);
4113 spin_unlock_irqrestore(&xhci->lock, flags);
4117 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4118 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4119 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4120 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4121 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4123 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4124 if (xhci->hci_version > 0x95) {
4125 xhci_dbg(xhci, "xHCI version %x needs hub "
4126 "TT think time and number of ports\n",
4127 (unsigned int) xhci->hci_version);
4128 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4129 /* Set TT think time - convert from ns to FS bit times.
4130 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4131 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4133 * xHCI 1.0: this field shall be 0 if the device is not a
4136 think_time = tt->think_time;
4137 if (think_time != 0)
4138 think_time = (think_time / 666) - 1;
4139 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4140 slot_ctx->tt_info |=
4141 cpu_to_le32(TT_THINK_TIME(think_time));
4143 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4144 "TT think time or number of ports\n",
4145 (unsigned int) xhci->hci_version);
4147 slot_ctx->dev_state = 0;
4148 spin_unlock_irqrestore(&xhci->lock, flags);
4150 xhci_dbg(xhci, "Set up %s for hub device.\n",
4151 (xhci->hci_version > 0x95) ?
4152 "configure endpoint" : "evaluate context");
4153 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4154 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4156 /* Issue and wait for the configure endpoint or
4157 * evaluate context command.
4159 if (xhci->hci_version > 0x95)
4160 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4163 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4166 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4167 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4169 xhci_free_command(xhci, config_cmd);
4173 int xhci_get_frame(struct usb_hcd *hcd)
4175 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4176 /* EHCI mods by the periodic size. Why? */
4177 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4180 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4182 struct xhci_hcd *xhci;
4183 struct device *dev = hcd->self.controller;
4187 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
4189 if (usb_hcd_is_primary_hcd(hcd)) {
4190 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4193 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4194 xhci->main_hcd = hcd;
4195 /* Mark the first roothub as being USB 2.0.
4196 * The xHCI driver will register the USB 3.0 roothub.
4198 hcd->speed = HCD_USB2;
4199 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4201 * USB 2.0 roothub under xHCI has an integrated TT,
4202 * (rate matching hub) as opposed to having an OHCI/UHCI
4203 * companion controller.
4207 /* xHCI private pointer was set in xhci_pci_probe for the second
4208 * registered roothub.
4210 xhci = hcd_to_xhci(hcd);
4211 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4212 if (HCC_64BIT_ADDR(temp)) {
4213 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4214 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4216 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4221 xhci->cap_regs = hcd->regs;
4222 xhci->op_regs = hcd->regs +
4223 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4224 xhci->run_regs = hcd->regs +
4225 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4226 /* Cache read-only capability registers */
4227 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4228 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4229 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4230 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4231 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4232 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4233 xhci_print_registers(xhci);
4235 get_quirks(dev, xhci);
4237 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4238 * success event after a short transfer. This quirk will ignore such
4241 if (xhci->hci_version > 0x96)
4242 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4244 /* Make sure the HC is halted. */
4245 retval = xhci_halt(xhci);
4249 xhci_dbg(xhci, "Resetting HCD\n");
4250 /* Reset the internal HC memory state and registers. */
4251 retval = xhci_reset(xhci);
4254 xhci_dbg(xhci, "Reset complete\n");
4256 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4257 if (HCC_64BIT_ADDR(temp)) {
4258 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4259 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4261 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4264 xhci_dbg(xhci, "Calling HCD init\n");
4265 /* Initialize HCD and host controller data structures. */
4266 retval = xhci_init(hcd);
4269 xhci_dbg(xhci, "Called HCD init\n");
4276 MODULE_DESCRIPTION(DRIVER_DESC);
4277 MODULE_AUTHOR(DRIVER_AUTHOR);
4278 MODULE_LICENSE("GPL");
4280 static int __init xhci_hcd_init(void)
4284 retval = xhci_register_pci();
4286 printk(KERN_DEBUG "Problem registering PCI driver.");
4290 * Check the compiler generated sizes of structures that must be laid
4291 * out in specific ways for hardware access.
4293 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4294 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4295 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4296 /* xhci_device_control has eight fields, and also
4297 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4299 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4300 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4301 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4302 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4303 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4304 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4305 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4306 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4309 module_init(xhci_hcd_init);
4311 static void __exit xhci_hcd_cleanup(void)
4313 xhci_unregister_pci();
4315 module_exit(xhci_hcd_cleanup);