usb: ch9: fix up MaxStreams helper
[pandora-kernel.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29
30 #include "xhci.h"
31
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
34
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
39
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
41 /*
42  * handshake - spin reading hc until handshake completes or fails
43  * @ptr: address of hc register to be read
44  * @mask: bits to look at in result of read
45  * @done: value of those bits when handshake succeeds
46  * @usec: timeout in microseconds
47  *
48  * Returns negative errno, or zero on success
49  *
50  * Success happens when the "mask" bits have the specified value (hardware
51  * handshake done).  There are two failure modes:  "usec" have passed (major
52  * hardware flakeout), or the register reads as all-ones (hardware removed).
53  */
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55                       u32 mask, u32 done, int usec)
56 {
57         u32     result;
58
59         do {
60                 result = xhci_readl(xhci, ptr);
61                 if (result == ~(u32)0)          /* card removed */
62                         return -ENODEV;
63                 result &= mask;
64                 if (result == done)
65                         return 0;
66                 udelay(1);
67                 usec--;
68         } while (usec > 0);
69         return -ETIMEDOUT;
70 }
71
72 /*
73  * Disable interrupts and begin the xHCI halting process.
74  */
75 void xhci_quiesce(struct xhci_hcd *xhci)
76 {
77         u32 halted;
78         u32 cmd;
79         u32 mask;
80
81         mask = ~(XHCI_IRQS);
82         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83         if (!halted)
84                 mask &= ~CMD_RUN;
85
86         cmd = xhci_readl(xhci, &xhci->op_regs->command);
87         cmd &= mask;
88         xhci_writel(xhci, cmd, &xhci->op_regs->command);
89 }
90
91 /*
92  * Force HC into halt state.
93  *
94  * Disable any IRQs and clear the run/stop bit.
95  * HC will complete any current and actively pipelined transactions, and
96  * should halt within 16 ms of the run/stop bit being cleared.
97  * Read HC Halted bit in the status register to see when the HC is finished.
98  */
99 int xhci_halt(struct xhci_hcd *xhci)
100 {
101         int ret;
102         xhci_dbg(xhci, "// Halt the HC\n");
103         xhci_quiesce(xhci);
104
105         ret = handshake(xhci, &xhci->op_regs->status,
106                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107         if (!ret)
108                 xhci->xhc_state |= XHCI_STATE_HALTED;
109         return ret;
110 }
111
112 /*
113  * Set the run bit and wait for the host to be running.
114  */
115 static int xhci_start(struct xhci_hcd *xhci)
116 {
117         u32 temp;
118         int ret;
119
120         temp = xhci_readl(xhci, &xhci->op_regs->command);
121         temp |= (CMD_RUN);
122         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
123                         temp);
124         xhci_writel(xhci, temp, &xhci->op_regs->command);
125
126         /*
127          * Wait for the HCHalted Status bit to be 0 to indicate the host is
128          * running.
129          */
130         ret = handshake(xhci, &xhci->op_regs->status,
131                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
132         if (ret == -ETIMEDOUT)
133                 xhci_err(xhci, "Host took too long to start, "
134                                 "waited %u microseconds.\n",
135                                 XHCI_MAX_HALT_USEC);
136         if (!ret)
137                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
138         return ret;
139 }
140
141 /*
142  * Reset a halted HC.
143  *
144  * This resets pipelines, timers, counters, state machines, etc.
145  * Transactions will be terminated immediately, and operational registers
146  * will be set to their defaults.
147  */
148 int xhci_reset(struct xhci_hcd *xhci)
149 {
150         u32 command;
151         u32 state;
152         int ret;
153
154         state = xhci_readl(xhci, &xhci->op_regs->status);
155         if ((state & STS_HALT) == 0) {
156                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
157                 return 0;
158         }
159
160         xhci_dbg(xhci, "// Reset the HC\n");
161         command = xhci_readl(xhci, &xhci->op_regs->command);
162         command |= CMD_RESET;
163         xhci_writel(xhci, command, &xhci->op_regs->command);
164
165         ret = handshake(xhci, &xhci->op_regs->command,
166                         CMD_RESET, 0, 250 * 1000);
167         if (ret)
168                 return ret;
169
170         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
171         /*
172          * xHCI cannot write to any doorbells or operational registers other
173          * than status until the "Controller Not Ready" flag is cleared.
174          */
175         return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
176 }
177
178 #ifdef CONFIG_PCI
179 static int xhci_free_msi(struct xhci_hcd *xhci)
180 {
181         int i;
182
183         if (!xhci->msix_entries)
184                 return -EINVAL;
185
186         for (i = 0; i < xhci->msix_count; i++)
187                 if (xhci->msix_entries[i].vector)
188                         free_irq(xhci->msix_entries[i].vector,
189                                         xhci_to_hcd(xhci));
190         return 0;
191 }
192
193 /*
194  * Set up MSI
195  */
196 static int xhci_setup_msi(struct xhci_hcd *xhci)
197 {
198         int ret;
199         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
200
201         ret = pci_enable_msi(pdev);
202         if (ret) {
203                 xhci_err(xhci, "failed to allocate MSI entry\n");
204                 return ret;
205         }
206
207         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
208                                 0, "xhci_hcd", xhci_to_hcd(xhci));
209         if (ret) {
210                 xhci_err(xhci, "disable MSI interrupt\n");
211                 pci_disable_msi(pdev);
212         }
213
214         return ret;
215 }
216
217 /*
218  * Free IRQs
219  * free all IRQs request
220  */
221 static void xhci_free_irq(struct xhci_hcd *xhci)
222 {
223         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
224         int ret;
225
226         /* return if using legacy interrupt */
227         if (xhci_to_hcd(xhci)->irq >= 0)
228                 return;
229
230         ret = xhci_free_msi(xhci);
231         if (!ret)
232                 return;
233         if (pdev->irq >= 0)
234                 free_irq(pdev->irq, xhci_to_hcd(xhci));
235
236         return;
237 }
238
239 /*
240  * Set up MSI-X
241  */
242 static int xhci_setup_msix(struct xhci_hcd *xhci)
243 {
244         int i, ret = 0;
245         struct usb_hcd *hcd = xhci_to_hcd(xhci);
246         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
247
248         /*
249          * calculate number of msi-x vectors supported.
250          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
251          *   with max number of interrupters based on the xhci HCSPARAMS1.
252          * - num_online_cpus: maximum msi-x vectors per CPUs core.
253          *   Add additional 1 vector to ensure always available interrupt.
254          */
255         xhci->msix_count = min(num_online_cpus() + 1,
256                                 HCS_MAX_INTRS(xhci->hcs_params1));
257
258         xhci->msix_entries =
259                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
260                                 GFP_KERNEL);
261         if (!xhci->msix_entries) {
262                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
263                 return -ENOMEM;
264         }
265
266         for (i = 0; i < xhci->msix_count; i++) {
267                 xhci->msix_entries[i].entry = i;
268                 xhci->msix_entries[i].vector = 0;
269         }
270
271         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
272         if (ret) {
273                 xhci_err(xhci, "Failed to enable MSI-X\n");
274                 goto free_entries;
275         }
276
277         for (i = 0; i < xhci->msix_count; i++) {
278                 ret = request_irq(xhci->msix_entries[i].vector,
279                                 (irq_handler_t)xhci_msi_irq,
280                                 0, "xhci_hcd", xhci_to_hcd(xhci));
281                 if (ret)
282                         goto disable_msix;
283         }
284
285         hcd->msix_enabled = 1;
286         return ret;
287
288 disable_msix:
289         xhci_err(xhci, "disable MSI-X interrupt\n");
290         xhci_free_irq(xhci);
291         pci_disable_msix(pdev);
292 free_entries:
293         kfree(xhci->msix_entries);
294         xhci->msix_entries = NULL;
295         return ret;
296 }
297
298 /* Free any IRQs and disable MSI-X */
299 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
300 {
301         struct usb_hcd *hcd = xhci_to_hcd(xhci);
302         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
303
304         xhci_free_irq(xhci);
305
306         if (xhci->msix_entries) {
307                 pci_disable_msix(pdev);
308                 kfree(xhci->msix_entries);
309                 xhci->msix_entries = NULL;
310         } else {
311                 pci_disable_msi(pdev);
312         }
313
314         hcd->msix_enabled = 0;
315         return;
316 }
317
318 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
319 {
320         int i;
321
322         if (xhci->msix_entries) {
323                 for (i = 0; i < xhci->msix_count; i++)
324                         synchronize_irq(xhci->msix_entries[i].vector);
325         }
326 }
327
328 static int xhci_try_enable_msi(struct usb_hcd *hcd)
329 {
330         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
331         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
332         int ret;
333
334         /*
335          * Some Fresco Logic host controllers advertise MSI, but fail to
336          * generate interrupts.  Don't even try to enable MSI.
337          */
338         if (xhci->quirks & XHCI_BROKEN_MSI)
339                 return 0;
340
341         /* unregister the legacy interrupt */
342         if (hcd->irq)
343                 free_irq(hcd->irq, hcd);
344         hcd->irq = -1;
345
346         ret = xhci_setup_msix(xhci);
347         if (ret)
348                 /* fall back to msi*/
349                 ret = xhci_setup_msi(xhci);
350
351         if (!ret)
352                 /* hcd->irq is -1, we have MSI */
353                 return 0;
354
355         /* fall back to legacy interrupt*/
356         ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
357                         hcd->irq_descr, hcd);
358         if (ret) {
359                 xhci_err(xhci, "request interrupt %d failed\n",
360                                 pdev->irq);
361                 return ret;
362         }
363         hcd->irq = pdev->irq;
364         return 0;
365 }
366
367 #else
368
369 static int xhci_try_enable_msi(struct usb_hcd *hcd)
370 {
371         return 0;
372 }
373
374 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
375 {
376 }
377
378 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
379 {
380 }
381
382 #endif
383
384 /*
385  * Initialize memory for HCD and xHC (one-time init).
386  *
387  * Program the PAGESIZE register, initialize the device context array, create
388  * device contexts (?), set up a command ring segment (or two?), create event
389  * ring (one for now).
390  */
391 int xhci_init(struct usb_hcd *hcd)
392 {
393         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
394         int retval = 0;
395
396         xhci_dbg(xhci, "xhci_init\n");
397         spin_lock_init(&xhci->lock);
398         if (xhci->hci_version == 0x95 && link_quirk) {
399                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
400                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
401         } else {
402                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
403         }
404         retval = xhci_mem_init(xhci, GFP_KERNEL);
405         xhci_dbg(xhci, "Finished xhci_init\n");
406
407         return retval;
408 }
409
410 /*-------------------------------------------------------------------------*/
411
412
413 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
414 static void xhci_event_ring_work(unsigned long arg)
415 {
416         unsigned long flags;
417         int temp;
418         u64 temp_64;
419         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
420         int i, j;
421
422         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
423
424         spin_lock_irqsave(&xhci->lock, flags);
425         temp = xhci_readl(xhci, &xhci->op_regs->status);
426         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
427         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
428                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
429                 xhci_dbg(xhci, "HW died, polling stopped.\n");
430                 spin_unlock_irqrestore(&xhci->lock, flags);
431                 return;
432         }
433
434         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
435         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
436         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
437         xhci->error_bitmask = 0;
438         xhci_dbg(xhci, "Event ring:\n");
439         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
440         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
441         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
442         temp_64 &= ~ERST_PTR_MASK;
443         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
444         xhci_dbg(xhci, "Command ring:\n");
445         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
446         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
447         xhci_dbg_cmd_ptrs(xhci);
448         for (i = 0; i < MAX_HC_SLOTS; ++i) {
449                 if (!xhci->devs[i])
450                         continue;
451                 for (j = 0; j < 31; ++j) {
452                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
453                 }
454         }
455         spin_unlock_irqrestore(&xhci->lock, flags);
456
457         if (!xhci->zombie)
458                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
459         else
460                 xhci_dbg(xhci, "Quit polling the event ring.\n");
461 }
462 #endif
463
464 static int xhci_run_finished(struct xhci_hcd *xhci)
465 {
466         if (xhci_start(xhci)) {
467                 xhci_halt(xhci);
468                 return -ENODEV;
469         }
470         xhci->shared_hcd->state = HC_STATE_RUNNING;
471
472         if (xhci->quirks & XHCI_NEC_HOST)
473                 xhci_ring_cmd_db(xhci);
474
475         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
476         return 0;
477 }
478
479 /*
480  * Start the HC after it was halted.
481  *
482  * This function is called by the USB core when the HC driver is added.
483  * Its opposite is xhci_stop().
484  *
485  * xhci_init() must be called once before this function can be called.
486  * Reset the HC, enable device slot contexts, program DCBAAP, and
487  * set command ring pointer and event ring pointer.
488  *
489  * Setup MSI-X vectors and enable interrupts.
490  */
491 int xhci_run(struct usb_hcd *hcd)
492 {
493         u32 temp;
494         u64 temp_64;
495         int ret;
496         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
497
498         /* Start the xHCI host controller running only after the USB 2.0 roothub
499          * is setup.
500          */
501
502         hcd->uses_new_polling = 1;
503         if (!usb_hcd_is_primary_hcd(hcd))
504                 return xhci_run_finished(xhci);
505
506         xhci_dbg(xhci, "xhci_run\n");
507
508         ret = xhci_try_enable_msi(hcd);
509         if (ret)
510                 return ret;
511
512 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
513         init_timer(&xhci->event_ring_timer);
514         xhci->event_ring_timer.data = (unsigned long) xhci;
515         xhci->event_ring_timer.function = xhci_event_ring_work;
516         /* Poll the event ring */
517         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
518         xhci->zombie = 0;
519         xhci_dbg(xhci, "Setting event ring polling timer\n");
520         add_timer(&xhci->event_ring_timer);
521 #endif
522
523         xhci_dbg(xhci, "Command ring memory map follows:\n");
524         xhci_debug_ring(xhci, xhci->cmd_ring);
525         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
526         xhci_dbg_cmd_ptrs(xhci);
527
528         xhci_dbg(xhci, "ERST memory map follows:\n");
529         xhci_dbg_erst(xhci, &xhci->erst);
530         xhci_dbg(xhci, "Event ring:\n");
531         xhci_debug_ring(xhci, xhci->event_ring);
532         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
533         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
534         temp_64 &= ~ERST_PTR_MASK;
535         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
536
537         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
538         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
539         temp &= ~ER_IRQ_INTERVAL_MASK;
540         temp |= (u32) 160;
541         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
542
543         /* Set the HCD state before we enable the irqs */
544         temp = xhci_readl(xhci, &xhci->op_regs->command);
545         temp |= (CMD_EIE);
546         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
547                         temp);
548         xhci_writel(xhci, temp, &xhci->op_regs->command);
549
550         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
551         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
552                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
553         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
554                         &xhci->ir_set->irq_pending);
555         xhci_print_ir_set(xhci, 0);
556
557         if (xhci->quirks & XHCI_NEC_HOST)
558                 xhci_queue_vendor_command(xhci, 0, 0, 0,
559                                 TRB_TYPE(TRB_NEC_GET_FW));
560
561         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
562         return 0;
563 }
564
565 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
566 {
567         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
568
569         spin_lock_irq(&xhci->lock);
570         xhci_halt(xhci);
571
572         /* The shared_hcd is going to be deallocated shortly (the USB core only
573          * calls this function when allocation fails in usb_add_hcd(), or
574          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
575          */
576         xhci->shared_hcd = NULL;
577         spin_unlock_irq(&xhci->lock);
578 }
579
580 /*
581  * Stop xHCI driver.
582  *
583  * This function is called by the USB core when the HC driver is removed.
584  * Its opposite is xhci_run().
585  *
586  * Disable device contexts, disable IRQs, and quiesce the HC.
587  * Reset the HC, finish any completed transactions, and cleanup memory.
588  */
589 void xhci_stop(struct usb_hcd *hcd)
590 {
591         u32 temp;
592         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
593
594         if (!usb_hcd_is_primary_hcd(hcd)) {
595                 xhci_only_stop_hcd(xhci->shared_hcd);
596                 return;
597         }
598
599         spin_lock_irq(&xhci->lock);
600         /* Make sure the xHC is halted for a USB3 roothub
601          * (xhci_stop() could be called as part of failed init).
602          */
603         xhci_halt(xhci);
604         xhci_reset(xhci);
605         spin_unlock_irq(&xhci->lock);
606
607         xhci_cleanup_msix(xhci);
608
609 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
610         /* Tell the event ring poll function not to reschedule */
611         xhci->zombie = 1;
612         del_timer_sync(&xhci->event_ring_timer);
613 #endif
614
615         if (xhci->quirks & XHCI_AMD_PLL_FIX)
616                 usb_amd_dev_put();
617
618         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
619         temp = xhci_readl(xhci, &xhci->op_regs->status);
620         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
621         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
622         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
623                         &xhci->ir_set->irq_pending);
624         xhci_print_ir_set(xhci, 0);
625
626         xhci_dbg(xhci, "cleaning up memory\n");
627         xhci_mem_cleanup(xhci);
628         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
629                     xhci_readl(xhci, &xhci->op_regs->status));
630 }
631
632 /*
633  * Shutdown HC (not bus-specific)
634  *
635  * This is called when the machine is rebooting or halting.  We assume that the
636  * machine will be powered off, and the HC's internal state will be reset.
637  * Don't bother to free memory.
638  *
639  * This will only ever be called with the main usb_hcd (the USB3 roothub).
640  */
641 void xhci_shutdown(struct usb_hcd *hcd)
642 {
643         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
644
645         spin_lock_irq(&xhci->lock);
646         xhci_halt(xhci);
647         spin_unlock_irq(&xhci->lock);
648
649         xhci_cleanup_msix(xhci);
650
651         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
652                     xhci_readl(xhci, &xhci->op_regs->status));
653 }
654
655 #ifdef CONFIG_PM
656 static void xhci_save_registers(struct xhci_hcd *xhci)
657 {
658         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
659         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
660         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
661         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
662         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
663         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
664         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
665         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
666         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
667 }
668
669 static void xhci_restore_registers(struct xhci_hcd *xhci)
670 {
671         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
672         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
673         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
674         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
675         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
676         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
677         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
678         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
679 }
680
681 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
682 {
683         u64     val_64;
684
685         /* step 2: initialize command ring buffer */
686         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
687         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
688                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
689                                       xhci->cmd_ring->dequeue) &
690                  (u64) ~CMD_RING_RSVD_BITS) |
691                 xhci->cmd_ring->cycle_state;
692         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
693                         (long unsigned long) val_64);
694         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
695 }
696
697 /*
698  * The whole command ring must be cleared to zero when we suspend the host.
699  *
700  * The host doesn't save the command ring pointer in the suspend well, so we
701  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
702  * aligned, because of the reserved bits in the command ring dequeue pointer
703  * register.  Therefore, we can't just set the dequeue pointer back in the
704  * middle of the ring (TRBs are 16-byte aligned).
705  */
706 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
707 {
708         struct xhci_ring *ring;
709         struct xhci_segment *seg;
710
711         ring = xhci->cmd_ring;
712         seg = ring->deq_seg;
713         do {
714                 memset(seg->trbs, 0,
715                         sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
716                 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
717                         cpu_to_le32(~TRB_CYCLE);
718                 seg = seg->next;
719         } while (seg != ring->deq_seg);
720
721         /* Reset the software enqueue and dequeue pointers */
722         ring->deq_seg = ring->first_seg;
723         ring->dequeue = ring->first_seg->trbs;
724         ring->enq_seg = ring->deq_seg;
725         ring->enqueue = ring->dequeue;
726
727         /*
728          * Ring is now zeroed, so the HW should look for change of ownership
729          * when the cycle bit is set to 1.
730          */
731         ring->cycle_state = 1;
732
733         /*
734          * Reset the hardware dequeue pointer.
735          * Yes, this will need to be re-written after resume, but we're paranoid
736          * and want to make sure the hardware doesn't access bogus memory
737          * because, say, the BIOS or an SMI started the host without changing
738          * the command ring pointers.
739          */
740         xhci_set_cmd_ring_deq(xhci);
741 }
742
743 /*
744  * Stop HC (not bus-specific)
745  *
746  * This is called when the machine transition into S3/S4 mode.
747  *
748  */
749 int xhci_suspend(struct xhci_hcd *xhci)
750 {
751         int                     rc = 0;
752         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
753         u32                     command;
754
755         spin_lock_irq(&xhci->lock);
756         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
757         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
758         /* step 1: stop endpoint */
759         /* skipped assuming that port suspend has done */
760
761         /* step 2: clear Run/Stop bit */
762         command = xhci_readl(xhci, &xhci->op_regs->command);
763         command &= ~CMD_RUN;
764         xhci_writel(xhci, command, &xhci->op_regs->command);
765         if (handshake(xhci, &xhci->op_regs->status,
766                       STS_HALT, STS_HALT, 100*100)) {
767                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
768                 spin_unlock_irq(&xhci->lock);
769                 return -ETIMEDOUT;
770         }
771         xhci_clear_command_ring(xhci);
772
773         /* step 3: save registers */
774         xhci_save_registers(xhci);
775
776         /* step 4: set CSS flag */
777         command = xhci_readl(xhci, &xhci->op_regs->command);
778         command |= CMD_CSS;
779         xhci_writel(xhci, command, &xhci->op_regs->command);
780         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
781                 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
782                 spin_unlock_irq(&xhci->lock);
783                 return -ETIMEDOUT;
784         }
785         spin_unlock_irq(&xhci->lock);
786
787         /* step 5: remove core well power */
788         /* synchronize irq when using MSI-X */
789         xhci_msix_sync_irqs(xhci);
790
791         return rc;
792 }
793
794 /*
795  * start xHC (not bus-specific)
796  *
797  * This is called when the machine transition from S3/S4 mode.
798  *
799  */
800 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
801 {
802         u32                     command, temp = 0;
803         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
804         struct usb_hcd          *secondary_hcd;
805         int                     retval = 0;
806
807         /* Wait a bit if either of the roothubs need to settle from the
808          * transition into bus suspend.
809          */
810         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
811                         time_before(jiffies,
812                                 xhci->bus_state[1].next_statechange))
813                 msleep(100);
814
815         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
816         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
817
818         spin_lock_irq(&xhci->lock);
819         if (xhci->quirks & XHCI_RESET_ON_RESUME)
820                 hibernated = true;
821
822         if (!hibernated) {
823                 /* step 1: restore register */
824                 xhci_restore_registers(xhci);
825                 /* step 2: initialize command ring buffer */
826                 xhci_set_cmd_ring_deq(xhci);
827                 /* step 3: restore state and start state*/
828                 /* step 3: set CRS flag */
829                 command = xhci_readl(xhci, &xhci->op_regs->command);
830                 command |= CMD_CRS;
831                 xhci_writel(xhci, command, &xhci->op_regs->command);
832                 if (handshake(xhci, &xhci->op_regs->status,
833                               STS_RESTORE, 0, 10*100)) {
834                         xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
835                         spin_unlock_irq(&xhci->lock);
836                         return -ETIMEDOUT;
837                 }
838                 temp = xhci_readl(xhci, &xhci->op_regs->status);
839         }
840
841         /* If restore operation fails, re-initialize the HC during resume */
842         if ((temp & STS_SRE) || hibernated) {
843                 /* Let the USB core know _both_ roothubs lost power. */
844                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
845                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
846
847                 xhci_dbg(xhci, "Stop HCD\n");
848                 xhci_halt(xhci);
849                 xhci_reset(xhci);
850                 spin_unlock_irq(&xhci->lock);
851                 xhci_cleanup_msix(xhci);
852
853 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
854                 /* Tell the event ring poll function not to reschedule */
855                 xhci->zombie = 1;
856                 del_timer_sync(&xhci->event_ring_timer);
857 #endif
858
859                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
860                 temp = xhci_readl(xhci, &xhci->op_regs->status);
861                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
862                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
863                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
864                                 &xhci->ir_set->irq_pending);
865                 xhci_print_ir_set(xhci, 0);
866
867                 xhci_dbg(xhci, "cleaning up memory\n");
868                 xhci_mem_cleanup(xhci);
869                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
870                             xhci_readl(xhci, &xhci->op_regs->status));
871
872                 /* USB core calls the PCI reinit and start functions twice:
873                  * first with the primary HCD, and then with the secondary HCD.
874                  * If we don't do the same, the host will never be started.
875                  */
876                 if (!usb_hcd_is_primary_hcd(hcd))
877                         secondary_hcd = hcd;
878                 else
879                         secondary_hcd = xhci->shared_hcd;
880
881                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
882                 retval = xhci_init(hcd->primary_hcd);
883                 if (retval)
884                         return retval;
885                 xhci_dbg(xhci, "Start the primary HCD\n");
886                 retval = xhci_run(hcd->primary_hcd);
887                 if (!retval) {
888                         xhci_dbg(xhci, "Start the secondary HCD\n");
889                         retval = xhci_run(secondary_hcd);
890                 }
891                 hcd->state = HC_STATE_SUSPENDED;
892                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
893                 goto done;
894         }
895
896         /* step 4: set Run/Stop bit */
897         command = xhci_readl(xhci, &xhci->op_regs->command);
898         command |= CMD_RUN;
899         xhci_writel(xhci, command, &xhci->op_regs->command);
900         handshake(xhci, &xhci->op_regs->status, STS_HALT,
901                   0, 250 * 1000);
902
903         /* step 5: walk topology and initialize portsc,
904          * portpmsc and portli
905          */
906         /* this is done in bus_resume */
907
908         /* step 6: restart each of the previously
909          * Running endpoints by ringing their doorbells
910          */
911
912         spin_unlock_irq(&xhci->lock);
913
914  done:
915         if (retval == 0) {
916                 usb_hcd_resume_root_hub(hcd);
917                 usb_hcd_resume_root_hub(xhci->shared_hcd);
918         }
919         return retval;
920 }
921 #endif  /* CONFIG_PM */
922
923 /*-------------------------------------------------------------------------*/
924
925 /**
926  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
927  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
928  * value to right shift 1 for the bitmask.
929  *
930  * Index  = (epnum * 2) + direction - 1,
931  * where direction = 0 for OUT, 1 for IN.
932  * For control endpoints, the IN index is used (OUT index is unused), so
933  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
934  */
935 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
936 {
937         unsigned int index;
938         if (usb_endpoint_xfer_control(desc))
939                 index = (unsigned int) (usb_endpoint_num(desc)*2);
940         else
941                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
942                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
943         return index;
944 }
945
946 /* Find the flag for this endpoint (for use in the control context).  Use the
947  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
948  * bit 1, etc.
949  */
950 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
951 {
952         return 1 << (xhci_get_endpoint_index(desc) + 1);
953 }
954
955 /* Find the flag for this endpoint (for use in the control context).  Use the
956  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
957  * bit 1, etc.
958  */
959 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
960 {
961         return 1 << (ep_index + 1);
962 }
963
964 /* Compute the last valid endpoint context index.  Basically, this is the
965  * endpoint index plus one.  For slot contexts with more than valid endpoint,
966  * we find the most significant bit set in the added contexts flags.
967  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
968  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
969  */
970 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
971 {
972         return fls(added_ctxs) - 1;
973 }
974
975 /* Returns 1 if the arguments are OK;
976  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
977  */
978 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
979                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
980                 const char *func) {
981         struct xhci_hcd *xhci;
982         struct xhci_virt_device *virt_dev;
983
984         if (!hcd || (check_ep && !ep) || !udev) {
985                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
986                                 func);
987                 return -EINVAL;
988         }
989         if (!udev->parent) {
990                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
991                                 func);
992                 return 0;
993         }
994
995         xhci = hcd_to_xhci(hcd);
996         if (xhci->xhc_state & XHCI_STATE_HALTED)
997                 return -ENODEV;
998
999         if (check_virt_dev) {
1000                 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1001                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
1002                                                 "device\n", func);
1003                         return -EINVAL;
1004                 }
1005
1006                 virt_dev = xhci->devs[udev->slot_id];
1007                 if (virt_dev->udev != udev) {
1008                         printk(KERN_DEBUG "xHCI %s called with udev and "
1009                                           "virt_dev does not match\n", func);
1010                         return -EINVAL;
1011                 }
1012         }
1013
1014         return 1;
1015 }
1016
1017 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1018                 struct usb_device *udev, struct xhci_command *command,
1019                 bool ctx_change, bool must_succeed);
1020
1021 /*
1022  * Full speed devices may have a max packet size greater than 8 bytes, but the
1023  * USB core doesn't know that until it reads the first 8 bytes of the
1024  * descriptor.  If the usb_device's max packet size changes after that point,
1025  * we need to issue an evaluate context command and wait on it.
1026  */
1027 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1028                 unsigned int ep_index, struct urb *urb)
1029 {
1030         struct xhci_container_ctx *in_ctx;
1031         struct xhci_container_ctx *out_ctx;
1032         struct xhci_input_control_ctx *ctrl_ctx;
1033         struct xhci_ep_ctx *ep_ctx;
1034         int max_packet_size;
1035         int hw_max_packet_size;
1036         int ret = 0;
1037
1038         out_ctx = xhci->devs[slot_id]->out_ctx;
1039         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1040         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1041         max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1042         if (hw_max_packet_size != max_packet_size) {
1043                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1044                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1045                                 max_packet_size);
1046                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1047                                 hw_max_packet_size);
1048                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1049
1050                 /* Set up the modified control endpoint 0 */
1051                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1052                                 xhci->devs[slot_id]->out_ctx, ep_index);
1053                 in_ctx = xhci->devs[slot_id]->in_ctx;
1054                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1055                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1056                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1057
1058                 /* Set up the input context flags for the command */
1059                 /* FIXME: This won't work if a non-default control endpoint
1060                  * changes max packet sizes.
1061                  */
1062                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1063                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1064                 ctrl_ctx->drop_flags = 0;
1065
1066                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1067                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1068                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1069                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1070
1071                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1072                                 true, false);
1073
1074                 /* Clean up the input context for later use by bandwidth
1075                  * functions.
1076                  */
1077                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1078         }
1079         return ret;
1080 }
1081
1082 /*
1083  * non-error returns are a promise to giveback() the urb later
1084  * we drop ownership so next owner (or urb unlink) can get it
1085  */
1086 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1087 {
1088         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1089         struct xhci_td *buffer;
1090         unsigned long flags;
1091         int ret = 0;
1092         unsigned int slot_id, ep_index;
1093         struct urb_priv *urb_priv;
1094         int size, i;
1095
1096         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1097                                         true, true, __func__) <= 0)
1098                 return -EINVAL;
1099
1100         slot_id = urb->dev->slot_id;
1101         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1102
1103         if (!HCD_HW_ACCESSIBLE(hcd)) {
1104                 if (!in_interrupt())
1105                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1106                 ret = -ESHUTDOWN;
1107                 goto exit;
1108         }
1109
1110         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1111                 size = urb->number_of_packets;
1112         else
1113                 size = 1;
1114
1115         urb_priv = kzalloc(sizeof(struct urb_priv) +
1116                                   size * sizeof(struct xhci_td *), mem_flags);
1117         if (!urb_priv)
1118                 return -ENOMEM;
1119
1120         buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1121         if (!buffer) {
1122                 kfree(urb_priv);
1123                 return -ENOMEM;
1124         }
1125
1126         for (i = 0; i < size; i++) {
1127                 urb_priv->td[i] = buffer;
1128                 buffer++;
1129         }
1130
1131         urb_priv->length = size;
1132         urb_priv->td_cnt = 0;
1133         urb->hcpriv = urb_priv;
1134
1135         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1136                 /* Check to see if the max packet size for the default control
1137                  * endpoint changed during FS device enumeration
1138                  */
1139                 if (urb->dev->speed == USB_SPEED_FULL) {
1140                         ret = xhci_check_maxpacket(xhci, slot_id,
1141                                         ep_index, urb);
1142                         if (ret < 0) {
1143                                 xhci_urb_free_priv(xhci, urb_priv);
1144                                 urb->hcpriv = NULL;
1145                                 return ret;
1146                         }
1147                 }
1148
1149                 /* We have a spinlock and interrupts disabled, so we must pass
1150                  * atomic context to this function, which may allocate memory.
1151                  */
1152                 spin_lock_irqsave(&xhci->lock, flags);
1153                 if (xhci->xhc_state & XHCI_STATE_DYING)
1154                         goto dying;
1155                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1156                                 slot_id, ep_index);
1157                 if (ret)
1158                         goto free_priv;
1159                 spin_unlock_irqrestore(&xhci->lock, flags);
1160         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1161                 spin_lock_irqsave(&xhci->lock, flags);
1162                 if (xhci->xhc_state & XHCI_STATE_DYING)
1163                         goto dying;
1164                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1165                                 EP_GETTING_STREAMS) {
1166                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1167                                         "is transitioning to using streams.\n");
1168                         ret = -EINVAL;
1169                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1170                                 EP_GETTING_NO_STREAMS) {
1171                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1172                                         "is transitioning to "
1173                                         "not having streams.\n");
1174                         ret = -EINVAL;
1175                 } else {
1176                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1177                                         slot_id, ep_index);
1178                 }
1179                 if (ret)
1180                         goto free_priv;
1181                 spin_unlock_irqrestore(&xhci->lock, flags);
1182         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1183                 spin_lock_irqsave(&xhci->lock, flags);
1184                 if (xhci->xhc_state & XHCI_STATE_DYING)
1185                         goto dying;
1186                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1187                                 slot_id, ep_index);
1188                 if (ret)
1189                         goto free_priv;
1190                 spin_unlock_irqrestore(&xhci->lock, flags);
1191         } else {
1192                 spin_lock_irqsave(&xhci->lock, flags);
1193                 if (xhci->xhc_state & XHCI_STATE_DYING)
1194                         goto dying;
1195                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1196                                 slot_id, ep_index);
1197                 if (ret)
1198                         goto free_priv;
1199                 spin_unlock_irqrestore(&xhci->lock, flags);
1200         }
1201 exit:
1202         return ret;
1203 dying:
1204         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1205                         "non-responsive xHCI host.\n",
1206                         urb->ep->desc.bEndpointAddress, urb);
1207         ret = -ESHUTDOWN;
1208 free_priv:
1209         xhci_urb_free_priv(xhci, urb_priv);
1210         urb->hcpriv = NULL;
1211         spin_unlock_irqrestore(&xhci->lock, flags);
1212         return ret;
1213 }
1214
1215 /* Get the right ring for the given URB.
1216  * If the endpoint supports streams, boundary check the URB's stream ID.
1217  * If the endpoint doesn't support streams, return the singular endpoint ring.
1218  */
1219 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1220                 struct urb *urb)
1221 {
1222         unsigned int slot_id;
1223         unsigned int ep_index;
1224         unsigned int stream_id;
1225         struct xhci_virt_ep *ep;
1226
1227         slot_id = urb->dev->slot_id;
1228         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1229         stream_id = urb->stream_id;
1230         ep = &xhci->devs[slot_id]->eps[ep_index];
1231         /* Common case: no streams */
1232         if (!(ep->ep_state & EP_HAS_STREAMS))
1233                 return ep->ring;
1234
1235         if (stream_id == 0) {
1236                 xhci_warn(xhci,
1237                                 "WARN: Slot ID %u, ep index %u has streams, "
1238                                 "but URB has no stream ID.\n",
1239                                 slot_id, ep_index);
1240                 return NULL;
1241         }
1242
1243         if (stream_id < ep->stream_info->num_streams)
1244                 return ep->stream_info->stream_rings[stream_id];
1245
1246         xhci_warn(xhci,
1247                         "WARN: Slot ID %u, ep index %u has "
1248                         "stream IDs 1 to %u allocated, "
1249                         "but stream ID %u is requested.\n",
1250                         slot_id, ep_index,
1251                         ep->stream_info->num_streams - 1,
1252                         stream_id);
1253         return NULL;
1254 }
1255
1256 /*
1257  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1258  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1259  * should pick up where it left off in the TD, unless a Set Transfer Ring
1260  * Dequeue Pointer is issued.
1261  *
1262  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1263  * the ring.  Since the ring is a contiguous structure, they can't be physically
1264  * removed.  Instead, there are two options:
1265  *
1266  *  1) If the HC is in the middle of processing the URB to be canceled, we
1267  *     simply move the ring's dequeue pointer past those TRBs using the Set
1268  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1269  *     when drivers timeout on the last submitted URB and attempt to cancel.
1270  *
1271  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1272  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1273  *     HC will need to invalidate the any TRBs it has cached after the stop
1274  *     endpoint command, as noted in the xHCI 0.95 errata.
1275  *
1276  *  3) The TD may have completed by the time the Stop Endpoint Command
1277  *     completes, so software needs to handle that case too.
1278  *
1279  * This function should protect against the TD enqueueing code ringing the
1280  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1281  * It also needs to account for multiple cancellations on happening at the same
1282  * time for the same endpoint.
1283  *
1284  * Note that this function can be called in any context, or so says
1285  * usb_hcd_unlink_urb()
1286  */
1287 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1288 {
1289         unsigned long flags;
1290         int ret, i;
1291         u32 temp;
1292         struct xhci_hcd *xhci;
1293         struct urb_priv *urb_priv;
1294         struct xhci_td *td;
1295         unsigned int ep_index;
1296         struct xhci_ring *ep_ring;
1297         struct xhci_virt_ep *ep;
1298
1299         xhci = hcd_to_xhci(hcd);
1300         spin_lock_irqsave(&xhci->lock, flags);
1301         /* Make sure the URB hasn't completed or been unlinked already */
1302         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1303         if (ret || !urb->hcpriv)
1304                 goto done;
1305         temp = xhci_readl(xhci, &xhci->op_regs->status);
1306         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1307                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1308                 urb_priv = urb->hcpriv;
1309                 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1310                         td = urb_priv->td[i];
1311                         if (!list_empty(&td->td_list))
1312                                 list_del_init(&td->td_list);
1313                         if (!list_empty(&td->cancelled_td_list))
1314                                 list_del_init(&td->cancelled_td_list);
1315                 }
1316
1317                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1318                 spin_unlock_irqrestore(&xhci->lock, flags);
1319                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1320                 xhci_urb_free_priv(xhci, urb_priv);
1321                 return ret;
1322         }
1323         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1324                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1325                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1326                                 "non-responsive xHCI host.\n",
1327                                 urb->ep->desc.bEndpointAddress, urb);
1328                 /* Let the stop endpoint command watchdog timer (which set this
1329                  * state) finish cleaning up the endpoint TD lists.  We must
1330                  * have caught it in the middle of dropping a lock and giving
1331                  * back an URB.
1332                  */
1333                 goto done;
1334         }
1335
1336         xhci_dbg(xhci, "Cancel URB %p\n", urb);
1337         xhci_dbg(xhci, "Event ring:\n");
1338         xhci_debug_ring(xhci, xhci->event_ring);
1339         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1340         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1341         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1342         if (!ep_ring) {
1343                 ret = -EINVAL;
1344                 goto done;
1345         }
1346
1347         xhci_dbg(xhci, "Endpoint ring:\n");
1348         xhci_debug_ring(xhci, ep_ring);
1349
1350         urb_priv = urb->hcpriv;
1351
1352         for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1353                 td = urb_priv->td[i];
1354                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1355         }
1356
1357         /* Queue a stop endpoint command, but only if this is
1358          * the first cancellation to be handled.
1359          */
1360         if (!(ep->ep_state & EP_HALT_PENDING)) {
1361                 ep->ep_state |= EP_HALT_PENDING;
1362                 ep->stop_cmds_pending++;
1363                 ep->stop_cmd_timer.expires = jiffies +
1364                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1365                 add_timer(&ep->stop_cmd_timer);
1366                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1367                 xhci_ring_cmd_db(xhci);
1368         }
1369 done:
1370         spin_unlock_irqrestore(&xhci->lock, flags);
1371         return ret;
1372 }
1373
1374 /* Drop an endpoint from a new bandwidth configuration for this device.
1375  * Only one call to this function is allowed per endpoint before
1376  * check_bandwidth() or reset_bandwidth() must be called.
1377  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1378  * add the endpoint to the schedule with possibly new parameters denoted by a
1379  * different endpoint descriptor in usb_host_endpoint.
1380  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1381  * not allowed.
1382  *
1383  * The USB core will not allow URBs to be queued to an endpoint that is being
1384  * disabled, so there's no need for mutual exclusion to protect
1385  * the xhci->devs[slot_id] structure.
1386  */
1387 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1388                 struct usb_host_endpoint *ep)
1389 {
1390         struct xhci_hcd *xhci;
1391         struct xhci_container_ctx *in_ctx, *out_ctx;
1392         struct xhci_input_control_ctx *ctrl_ctx;
1393         struct xhci_slot_ctx *slot_ctx;
1394         unsigned int last_ctx;
1395         unsigned int ep_index;
1396         struct xhci_ep_ctx *ep_ctx;
1397         u32 drop_flag;
1398         u32 new_add_flags, new_drop_flags, new_slot_info;
1399         int ret;
1400
1401         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1402         if (ret <= 0)
1403                 return ret;
1404         xhci = hcd_to_xhci(hcd);
1405         if (xhci->xhc_state & XHCI_STATE_DYING)
1406                 return -ENODEV;
1407
1408         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1409         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1410         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1411                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1412                                 __func__, drop_flag);
1413                 return 0;
1414         }
1415
1416         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1417         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1418         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1419         ep_index = xhci_get_endpoint_index(&ep->desc);
1420         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1421         /* If the HC already knows the endpoint is disabled,
1422          * or the HCD has noted it is disabled, ignore this request
1423          */
1424         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1425              cpu_to_le32(EP_STATE_DISABLED)) ||
1426             le32_to_cpu(ctrl_ctx->drop_flags) &
1427             xhci_get_endpoint_flag(&ep->desc)) {
1428                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1429                                 __func__, ep);
1430                 return 0;
1431         }
1432
1433         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1434         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1435
1436         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1437         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1438
1439         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1440         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1441         /* Update the last valid endpoint context, if we deleted the last one */
1442         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1443             LAST_CTX(last_ctx)) {
1444                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1445                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1446         }
1447         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1448
1449         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1450
1451         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1452                         (unsigned int) ep->desc.bEndpointAddress,
1453                         udev->slot_id,
1454                         (unsigned int) new_drop_flags,
1455                         (unsigned int) new_add_flags,
1456                         (unsigned int) new_slot_info);
1457         return 0;
1458 }
1459
1460 /* Add an endpoint to a new possible bandwidth configuration for this device.
1461  * Only one call to this function is allowed per endpoint before
1462  * check_bandwidth() or reset_bandwidth() must be called.
1463  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1464  * add the endpoint to the schedule with possibly new parameters denoted by a
1465  * different endpoint descriptor in usb_host_endpoint.
1466  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1467  * not allowed.
1468  *
1469  * The USB core will not allow URBs to be queued to an endpoint until the
1470  * configuration or alt setting is installed in the device, so there's no need
1471  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1472  */
1473 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1474                 struct usb_host_endpoint *ep)
1475 {
1476         struct xhci_hcd *xhci;
1477         struct xhci_container_ctx *in_ctx, *out_ctx;
1478         unsigned int ep_index;
1479         struct xhci_ep_ctx *ep_ctx;
1480         struct xhci_slot_ctx *slot_ctx;
1481         struct xhci_input_control_ctx *ctrl_ctx;
1482         u32 added_ctxs;
1483         unsigned int last_ctx;
1484         u32 new_add_flags, new_drop_flags, new_slot_info;
1485         struct xhci_virt_device *virt_dev;
1486         int ret = 0;
1487
1488         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1489         if (ret <= 0) {
1490                 /* So we won't queue a reset ep command for a root hub */
1491                 ep->hcpriv = NULL;
1492                 return ret;
1493         }
1494         xhci = hcd_to_xhci(hcd);
1495         if (xhci->xhc_state & XHCI_STATE_DYING)
1496                 return -ENODEV;
1497
1498         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1499         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1500         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1501                 /* FIXME when we have to issue an evaluate endpoint command to
1502                  * deal with ep0 max packet size changing once we get the
1503                  * descriptors
1504                  */
1505                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1506                                 __func__, added_ctxs);
1507                 return 0;
1508         }
1509
1510         virt_dev = xhci->devs[udev->slot_id];
1511         in_ctx = virt_dev->in_ctx;
1512         out_ctx = virt_dev->out_ctx;
1513         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1514         ep_index = xhci_get_endpoint_index(&ep->desc);
1515         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1516
1517         /* If this endpoint is already in use, and the upper layers are trying
1518          * to add it again without dropping it, reject the addition.
1519          */
1520         if (virt_dev->eps[ep_index].ring &&
1521                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1522                                 xhci_get_endpoint_flag(&ep->desc))) {
1523                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1524                                 "without dropping it.\n",
1525                                 (unsigned int) ep->desc.bEndpointAddress);
1526                 return -EINVAL;
1527         }
1528
1529         /* If the HCD has already noted the endpoint is enabled,
1530          * ignore this request.
1531          */
1532         if (le32_to_cpu(ctrl_ctx->add_flags) &
1533             xhci_get_endpoint_flag(&ep->desc)) {
1534                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1535                                 __func__, ep);
1536                 return 0;
1537         }
1538
1539         /*
1540          * Configuration and alternate setting changes must be done in
1541          * process context, not interrupt context (or so documenation
1542          * for usb_set_interface() and usb_set_configuration() claim).
1543          */
1544         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1545                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1546                                 __func__, ep->desc.bEndpointAddress);
1547                 return -ENOMEM;
1548         }
1549
1550         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1551         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1552
1553         /* If xhci_endpoint_disable() was called for this endpoint, but the
1554          * xHC hasn't been notified yet through the check_bandwidth() call,
1555          * this re-adds a new state for the endpoint from the new endpoint
1556          * descriptors.  We must drop and re-add this endpoint, so we leave the
1557          * drop flags alone.
1558          */
1559         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1560
1561         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1562         /* Update the last valid endpoint context, if we just added one past */
1563         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1564             LAST_CTX(last_ctx)) {
1565                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1566                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1567         }
1568         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1569
1570         /* Store the usb_device pointer for later use */
1571         ep->hcpriv = udev;
1572
1573         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1574                         (unsigned int) ep->desc.bEndpointAddress,
1575                         udev->slot_id,
1576                         (unsigned int) new_drop_flags,
1577                         (unsigned int) new_add_flags,
1578                         (unsigned int) new_slot_info);
1579         return 0;
1580 }
1581
1582 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1583 {
1584         struct xhci_input_control_ctx *ctrl_ctx;
1585         struct xhci_ep_ctx *ep_ctx;
1586         struct xhci_slot_ctx *slot_ctx;
1587         int i;
1588
1589         /* When a device's add flag and drop flag are zero, any subsequent
1590          * configure endpoint command will leave that endpoint's state
1591          * untouched.  Make sure we don't leave any old state in the input
1592          * endpoint contexts.
1593          */
1594         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1595         ctrl_ctx->drop_flags = 0;
1596         ctrl_ctx->add_flags = 0;
1597         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1598         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1599         /* Endpoint 0 is always valid */
1600         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1601         for (i = 1; i < 31; ++i) {
1602                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1603                 ep_ctx->ep_info = 0;
1604                 ep_ctx->ep_info2 = 0;
1605                 ep_ctx->deq = 0;
1606                 ep_ctx->tx_info = 0;
1607         }
1608 }
1609
1610 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1611                 struct usb_device *udev, u32 *cmd_status)
1612 {
1613         int ret;
1614
1615         switch (*cmd_status) {
1616         case COMP_ENOMEM:
1617                 dev_warn(&udev->dev, "Not enough host controller resources "
1618                                 "for new device state.\n");
1619                 ret = -ENOMEM;
1620                 /* FIXME: can we allocate more resources for the HC? */
1621                 break;
1622         case COMP_BW_ERR:
1623         case COMP_2ND_BW_ERR:
1624                 dev_warn(&udev->dev, "Not enough bandwidth "
1625                                 "for new device state.\n");
1626                 ret = -ENOSPC;
1627                 /* FIXME: can we go back to the old state? */
1628                 break;
1629         case COMP_TRB_ERR:
1630                 /* the HCD set up something wrong */
1631                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1632                                 "add flag = 1, "
1633                                 "and endpoint is not disabled.\n");
1634                 ret = -EINVAL;
1635                 break;
1636         case COMP_DEV_ERR:
1637                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1638                                 "configure command.\n");
1639                 ret = -ENODEV;
1640                 break;
1641         case COMP_SUCCESS:
1642                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1643                 ret = 0;
1644                 break;
1645         default:
1646                 xhci_err(xhci, "ERROR: unexpected command completion "
1647                                 "code 0x%x.\n", *cmd_status);
1648                 ret = -EINVAL;
1649                 break;
1650         }
1651         return ret;
1652 }
1653
1654 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1655                 struct usb_device *udev, u32 *cmd_status)
1656 {
1657         int ret;
1658         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1659
1660         switch (*cmd_status) {
1661         case COMP_EINVAL:
1662                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1663                                 "context command.\n");
1664                 ret = -EINVAL;
1665                 break;
1666         case COMP_EBADSLT:
1667                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1668                                 "evaluate context command.\n");
1669         case COMP_CTX_STATE:
1670                 dev_warn(&udev->dev, "WARN: invalid context state for "
1671                                 "evaluate context command.\n");
1672                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1673                 ret = -EINVAL;
1674                 break;
1675         case COMP_DEV_ERR:
1676                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1677                                 "context command.\n");
1678                 ret = -ENODEV;
1679                 break;
1680         case COMP_MEL_ERR:
1681                 /* Max Exit Latency too large error */
1682                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1683                 ret = -EINVAL;
1684                 break;
1685         case COMP_SUCCESS:
1686                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1687                 ret = 0;
1688                 break;
1689         default:
1690                 xhci_err(xhci, "ERROR: unexpected command completion "
1691                                 "code 0x%x.\n", *cmd_status);
1692                 ret = -EINVAL;
1693                 break;
1694         }
1695         return ret;
1696 }
1697
1698 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1699                 struct xhci_container_ctx *in_ctx)
1700 {
1701         struct xhci_input_control_ctx *ctrl_ctx;
1702         u32 valid_add_flags;
1703         u32 valid_drop_flags;
1704
1705         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1706         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1707          * (bit 1).  The default control endpoint is added during the Address
1708          * Device command and is never removed until the slot is disabled.
1709          */
1710         valid_add_flags = ctrl_ctx->add_flags >> 2;
1711         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1712
1713         /* Use hweight32 to count the number of ones in the add flags, or
1714          * number of endpoints added.  Don't count endpoints that are changed
1715          * (both added and dropped).
1716          */
1717         return hweight32(valid_add_flags) -
1718                 hweight32(valid_add_flags & valid_drop_flags);
1719 }
1720
1721 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1722                 struct xhci_container_ctx *in_ctx)
1723 {
1724         struct xhci_input_control_ctx *ctrl_ctx;
1725         u32 valid_add_flags;
1726         u32 valid_drop_flags;
1727
1728         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1729         valid_add_flags = ctrl_ctx->add_flags >> 2;
1730         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1731
1732         return hweight32(valid_drop_flags) -
1733                 hweight32(valid_add_flags & valid_drop_flags);
1734 }
1735
1736 /*
1737  * We need to reserve the new number of endpoints before the configure endpoint
1738  * command completes.  We can't subtract the dropped endpoints from the number
1739  * of active endpoints until the command completes because we can oversubscribe
1740  * the host in this case:
1741  *
1742  *  - the first configure endpoint command drops more endpoints than it adds
1743  *  - a second configure endpoint command that adds more endpoints is queued
1744  *  - the first configure endpoint command fails, so the config is unchanged
1745  *  - the second command may succeed, even though there isn't enough resources
1746  *
1747  * Must be called with xhci->lock held.
1748  */
1749 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1750                 struct xhci_container_ctx *in_ctx)
1751 {
1752         u32 added_eps;
1753
1754         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1755         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1756                 xhci_dbg(xhci, "Not enough ep ctxs: "
1757                                 "%u active, need to add %u, limit is %u.\n",
1758                                 xhci->num_active_eps, added_eps,
1759                                 xhci->limit_active_eps);
1760                 return -ENOMEM;
1761         }
1762         xhci->num_active_eps += added_eps;
1763         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1764                         xhci->num_active_eps);
1765         return 0;
1766 }
1767
1768 /*
1769  * The configure endpoint was failed by the xHC for some other reason, so we
1770  * need to revert the resources that failed configuration would have used.
1771  *
1772  * Must be called with xhci->lock held.
1773  */
1774 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1775                 struct xhci_container_ctx *in_ctx)
1776 {
1777         u32 num_failed_eps;
1778
1779         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1780         xhci->num_active_eps -= num_failed_eps;
1781         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1782                         num_failed_eps,
1783                         xhci->num_active_eps);
1784 }
1785
1786 /*
1787  * Now that the command has completed, clean up the active endpoint count by
1788  * subtracting out the endpoints that were dropped (but not changed).
1789  *
1790  * Must be called with xhci->lock held.
1791  */
1792 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1793                 struct xhci_container_ctx *in_ctx)
1794 {
1795         u32 num_dropped_eps;
1796
1797         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1798         xhci->num_active_eps -= num_dropped_eps;
1799         if (num_dropped_eps)
1800                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1801                                 num_dropped_eps,
1802                                 xhci->num_active_eps);
1803 }
1804
1805 unsigned int xhci_get_block_size(struct usb_device *udev)
1806 {
1807         switch (udev->speed) {
1808         case USB_SPEED_LOW:
1809         case USB_SPEED_FULL:
1810                 return FS_BLOCK;
1811         case USB_SPEED_HIGH:
1812                 return HS_BLOCK;
1813         case USB_SPEED_SUPER:
1814                 return SS_BLOCK;
1815         case USB_SPEED_UNKNOWN:
1816         case USB_SPEED_WIRELESS:
1817         default:
1818                 /* Should never happen */
1819                 return 1;
1820         }
1821 }
1822
1823 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1824 {
1825         if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1826                 return LS_OVERHEAD;
1827         if (interval_bw->overhead[FS_OVERHEAD_TYPE])
1828                 return FS_OVERHEAD;
1829         return HS_OVERHEAD;
1830 }
1831
1832 /* If we are changing a LS/FS device under a HS hub,
1833  * make sure (if we are activating a new TT) that the HS bus has enough
1834  * bandwidth for this new TT.
1835  */
1836 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
1837                 struct xhci_virt_device *virt_dev,
1838                 int old_active_eps)
1839 {
1840         struct xhci_interval_bw_table *bw_table;
1841         struct xhci_tt_bw_info *tt_info;
1842
1843         /* Find the bandwidth table for the root port this TT is attached to. */
1844         bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
1845         tt_info = virt_dev->tt_info;
1846         /* If this TT already had active endpoints, the bandwidth for this TT
1847          * has already been added.  Removing all periodic endpoints (and thus
1848          * making the TT enactive) will only decrease the bandwidth used.
1849          */
1850         if (old_active_eps)
1851                 return 0;
1852         if (old_active_eps == 0 && tt_info->active_eps != 0) {
1853                 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
1854                         return -ENOMEM;
1855                 return 0;
1856         }
1857         /* Not sure why we would have no new active endpoints...
1858          *
1859          * Maybe because of an Evaluate Context change for a hub update or a
1860          * control endpoint 0 max packet size change?
1861          * FIXME: skip the bandwidth calculation in that case.
1862          */
1863         return 0;
1864 }
1865
1866 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
1867                 struct xhci_virt_device *virt_dev)
1868 {
1869         unsigned int bw_reserved;
1870
1871         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
1872         if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
1873                 return -ENOMEM;
1874
1875         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
1876         if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
1877                 return -ENOMEM;
1878
1879         return 0;
1880 }
1881
1882 /*
1883  * This algorithm is a very conservative estimate of the worst-case scheduling
1884  * scenario for any one interval.  The hardware dynamically schedules the
1885  * packets, so we can't tell which microframe could be the limiting factor in
1886  * the bandwidth scheduling.  This only takes into account periodic endpoints.
1887  *
1888  * Obviously, we can't solve an NP complete problem to find the minimum worst
1889  * case scenario.  Instead, we come up with an estimate that is no less than
1890  * the worst case bandwidth used for any one microframe, but may be an
1891  * over-estimate.
1892  *
1893  * We walk the requirements for each endpoint by interval, starting with the
1894  * smallest interval, and place packets in the schedule where there is only one
1895  * possible way to schedule packets for that interval.  In order to simplify
1896  * this algorithm, we record the largest max packet size for each interval, and
1897  * assume all packets will be that size.
1898  *
1899  * For interval 0, we obviously must schedule all packets for each interval.
1900  * The bandwidth for interval 0 is just the amount of data to be transmitted
1901  * (the sum of all max ESIT payload sizes, plus any overhead per packet times
1902  * the number of packets).
1903  *
1904  * For interval 1, we have two possible microframes to schedule those packets
1905  * in.  For this algorithm, if we can schedule the same number of packets for
1906  * each possible scheduling opportunity (each microframe), we will do so.  The
1907  * remaining number of packets will be saved to be transmitted in the gaps in
1908  * the next interval's scheduling sequence.
1909  *
1910  * As we move those remaining packets to be scheduled with interval 2 packets,
1911  * we have to double the number of remaining packets to transmit.  This is
1912  * because the intervals are actually powers of 2, and we would be transmitting
1913  * the previous interval's packets twice in this interval.  We also have to be
1914  * sure that when we look at the largest max packet size for this interval, we
1915  * also look at the largest max packet size for the remaining packets and take
1916  * the greater of the two.
1917  *
1918  * The algorithm continues to evenly distribute packets in each scheduling
1919  * opportunity, and push the remaining packets out, until we get to the last
1920  * interval.  Then those packets and their associated overhead are just added
1921  * to the bandwidth used.
1922  */
1923 static int xhci_check_bw_table(struct xhci_hcd *xhci,
1924                 struct xhci_virt_device *virt_dev,
1925                 int old_active_eps)
1926 {
1927         unsigned int bw_reserved;
1928         unsigned int max_bandwidth;
1929         unsigned int bw_used;
1930         unsigned int block_size;
1931         struct xhci_interval_bw_table *bw_table;
1932         unsigned int packet_size = 0;
1933         unsigned int overhead = 0;
1934         unsigned int packets_transmitted = 0;
1935         unsigned int packets_remaining = 0;
1936         unsigned int i;
1937
1938         if (virt_dev->udev->speed == USB_SPEED_SUPER)
1939                 return xhci_check_ss_bw(xhci, virt_dev);
1940
1941         if (virt_dev->udev->speed == USB_SPEED_HIGH) {
1942                 max_bandwidth = HS_BW_LIMIT;
1943                 /* Convert percent of bus BW reserved to blocks reserved */
1944                 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
1945         } else {
1946                 max_bandwidth = FS_BW_LIMIT;
1947                 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
1948         }
1949
1950         bw_table = virt_dev->bw_table;
1951         /* We need to translate the max packet size and max ESIT payloads into
1952          * the units the hardware uses.
1953          */
1954         block_size = xhci_get_block_size(virt_dev->udev);
1955
1956         /* If we are manipulating a LS/FS device under a HS hub, double check
1957          * that the HS bus has enough bandwidth if we are activing a new TT.
1958          */
1959         if (virt_dev->tt_info) {
1960                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1961                                 virt_dev->real_port);
1962                 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
1963                         xhci_warn(xhci, "Not enough bandwidth on HS bus for "
1964                                         "newly activated TT.\n");
1965                         return -ENOMEM;
1966                 }
1967                 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
1968                                 virt_dev->tt_info->slot_id,
1969                                 virt_dev->tt_info->ttport);
1970         } else {
1971                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1972                                 virt_dev->real_port);
1973         }
1974
1975         /* Add in how much bandwidth will be used for interval zero, or the
1976          * rounded max ESIT payload + number of packets * largest overhead.
1977          */
1978         bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
1979                 bw_table->interval_bw[0].num_packets *
1980                 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
1981
1982         for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
1983                 unsigned int bw_added;
1984                 unsigned int largest_mps;
1985                 unsigned int interval_overhead;
1986
1987                 /*
1988                  * How many packets could we transmit in this interval?
1989                  * If packets didn't fit in the previous interval, we will need
1990                  * to transmit that many packets twice within this interval.
1991                  */
1992                 packets_remaining = 2 * packets_remaining +
1993                         bw_table->interval_bw[i].num_packets;
1994
1995                 /* Find the largest max packet size of this or the previous
1996                  * interval.
1997                  */
1998                 if (list_empty(&bw_table->interval_bw[i].endpoints))
1999                         largest_mps = 0;
2000                 else {
2001                         struct xhci_virt_ep *virt_ep;
2002                         struct list_head *ep_entry;
2003
2004                         ep_entry = bw_table->interval_bw[i].endpoints.next;
2005                         virt_ep = list_entry(ep_entry,
2006                                         struct xhci_virt_ep, bw_endpoint_list);
2007                         /* Convert to blocks, rounding up */
2008                         largest_mps = DIV_ROUND_UP(
2009                                         virt_ep->bw_info.max_packet_size,
2010                                         block_size);
2011                 }
2012                 if (largest_mps > packet_size)
2013                         packet_size = largest_mps;
2014
2015                 /* Use the larger overhead of this or the previous interval. */
2016                 interval_overhead = xhci_get_largest_overhead(
2017                                 &bw_table->interval_bw[i]);
2018                 if (interval_overhead > overhead)
2019                         overhead = interval_overhead;
2020
2021                 /* How many packets can we evenly distribute across
2022                  * (1 << (i + 1)) possible scheduling opportunities?
2023                  */
2024                 packets_transmitted = packets_remaining >> (i + 1);
2025
2026                 /* Add in the bandwidth used for those scheduled packets */
2027                 bw_added = packets_transmitted * (overhead + packet_size);
2028
2029                 /* How many packets do we have remaining to transmit? */
2030                 packets_remaining = packets_remaining % (1 << (i + 1));
2031
2032                 /* What largest max packet size should those packets have? */
2033                 /* If we've transmitted all packets, don't carry over the
2034                  * largest packet size.
2035                  */
2036                 if (packets_remaining == 0) {
2037                         packet_size = 0;
2038                         overhead = 0;
2039                 } else if (packets_transmitted > 0) {
2040                         /* Otherwise if we do have remaining packets, and we've
2041                          * scheduled some packets in this interval, take the
2042                          * largest max packet size from endpoints with this
2043                          * interval.
2044                          */
2045                         packet_size = largest_mps;
2046                         overhead = interval_overhead;
2047                 }
2048                 /* Otherwise carry over packet_size and overhead from the last
2049                  * time we had a remainder.
2050                  */
2051                 bw_used += bw_added;
2052                 if (bw_used > max_bandwidth) {
2053                         xhci_warn(xhci, "Not enough bandwidth. "
2054                                         "Proposed: %u, Max: %u\n",
2055                                 bw_used, max_bandwidth);
2056                         return -ENOMEM;
2057                 }
2058         }
2059         /*
2060          * Ok, we know we have some packets left over after even-handedly
2061          * scheduling interval 15.  We don't know which microframes they will
2062          * fit into, so we over-schedule and say they will be scheduled every
2063          * microframe.
2064          */
2065         if (packets_remaining > 0)
2066                 bw_used += overhead + packet_size;
2067
2068         if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2069                 unsigned int port_index = virt_dev->real_port - 1;
2070
2071                 /* OK, we're manipulating a HS device attached to a
2072                  * root port bandwidth domain.  Include the number of active TTs
2073                  * in the bandwidth used.
2074                  */
2075                 bw_used += TT_HS_OVERHEAD *
2076                         xhci->rh_bw[port_index].num_active_tts;
2077         }
2078
2079         xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2080                 "Available: %u " "percent\n",
2081                 bw_used, max_bandwidth, bw_reserved,
2082                 (max_bandwidth - bw_used - bw_reserved) * 100 /
2083                 max_bandwidth);
2084
2085         bw_used += bw_reserved;
2086         if (bw_used > max_bandwidth) {
2087                 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2088                                 bw_used, max_bandwidth);
2089                 return -ENOMEM;
2090         }
2091
2092         bw_table->bw_used = bw_used;
2093         return 0;
2094 }
2095
2096 static bool xhci_is_async_ep(unsigned int ep_type)
2097 {
2098         return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2099                                         ep_type != ISOC_IN_EP &&
2100                                         ep_type != INT_IN_EP);
2101 }
2102
2103 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2104 {
2105         return (ep_type == ISOC_IN_EP || ep_type != INT_IN_EP);
2106 }
2107
2108 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2109 {
2110         unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2111
2112         if (ep_bw->ep_interval == 0)
2113                 return SS_OVERHEAD_BURST +
2114                         (ep_bw->mult * ep_bw->num_packets *
2115                                         (SS_OVERHEAD + mps));
2116         return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2117                                 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2118                                 1 << ep_bw->ep_interval);
2119
2120 }
2121
2122 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2123                 struct xhci_bw_info *ep_bw,
2124                 struct xhci_interval_bw_table *bw_table,
2125                 struct usb_device *udev,
2126                 struct xhci_virt_ep *virt_ep,
2127                 struct xhci_tt_bw_info *tt_info)
2128 {
2129         struct xhci_interval_bw *interval_bw;
2130         int normalized_interval;
2131
2132         if (xhci_is_async_ep(ep_bw->type))
2133                 return;
2134
2135         if (udev->speed == USB_SPEED_SUPER) {
2136                 if (xhci_is_sync_in_ep(ep_bw->type))
2137                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2138                                 xhci_get_ss_bw_consumed(ep_bw);
2139                 else
2140                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2141                                 xhci_get_ss_bw_consumed(ep_bw);
2142                 return;
2143         }
2144
2145         /* SuperSpeed endpoints never get added to intervals in the table, so
2146          * this check is only valid for HS/FS/LS devices.
2147          */
2148         if (list_empty(&virt_ep->bw_endpoint_list))
2149                 return;
2150         /* For LS/FS devices, we need to translate the interval expressed in
2151          * microframes to frames.
2152          */
2153         if (udev->speed == USB_SPEED_HIGH)
2154                 normalized_interval = ep_bw->ep_interval;
2155         else
2156                 normalized_interval = ep_bw->ep_interval - 3;
2157
2158         if (normalized_interval == 0)
2159                 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2160         interval_bw = &bw_table->interval_bw[normalized_interval];
2161         interval_bw->num_packets -= ep_bw->num_packets;
2162         switch (udev->speed) {
2163         case USB_SPEED_LOW:
2164                 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2165                 break;
2166         case USB_SPEED_FULL:
2167                 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2168                 break;
2169         case USB_SPEED_HIGH:
2170                 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2171                 break;
2172         case USB_SPEED_SUPER:
2173         case USB_SPEED_UNKNOWN:
2174         case USB_SPEED_WIRELESS:
2175                 /* Should never happen because only LS/FS/HS endpoints will get
2176                  * added to the endpoint list.
2177                  */
2178                 return;
2179         }
2180         if (tt_info)
2181                 tt_info->active_eps -= 1;
2182         list_del_init(&virt_ep->bw_endpoint_list);
2183 }
2184
2185 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2186                 struct xhci_bw_info *ep_bw,
2187                 struct xhci_interval_bw_table *bw_table,
2188                 struct usb_device *udev,
2189                 struct xhci_virt_ep *virt_ep,
2190                 struct xhci_tt_bw_info *tt_info)
2191 {
2192         struct xhci_interval_bw *interval_bw;
2193         struct xhci_virt_ep *smaller_ep;
2194         int normalized_interval;
2195
2196         if (xhci_is_async_ep(ep_bw->type))
2197                 return;
2198
2199         if (udev->speed == USB_SPEED_SUPER) {
2200                 if (xhci_is_sync_in_ep(ep_bw->type))
2201                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2202                                 xhci_get_ss_bw_consumed(ep_bw);
2203                 else
2204                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2205                                 xhci_get_ss_bw_consumed(ep_bw);
2206                 return;
2207         }
2208
2209         /* For LS/FS devices, we need to translate the interval expressed in
2210          * microframes to frames.
2211          */
2212         if (udev->speed == USB_SPEED_HIGH)
2213                 normalized_interval = ep_bw->ep_interval;
2214         else
2215                 normalized_interval = ep_bw->ep_interval - 3;
2216
2217         if (normalized_interval == 0)
2218                 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2219         interval_bw = &bw_table->interval_bw[normalized_interval];
2220         interval_bw->num_packets += ep_bw->num_packets;
2221         switch (udev->speed) {
2222         case USB_SPEED_LOW:
2223                 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2224                 break;
2225         case USB_SPEED_FULL:
2226                 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2227                 break;
2228         case USB_SPEED_HIGH:
2229                 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2230                 break;
2231         case USB_SPEED_SUPER:
2232         case USB_SPEED_UNKNOWN:
2233         case USB_SPEED_WIRELESS:
2234                 /* Should never happen because only LS/FS/HS endpoints will get
2235                  * added to the endpoint list.
2236                  */
2237                 return;
2238         }
2239
2240         if (tt_info)
2241                 tt_info->active_eps += 1;
2242         /* Insert the endpoint into the list, largest max packet size first. */
2243         list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2244                         bw_endpoint_list) {
2245                 if (ep_bw->max_packet_size >=
2246                                 smaller_ep->bw_info.max_packet_size) {
2247                         /* Add the new ep before the smaller endpoint */
2248                         list_add_tail(&virt_ep->bw_endpoint_list,
2249                                         &smaller_ep->bw_endpoint_list);
2250                         return;
2251                 }
2252         }
2253         /* Add the new endpoint at the end of the list. */
2254         list_add_tail(&virt_ep->bw_endpoint_list,
2255                         &interval_bw->endpoints);
2256 }
2257
2258 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2259                 struct xhci_virt_device *virt_dev,
2260                 int old_active_eps)
2261 {
2262         struct xhci_root_port_bw_info *rh_bw_info;
2263         if (!virt_dev->tt_info)
2264                 return;
2265
2266         rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2267         if (old_active_eps == 0 &&
2268                                 virt_dev->tt_info->active_eps != 0) {
2269                 rh_bw_info->num_active_tts += 1;
2270                 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2271         } else if (old_active_eps != 0 &&
2272                                 virt_dev->tt_info->active_eps == 0) {
2273                 rh_bw_info->num_active_tts -= 1;
2274                 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2275         }
2276 }
2277
2278 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2279                 struct xhci_virt_device *virt_dev,
2280                 struct xhci_container_ctx *in_ctx)
2281 {
2282         struct xhci_bw_info ep_bw_info[31];
2283         int i;
2284         struct xhci_input_control_ctx *ctrl_ctx;
2285         int old_active_eps = 0;
2286
2287         if (virt_dev->tt_info)
2288                 old_active_eps = virt_dev->tt_info->active_eps;
2289
2290         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2291
2292         for (i = 0; i < 31; i++) {
2293                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2294                         continue;
2295
2296                 /* Make a copy of the BW info in case we need to revert this */
2297                 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2298                                 sizeof(ep_bw_info[i]));
2299                 /* Drop the endpoint from the interval table if the endpoint is
2300                  * being dropped or changed.
2301                  */
2302                 if (EP_IS_DROPPED(ctrl_ctx, i))
2303                         xhci_drop_ep_from_interval_table(xhci,
2304                                         &virt_dev->eps[i].bw_info,
2305                                         virt_dev->bw_table,
2306                                         virt_dev->udev,
2307                                         &virt_dev->eps[i],
2308                                         virt_dev->tt_info);
2309         }
2310         /* Overwrite the information stored in the endpoints' bw_info */
2311         xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2312         for (i = 0; i < 31; i++) {
2313                 /* Add any changed or added endpoints to the interval table */
2314                 if (EP_IS_ADDED(ctrl_ctx, i))
2315                         xhci_add_ep_to_interval_table(xhci,
2316                                         &virt_dev->eps[i].bw_info,
2317                                         virt_dev->bw_table,
2318                                         virt_dev->udev,
2319                                         &virt_dev->eps[i],
2320                                         virt_dev->tt_info);
2321         }
2322
2323         if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2324                 /* Ok, this fits in the bandwidth we have.
2325                  * Update the number of active TTs.
2326                  */
2327                 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2328                 return 0;
2329         }
2330
2331         /* We don't have enough bandwidth for this, revert the stored info. */
2332         for (i = 0; i < 31; i++) {
2333                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2334                         continue;
2335
2336                 /* Drop the new copies of any added or changed endpoints from
2337                  * the interval table.
2338                  */
2339                 if (EP_IS_ADDED(ctrl_ctx, i)) {
2340                         xhci_drop_ep_from_interval_table(xhci,
2341                                         &virt_dev->eps[i].bw_info,
2342                                         virt_dev->bw_table,
2343                                         virt_dev->udev,
2344                                         &virt_dev->eps[i],
2345                                         virt_dev->tt_info);
2346                 }
2347                 /* Revert the endpoint back to its old information */
2348                 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2349                                 sizeof(ep_bw_info[i]));
2350                 /* Add any changed or dropped endpoints back into the table */
2351                 if (EP_IS_DROPPED(ctrl_ctx, i))
2352                         xhci_add_ep_to_interval_table(xhci,
2353                                         &virt_dev->eps[i].bw_info,
2354                                         virt_dev->bw_table,
2355                                         virt_dev->udev,
2356                                         &virt_dev->eps[i],
2357                                         virt_dev->tt_info);
2358         }
2359         return -ENOMEM;
2360 }
2361
2362
2363 /* Issue a configure endpoint command or evaluate context command
2364  * and wait for it to finish.
2365  */
2366 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2367                 struct usb_device *udev,
2368                 struct xhci_command *command,
2369                 bool ctx_change, bool must_succeed)
2370 {
2371         int ret;
2372         int timeleft;
2373         unsigned long flags;
2374         struct xhci_container_ctx *in_ctx;
2375         struct completion *cmd_completion;
2376         u32 *cmd_status;
2377         struct xhci_virt_device *virt_dev;
2378
2379         spin_lock_irqsave(&xhci->lock, flags);
2380         virt_dev = xhci->devs[udev->slot_id];
2381
2382         if (command)
2383                 in_ctx = command->in_ctx;
2384         else
2385                 in_ctx = virt_dev->in_ctx;
2386
2387         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2388                         xhci_reserve_host_resources(xhci, in_ctx)) {
2389                 spin_unlock_irqrestore(&xhci->lock, flags);
2390                 xhci_warn(xhci, "Not enough host resources, "
2391                                 "active endpoint contexts = %u\n",
2392                                 xhci->num_active_eps);
2393                 return -ENOMEM;
2394         }
2395         if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2396                         xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2397                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2398                         xhci_free_host_resources(xhci, in_ctx);
2399                 spin_unlock_irqrestore(&xhci->lock, flags);
2400                 xhci_warn(xhci, "Not enough bandwidth\n");
2401                 return -ENOMEM;
2402         }
2403
2404         if (command) {
2405                 cmd_completion = command->completion;
2406                 cmd_status = &command->status;
2407                 command->command_trb = xhci->cmd_ring->enqueue;
2408
2409                 /* Enqueue pointer can be left pointing to the link TRB,
2410                  * we must handle that
2411                  */
2412                 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2413                         command->command_trb =
2414                                 xhci->cmd_ring->enq_seg->next->trbs;
2415
2416                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2417         } else {
2418                 cmd_completion = &virt_dev->cmd_completion;
2419                 cmd_status = &virt_dev->cmd_status;
2420         }
2421         init_completion(cmd_completion);
2422
2423         if (!ctx_change)
2424                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2425                                 udev->slot_id, must_succeed);
2426         else
2427                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2428                                 udev->slot_id);
2429         if (ret < 0) {
2430                 if (command)
2431                         list_del(&command->cmd_list);
2432                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2433                         xhci_free_host_resources(xhci, in_ctx);
2434                 spin_unlock_irqrestore(&xhci->lock, flags);
2435                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2436                 return -ENOMEM;
2437         }
2438         xhci_ring_cmd_db(xhci);
2439         spin_unlock_irqrestore(&xhci->lock, flags);
2440
2441         /* Wait for the configure endpoint command to complete */
2442         timeleft = wait_for_completion_interruptible_timeout(
2443                         cmd_completion,
2444                         USB_CTRL_SET_TIMEOUT);
2445         if (timeleft <= 0) {
2446                 xhci_warn(xhci, "%s while waiting for %s command\n",
2447                                 timeleft == 0 ? "Timeout" : "Signal",
2448                                 ctx_change == 0 ?
2449                                         "configure endpoint" :
2450                                         "evaluate context");
2451                 /* FIXME cancel the configure endpoint command */
2452                 return -ETIME;
2453         }
2454
2455         if (!ctx_change)
2456                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2457         else
2458                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2459
2460         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2461                 spin_lock_irqsave(&xhci->lock, flags);
2462                 /* If the command failed, remove the reserved resources.
2463                  * Otherwise, clean up the estimate to include dropped eps.
2464                  */
2465                 if (ret)
2466                         xhci_free_host_resources(xhci, in_ctx);
2467                 else
2468                         xhci_finish_resource_reservation(xhci, in_ctx);
2469                 spin_unlock_irqrestore(&xhci->lock, flags);
2470         }
2471         return ret;
2472 }
2473
2474 /* Called after one or more calls to xhci_add_endpoint() or
2475  * xhci_drop_endpoint().  If this call fails, the USB core is expected
2476  * to call xhci_reset_bandwidth().
2477  *
2478  * Since we are in the middle of changing either configuration or
2479  * installing a new alt setting, the USB core won't allow URBs to be
2480  * enqueued for any endpoint on the old config or interface.  Nothing
2481  * else should be touching the xhci->devs[slot_id] structure, so we
2482  * don't need to take the xhci->lock for manipulating that.
2483  */
2484 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2485 {
2486         int i;
2487         int ret = 0;
2488         struct xhci_hcd *xhci;
2489         struct xhci_virt_device *virt_dev;
2490         struct xhci_input_control_ctx *ctrl_ctx;
2491         struct xhci_slot_ctx *slot_ctx;
2492
2493         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2494         if (ret <= 0)
2495                 return ret;
2496         xhci = hcd_to_xhci(hcd);
2497         if (xhci->xhc_state & XHCI_STATE_DYING)
2498                 return -ENODEV;
2499
2500         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2501         virt_dev = xhci->devs[udev->slot_id];
2502
2503         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2504         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2505         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2506         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2507         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2508
2509         /* Don't issue the command if there's no endpoints to update. */
2510         if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2511                         ctrl_ctx->drop_flags == 0)
2512                 return 0;
2513
2514         xhci_dbg(xhci, "New Input Control Context:\n");
2515         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2516         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2517                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2518
2519         ret = xhci_configure_endpoint(xhci, udev, NULL,
2520                         false, false);
2521         if (ret) {
2522                 /* Callee should call reset_bandwidth() */
2523                 return ret;
2524         }
2525
2526         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2527         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2528                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2529
2530         /* Free any rings that were dropped, but not changed. */
2531         for (i = 1; i < 31; ++i) {
2532                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2533                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2534                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2535         }
2536         xhci_zero_in_ctx(xhci, virt_dev);
2537         /*
2538          * Install any rings for completely new endpoints or changed endpoints,
2539          * and free or cache any old rings from changed endpoints.
2540          */
2541         for (i = 1; i < 31; ++i) {
2542                 if (!virt_dev->eps[i].new_ring)
2543                         continue;
2544                 /* Only cache or free the old ring if it exists.
2545                  * It may not if this is the first add of an endpoint.
2546                  */
2547                 if (virt_dev->eps[i].ring) {
2548                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2549                 }
2550                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2551                 virt_dev->eps[i].new_ring = NULL;
2552         }
2553
2554         return ret;
2555 }
2556
2557 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2558 {
2559         struct xhci_hcd *xhci;
2560         struct xhci_virt_device *virt_dev;
2561         int i, ret;
2562
2563         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2564         if (ret <= 0)
2565                 return;
2566         xhci = hcd_to_xhci(hcd);
2567
2568         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2569         virt_dev = xhci->devs[udev->slot_id];
2570         /* Free any rings allocated for added endpoints */
2571         for (i = 0; i < 31; ++i) {
2572                 if (virt_dev->eps[i].new_ring) {
2573                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2574                         virt_dev->eps[i].new_ring = NULL;
2575                 }
2576         }
2577         xhci_zero_in_ctx(xhci, virt_dev);
2578 }
2579
2580 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2581                 struct xhci_container_ctx *in_ctx,
2582                 struct xhci_container_ctx *out_ctx,
2583                 u32 add_flags, u32 drop_flags)
2584 {
2585         struct xhci_input_control_ctx *ctrl_ctx;
2586         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2587         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2588         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2589         xhci_slot_copy(xhci, in_ctx, out_ctx);
2590         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2591
2592         xhci_dbg(xhci, "Input Context:\n");
2593         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2594 }
2595
2596 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2597                 unsigned int slot_id, unsigned int ep_index,
2598                 struct xhci_dequeue_state *deq_state)
2599 {
2600         struct xhci_container_ctx *in_ctx;
2601         struct xhci_ep_ctx *ep_ctx;
2602         u32 added_ctxs;
2603         dma_addr_t addr;
2604
2605         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2606                         xhci->devs[slot_id]->out_ctx, ep_index);
2607         in_ctx = xhci->devs[slot_id]->in_ctx;
2608         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2609         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2610                         deq_state->new_deq_ptr);
2611         if (addr == 0) {
2612                 xhci_warn(xhci, "WARN Cannot submit config ep after "
2613                                 "reset ep command\n");
2614                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2615                                 deq_state->new_deq_seg,
2616                                 deq_state->new_deq_ptr);
2617                 return;
2618         }
2619         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2620
2621         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2622         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2623                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2624 }
2625
2626 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2627                 struct usb_device *udev, unsigned int ep_index)
2628 {
2629         struct xhci_dequeue_state deq_state;
2630         struct xhci_virt_ep *ep;
2631
2632         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2633         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2634         /* We need to move the HW's dequeue pointer past this TD,
2635          * or it will attempt to resend it on the next doorbell ring.
2636          */
2637         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2638                         ep_index, ep->stopped_stream, ep->stopped_td,
2639                         &deq_state);
2640
2641         /* HW with the reset endpoint quirk will use the saved dequeue state to
2642          * issue a configure endpoint command later.
2643          */
2644         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2645                 xhci_dbg(xhci, "Queueing new dequeue state\n");
2646                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2647                                 ep_index, ep->stopped_stream, &deq_state);
2648         } else {
2649                 /* Better hope no one uses the input context between now and the
2650                  * reset endpoint completion!
2651                  * XXX: No idea how this hardware will react when stream rings
2652                  * are enabled.
2653                  */
2654                 xhci_dbg(xhci, "Setting up input context for "
2655                                 "configure endpoint command\n");
2656                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2657                                 ep_index, &deq_state);
2658         }
2659 }
2660
2661 /* Deal with stalled endpoints.  The core should have sent the control message
2662  * to clear the halt condition.  However, we need to make the xHCI hardware
2663  * reset its sequence number, since a device will expect a sequence number of
2664  * zero after the halt condition is cleared.
2665  * Context: in_interrupt
2666  */
2667 void xhci_endpoint_reset(struct usb_hcd *hcd,
2668                 struct usb_host_endpoint *ep)
2669 {
2670         struct xhci_hcd *xhci;
2671         struct usb_device *udev;
2672         unsigned int ep_index;
2673         unsigned long flags;
2674         int ret;
2675         struct xhci_virt_ep *virt_ep;
2676
2677         xhci = hcd_to_xhci(hcd);
2678         udev = (struct usb_device *) ep->hcpriv;
2679         /* Called with a root hub endpoint (or an endpoint that wasn't added
2680          * with xhci_add_endpoint()
2681          */
2682         if (!ep->hcpriv)
2683                 return;
2684         ep_index = xhci_get_endpoint_index(&ep->desc);
2685         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2686         if (!virt_ep->stopped_td) {
2687                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2688                                 ep->desc.bEndpointAddress);
2689                 return;
2690         }
2691         if (usb_endpoint_xfer_control(&ep->desc)) {
2692                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2693                 return;
2694         }
2695
2696         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2697         spin_lock_irqsave(&xhci->lock, flags);
2698         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2699         /*
2700          * Can't change the ring dequeue pointer until it's transitioned to the
2701          * stopped state, which is only upon a successful reset endpoint
2702          * command.  Better hope that last command worked!
2703          */
2704         if (!ret) {
2705                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2706                 kfree(virt_ep->stopped_td);
2707                 xhci_ring_cmd_db(xhci);
2708         }
2709         virt_ep->stopped_td = NULL;
2710         virt_ep->stopped_trb = NULL;
2711         virt_ep->stopped_stream = 0;
2712         spin_unlock_irqrestore(&xhci->lock, flags);
2713
2714         if (ret)
2715                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2716 }
2717
2718 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2719                 struct usb_device *udev, struct usb_host_endpoint *ep,
2720                 unsigned int slot_id)
2721 {
2722         int ret;
2723         unsigned int ep_index;
2724         unsigned int ep_state;
2725
2726         if (!ep)
2727                 return -EINVAL;
2728         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2729         if (ret <= 0)
2730                 return -EINVAL;
2731         if (ep->ss_ep_comp.bmAttributes == 0) {
2732                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2733                                 " descriptor for ep 0x%x does not support streams\n",
2734                                 ep->desc.bEndpointAddress);
2735                 return -EINVAL;
2736         }
2737
2738         ep_index = xhci_get_endpoint_index(&ep->desc);
2739         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2740         if (ep_state & EP_HAS_STREAMS ||
2741                         ep_state & EP_GETTING_STREAMS) {
2742                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2743                                 "already has streams set up.\n",
2744                                 ep->desc.bEndpointAddress);
2745                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2746                                 "dynamic stream context array reallocation.\n");
2747                 return -EINVAL;
2748         }
2749         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2750                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2751                                 "endpoint 0x%x; URBs are pending.\n",
2752                                 ep->desc.bEndpointAddress);
2753                 return -EINVAL;
2754         }
2755         return 0;
2756 }
2757
2758 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2759                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2760 {
2761         unsigned int max_streams;
2762
2763         /* The stream context array size must be a power of two */
2764         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2765         /*
2766          * Find out how many primary stream array entries the host controller
2767          * supports.  Later we may use secondary stream arrays (similar to 2nd
2768          * level page entries), but that's an optional feature for xHCI host
2769          * controllers. xHCs must support at least 4 stream IDs.
2770          */
2771         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2772         if (*num_stream_ctxs > max_streams) {
2773                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2774                                 max_streams);
2775                 *num_stream_ctxs = max_streams;
2776                 *num_streams = max_streams;
2777         }
2778 }
2779
2780 /* Returns an error code if one of the endpoint already has streams.
2781  * This does not change any data structures, it only checks and gathers
2782  * information.
2783  */
2784 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2785                 struct usb_device *udev,
2786                 struct usb_host_endpoint **eps, unsigned int num_eps,
2787                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2788 {
2789         unsigned int max_streams;
2790         unsigned int endpoint_flag;
2791         int i;
2792         int ret;
2793
2794         for (i = 0; i < num_eps; i++) {
2795                 ret = xhci_check_streams_endpoint(xhci, udev,
2796                                 eps[i], udev->slot_id);
2797                 if (ret < 0)
2798                         return ret;
2799
2800                 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2801                 if (max_streams < (*num_streams - 1)) {
2802                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2803                                         eps[i]->desc.bEndpointAddress,
2804                                         max_streams);
2805                         *num_streams = max_streams+1;
2806                 }
2807
2808                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2809                 if (*changed_ep_bitmask & endpoint_flag)
2810                         return -EINVAL;
2811                 *changed_ep_bitmask |= endpoint_flag;
2812         }
2813         return 0;
2814 }
2815
2816 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2817                 struct usb_device *udev,
2818                 struct usb_host_endpoint **eps, unsigned int num_eps)
2819 {
2820         u32 changed_ep_bitmask = 0;
2821         unsigned int slot_id;
2822         unsigned int ep_index;
2823         unsigned int ep_state;
2824         int i;
2825
2826         slot_id = udev->slot_id;
2827         if (!xhci->devs[slot_id])
2828                 return 0;
2829
2830         for (i = 0; i < num_eps; i++) {
2831                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2832                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2833                 /* Are streams already being freed for the endpoint? */
2834                 if (ep_state & EP_GETTING_NO_STREAMS) {
2835                         xhci_warn(xhci, "WARN Can't disable streams for "
2836                                         "endpoint 0x%x\n, "
2837                                         "streams are being disabled already.",
2838                                         eps[i]->desc.bEndpointAddress);
2839                         return 0;
2840                 }
2841                 /* Are there actually any streams to free? */
2842                 if (!(ep_state & EP_HAS_STREAMS) &&
2843                                 !(ep_state & EP_GETTING_STREAMS)) {
2844                         xhci_warn(xhci, "WARN Can't disable streams for "
2845                                         "endpoint 0x%x\n, "
2846                                         "streams are already disabled!",
2847                                         eps[i]->desc.bEndpointAddress);
2848                         xhci_warn(xhci, "WARN xhci_free_streams() called "
2849                                         "with non-streams endpoint\n");
2850                         return 0;
2851                 }
2852                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2853         }
2854         return changed_ep_bitmask;
2855 }
2856
2857 /*
2858  * The USB device drivers use this function (though the HCD interface in USB
2859  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
2860  * coordinate mass storage command queueing across multiple endpoints (basically
2861  * a stream ID == a task ID).
2862  *
2863  * Setting up streams involves allocating the same size stream context array
2864  * for each endpoint and issuing a configure endpoint command for all endpoints.
2865  *
2866  * Don't allow the call to succeed if one endpoint only supports one stream
2867  * (which means it doesn't support streams at all).
2868  *
2869  * Drivers may get less stream IDs than they asked for, if the host controller
2870  * hardware or endpoints claim they can't support the number of requested
2871  * stream IDs.
2872  */
2873 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2874                 struct usb_host_endpoint **eps, unsigned int num_eps,
2875                 unsigned int num_streams, gfp_t mem_flags)
2876 {
2877         int i, ret;
2878         struct xhci_hcd *xhci;
2879         struct xhci_virt_device *vdev;
2880         struct xhci_command *config_cmd;
2881         unsigned int ep_index;
2882         unsigned int num_stream_ctxs;
2883         unsigned long flags;
2884         u32 changed_ep_bitmask = 0;
2885
2886         if (!eps)
2887                 return -EINVAL;
2888
2889         /* Add one to the number of streams requested to account for
2890          * stream 0 that is reserved for xHCI usage.
2891          */
2892         num_streams += 1;
2893         xhci = hcd_to_xhci(hcd);
2894         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2895                         num_streams);
2896
2897         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2898         if (!config_cmd) {
2899                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2900                 return -ENOMEM;
2901         }
2902
2903         /* Check to make sure all endpoints are not already configured for
2904          * streams.  While we're at it, find the maximum number of streams that
2905          * all the endpoints will support and check for duplicate endpoints.
2906          */
2907         spin_lock_irqsave(&xhci->lock, flags);
2908         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2909                         num_eps, &num_streams, &changed_ep_bitmask);
2910         if (ret < 0) {
2911                 xhci_free_command(xhci, config_cmd);
2912                 spin_unlock_irqrestore(&xhci->lock, flags);
2913                 return ret;
2914         }
2915         if (num_streams <= 1) {
2916                 xhci_warn(xhci, "WARN: endpoints can't handle "
2917                                 "more than one stream.\n");
2918                 xhci_free_command(xhci, config_cmd);
2919                 spin_unlock_irqrestore(&xhci->lock, flags);
2920                 return -EINVAL;
2921         }
2922         vdev = xhci->devs[udev->slot_id];
2923         /* Mark each endpoint as being in transition, so
2924          * xhci_urb_enqueue() will reject all URBs.
2925          */
2926         for (i = 0; i < num_eps; i++) {
2927                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2928                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2929         }
2930         spin_unlock_irqrestore(&xhci->lock, flags);
2931
2932         /* Setup internal data structures and allocate HW data structures for
2933          * streams (but don't install the HW structures in the input context
2934          * until we're sure all memory allocation succeeded).
2935          */
2936         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2937         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2938                         num_stream_ctxs, num_streams);
2939
2940         for (i = 0; i < num_eps; i++) {
2941                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2942                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2943                                 num_stream_ctxs,
2944                                 num_streams, mem_flags);
2945                 if (!vdev->eps[ep_index].stream_info)
2946                         goto cleanup;
2947                 /* Set maxPstreams in endpoint context and update deq ptr to
2948                  * point to stream context array. FIXME
2949                  */
2950         }
2951
2952         /* Set up the input context for a configure endpoint command. */
2953         for (i = 0; i < num_eps; i++) {
2954                 struct xhci_ep_ctx *ep_ctx;
2955
2956                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2957                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2958
2959                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2960                                 vdev->out_ctx, ep_index);
2961                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2962                                 vdev->eps[ep_index].stream_info);
2963         }
2964         /* Tell the HW to drop its old copy of the endpoint context info
2965          * and add the updated copy from the input context.
2966          */
2967         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2968                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2969
2970         /* Issue and wait for the configure endpoint command */
2971         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2972                         false, false);
2973
2974         /* xHC rejected the configure endpoint command for some reason, so we
2975          * leave the old ring intact and free our internal streams data
2976          * structure.
2977          */
2978         if (ret < 0)
2979                 goto cleanup;
2980
2981         spin_lock_irqsave(&xhci->lock, flags);
2982         for (i = 0; i < num_eps; i++) {
2983                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2984                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2985                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2986                          udev->slot_id, ep_index);
2987                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2988         }
2989         xhci_free_command(xhci, config_cmd);
2990         spin_unlock_irqrestore(&xhci->lock, flags);
2991
2992         /* Subtract 1 for stream 0, which drivers can't use */
2993         return num_streams - 1;
2994
2995 cleanup:
2996         /* If it didn't work, free the streams! */
2997         for (i = 0; i < num_eps; i++) {
2998                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2999                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3000                 vdev->eps[ep_index].stream_info = NULL;
3001                 /* FIXME Unset maxPstreams in endpoint context and
3002                  * update deq ptr to point to normal string ring.
3003                  */
3004                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3005                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3006                 xhci_endpoint_zero(xhci, vdev, eps[i]);
3007         }
3008         xhci_free_command(xhci, config_cmd);
3009         return -ENOMEM;
3010 }
3011
3012 /* Transition the endpoint from using streams to being a "normal" endpoint
3013  * without streams.
3014  *
3015  * Modify the endpoint context state, submit a configure endpoint command,
3016  * and free all endpoint rings for streams if that completes successfully.
3017  */
3018 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3019                 struct usb_host_endpoint **eps, unsigned int num_eps,
3020                 gfp_t mem_flags)
3021 {
3022         int i, ret;
3023         struct xhci_hcd *xhci;
3024         struct xhci_virt_device *vdev;
3025         struct xhci_command *command;
3026         unsigned int ep_index;
3027         unsigned long flags;
3028         u32 changed_ep_bitmask;
3029
3030         xhci = hcd_to_xhci(hcd);
3031         vdev = xhci->devs[udev->slot_id];
3032
3033         /* Set up a configure endpoint command to remove the streams rings */
3034         spin_lock_irqsave(&xhci->lock, flags);
3035         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3036                         udev, eps, num_eps);
3037         if (changed_ep_bitmask == 0) {
3038                 spin_unlock_irqrestore(&xhci->lock, flags);
3039                 return -EINVAL;
3040         }
3041
3042         /* Use the xhci_command structure from the first endpoint.  We may have
3043          * allocated too many, but the driver may call xhci_free_streams() for
3044          * each endpoint it grouped into one call to xhci_alloc_streams().
3045          */
3046         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3047         command = vdev->eps[ep_index].stream_info->free_streams_command;
3048         for (i = 0; i < num_eps; i++) {
3049                 struct xhci_ep_ctx *ep_ctx;
3050
3051                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3052                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3053                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3054                         EP_GETTING_NO_STREAMS;
3055
3056                 xhci_endpoint_copy(xhci, command->in_ctx,
3057                                 vdev->out_ctx, ep_index);
3058                 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3059                                 &vdev->eps[ep_index]);
3060         }
3061         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3062                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3063         spin_unlock_irqrestore(&xhci->lock, flags);
3064
3065         /* Issue and wait for the configure endpoint command,
3066          * which must succeed.
3067          */
3068         ret = xhci_configure_endpoint(xhci, udev, command,
3069                         false, true);
3070
3071         /* xHC rejected the configure endpoint command for some reason, so we
3072          * leave the streams rings intact.
3073          */
3074         if (ret < 0)
3075                 return ret;
3076
3077         spin_lock_irqsave(&xhci->lock, flags);
3078         for (i = 0; i < num_eps; i++) {
3079                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3080                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3081                 vdev->eps[ep_index].stream_info = NULL;