sched/core: Clear the root_domain cpumasks in init_rootdomain()
[pandora-kernel.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30
31 #include "xhci.h"
32
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35
36 #define PORT_WAKE_BITS  (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
37
38 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
39 static int link_quirk;
40 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
41 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
42
43 /* TODO: copied from ehci-hcd.c - can this be refactored? */
44 /*
45  * handshake - spin reading hc until handshake completes or fails
46  * @ptr: address of hc register to be read
47  * @mask: bits to look at in result of read
48  * @done: value of those bits when handshake succeeds
49  * @usec: timeout in microseconds
50  *
51  * Returns negative errno, or zero on success
52  *
53  * Success happens when the "mask" bits have the specified value (hardware
54  * handshake done).  There are two failure modes:  "usec" have passed (major
55  * hardware flakeout), or the register reads as all-ones (hardware removed).
56  */
57 int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
58                       u32 mask, u32 done, int usec)
59 {
60         u32     result;
61
62         do {
63                 result = xhci_readl(xhci, ptr);
64                 if (result == ~(u32)0)          /* card removed */
65                         return -ENODEV;
66                 result &= mask;
67                 if (result == done)
68                         return 0;
69                 udelay(1);
70                 usec--;
71         } while (usec > 0);
72         return -ETIMEDOUT;
73 }
74
75 /*
76  * Disable interrupts and begin the xHCI halting process.
77  */
78 void xhci_quiesce(struct xhci_hcd *xhci)
79 {
80         u32 halted;
81         u32 cmd;
82         u32 mask;
83
84         mask = ~(XHCI_IRQS);
85         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
86         if (!halted)
87                 mask &= ~CMD_RUN;
88
89         cmd = xhci_readl(xhci, &xhci->op_regs->command);
90         cmd &= mask;
91         xhci_writel(xhci, cmd, &xhci->op_regs->command);
92 }
93
94 /*
95  * Force HC into halt state.
96  *
97  * Disable any IRQs and clear the run/stop bit.
98  * HC will complete any current and actively pipelined transactions, and
99  * should halt within 16 ms of the run/stop bit being cleared.
100  * Read HC Halted bit in the status register to see when the HC is finished.
101  */
102 int xhci_halt(struct xhci_hcd *xhci)
103 {
104         int ret;
105         xhci_dbg(xhci, "// Halt the HC\n");
106         xhci_quiesce(xhci);
107
108         ret = handshake(xhci, &xhci->op_regs->status,
109                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
110         if (!ret) {
111                 xhci->xhc_state |= XHCI_STATE_HALTED;
112                 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
113         } else
114                 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
115                                 XHCI_MAX_HALT_USEC);
116         return ret;
117 }
118
119 /*
120  * Set the run bit and wait for the host to be running.
121  */
122 static int xhci_start(struct xhci_hcd *xhci)
123 {
124         u32 temp;
125         int ret;
126
127         temp = xhci_readl(xhci, &xhci->op_regs->command);
128         temp |= (CMD_RUN);
129         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
130                         temp);
131         xhci_writel(xhci, temp, &xhci->op_regs->command);
132
133         /*
134          * Wait for the HCHalted Status bit to be 0 to indicate the host is
135          * running.
136          */
137         ret = handshake(xhci, &xhci->op_regs->status,
138                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
139         if (ret == -ETIMEDOUT)
140                 xhci_err(xhci, "Host took too long to start, "
141                                 "waited %u microseconds.\n",
142                                 XHCI_MAX_HALT_USEC);
143         if (!ret)
144                 xhci->xhc_state &= ~(XHCI_STATE_HALTED | XHCI_STATE_DYING);
145
146         return ret;
147 }
148
149 /*
150  * Reset a halted HC.
151  *
152  * This resets pipelines, timers, counters, state machines, etc.
153  * Transactions will be terminated immediately, and operational registers
154  * will be set to their defaults.
155  */
156 int xhci_reset(struct xhci_hcd *xhci)
157 {
158         u32 command;
159         u32 state;
160         int ret;
161
162         state = xhci_readl(xhci, &xhci->op_regs->status);
163         if ((state & STS_HALT) == 0) {
164                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
165                 return 0;
166         }
167
168         xhci_dbg(xhci, "// Reset the HC\n");
169         command = xhci_readl(xhci, &xhci->op_regs->command);
170         command |= CMD_RESET;
171         xhci_writel(xhci, command, &xhci->op_regs->command);
172
173         /* Existing Intel xHCI controllers require a delay of 1 mS,
174          * after setting the CMD_RESET bit, and before accessing any
175          * HC registers. This allows the HC to complete the
176          * reset operation and be ready for HC register access.
177          * Without this delay, the subsequent HC register access,
178          * may result in a system hang very rarely.
179          */
180         if (xhci->quirks & XHCI_INTEL_HOST)
181                 udelay(1000);
182
183         ret = handshake(xhci, &xhci->op_regs->command,
184                         CMD_RESET, 0, 10 * 1000 * 1000);
185         if (ret)
186                 return ret;
187
188         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
189         /*
190          * xHCI cannot write to any doorbells or operational registers other
191          * than status until the "Controller Not Ready" flag is cleared.
192          */
193         return handshake(xhci, &xhci->op_regs->status,
194                          STS_CNR, 0, 10 * 1000 * 1000);
195 }
196
197 #ifdef CONFIG_PCI
198 static int xhci_free_msi(struct xhci_hcd *xhci)
199 {
200         int i;
201
202         if (!xhci->msix_entries)
203                 return -EINVAL;
204
205         for (i = 0; i < xhci->msix_count; i++)
206                 if (xhci->msix_entries[i].vector)
207                         free_irq(xhci->msix_entries[i].vector,
208                                         xhci_to_hcd(xhci));
209         return 0;
210 }
211
212 /*
213  * Set up MSI
214  */
215 static int xhci_setup_msi(struct xhci_hcd *xhci)
216 {
217         int ret;
218         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
219
220         ret = pci_enable_msi(pdev);
221         if (ret) {
222                 xhci_dbg(xhci, "failed to allocate MSI entry\n");
223                 return ret;
224         }
225
226         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
227                                 0, "xhci_hcd", xhci_to_hcd(xhci));
228         if (ret) {
229                 xhci_dbg(xhci, "disable MSI interrupt\n");
230                 pci_disable_msi(pdev);
231         }
232
233         return ret;
234 }
235
236 /*
237  * Free IRQs
238  * free all IRQs request
239  */
240 static void xhci_free_irq(struct xhci_hcd *xhci)
241 {
242         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
243         int ret;
244
245         /* return if using legacy interrupt */
246         if (xhci_to_hcd(xhci)->irq >= 0)
247                 return;
248
249         ret = xhci_free_msi(xhci);
250         if (!ret)
251                 return;
252         if (pdev->irq >= 0)
253                 free_irq(pdev->irq, xhci_to_hcd(xhci));
254
255         return;
256 }
257
258 /*
259  * Set up MSI-X
260  */
261 static int xhci_setup_msix(struct xhci_hcd *xhci)
262 {
263         int i, ret = 0;
264         struct usb_hcd *hcd = xhci_to_hcd(xhci);
265         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
266
267         /*
268          * calculate number of msi-x vectors supported.
269          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
270          *   with max number of interrupters based on the xhci HCSPARAMS1.
271          * - num_online_cpus: maximum msi-x vectors per CPUs core.
272          *   Add additional 1 vector to ensure always available interrupt.
273          */
274         xhci->msix_count = min(num_online_cpus() + 1,
275                                 HCS_MAX_INTRS(xhci->hcs_params1));
276
277         xhci->msix_entries =
278                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
279                                 GFP_KERNEL);
280         if (!xhci->msix_entries) {
281                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
282                 return -ENOMEM;
283         }
284
285         for (i = 0; i < xhci->msix_count; i++) {
286                 xhci->msix_entries[i].entry = i;
287                 xhci->msix_entries[i].vector = 0;
288         }
289
290         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
291         if (ret) {
292                 xhci_dbg(xhci, "Failed to enable MSI-X\n");
293                 goto free_entries;
294         }
295
296         for (i = 0; i < xhci->msix_count; i++) {
297                 ret = request_irq(xhci->msix_entries[i].vector,
298                                 (irq_handler_t)xhci_msi_irq,
299                                 0, "xhci_hcd", xhci_to_hcd(xhci));
300                 if (ret)
301                         goto disable_msix;
302         }
303
304         hcd->msix_enabled = 1;
305         return ret;
306
307 disable_msix:
308         xhci_dbg(xhci, "disable MSI-X interrupt\n");
309         xhci_free_irq(xhci);
310         pci_disable_msix(pdev);
311 free_entries:
312         kfree(xhci->msix_entries);
313         xhci->msix_entries = NULL;
314         return ret;
315 }
316
317 /* Free any IRQs and disable MSI-X */
318 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
319 {
320         struct usb_hcd *hcd = xhci_to_hcd(xhci);
321         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
322
323         xhci_free_irq(xhci);
324
325         if (xhci->msix_entries) {
326                 pci_disable_msix(pdev);
327                 kfree(xhci->msix_entries);
328                 xhci->msix_entries = NULL;
329         } else {
330                 pci_disable_msi(pdev);
331         }
332
333         hcd->msix_enabled = 0;
334         return;
335 }
336
337 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
338 {
339         int i;
340
341         if (xhci->msix_entries) {
342                 for (i = 0; i < xhci->msix_count; i++)
343                         synchronize_irq(xhci->msix_entries[i].vector);
344         }
345 }
346
347 static int xhci_try_enable_msi(struct usb_hcd *hcd)
348 {
349         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
350         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
351         int ret;
352
353         /*
354          * Some Fresco Logic host controllers advertise MSI, but fail to
355          * generate interrupts.  Don't even try to enable MSI.
356          */
357         if (xhci->quirks & XHCI_BROKEN_MSI)
358                 goto legacy_irq;
359
360         /* unregister the legacy interrupt */
361         if (hcd->irq)
362                 free_irq(hcd->irq, hcd);
363         hcd->irq = -1;
364
365         ret = xhci_setup_msix(xhci);
366         if (ret)
367                 /* fall back to msi*/
368                 ret = xhci_setup_msi(xhci);
369
370         if (!ret)
371                 /* hcd->irq is -1, we have MSI */
372                 return 0;
373
374         if (!pdev->irq) {
375                 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
376                 return -EINVAL;
377         }
378
379  legacy_irq:
380         /* fall back to legacy interrupt*/
381         ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
382                         hcd->irq_descr, hcd);
383         if (ret) {
384                 xhci_err(xhci, "request interrupt %d failed\n",
385                                 pdev->irq);
386                 return ret;
387         }
388         hcd->irq = pdev->irq;
389         return 0;
390 }
391
392 #else
393
394 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
395 {
396         return 0;
397 }
398
399 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
400 {
401 }
402
403 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
404 {
405 }
406
407 #endif
408
409 static void compliance_mode_recovery(unsigned long arg)
410 {
411         struct xhci_hcd *xhci;
412         struct usb_hcd *hcd;
413         u32 temp;
414         int i;
415
416         xhci = (struct xhci_hcd *)arg;
417
418         for (i = 0; i < xhci->num_usb3_ports; i++) {
419                 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
420                 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
421                         /*
422                          * Compliance Mode Detected. Letting USB Core
423                          * handle the Warm Reset
424                          */
425                         xhci_dbg(xhci, "Compliance Mode Detected->Port %d!\n",
426                                         i + 1);
427                         xhci_dbg(xhci, "Attempting Recovery routine!\n");
428                         hcd = xhci->shared_hcd;
429
430                         if (hcd->state == HC_STATE_SUSPENDED)
431                                 usb_hcd_resume_root_hub(hcd);
432
433                         usb_hcd_poll_rh_status(hcd);
434                 }
435         }
436
437         if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
438                 mod_timer(&xhci->comp_mode_recovery_timer,
439                         jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
440 }
441
442 /*
443  * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
444  * that causes ports behind that hardware to enter compliance mode sometimes.
445  * The quirk creates a timer that polls every 2 seconds the link state of
446  * each host controller's port and recovers it by issuing a Warm reset
447  * if Compliance mode is detected, otherwise the port will become "dead" (no
448  * device connections or disconnections will be detected anymore). Becasue no
449  * status event is generated when entering compliance mode (per xhci spec),
450  * this quirk is needed on systems that have the failing hardware installed.
451  */
452 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
453 {
454         xhci->port_status_u0 = 0;
455         init_timer(&xhci->comp_mode_recovery_timer);
456
457         xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
458         xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
459         xhci->comp_mode_recovery_timer.expires = jiffies +
460                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
461
462         set_timer_slack(&xhci->comp_mode_recovery_timer,
463                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
464         add_timer(&xhci->comp_mode_recovery_timer);
465         xhci_dbg(xhci, "Compliance Mode Recovery Timer Initialized.\n");
466 }
467
468 /*
469  * This function identifies the systems that have installed the SN65LVPE502CP
470  * USB3.0 re-driver and that need the Compliance Mode Quirk.
471  * Systems:
472  * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
473  */
474 static bool compliance_mode_recovery_timer_quirk_check(void)
475 {
476         const char *dmi_product_name, *dmi_sys_vendor;
477
478         dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
479         dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
480         if (!dmi_product_name || !dmi_sys_vendor)
481                 return false;
482
483         if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
484                 return false;
485
486         if (strstr(dmi_product_name, "Z420") ||
487                         strstr(dmi_product_name, "Z620") ||
488                         strstr(dmi_product_name, "Z820") ||
489                         strstr(dmi_product_name, "Z1 Workstation"))
490                 return true;
491
492         return false;
493 }
494
495 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
496 {
497         return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
498 }
499
500
501 /*
502  * Initialize memory for HCD and xHC (one-time init).
503  *
504  * Program the PAGESIZE register, initialize the device context array, create
505  * device contexts (?), set up a command ring segment (or two?), create event
506  * ring (one for now).
507  */
508 int xhci_init(struct usb_hcd *hcd)
509 {
510         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
511         int retval = 0;
512
513         xhci_dbg(xhci, "xhci_init\n");
514         spin_lock_init(&xhci->lock);
515         if (xhci->hci_version == 0x95 && link_quirk) {
516                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
517                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
518         } else {
519                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
520         }
521         retval = xhci_mem_init(xhci, GFP_KERNEL);
522         xhci_dbg(xhci, "Finished xhci_init\n");
523
524         /* Initializing Compliance Mode Recovery Data If Needed */
525         if (compliance_mode_recovery_timer_quirk_check()) {
526                 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
527                 compliance_mode_recovery_timer_init(xhci);
528         }
529
530         return retval;
531 }
532
533 /*-------------------------------------------------------------------------*/
534
535
536 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
537 static void xhci_event_ring_work(unsigned long arg)
538 {
539         unsigned long flags;
540         int temp;
541         u64 temp_64;
542         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
543         int i, j;
544
545         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
546
547         spin_lock_irqsave(&xhci->lock, flags);
548         temp = xhci_readl(xhci, &xhci->op_regs->status);
549         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
550         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
551                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
552                 xhci_dbg(xhci, "HW died, polling stopped.\n");
553                 spin_unlock_irqrestore(&xhci->lock, flags);
554                 return;
555         }
556
557         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
558         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
559         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
560         xhci->error_bitmask = 0;
561         xhci_dbg(xhci, "Event ring:\n");
562         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
563         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
564         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
565         temp_64 &= ~ERST_PTR_MASK;
566         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
567         xhci_dbg(xhci, "Command ring:\n");
568         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
569         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
570         xhci_dbg_cmd_ptrs(xhci);
571         for (i = 0; i < MAX_HC_SLOTS; ++i) {
572                 if (!xhci->devs[i])
573                         continue;
574                 for (j = 0; j < 31; ++j) {
575                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
576                 }
577         }
578         spin_unlock_irqrestore(&xhci->lock, flags);
579
580         if (!xhci->zombie)
581                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
582         else
583                 xhci_dbg(xhci, "Quit polling the event ring.\n");
584 }
585 #endif
586
587 static int xhci_run_finished(struct xhci_hcd *xhci)
588 {
589         if (xhci_start(xhci)) {
590                 xhci_halt(xhci);
591                 return -ENODEV;
592         }
593         xhci->shared_hcd->state = HC_STATE_RUNNING;
594         xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
595
596         if (xhci->quirks & XHCI_NEC_HOST)
597                 xhci_ring_cmd_db(xhci);
598
599         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
600         return 0;
601 }
602
603 /*
604  * Start the HC after it was halted.
605  *
606  * This function is called by the USB core when the HC driver is added.
607  * Its opposite is xhci_stop().
608  *
609  * xhci_init() must be called once before this function can be called.
610  * Reset the HC, enable device slot contexts, program DCBAAP, and
611  * set command ring pointer and event ring pointer.
612  *
613  * Setup MSI-X vectors and enable interrupts.
614  */
615 int xhci_run(struct usb_hcd *hcd)
616 {
617         u32 temp;
618         u64 temp_64;
619         int ret;
620         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
621
622         /* Start the xHCI host controller running only after the USB 2.0 roothub
623          * is setup.
624          */
625
626         hcd->uses_new_polling = 1;
627         if (!usb_hcd_is_primary_hcd(hcd))
628                 return xhci_run_finished(xhci);
629
630         xhci_dbg(xhci, "xhci_run\n");
631
632         ret = xhci_try_enable_msi(hcd);
633         if (ret)
634                 return ret;
635
636 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
637         init_timer(&xhci->event_ring_timer);
638         xhci->event_ring_timer.data = (unsigned long) xhci;
639         xhci->event_ring_timer.function = xhci_event_ring_work;
640         /* Poll the event ring */
641         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
642         xhci->zombie = 0;
643         xhci_dbg(xhci, "Setting event ring polling timer\n");
644         add_timer(&xhci->event_ring_timer);
645 #endif
646
647         xhci_dbg(xhci, "Command ring memory map follows:\n");
648         xhci_debug_ring(xhci, xhci->cmd_ring);
649         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
650         xhci_dbg_cmd_ptrs(xhci);
651
652         xhci_dbg(xhci, "ERST memory map follows:\n");
653         xhci_dbg_erst(xhci, &xhci->erst);
654         xhci_dbg(xhci, "Event ring:\n");
655         xhci_debug_ring(xhci, xhci->event_ring);
656         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
657         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
658         temp_64 &= ~ERST_PTR_MASK;
659         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
660
661         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
662         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
663         temp &= ~ER_IRQ_INTERVAL_MASK;
664         temp |= (u32) 160;
665         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
666
667         /* Set the HCD state before we enable the irqs */
668         temp = xhci_readl(xhci, &xhci->op_regs->command);
669         temp |= (CMD_EIE);
670         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
671                         temp);
672         xhci_writel(xhci, temp, &xhci->op_regs->command);
673
674         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
675         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
676                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
677         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
678                         &xhci->ir_set->irq_pending);
679         xhci_print_ir_set(xhci, 0);
680
681         if (xhci->quirks & XHCI_NEC_HOST)
682                 xhci_queue_vendor_command(xhci, 0, 0, 0,
683                                 TRB_TYPE(TRB_NEC_GET_FW));
684
685         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
686         return 0;
687 }
688
689 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
690 {
691         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
692
693         spin_lock_irq(&xhci->lock);
694         xhci_halt(xhci);
695
696         /* The shared_hcd is going to be deallocated shortly (the USB core only
697          * calls this function when allocation fails in usb_add_hcd(), or
698          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
699          */
700         xhci->shared_hcd = NULL;
701         spin_unlock_irq(&xhci->lock);
702 }
703
704 /*
705  * Stop xHCI driver.
706  *
707  * This function is called by the USB core when the HC driver is removed.
708  * Its opposite is xhci_run().
709  *
710  * Disable device contexts, disable IRQs, and quiesce the HC.
711  * Reset the HC, finish any completed transactions, and cleanup memory.
712  */
713 void xhci_stop(struct usb_hcd *hcd)
714 {
715         u32 temp;
716         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
717
718         if (!usb_hcd_is_primary_hcd(hcd)) {
719                 xhci_only_stop_hcd(xhci->shared_hcd);
720                 return;
721         }
722
723         spin_lock_irq(&xhci->lock);
724         /* Make sure the xHC is halted for a USB3 roothub
725          * (xhci_stop() could be called as part of failed init).
726          */
727         xhci_halt(xhci);
728         xhci_reset(xhci);
729         spin_unlock_irq(&xhci->lock);
730
731         xhci_cleanup_msix(xhci);
732
733 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
734         /* Tell the event ring poll function not to reschedule */
735         xhci->zombie = 1;
736         del_timer_sync(&xhci->event_ring_timer);
737 #endif
738
739         /* Deleting Compliance Mode Recovery Timer */
740         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
741                         (!(xhci_all_ports_seen_u0(xhci))))
742                 del_timer_sync(&xhci->comp_mode_recovery_timer);
743
744         if (xhci->quirks & XHCI_AMD_PLL_FIX)
745                 usb_amd_dev_put();
746
747         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
748         temp = xhci_readl(xhci, &xhci->op_regs->status);
749         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
750         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
751         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
752                         &xhci->ir_set->irq_pending);
753         xhci_print_ir_set(xhci, 0);
754
755         xhci_dbg(xhci, "cleaning up memory\n");
756         xhci_mem_cleanup(xhci);
757         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
758                     xhci_readl(xhci, &xhci->op_regs->status));
759 }
760
761 /*
762  * Shutdown HC (not bus-specific)
763  *
764  * This is called when the machine is rebooting or halting.  We assume that the
765  * machine will be powered off, and the HC's internal state will be reset.
766  * Don't bother to free memory.
767  *
768  * This will only ever be called with the main usb_hcd (the USB3 roothub).
769  */
770 void xhci_shutdown(struct usb_hcd *hcd)
771 {
772         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
773
774         if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
775                 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
776
777         spin_lock_irq(&xhci->lock);
778         xhci_halt(xhci);
779         /* Workaround for spurious wakeups at shutdown with HSW */
780         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
781                 xhci_reset(xhci);
782         spin_unlock_irq(&xhci->lock);
783
784         xhci_cleanup_msix(xhci);
785
786         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
787                     xhci_readl(xhci, &xhci->op_regs->status));
788
789         /* Yet another workaround for spurious wakeups at shutdown with HSW */
790         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
791                 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
792 }
793
794 #ifdef CONFIG_PM
795 static void xhci_save_registers(struct xhci_hcd *xhci)
796 {
797         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
798         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
799         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
800         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
801         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
802         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
803         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
804         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
805         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
806 }
807
808 static void xhci_restore_registers(struct xhci_hcd *xhci)
809 {
810         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
811         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
812         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
813         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
814         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
815         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
816         xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
817         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
818         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
819 }
820
821 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
822 {
823         u64     val_64;
824
825         /* step 2: initialize command ring buffer */
826         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
827         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
828                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
829                                       xhci->cmd_ring->dequeue) &
830                  (u64) ~CMD_RING_RSVD_BITS) |
831                 xhci->cmd_ring->cycle_state;
832         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
833                         (long unsigned long) val_64);
834         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
835 }
836
837 /*
838  * The whole command ring must be cleared to zero when we suspend the host.
839  *
840  * The host doesn't save the command ring pointer in the suspend well, so we
841  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
842  * aligned, because of the reserved bits in the command ring dequeue pointer
843  * register.  Therefore, we can't just set the dequeue pointer back in the
844  * middle of the ring (TRBs are 16-byte aligned).
845  */
846 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
847 {
848         struct xhci_ring *ring;
849         struct xhci_segment *seg;
850
851         ring = xhci->cmd_ring;
852         seg = ring->deq_seg;
853         do {
854                 memset(seg->trbs, 0,
855                         sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
856                 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
857                         cpu_to_le32(~TRB_CYCLE);
858                 seg = seg->next;
859         } while (seg != ring->deq_seg);
860
861         /* Reset the software enqueue and dequeue pointers */
862         ring->deq_seg = ring->first_seg;
863         ring->dequeue = ring->first_seg->trbs;
864         ring->enq_seg = ring->deq_seg;
865         ring->enqueue = ring->dequeue;
866
867         /*
868          * Ring is now zeroed, so the HW should look for change of ownership
869          * when the cycle bit is set to 1.
870          */
871         ring->cycle_state = 1;
872
873         /*
874          * Reset the hardware dequeue pointer.
875          * Yes, this will need to be re-written after resume, but we're paranoid
876          * and want to make sure the hardware doesn't access bogus memory
877          * because, say, the BIOS or an SMI started the host without changing
878          * the command ring pointers.
879          */
880         xhci_set_cmd_ring_deq(xhci);
881 }
882
883 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
884 {
885         int port_index;
886         __le32 __iomem **port_array;
887         unsigned long flags;
888         u32 t1, t2;
889
890         spin_lock_irqsave(&xhci->lock, flags);
891
892         /* disble usb3 ports Wake bits*/
893         port_index = xhci->num_usb3_ports;
894         port_array = xhci->usb3_ports;
895         while (port_index--) {
896                 t1 = readl(port_array[port_index]);
897                 t1 = xhci_port_state_to_neutral(t1);
898                 t2 = t1 & ~PORT_WAKE_BITS;
899                 if (t1 != t2)
900                         writel(t2, port_array[port_index]);
901         }
902
903         /* disble usb2 ports Wake bits*/
904         port_index = xhci->num_usb2_ports;
905         port_array = xhci->usb2_ports;
906         while (port_index--) {
907                 t1 = readl(port_array[port_index]);
908                 t1 = xhci_port_state_to_neutral(t1);
909                 t2 = t1 & ~PORT_WAKE_BITS;
910                 if (t1 != t2)
911                         writel(t2, port_array[port_index]);
912         }
913
914         spin_unlock_irqrestore(&xhci->lock, flags);
915 }
916
917 /*
918  * Stop HC (not bus-specific)
919  *
920  * This is called when the machine transition into S3/S4 mode.
921  *
922  */
923 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
924 {
925         int                     rc = 0;
926         unsigned int            delay = XHCI_MAX_HALT_USEC;
927         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
928         u32                     command;
929
930         /* Clear root port wake on bits if wakeup not allowed. */
931         if (!do_wakeup)
932                 xhci_disable_port_wake_on_bits(xhci);
933
934         /* Don't poll the roothubs on bus suspend. */
935         xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
936         clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
937         del_timer_sync(&hcd->rh_timer);
938
939         spin_lock_irq(&xhci->lock);
940         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
941         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
942         /* step 1: stop endpoint */
943         /* skipped assuming that port suspend has done */
944
945         /* step 2: clear Run/Stop bit */
946         command = xhci_readl(xhci, &xhci->op_regs->command);
947         command &= ~CMD_RUN;
948         xhci_writel(xhci, command, &xhci->op_regs->command);
949
950         /* Some chips from Fresco Logic need an extraordinary delay */
951         delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
952
953         if (handshake(xhci, &xhci->op_regs->status,
954                       STS_HALT, STS_HALT, delay)) {
955                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
956                 spin_unlock_irq(&xhci->lock);
957                 return -ETIMEDOUT;
958         }
959         xhci_clear_command_ring(xhci);
960
961         /* step 3: save registers */
962         xhci_save_registers(xhci);
963
964         /* step 4: set CSS flag */
965         command = xhci_readl(xhci, &xhci->op_regs->command);
966         command |= CMD_CSS;
967         xhci_writel(xhci, command, &xhci->op_regs->command);
968         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) {
969                 xhci_warn(xhci, "WARN: xHC save state timeout\n");
970                 spin_unlock_irq(&xhci->lock);
971                 return -ETIMEDOUT;
972         }
973         spin_unlock_irq(&xhci->lock);
974
975         /*
976          * Deleting Compliance Mode Recovery Timer because the xHCI Host
977          * is about to be suspended.
978          */
979         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
980                         (!(xhci_all_ports_seen_u0(xhci)))) {
981                 del_timer_sync(&xhci->comp_mode_recovery_timer);
982                 xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted!\n");
983         }
984
985         /* step 5: remove core well power */
986         /* synchronize irq when using MSI-X */
987         xhci_msix_sync_irqs(xhci);
988
989         return rc;
990 }
991
992 /*
993  * start xHC (not bus-specific)
994  *
995  * This is called when the machine transition from S3/S4 mode.
996  *
997  */
998 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
999 {
1000         u32                     command, temp = 0, status;
1001         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
1002         struct usb_hcd          *secondary_hcd;
1003         int                     retval = 0;
1004         bool                    comp_timer_running = false;
1005
1006         /* Wait a bit if either of the roothubs need to settle from the
1007          * transition into bus suspend.
1008          */
1009         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
1010                         time_before(jiffies,
1011                                 xhci->bus_state[1].next_statechange))
1012                 msleep(100);
1013
1014         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1015         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
1016
1017         spin_lock_irq(&xhci->lock);
1018         if (xhci->quirks & XHCI_RESET_ON_RESUME)
1019                 hibernated = true;
1020
1021         if (!hibernated) {
1022                 /* step 1: restore register */
1023                 xhci_restore_registers(xhci);
1024                 /* step 2: initialize command ring buffer */
1025                 xhci_set_cmd_ring_deq(xhci);
1026                 /* step 3: restore state and start state*/
1027                 /* step 3: set CRS flag */
1028                 command = xhci_readl(xhci, &xhci->op_regs->command);
1029                 command |= CMD_CRS;
1030                 xhci_writel(xhci, command, &xhci->op_regs->command);
1031                 if (handshake(xhci, &xhci->op_regs->status,
1032                               STS_RESTORE, 0, 10 * 1000)) {
1033                         xhci_warn(xhci, "WARN: xHC restore state timeout\n");
1034                         spin_unlock_irq(&xhci->lock);
1035                         return -ETIMEDOUT;
1036                 }
1037                 temp = xhci_readl(xhci, &xhci->op_regs->status);
1038         }
1039
1040         /* If restore operation fails, re-initialize the HC during resume */
1041         if ((temp & STS_SRE) || hibernated) {
1042
1043                 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1044                                 !(xhci_all_ports_seen_u0(xhci))) {
1045                         del_timer_sync(&xhci->comp_mode_recovery_timer);
1046                         xhci_dbg(xhci, "Compliance Mode Recovery Timer deleted!\n");
1047                 }
1048
1049                 /* Let the USB core know _both_ roothubs lost power. */
1050                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1051                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1052
1053                 xhci_dbg(xhci, "Stop HCD\n");
1054                 xhci_halt(xhci);
1055                 xhci_reset(xhci);
1056                 spin_unlock_irq(&xhci->lock);
1057                 xhci_cleanup_msix(xhci);
1058
1059 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
1060                 /* Tell the event ring poll function not to reschedule */
1061                 xhci->zombie = 1;
1062                 del_timer_sync(&xhci->event_ring_timer);
1063 #endif
1064
1065                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1066                 temp = xhci_readl(xhci, &xhci->op_regs->status);
1067                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
1068                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
1069                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
1070                                 &xhci->ir_set->irq_pending);
1071                 xhci_print_ir_set(xhci, 0);
1072
1073                 xhci_dbg(xhci, "cleaning up memory\n");
1074                 xhci_mem_cleanup(xhci);
1075                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1076                             xhci_readl(xhci, &xhci->op_regs->status));
1077
1078                 /* USB core calls the PCI reinit and start functions twice:
1079                  * first with the primary HCD, and then with the secondary HCD.
1080                  * If we don't do the same, the host will never be started.
1081                  */
1082                 if (!usb_hcd_is_primary_hcd(hcd))
1083                         secondary_hcd = hcd;
1084                 else
1085                         secondary_hcd = xhci->shared_hcd;
1086
1087                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1088                 retval = xhci_init(hcd->primary_hcd);
1089                 if (retval)
1090                         return retval;
1091                 comp_timer_running = true;
1092
1093                 xhci_dbg(xhci, "Start the primary HCD\n");
1094                 retval = xhci_run(hcd->primary_hcd);
1095                 if (!retval) {
1096                         xhci_dbg(xhci, "Start the secondary HCD\n");
1097                         retval = xhci_run(secondary_hcd);
1098                 }
1099                 hcd->state = HC_STATE_SUSPENDED;
1100                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1101                 goto done;
1102         }
1103
1104         /* step 4: set Run/Stop bit */
1105         command = xhci_readl(xhci, &xhci->op_regs->command);
1106         command |= CMD_RUN;
1107         xhci_writel(xhci, command, &xhci->op_regs->command);
1108         handshake(xhci, &xhci->op_regs->status, STS_HALT,
1109                   0, 250 * 1000);
1110
1111         /* step 5: walk topology and initialize portsc,
1112          * portpmsc and portli
1113          */
1114         /* this is done in bus_resume */
1115
1116         /* step 6: restart each of the previously
1117          * Running endpoints by ringing their doorbells
1118          */
1119
1120         spin_unlock_irq(&xhci->lock);
1121
1122  done:
1123         if (retval == 0) {
1124                 /* Resume root hubs only when have pending events. */
1125                 status = readl(&xhci->op_regs->status);
1126                 if (status & STS_EINT) {
1127                         usb_hcd_resume_root_hub(hcd);
1128                         usb_hcd_resume_root_hub(xhci->shared_hcd);
1129                 }
1130         }
1131
1132         /*
1133          * If system is subject to the Quirk, Compliance Mode Timer needs to
1134          * be re-initialized Always after a system resume. Ports are subject
1135          * to suffer the Compliance Mode issue again. It doesn't matter if
1136          * ports have entered previously to U0 before system's suspension.
1137          */
1138         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1139                 compliance_mode_recovery_timer_init(xhci);
1140
1141         /* Re-enable port polling. */
1142         xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1143         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1144         usb_hcd_poll_rh_status(hcd);
1145
1146         return retval;
1147 }
1148 #endif  /* CONFIG_PM */
1149
1150 /*-------------------------------------------------------------------------*/
1151
1152 /**
1153  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1154  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
1155  * value to right shift 1 for the bitmask.
1156  *
1157  * Index  = (epnum * 2) + direction - 1,
1158  * where direction = 0 for OUT, 1 for IN.
1159  * For control endpoints, the IN index is used (OUT index is unused), so
1160  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1161  */
1162 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1163 {
1164         unsigned int index;
1165         if (usb_endpoint_xfer_control(desc))
1166                 index = (unsigned int) (usb_endpoint_num(desc)*2);
1167         else
1168                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1169                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1170         return index;
1171 }
1172
1173 /* Find the flag for this endpoint (for use in the control context).  Use the
1174  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1175  * bit 1, etc.
1176  */
1177 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1178 {
1179         return 1 << (xhci_get_endpoint_index(desc) + 1);
1180 }
1181
1182 /* Find the flag for this endpoint (for use in the control context).  Use the
1183  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1184  * bit 1, etc.
1185  */
1186 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1187 {
1188         return 1 << (ep_index + 1);
1189 }
1190
1191 /* Compute the last valid endpoint context index.  Basically, this is the
1192  * endpoint index plus one.  For slot contexts with more than valid endpoint,
1193  * we find the most significant bit set in the added contexts flags.
1194  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1195  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1196  */
1197 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1198 {
1199         return fls(added_ctxs) - 1;
1200 }
1201
1202 /* Returns 1 if the arguments are OK;
1203  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1204  */
1205 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1206                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1207                 const char *func) {
1208         struct xhci_hcd *xhci;
1209         struct xhci_virt_device *virt_dev;
1210
1211         if (!hcd || (check_ep && !ep) || !udev) {
1212                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1213                                 func);
1214                 return -EINVAL;
1215         }
1216         if (!udev->parent) {
1217                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1218                                 func);
1219                 return 0;
1220         }
1221
1222         xhci = hcd_to_xhci(hcd);
1223         if (check_virt_dev) {
1224                 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1225                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
1226                                                 "device\n", func);
1227                         return -EINVAL;
1228                 }
1229
1230                 virt_dev = xhci->devs[udev->slot_id];
1231                 if (virt_dev->udev != udev) {
1232                         printk(KERN_DEBUG "xHCI %s called with udev and "
1233                                           "virt_dev does not match\n", func);
1234                         return -EINVAL;
1235                 }
1236         }
1237
1238         if (xhci->xhc_state & XHCI_STATE_HALTED)
1239                 return -ENODEV;
1240
1241         return 1;
1242 }
1243
1244 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1245                 struct usb_device *udev, struct xhci_command *command,
1246                 bool ctx_change, bool must_succeed);
1247
1248 /*
1249  * Full speed devices may have a max packet size greater than 8 bytes, but the
1250  * USB core doesn't know that until it reads the first 8 bytes of the
1251  * descriptor.  If the usb_device's max packet size changes after that point,
1252  * we need to issue an evaluate context command and wait on it.
1253  */
1254 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1255                 unsigned int ep_index, struct urb *urb)
1256 {
1257         struct xhci_container_ctx *in_ctx;
1258         struct xhci_container_ctx *out_ctx;
1259         struct xhci_input_control_ctx *ctrl_ctx;
1260         struct xhci_ep_ctx *ep_ctx;
1261         int max_packet_size;
1262         int hw_max_packet_size;
1263         int ret = 0;
1264
1265         out_ctx = xhci->devs[slot_id]->out_ctx;
1266         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1267         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1268         max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1269         if (hw_max_packet_size != max_packet_size) {
1270                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1271                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1272                                 max_packet_size);
1273                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1274                                 hw_max_packet_size);
1275                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1276
1277                 /* Set up the modified control endpoint 0 */
1278                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1279                                 xhci->devs[slot_id]->out_ctx, ep_index);
1280                 in_ctx = xhci->devs[slot_id]->in_ctx;
1281                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1282                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1283                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1284
1285                 /* Set up the input context flags for the command */
1286                 /* FIXME: This won't work if a non-default control endpoint
1287                  * changes max packet sizes.
1288                  */
1289                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1290                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1291                 ctrl_ctx->drop_flags = 0;
1292
1293                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1294                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1295                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1296                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1297
1298                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1299                                 true, false);
1300
1301                 /* Clean up the input context for later use by bandwidth
1302                  * functions.
1303                  */
1304                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1305         }
1306         return ret;
1307 }
1308
1309 /*
1310  * non-error returns are a promise to giveback() the urb later
1311  * we drop ownership so next owner (or urb unlink) can get it
1312  */
1313 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1314 {
1315         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1316         struct xhci_td *buffer;
1317         unsigned long flags;
1318         int ret = 0;
1319         unsigned int slot_id, ep_index;
1320         struct urb_priv *urb_priv;
1321         int size, i;
1322
1323         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1324                                         true, true, __func__) <= 0)
1325                 return -EINVAL;
1326
1327         slot_id = urb->dev->slot_id;
1328         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1329
1330         if (!HCD_HW_ACCESSIBLE(hcd)) {
1331                 if (!in_interrupt())
1332                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1333                 ret = -ESHUTDOWN;
1334                 goto exit;
1335         }
1336
1337         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1338                 size = urb->number_of_packets;
1339         else
1340                 size = 1;
1341
1342         urb_priv = kzalloc(sizeof(struct urb_priv) +
1343                                   size * sizeof(struct xhci_td *), mem_flags);
1344         if (!urb_priv)
1345                 return -ENOMEM;
1346
1347         buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1348         if (!buffer) {
1349                 kfree(urb_priv);
1350                 return -ENOMEM;
1351         }
1352
1353         for (i = 0; i < size; i++) {
1354                 urb_priv->td[i] = buffer;
1355                 buffer++;
1356         }
1357
1358         urb_priv->length = size;
1359         urb_priv->td_cnt = 0;
1360         urb->hcpriv = urb_priv;
1361
1362         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1363                 /* Check to see if the max packet size for the default control
1364                  * endpoint changed during FS device enumeration
1365                  */
1366                 if (urb->dev->speed == USB_SPEED_FULL) {
1367                         ret = xhci_check_maxpacket(xhci, slot_id,
1368                                         ep_index, urb);
1369                         if (ret < 0) {
1370                                 xhci_urb_free_priv(xhci, urb_priv);
1371                                 urb->hcpriv = NULL;
1372                                 return ret;
1373                         }
1374                 }
1375
1376                 /* We have a spinlock and interrupts disabled, so we must pass
1377                  * atomic context to this function, which may allocate memory.
1378                  */
1379                 spin_lock_irqsave(&xhci->lock, flags);
1380                 if (xhci->xhc_state & XHCI_STATE_DYING)
1381                         goto dying;
1382                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1383                                 slot_id, ep_index);
1384                 if (ret)
1385                         goto free_priv;
1386                 spin_unlock_irqrestore(&xhci->lock, flags);
1387         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1388                 spin_lock_irqsave(&xhci->lock, flags);
1389                 if (xhci->xhc_state & XHCI_STATE_DYING)
1390                         goto dying;
1391                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1392                                 EP_GETTING_STREAMS) {
1393                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1394                                         "is transitioning to using streams.\n");
1395                         ret = -EINVAL;
1396                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1397                                 EP_GETTING_NO_STREAMS) {
1398                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1399                                         "is transitioning to "
1400                                         "not having streams.\n");
1401                         ret = -EINVAL;
1402                 } else {
1403                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1404                                         slot_id, ep_index);
1405                 }
1406                 if (ret)
1407                         goto free_priv;
1408                 spin_unlock_irqrestore(&xhci->lock, flags);
1409         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1410                 spin_lock_irqsave(&xhci->lock, flags);
1411                 if (xhci->xhc_state & XHCI_STATE_DYING)
1412                         goto dying;
1413                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1414                                 slot_id, ep_index);
1415                 if (ret)
1416                         goto free_priv;
1417                 spin_unlock_irqrestore(&xhci->lock, flags);
1418         } else {
1419                 spin_lock_irqsave(&xhci->lock, flags);
1420                 if (xhci->xhc_state & XHCI_STATE_DYING)
1421                         goto dying;
1422                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1423                                 slot_id, ep_index);
1424                 if (ret)
1425                         goto free_priv;
1426                 spin_unlock_irqrestore(&xhci->lock, flags);
1427         }
1428 exit:
1429         return ret;
1430 dying:
1431         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1432                         "non-responsive xHCI host.\n",
1433                         urb->ep->desc.bEndpointAddress, urb);
1434         ret = -ESHUTDOWN;
1435 free_priv:
1436         xhci_urb_free_priv(xhci, urb_priv);
1437         urb->hcpriv = NULL;
1438         spin_unlock_irqrestore(&xhci->lock, flags);
1439         return ret;
1440 }
1441
1442 /* Get the right ring for the given URB.
1443  * If the endpoint supports streams, boundary check the URB's stream ID.
1444  * If the endpoint doesn't support streams, return the singular endpoint ring.
1445  */
1446 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1447                 struct urb *urb)
1448 {
1449         unsigned int slot_id;
1450         unsigned int ep_index;
1451         unsigned int stream_id;
1452         struct xhci_virt_ep *ep;
1453
1454         slot_id = urb->dev->slot_id;
1455         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1456         stream_id = urb->stream_id;
1457         ep = &xhci->devs[slot_id]->eps[ep_index];
1458         /* Common case: no streams */
1459         if (!(ep->ep_state & EP_HAS_STREAMS))
1460                 return ep->ring;
1461
1462         if (stream_id == 0) {
1463                 xhci_warn(xhci,
1464                                 "WARN: Slot ID %u, ep index %u has streams, "
1465                                 "but URB has no stream ID.\n",
1466                                 slot_id, ep_index);
1467                 return NULL;
1468         }
1469
1470         if (stream_id < ep->stream_info->num_streams)
1471                 return ep->stream_info->stream_rings[stream_id];
1472
1473         xhci_warn(xhci,
1474                         "WARN: Slot ID %u, ep index %u has "
1475                         "stream IDs 1 to %u allocated, "
1476                         "but stream ID %u is requested.\n",
1477                         slot_id, ep_index,
1478                         ep->stream_info->num_streams - 1,
1479                         stream_id);
1480         return NULL;
1481 }
1482
1483 /*
1484  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1485  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1486  * should pick up where it left off in the TD, unless a Set Transfer Ring
1487  * Dequeue Pointer is issued.
1488  *
1489  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1490  * the ring.  Since the ring is a contiguous structure, they can't be physically
1491  * removed.  Instead, there are two options:
1492  *
1493  *  1) If the HC is in the middle of processing the URB to be canceled, we
1494  *     simply move the ring's dequeue pointer past those TRBs using the Set
1495  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1496  *     when drivers timeout on the last submitted URB and attempt to cancel.
1497  *
1498  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1499  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1500  *     HC will need to invalidate the any TRBs it has cached after the stop
1501  *     endpoint command, as noted in the xHCI 0.95 errata.
1502  *
1503  *  3) The TD may have completed by the time the Stop Endpoint Command
1504  *     completes, so software needs to handle that case too.
1505  *
1506  * This function should protect against the TD enqueueing code ringing the
1507  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1508  * It also needs to account for multiple cancellations on happening at the same
1509  * time for the same endpoint.
1510  *
1511  * Note that this function can be called in any context, or so says
1512  * usb_hcd_unlink_urb()
1513  */
1514 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1515 {
1516         unsigned long flags;
1517         int ret, i;
1518         u32 temp;
1519         struct xhci_hcd *xhci;
1520         struct urb_priv *urb_priv;
1521         struct xhci_td *td;
1522         unsigned int ep_index;
1523         struct xhci_ring *ep_ring;
1524         struct xhci_virt_ep *ep;
1525
1526         xhci = hcd_to_xhci(hcd);
1527         spin_lock_irqsave(&xhci->lock, flags);
1528         /* Make sure the URB hasn't completed or been unlinked already */
1529         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1530         if (ret || !urb->hcpriv)
1531                 goto done;
1532         temp = xhci_readl(xhci, &xhci->op_regs->status);
1533         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1534                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1535                 urb_priv = urb->hcpriv;
1536                 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1537                         td = urb_priv->td[i];
1538                         if (!list_empty(&td->td_list))
1539                                 list_del_init(&td->td_list);
1540                         if (!list_empty(&td->cancelled_td_list))
1541                                 list_del_init(&td->cancelled_td_list);
1542                 }
1543
1544                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1545                 spin_unlock_irqrestore(&xhci->lock, flags);
1546                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1547                 xhci_urb_free_priv(xhci, urb_priv);
1548                 return ret;
1549         }
1550         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1551                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1552                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1553                                 "non-responsive xHCI host.\n",
1554                                 urb->ep->desc.bEndpointAddress, urb);
1555                 /* Let the stop endpoint command watchdog timer (which set this
1556                  * state) finish cleaning up the endpoint TD lists.  We must
1557                  * have caught it in the middle of dropping a lock and giving
1558                  * back an URB.
1559                  */
1560                 goto done;
1561         }
1562
1563         xhci_dbg(xhci, "Cancel URB %p\n", urb);
1564         xhci_dbg(xhci, "Event ring:\n");
1565         xhci_debug_ring(xhci, xhci->event_ring);
1566         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1567         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1568         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1569         if (!ep_ring) {
1570                 ret = -EINVAL;
1571                 goto done;
1572         }
1573
1574         xhci_dbg(xhci, "Endpoint ring:\n");
1575         xhci_debug_ring(xhci, ep_ring);
1576
1577         urb_priv = urb->hcpriv;
1578
1579         for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1580                 td = urb_priv->td[i];
1581                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1582         }
1583
1584         /* Queue a stop endpoint command, but only if this is
1585          * the first cancellation to be handled.
1586          */
1587         if (!(ep->ep_state & EP_HALT_PENDING)) {
1588                 ep->ep_state |= EP_HALT_PENDING;
1589                 ep->stop_cmds_pending++;
1590                 ep->stop_cmd_timer.expires = jiffies +
1591                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1592                 add_timer(&ep->stop_cmd_timer);
1593                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1594                 xhci_ring_cmd_db(xhci);
1595         }
1596 done:
1597         spin_unlock_irqrestore(&xhci->lock, flags);
1598         return ret;
1599 }
1600
1601 /* Drop an endpoint from a new bandwidth configuration for this device.
1602  * Only one call to this function is allowed per endpoint before
1603  * check_bandwidth() or reset_bandwidth() must be called.
1604  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1605  * add the endpoint to the schedule with possibly new parameters denoted by a
1606  * different endpoint descriptor in usb_host_endpoint.
1607  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1608  * not allowed.
1609  *
1610  * The USB core will not allow URBs to be queued to an endpoint that is being
1611  * disabled, so there's no need for mutual exclusion to protect
1612  * the xhci->devs[slot_id] structure.
1613  */
1614 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1615                 struct usb_host_endpoint *ep)
1616 {
1617         struct xhci_hcd *xhci;
1618         struct xhci_container_ctx *in_ctx, *out_ctx;
1619         struct xhci_input_control_ctx *ctrl_ctx;
1620         struct xhci_slot_ctx *slot_ctx;
1621         unsigned int last_ctx;
1622         unsigned int ep_index;
1623         struct xhci_ep_ctx *ep_ctx;
1624         u32 drop_flag;
1625         u32 new_add_flags, new_drop_flags, new_slot_info;
1626         int ret;
1627
1628         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1629         if (ret <= 0)
1630                 return ret;
1631         xhci = hcd_to_xhci(hcd);
1632         if (xhci->xhc_state & XHCI_STATE_DYING)
1633                 return -ENODEV;
1634
1635         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1636         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1637         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1638                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1639                                 __func__, drop_flag);
1640                 return 0;
1641         }
1642
1643         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1644         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1645         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1646         ep_index = xhci_get_endpoint_index(&ep->desc);
1647         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1648         /* If the HC already knows the endpoint is disabled,
1649          * or the HCD has noted it is disabled, ignore this request
1650          */
1651         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1652              cpu_to_le32(EP_STATE_DISABLED)) ||
1653             le32_to_cpu(ctrl_ctx->drop_flags) &
1654             xhci_get_endpoint_flag(&ep->desc)) {
1655                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1656                                 __func__, ep);
1657                 return 0;
1658         }
1659
1660         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1661         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1662
1663         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1664         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1665
1666         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1667         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1668         /* Update the last valid endpoint context, if we deleted the last one */
1669         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1670             LAST_CTX(last_ctx)) {
1671                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1672                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1673         }
1674         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1675
1676         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1677
1678         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1679                         (unsigned int) ep->desc.bEndpointAddress,
1680                         udev->slot_id,
1681                         (unsigned int) new_drop_flags,
1682                         (unsigned int) new_add_flags,
1683                         (unsigned int) new_slot_info);
1684         return 0;
1685 }
1686
1687 /* Add an endpoint to a new possible bandwidth configuration for this device.
1688  * Only one call to this function is allowed per endpoint before
1689  * check_bandwidth() or reset_bandwidth() must be called.
1690  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1691  * add the endpoint to the schedule with possibly new parameters denoted by a
1692  * different endpoint descriptor in usb_host_endpoint.
1693  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1694  * not allowed.
1695  *
1696  * The USB core will not allow URBs to be queued to an endpoint until the
1697  * configuration or alt setting is installed in the device, so there's no need
1698  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1699  */
1700 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1701                 struct usb_host_endpoint *ep)
1702 {
1703         struct xhci_hcd *xhci;
1704         struct xhci_container_ctx *in_ctx, *out_ctx;
1705         unsigned int ep_index;
1706         struct xhci_ep_ctx *ep_ctx;
1707         struct xhci_slot_ctx *slot_ctx;
1708         struct xhci_input_control_ctx *ctrl_ctx;
1709         u32 added_ctxs;
1710         unsigned int last_ctx;
1711         u32 new_add_flags, new_drop_flags, new_slot_info;
1712         struct xhci_virt_device *virt_dev;
1713         int ret = 0;
1714
1715         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1716         if (ret <= 0) {
1717                 /* So we won't queue a reset ep command for a root hub */
1718                 ep->hcpriv = NULL;
1719                 return ret;
1720         }
1721         xhci = hcd_to_xhci(hcd);
1722         if (xhci->xhc_state & XHCI_STATE_DYING)
1723                 return -ENODEV;
1724
1725         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1726         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1727         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1728                 /* FIXME when we have to issue an evaluate endpoint command to
1729                  * deal with ep0 max packet size changing once we get the
1730                  * descriptors
1731                  */
1732                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1733                                 __func__, added_ctxs);
1734                 return 0;
1735         }
1736
1737         virt_dev = xhci->devs[udev->slot_id];
1738         in_ctx = virt_dev->in_ctx;
1739         out_ctx = virt_dev->out_ctx;
1740         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1741         ep_index = xhci_get_endpoint_index(&ep->desc);
1742         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1743
1744         /* If this endpoint is already in use, and the upper layers are trying
1745          * to add it again without dropping it, reject the addition.
1746          */
1747         if (virt_dev->eps[ep_index].ring &&
1748                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1749                                 xhci_get_endpoint_flag(&ep->desc))) {
1750                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1751                                 "without dropping it.\n",
1752                                 (unsigned int) ep->desc.bEndpointAddress);
1753                 return -EINVAL;
1754         }
1755
1756         /* If the HCD has already noted the endpoint is enabled,
1757          * ignore this request.
1758          */
1759         if (le32_to_cpu(ctrl_ctx->add_flags) &
1760             xhci_get_endpoint_flag(&ep->desc)) {
1761                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1762                                 __func__, ep);
1763                 return 0;
1764         }
1765
1766         /*
1767          * Configuration and alternate setting changes must be done in
1768          * process context, not interrupt context (or so documenation
1769          * for usb_set_interface() and usb_set_configuration() claim).
1770          */
1771         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1772                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1773                                 __func__, ep->desc.bEndpointAddress);
1774                 return -ENOMEM;
1775         }
1776
1777         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1778         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1779
1780         /* If xhci_endpoint_disable() was called for this endpoint, but the
1781          * xHC hasn't been notified yet through the check_bandwidth() call,
1782          * this re-adds a new state for the endpoint from the new endpoint
1783          * descriptors.  We must drop and re-add this endpoint, so we leave the
1784          * drop flags alone.
1785          */
1786         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1787
1788         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1789         /* Update the last valid endpoint context, if we just added one past */
1790         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1791             LAST_CTX(last_ctx)) {
1792                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1793                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1794         }
1795         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1796
1797         /* Store the usb_device pointer for later use */
1798         ep->hcpriv = udev;
1799
1800         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1801                         (unsigned int) ep->desc.bEndpointAddress,
1802                         udev->slot_id,
1803                         (unsigned int) new_drop_flags,
1804                         (unsigned int) new_add_flags,
1805                         (unsigned int) new_slot_info);
1806         return 0;
1807 }
1808
1809 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1810 {
1811         struct xhci_input_control_ctx *ctrl_ctx;
1812         struct xhci_ep_ctx *ep_ctx;
1813         struct xhci_slot_ctx *slot_ctx;
1814         int i;
1815
1816         /* When a device's add flag and drop flag are zero, any subsequent
1817          * configure endpoint command will leave that endpoint's state
1818          * untouched.  Make sure we don't leave any old state in the input
1819          * endpoint contexts.
1820          */
1821         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1822         ctrl_ctx->drop_flags = 0;
1823         ctrl_ctx->add_flags = 0;
1824         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1825         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1826         /* Endpoint 0 is always valid */
1827         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1828         for (i = 1; i < 31; ++i) {
1829                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1830                 ep_ctx->ep_info = 0;
1831                 ep_ctx->ep_info2 = 0;
1832                 ep_ctx->deq = 0;
1833                 ep_ctx->tx_info = 0;
1834         }
1835 }
1836
1837 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1838                 struct usb_device *udev, u32 *cmd_status)
1839 {
1840         int ret;
1841
1842         switch (*cmd_status) {
1843         case COMP_ENOMEM:
1844                 dev_warn(&udev->dev, "Not enough host controller resources "
1845                                 "for new device state.\n");
1846                 ret = -ENOMEM;
1847                 /* FIXME: can we allocate more resources for the HC? */
1848                 break;
1849         case COMP_BW_ERR:
1850         case COMP_2ND_BW_ERR:
1851                 dev_warn(&udev->dev, "Not enough bandwidth "
1852                                 "for new device state.\n");
1853                 ret = -ENOSPC;
1854                 /* FIXME: can we go back to the old state? */
1855                 break;
1856         case COMP_TRB_ERR:
1857                 /* the HCD set up something wrong */
1858                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1859                                 "add flag = 1, "
1860                                 "and endpoint is not disabled.\n");
1861                 ret = -EINVAL;
1862                 break;
1863         case COMP_DEV_ERR:
1864                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1865                                 "configure command.\n");
1866                 ret = -ENODEV;
1867                 break;
1868         case COMP_SUCCESS:
1869                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1870                 ret = 0;
1871                 break;
1872         default:
1873                 xhci_err(xhci, "ERROR: unexpected command completion "
1874                                 "code 0x%x.\n", *cmd_status);
1875                 ret = -EINVAL;
1876                 break;
1877         }
1878         return ret;
1879 }
1880
1881 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1882                 struct usb_device *udev, u32 *cmd_status)
1883 {
1884         int ret;
1885         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1886
1887         switch (*cmd_status) {
1888         case COMP_EINVAL:
1889                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1890                                 "context command.\n");
1891                 ret = -EINVAL;
1892                 break;
1893         case COMP_EBADSLT:
1894                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1895                                 "evaluate context command.\n");
1896         case COMP_CTX_STATE:
1897                 dev_warn(&udev->dev, "WARN: invalid context state for "
1898                                 "evaluate context command.\n");
1899                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1900                 ret = -EINVAL;
1901                 break;
1902         case COMP_DEV_ERR:
1903                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1904                                 "context command.\n");
1905                 ret = -ENODEV;
1906                 break;
1907         case COMP_MEL_ERR:
1908                 /* Max Exit Latency too large error */
1909                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1910                 ret = -EINVAL;
1911                 break;
1912         case COMP_SUCCESS:
1913                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1914                 ret = 0;
1915                 break;
1916         default:
1917                 xhci_err(xhci, "ERROR: unexpected command completion "
1918                                 "code 0x%x.\n", *cmd_status);
1919                 ret = -EINVAL;
1920                 break;
1921         }
1922         return ret;
1923 }
1924
1925 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1926                 struct xhci_container_ctx *in_ctx)
1927 {
1928         struct xhci_input_control_ctx *ctrl_ctx;
1929         u32 valid_add_flags;
1930         u32 valid_drop_flags;
1931
1932         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1933         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1934          * (bit 1).  The default control endpoint is added during the Address
1935          * Device command and is never removed until the slot is disabled.
1936          */
1937         valid_add_flags = ctrl_ctx->add_flags >> 2;
1938         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1939
1940         /* Use hweight32 to count the number of ones in the add flags, or
1941          * number of endpoints added.  Don't count endpoints that are changed
1942          * (both added and dropped).
1943          */
1944         return hweight32(valid_add_flags) -
1945                 hweight32(valid_add_flags & valid_drop_flags);
1946 }
1947
1948 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1949                 struct xhci_container_ctx *in_ctx)
1950 {
1951         struct xhci_input_control_ctx *ctrl_ctx;
1952         u32 valid_add_flags;
1953         u32 valid_drop_flags;
1954
1955         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1956         valid_add_flags = ctrl_ctx->add_flags >> 2;
1957         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1958
1959         return hweight32(valid_drop_flags) -
1960                 hweight32(valid_add_flags & valid_drop_flags);
1961 }
1962
1963 /*
1964  * We need to reserve the new number of endpoints before the configure endpoint
1965  * command completes.  We can't subtract the dropped endpoints from the number
1966  * of active endpoints until the command completes because we can oversubscribe
1967  * the host in this case:
1968  *
1969  *  - the first configure endpoint command drops more endpoints than it adds
1970  *  - a second configure endpoint command that adds more endpoints is queued
1971  *  - the first configure endpoint command fails, so the config is unchanged
1972  *  - the second command may succeed, even though there isn't enough resources
1973  *
1974  * Must be called with xhci->lock held.
1975  */
1976 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1977                 struct xhci_container_ctx *in_ctx)
1978 {
1979         u32 added_eps;
1980
1981         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1982         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1983                 xhci_dbg(xhci, "Not enough ep ctxs: "
1984                                 "%u active, need to add %u, limit is %u.\n",
1985                                 xhci->num_active_eps, added_eps,
1986                                 xhci->limit_active_eps);
1987                 return -ENOMEM;
1988         }
1989         xhci->num_active_eps += added_eps;
1990         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1991                         xhci->num_active_eps);
1992         return 0;
1993 }
1994
1995 /*
1996  * The configure endpoint was failed by the xHC for some other reason, so we
1997  * need to revert the resources that failed configuration would have used.
1998  *
1999  * Must be called with xhci->lock held.
2000  */
2001 static void xhci_free_host_resources(struct xhci_hcd *xhci,
2002                 struct xhci_container_ctx *in_ctx)
2003 {
2004         u32 num_failed_eps;
2005
2006         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
2007         xhci->num_active_eps -= num_failed_eps;
2008         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
2009                         num_failed_eps,
2010                         xhci->num_active_eps);
2011 }
2012
2013 /*
2014  * Now that the command has completed, clean up the active endpoint count by
2015  * subtracting out the endpoints that were dropped (but not changed).
2016  *
2017  * Must be called with xhci->lock held.
2018  */
2019 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2020                 struct xhci_container_ctx *in_ctx)
2021 {
2022         u32 num_dropped_eps;
2023
2024         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
2025         xhci->num_active_eps -= num_dropped_eps;
2026         if (num_dropped_eps)
2027                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
2028                                 num_dropped_eps,
2029                                 xhci->num_active_eps);
2030 }
2031
2032 unsigned int xhci_get_block_size(struct usb_device *udev)
2033 {
2034         switch (udev->speed) {
2035         case USB_SPEED_LOW:
2036         case USB_SPEED_FULL:
2037                 return FS_BLOCK;
2038         case USB_SPEED_HIGH:
2039                 return HS_BLOCK;
2040         case USB_SPEED_SUPER:
2041                 return SS_BLOCK;
2042         case USB_SPEED_UNKNOWN:
2043         case USB_SPEED_WIRELESS:
2044         default:
2045                 /* Should never happen */
2046                 return 1;
2047         }
2048 }
2049
2050 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2051 {
2052         if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2053                 return LS_OVERHEAD;
2054         if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2055                 return FS_OVERHEAD;
2056         return HS_OVERHEAD;
2057 }
2058
2059 /* If we are changing a LS/FS device under a HS hub,
2060  * make sure (if we are activating a new TT) that the HS bus has enough
2061  * bandwidth for this new TT.
2062  */
2063 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2064                 struct xhci_virt_device *virt_dev,
2065                 int old_active_eps)
2066 {
2067         struct xhci_interval_bw_table *bw_table;
2068         struct xhci_tt_bw_info *tt_info;
2069
2070         /* Find the bandwidth table for the root port this TT is attached to. */
2071         bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2072         tt_info = virt_dev->tt_info;
2073         /* If this TT already had active endpoints, the bandwidth for this TT
2074          * has already been added.  Removing all periodic endpoints (and thus
2075          * making the TT enactive) will only decrease the bandwidth used.
2076          */
2077         if (old_active_eps)
2078                 return 0;
2079         if (old_active_eps == 0 && tt_info->active_eps != 0) {
2080                 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2081                         return -ENOMEM;
2082                 return 0;
2083         }
2084         /* Not sure why we would have no new active endpoints...
2085          *
2086          * Maybe because of an Evaluate Context change for a hub update or a
2087          * control endpoint 0 max packet size change?
2088          * FIXME: skip the bandwidth calculation in that case.
2089          */
2090         return 0;
2091 }
2092
2093 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2094                 struct xhci_virt_device *virt_dev)
2095 {
2096         unsigned int bw_reserved;
2097
2098         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2099         if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2100                 return -ENOMEM;
2101
2102         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2103         if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2104                 return -ENOMEM;
2105
2106         return 0;
2107 }
2108
2109 /*
2110  * This algorithm is a very conservative estimate of the worst-case scheduling
2111  * scenario for any one interval.  The hardware dynamically schedules the
2112  * packets, so we can't tell which microframe could be the limiting factor in
2113  * the bandwidth scheduling.  This only takes into account periodic endpoints.
2114  *
2115  * Obviously, we can't solve an NP complete problem to find the minimum worst
2116  * case scenario.  Instead, we come up with an estimate that is no less than
2117  * the worst case bandwidth used for any one microframe, but may be an
2118  * over-estimate.
2119  *
2120  * We walk the requirements for each endpoint by interval, starting with the
2121  * smallest interval, and place packets in the schedule where there is only one
2122  * possible way to schedule packets for that interval.  In order to simplify
2123  * this algorithm, we record the largest max packet size for each interval, and
2124  * assume all packets will be that size.
2125  *
2126  * For interval 0, we obviously must schedule all packets for each interval.
2127  * The bandwidth for interval 0 is just the amount of data to be transmitted
2128  * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2129  * the number of packets).
2130  *
2131  * For interval 1, we have two possible microframes to schedule those packets
2132  * in.  For this algorithm, if we can schedule the same number of packets for
2133  * each possible scheduling opportunity (each microframe), we will do so.  The
2134  * remaining number of packets will be saved to be transmitted in the gaps in
2135  * the next interval's scheduling sequence.
2136  *
2137  * As we move those remaining packets to be scheduled with interval 2 packets,
2138  * we have to double the number of remaining packets to transmit.  This is
2139  * because the intervals are actually powers of 2, and we would be transmitting
2140  * the previous interval's packets twice in this interval.  We also have to be
2141  * sure that when we look at the largest max packet size for this interval, we
2142  * also look at the largest max packet size for the remaining packets and take
2143  * the greater of the two.
2144  *
2145  * The algorithm continues to evenly distribute packets in each scheduling
2146  * opportunity, and push the remaining packets out, until we get to the last
2147  * interval.  Then those packets and their associated overhead are just added
2148  * to the bandwidth used.
2149  */
2150 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2151                 struct xhci_virt_device *virt_dev,
2152                 int old_active_eps)
2153 {
2154         unsigned int bw_reserved;
2155         unsigned int max_bandwidth;
2156         unsigned int bw_used;
2157         unsigned int block_size;
2158         struct xhci_interval_bw_table *bw_table;
2159         unsigned int packet_size = 0;
2160         unsigned int overhead = 0;
2161         unsigned int packets_transmitted = 0;
2162         unsigned int packets_remaining = 0;
2163         unsigned int i;
2164
2165         if (virt_dev->udev->speed == USB_SPEED_SUPER)
2166                 return xhci_check_ss_bw(xhci, virt_dev);
2167
2168         if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2169                 max_bandwidth = HS_BW_LIMIT;
2170                 /* Convert percent of bus BW reserved to blocks reserved */
2171                 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2172         } else {
2173                 max_bandwidth = FS_BW_LIMIT;
2174                 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2175         }
2176
2177         bw_table = virt_dev->bw_table;
2178         /* We need to translate the max packet size and max ESIT payloads into
2179          * the units the hardware uses.
2180          */
2181         block_size = xhci_get_block_size(virt_dev->udev);
2182
2183         /* If we are manipulating a LS/FS device under a HS hub, double check
2184          * that the HS bus has enough bandwidth if we are activing a new TT.
2185          */
2186         if (virt_dev->tt_info) {
2187                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2188                                 virt_dev->real_port);
2189                 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2190                         xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2191                                         "newly activated TT.\n");
2192                         return -ENOMEM;
2193                 }
2194                 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
2195                                 virt_dev->tt_info->slot_id,
2196                                 virt_dev->tt_info->ttport);
2197         } else {
2198                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2199                                 virt_dev->real_port);
2200         }
2201
2202         /* Add in how much bandwidth will be used for interval zero, or the
2203          * rounded max ESIT payload + number of packets * largest overhead.
2204          */
2205         bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2206                 bw_table->interval_bw[0].num_packets *
2207                 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2208
2209         for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2210                 unsigned int bw_added;
2211                 unsigned int largest_mps;
2212                 unsigned int interval_overhead;
2213
2214                 /*
2215                  * How many packets could we transmit in this interval?
2216                  * If packets didn't fit in the previous interval, we will need
2217                  * to transmit that many packets twice within this interval.
2218                  */
2219                 packets_remaining = 2 * packets_remaining +
2220                         bw_table->interval_bw[i].num_packets;
2221
2222                 /* Find the largest max packet size of this or the previous
2223                  * interval.
2224                  */
2225                 if (list_empty(&bw_table->interval_bw[i].endpoints))
2226                         largest_mps = 0;
2227                 else {
2228                         struct xhci_virt_ep *virt_ep;
2229                         struct list_head *ep_entry;
2230
2231                         ep_entry = bw_table->interval_bw[i].endpoints.next;
2232                         virt_ep = list_entry(ep_entry,
2233                                         struct xhci_virt_ep, bw_endpoint_list);
2234                         /* Convert to blocks, rounding up */
2235                         largest_mps = DIV_ROUND_UP(
2236                                         virt_ep->bw_info.max_packet_size,
2237                                         block_size);
2238                 }
2239                 if (largest_mps > packet_size)
2240                         packet_size = largest_mps;
2241
2242                 /* Use the larger overhead of this or the previous interval. */
2243                 interval_overhead = xhci_get_largest_overhead(
2244                                 &bw_table->interval_bw[i]);
2245                 if (interval_overhead > overhead)
2246                         overhead = interval_overhead;
2247
2248                 /* How many packets can we evenly distribute across
2249                  * (1 << (i + 1)) possible scheduling opportunities?
2250                  */
2251                 packets_transmitted = packets_remaining >> (i + 1);
2252
2253                 /* Add in the bandwidth used for those scheduled packets */
2254                 bw_added = packets_transmitted * (overhead + packet_size);
2255
2256                 /* How many packets do we have remaining to transmit? */
2257                 packets_remaining = packets_remaining % (1 << (i + 1));
2258
2259                 /* What largest max packet size should those packets have? */
2260                 /* If we've transmitted all packets, don't carry over the
2261                  * largest packet size.
2262                  */
2263                 if (packets_remaining == 0) {
2264                         packet_size = 0;
2265                         overhead = 0;
2266                 } else if (packets_transmitted > 0) {
2267                         /* Otherwise if we do have remaining packets, and we've
2268                          * scheduled some packets in this interval, take the
2269                          * largest max packet size from endpoints with this
2270                          * interval.
2271                          */
2272                         packet_size = largest_mps;
2273                         overhead = interval_overhead;
2274                 }
2275                 /* Otherwise carry over packet_size and overhead from the last
2276                  * time we had a remainder.
2277                  */
2278                 bw_used += bw_added;
2279                 if (bw_used > max_bandwidth) {
2280                         xhci_warn(xhci, "Not enough bandwidth. "
2281                                         "Proposed: %u, Max: %u\n",
2282                                 bw_used, max_bandwidth);
2283                         return -ENOMEM;
2284                 }
2285         }
2286         /*
2287          * Ok, we know we have some packets left over after even-handedly
2288          * scheduling interval 15.  We don't know which microframes they will
2289          * fit into, so we over-schedule and say they will be scheduled every
2290          * microframe.
2291          */
2292         if (packets_remaining > 0)
2293                 bw_used += overhead + packet_size;
2294
2295         if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2296                 unsigned int port_index = virt_dev->real_port - 1;
2297
2298                 /* OK, we're manipulating a HS device attached to a
2299                  * root port bandwidth domain.  Include the number of active TTs
2300                  * in the bandwidth used.
2301                  */
2302                 bw_used += TT_HS_OVERHEAD *
2303                         xhci->rh_bw[port_index].num_active_tts;
2304         }
2305
2306         xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2307                 "Available: %u " "percent\n",
2308                 bw_used, max_bandwidth, bw_reserved,
2309                 (max_bandwidth - bw_used - bw_reserved) * 100 /
2310                 max_bandwidth);
2311
2312         bw_used += bw_reserved;
2313         if (bw_used > max_bandwidth) {
2314                 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2315                                 bw_used, max_bandwidth);
2316                 return -ENOMEM;
2317         }
2318
2319         bw_table->bw_used = bw_used;
2320         return 0;
2321 }
2322
2323 static bool xhci_is_async_ep(unsigned int ep_type)
2324 {
2325         return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2326                                         ep_type != ISOC_IN_EP &&
2327                                         ep_type != INT_IN_EP);
2328 }
2329
2330 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2331 {
2332         return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2333 }
2334
2335 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2336 {
2337         unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2338
2339         if (ep_bw->ep_interval == 0)
2340                 return SS_OVERHEAD_BURST +
2341                         (ep_bw->mult * ep_bw->num_packets *
2342                                         (SS_OVERHEAD + mps));
2343         return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2344                                 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2345                                 1 << ep_bw->ep_interval);
2346
2347 }
2348
2349 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2350                 struct xhci_bw_info *ep_bw,
2351                 struct xhci_interval_bw_table *bw_table,
2352                 struct usb_device *udev,
2353                 struct xhci_virt_ep *virt_ep,
2354                 struct xhci_tt_bw_info *tt_info)
2355 {
2356         struct xhci_interval_bw *interval_bw;
2357         int normalized_interval;
2358
2359         if (xhci_is_async_ep(ep_bw->type))
2360                 return;
2361
2362         if (udev->speed == USB_SPEED_SUPER) {
2363                 if (xhci_is_sync_in_ep(ep_bw->type))
2364                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2365                                 xhci_get_ss_bw_consumed(ep_bw);
2366                 else
2367                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2368                                 xhci_get_ss_bw_consumed(ep_bw);
2369                 return;
2370         }
2371
2372         /* SuperSpeed endpoints never get added to intervals in the table, so
2373          * this check is only valid for HS/FS/LS devices.
2374          */
2375         if (list_empty(&virt_ep->bw_endpoint_list))
2376                 return;
2377         /* For LS/FS devices, we need to translate the interval expressed in
2378          * microframes to frames.
2379          */
2380         if (udev->speed == USB_SPEED_HIGH)
2381                 normalized_interval = ep_bw->ep_interval;
2382         else
2383                 normalized_interval = ep_bw->ep_interval - 3;
2384
2385         if (normalized_interval == 0)
2386                 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2387         interval_bw = &bw_table->interval_bw[normalized_interval];
2388         interval_bw->num_packets -= ep_bw->num_packets;
2389         switch (udev->speed) {
2390         case USB_SPEED_LOW:
2391                 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2392                 break;
2393         case USB_SPEED_FULL:
2394                 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2395                 break;
2396         case USB_SPEED_HIGH:
2397                 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2398                 break;
2399         case USB_SPEED_SUPER:
2400         case USB_SPEED_UNKNOWN:
2401         case USB_SPEED_WIRELESS:
2402                 /* Should never happen because only LS/FS/HS endpoints will get
2403                  * added to the endpoint list.
2404                  */
2405                 return;
2406         }
2407         if (tt_info)
2408                 tt_info->active_eps -= 1;
2409         list_del_init(&virt_ep->bw_endpoint_list);
2410 }
2411
2412 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2413                 struct xhci_bw_info *ep_bw,
2414                 struct xhci_interval_bw_table *bw_table,
2415                 struct usb_device *udev,
2416                 struct xhci_virt_ep *virt_ep,
2417                 struct xhci_tt_bw_info *tt_info)
2418 {
2419         struct xhci_interval_bw *interval_bw;
2420         struct xhci_virt_ep *smaller_ep;
2421         int normalized_interval;
2422
2423         if (xhci_is_async_ep(ep_bw->type))
2424                 return;
2425
2426         if (udev->speed == USB_SPEED_SUPER) {
2427                 if (xhci_is_sync_in_ep(ep_bw->type))
2428                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2429                                 xhci_get_ss_bw_consumed(ep_bw);
2430                 else
2431                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2432                                 xhci_get_ss_bw_consumed(ep_bw);
2433                 return;
2434         }
2435
2436         /* For LS/FS devices, we need to translate the interval expressed in
2437          * microframes to frames.
2438          */
2439         if (udev->speed == USB_SPEED_HIGH)
2440                 normalized_interval = ep_bw->ep_interval;
2441         else
2442                 normalized_interval = ep_bw->ep_interval - 3;
2443
2444         if (normalized_interval == 0)
2445                 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2446         interval_bw = &bw_table->interval_bw[normalized_interval];
2447         interval_bw->num_packets += ep_bw->num_packets;
2448         switch (udev->speed) {
2449         case USB_SPEED_LOW:
2450                 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2451                 break;
2452         case USB_SPEED_FULL:
2453                 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2454                 break;
2455         case USB_SPEED_HIGH:
2456                 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2457                 break;
2458         case USB_SPEED_SUPER:
2459         case USB_SPEED_UNKNOWN:
2460         case USB_SPEED_WIRELESS:
2461                 /* Should never happen because only LS/FS/HS endpoints will get
2462                  * added to the endpoint list.
2463                  */
2464                 return;
2465         }
2466
2467         if (tt_info)
2468                 tt_info->active_eps += 1;
2469         /* Insert the endpoint into the list, largest max packet size first. */
2470         list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2471                         bw_endpoint_list) {
2472                 if (ep_bw->max_packet_size >=
2473                                 smaller_ep->bw_info.max_packet_size) {
2474                         /* Add the new ep before the smaller endpoint */
2475                         list_add_tail(&virt_ep->bw_endpoint_list,
2476                                         &smaller_ep->bw_endpoint_list);
2477                         return;
2478                 }
2479         }
2480         /* Add the new endpoint at the end of the list. */
2481         list_add_tail(&virt_ep->bw_endpoint_list,
2482                         &interval_bw->endpoints);
2483 }
2484
2485 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2486                 struct xhci_virt_device *virt_dev,
2487                 int old_active_eps)
2488 {
2489         struct xhci_root_port_bw_info *rh_bw_info;
2490         if (!virt_dev->tt_info)
2491                 return;
2492
2493         rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2494         if (old_active_eps == 0 &&
2495                                 virt_dev->tt_info->active_eps != 0) {
2496                 rh_bw_info->num_active_tts += 1;
2497                 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2498         } else if (old_active_eps != 0 &&
2499                                 virt_dev->tt_info->active_eps == 0) {
2500                 rh_bw_info->num_active_tts -= 1;
2501                 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2502         }
2503 }
2504
2505 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2506                 struct xhci_virt_device *virt_dev,
2507                 struct xhci_container_ctx *in_ctx)
2508 {
2509         struct xhci_bw_info ep_bw_info[31];
2510         int i;
2511         struct xhci_input_control_ctx *ctrl_ctx;
2512         int old_active_eps = 0;
2513
2514         if (virt_dev->tt_info)
2515                 old_active_eps = virt_dev->tt_info->active_eps;
2516
2517         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2518
2519         for (i = 0; i < 31; i++) {
2520                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2521                         continue;
2522
2523                 /* Make a copy of the BW info in case we need to revert this */
2524                 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2525                                 sizeof(ep_bw_info[i]));
2526                 /* Drop the endpoint from the interval table if the endpoint is
2527                  * being dropped or changed.
2528                  */
2529                 if (EP_IS_DROPPED(ctrl_ctx, i))
2530                         xhci_drop_ep_from_interval_table(xhci,
2531                                         &virt_dev->eps[i].bw_info,
2532                                         virt_dev->bw_table,
2533                                         virt_dev->udev,
2534                                         &virt_dev->eps[i],
2535                                         virt_dev->tt_info);
2536         }
2537         /* Overwrite the information stored in the endpoints' bw_info */
2538         xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2539         for (i = 0; i < 31; i++) {
2540                 /* Add any changed or added endpoints to the interval table */
2541                 if (EP_IS_ADDED(ctrl_ctx, i))
2542                         xhci_add_ep_to_interval_table(xhci,
2543                                         &virt_dev->eps[i].bw_info,
2544                                         virt_dev->bw_table,
2545                                         virt_dev->udev,
2546                                         &virt_dev->eps[i],
2547                                         virt_dev->tt_info);
2548         }
2549
2550         if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2551                 /* Ok, this fits in the bandwidth we have.
2552                  * Update the number of active TTs.
2553                  */
2554                 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2555                 return 0;
2556         }
2557
2558         /* We don't have enough bandwidth for this, revert the stored info. */
2559         for (i = 0; i < 31; i++) {
2560                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2561                         continue;
2562
2563                 /* Drop the new copies of any added or changed endpoints from
2564                  * the interval table.
2565                  */
2566                 if (EP_IS_ADDED(ctrl_ctx, i)) {
2567                         xhci_drop_ep_from_interval_table(xhci,
2568                                         &virt_dev->eps[i].bw_info,
2569                                         virt_dev->bw_table,
2570                                         virt_dev->udev,
2571                                         &virt_dev->eps[i],
2572                                         virt_dev->tt_info);
2573                 }
2574                 /* Revert the endpoint back to its old information */
2575                 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2576                                 sizeof(ep_bw_info[i]));
2577                 /* Add any changed or dropped endpoints back into the table */
2578                 if (EP_IS_DROPPED(ctrl_ctx, i))
2579                         xhci_add_ep_to_interval_table(xhci,
2580                                         &virt_dev->eps[i].bw_info,
2581                                         virt_dev->bw_table,
2582                                         virt_dev->udev,
2583                                         &virt_dev->eps[i],
2584                                         virt_dev->tt_info);
2585         }
2586         return -ENOMEM;
2587 }
2588
2589
2590 /* Issue a configure endpoint command or evaluate context command
2591  * and wait for it to finish.
2592  */
2593 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2594                 struct usb_device *udev,
2595                 struct xhci_command *command,
2596                 bool ctx_change, bool must_succeed)
2597 {
2598         int ret;
2599         int timeleft;
2600         unsigned long flags;
2601         struct xhci_container_ctx *in_ctx;
2602         struct completion *cmd_completion;
2603         u32 *cmd_status;
2604         struct xhci_virt_device *virt_dev;
2605         union xhci_trb *cmd_trb;
2606
2607         spin_lock_irqsave(&xhci->lock, flags);
2608         virt_dev = xhci->devs[udev->slot_id];
2609
2610         if (command)
2611                 in_ctx = command->in_ctx;
2612         else
2613                 in_ctx = virt_dev->in_ctx;
2614
2615         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2616                         xhci_reserve_host_resources(xhci, in_ctx)) {
2617                 spin_unlock_irqrestore(&xhci->lock, flags);
2618                 xhci_warn(xhci, "Not enough host resources, "
2619                                 "active endpoint contexts = %u\n",
2620                                 xhci->num_active_eps);
2621                 return -ENOMEM;
2622         }
2623         if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2624                         xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2625                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2626                         xhci_free_host_resources(xhci, in_ctx);
2627                 spin_unlock_irqrestore(&xhci->lock, flags);
2628                 xhci_warn(xhci, "Not enough bandwidth\n");
2629                 return -ENOMEM;
2630         }
2631
2632         if (command) {
2633                 cmd_completion = command->completion;
2634                 cmd_status = &command->status;
2635                 command->command_trb = xhci->cmd_ring->enqueue;
2636
2637                 /* Enqueue pointer can be left pointing to the link TRB,
2638                  * we must handle that
2639                  */
2640                 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2641                         command->command_trb =
2642                                 xhci->cmd_ring->enq_seg->next->trbs;
2643
2644                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2645         } else {
2646                 cmd_completion = &virt_dev->cmd_completion;
2647                 cmd_status = &virt_dev->cmd_status;
2648         }
2649         init_completion(cmd_completion);
2650
2651         cmd_trb = xhci->cmd_ring->dequeue;
2652         if (!ctx_change)
2653                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2654                                 udev->slot_id, must_succeed);
2655         else
2656                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2657                                 udev->slot_id);
2658         if (ret < 0) {
2659                 if (command)
2660                         list_del(&command->cmd_list);
2661                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2662                         xhci_free_host_resources(xhci, in_ctx);
2663                 spin_unlock_irqrestore(&xhci->lock, flags);
2664                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2665                 return -ENOMEM;
2666         }
2667         xhci_ring_cmd_db(xhci);
2668         spin_unlock_irqrestore(&xhci->lock, flags);
2669
2670         /* Wait for the configure endpoint command to complete */
2671         timeleft = wait_for_completion_interruptible_timeout(
2672                         cmd_completion,
2673                         XHCI_CMD_DEFAULT_TIMEOUT);
2674         if (timeleft <= 0) {
2675                 xhci_warn(xhci, "%s while waiting for %s command\n",
2676                                 timeleft == 0 ? "Timeout" : "Signal",
2677                                 ctx_change == 0 ?
2678                                         "configure endpoint" :
2679                                         "evaluate context");
2680                 /* cancel the configure endpoint command */
2681                 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2682                 if (ret < 0)
2683                         return ret;
2684                 return -ETIME;
2685         }
2686
2687         if (!ctx_change)
2688                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2689         else
2690                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2691
2692         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2693                 spin_lock_irqsave(&xhci->lock, flags);
2694                 /* If the command failed, remove the reserved resources.
2695                  * Otherwise, clean up the estimate to include dropped eps.
2696                  */
2697                 if (ret)
2698                         xhci_free_host_resources(xhci, in_ctx);
2699                 else
2700                         xhci_finish_resource_reservation(xhci, in_ctx);
2701                 spin_unlock_irqrestore(&xhci->lock, flags);
2702         }
2703         return ret;
2704 }
2705
2706 /* Called after one or more calls to xhci_add_endpoint() or
2707  * xhci_drop_endpoint().  If this call fails, the USB core is expected
2708  * to call xhci_reset_bandwidth().
2709  *
2710  * Since we are in the middle of changing either configuration or
2711  * installing a new alt setting, the USB core won't allow URBs to be
2712  * enqueued for any endpoint on the old config or interface.  Nothing
2713  * else should be touching the xhci->devs[slot_id] structure, so we
2714  * don't need to take the xhci->lock for manipulating that.
2715  */
2716 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2717 {
2718         int i;
2719         int ret = 0;
2720         struct xhci_hcd *xhci;
2721         struct xhci_virt_device *virt_dev;
2722         struct xhci_input_control_ctx *ctrl_ctx;
2723         struct xhci_slot_ctx *slot_ctx;
2724
2725         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2726         if (ret <= 0)
2727                 return ret;
2728         xhci = hcd_to_xhci(hcd);
2729         if (xhci->xhc_state & XHCI_STATE_DYING)
2730                 return -ENODEV;
2731
2732         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2733         virt_dev = xhci->devs[udev->slot_id];
2734
2735         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2736         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2737         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2738         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2739         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2740
2741         /* Don't issue the command if there's no endpoints to update. */
2742         if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2743                         ctrl_ctx->drop_flags == 0)
2744                 return 0;
2745
2746         xhci_dbg(xhci, "New Input Control Context:\n");
2747         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2748         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2749                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2750
2751         ret = xhci_configure_endpoint(xhci, udev, NULL,
2752                         false, false);
2753         if (ret) {
2754                 /* Callee should call reset_bandwidth() */
2755                 return ret;
2756         }
2757
2758         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2759         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2760                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2761
2762         /* Free any rings that were dropped, but not changed. */
2763         for (i = 1; i < 31; ++i) {
2764                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2765                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2766                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2767         }
2768         xhci_zero_in_ctx(xhci, virt_dev);
2769         /*
2770          * Install any rings for completely new endpoints or changed endpoints,
2771          * and free or cache any old rings from changed endpoints.
2772          */
2773         for (i = 1; i < 31; ++i) {
2774                 if (!virt_dev->eps[i].new_ring)
2775                         continue;
2776                 /* Only cache or free the old ring if it exists.
2777                  * It may not if this is the first add of an endpoint.
2778                  */
2779                 if (virt_dev->eps[i].ring) {
2780                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2781                 }
2782                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2783                 virt_dev->eps[i].new_ring = NULL;
2784         }
2785
2786         return ret;
2787 }
2788
2789 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2790 {
2791         struct xhci_hcd *xhci;
2792         struct xhci_virt_device *virt_dev;
2793         int i, ret;
2794
2795         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2796         if (ret <= 0)
2797                 return;
2798         xhci = hcd_to_xhci(hcd);
2799
2800         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2801         virt_dev = xhci->devs[udev->slot_id];
2802         /* Free any rings allocated for added endpoints */
2803         for (i = 0; i < 31; ++i) {
2804                 if (virt_dev->eps[i].new_ring) {
2805                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2806                         virt_dev->eps[i].new_ring = NULL;
2807                 }
2808         }
2809         xhci_zero_in_ctx(xhci, virt_dev);
2810 }
2811
2812 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2813                 struct xhci_container_ctx *in_ctx,
2814                 struct xhci_container_ctx *out_ctx,
2815                 u32 add_flags, u32 drop_flags)
2816 {
2817         struct xhci_input_control_ctx *ctrl_ctx;
2818         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2819         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2820         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2821         xhci_slot_copy(xhci, in_ctx, out_ctx);
2822         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2823
2824         xhci_dbg(xhci, "Input Context:\n");
2825         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2826 }
2827
2828 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2829                 unsigned int slot_id, unsigned int ep_index,
2830                 struct xhci_dequeue_state *deq_state)
2831 {
2832         struct xhci_container_ctx *in_ctx;
2833         struct xhci_ep_ctx *ep_ctx;
2834         u32 added_ctxs;
2835         dma_addr_t addr;
2836
2837         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2838                         xhci->devs[slot_id]->out_ctx, ep_index);
2839         in_ctx = xhci->devs[slot_id]->in_ctx;
2840         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2841         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2842                         deq_state->new_deq_ptr);
2843         if (addr == 0) {
2844                 xhci_warn(xhci, "WARN Cannot submit config ep after "
2845                                 "reset ep command\n");
2846                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2847                                 deq_state->new_deq_seg,
2848                                 deq_state->new_deq_ptr);
2849                 return;
2850         }
2851         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2852
2853         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2854         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2855                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2856 }
2857
2858 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2859                 struct usb_device *udev, unsigned int ep_index)
2860 {
2861         struct xhci_dequeue_state deq_state;
2862         struct xhci_virt_ep *ep;
2863
2864         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2865         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2866         /* We need to move the HW's dequeue pointer past this TD,
2867          * or it will attempt to resend it on the next doorbell ring.
2868          */
2869         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2870                         ep_index, ep->stopped_stream, ep->stopped_td,
2871                         &deq_state);
2872
2873         if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2874                 return;
2875
2876         /* HW with the reset endpoint quirk will use the saved dequeue state to
2877          * issue a configure endpoint command later.
2878          */
2879         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2880                 xhci_dbg(xhci, "Queueing new dequeue state\n");
2881                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2882                                 ep_index, ep->stopped_stream, &deq_state);
2883         } else {
2884                 /* Better hope no one uses the input context between now and the
2885                  * reset endpoint completion!
2886                  * XXX: No idea how this hardware will react when stream rings
2887                  * are enabled.
2888                  */
2889                 xhci_dbg(xhci, "Setting up input context for "
2890                                 "configure endpoint command\n");
2891                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2892                                 ep_index, &deq_state);
2893         }
2894 }
2895
2896 /* Called when clearing halted device. The core should have sent the control
2897  * message to clear the device halt condition. The host side of the halt should
2898  * already be cleared with a reset endpoint command issued when the STALL tx
2899  * event was received.
2900  *
2901  * Context: in_interrupt
2902  */
2903
2904 void xhci_endpoint_reset(struct usb_hcd *hcd,
2905                 struct usb_host_endpoint *ep)
2906 {
2907         struct xhci_hcd *xhci;
2908
2909         xhci = hcd_to_xhci(hcd);
2910
2911         /*
2912          * We might need to implement the config ep cmd in xhci 4.8.1 note:
2913          * The Reset Endpoint Command may only be issued to endpoints in the
2914          * Halted state. If software wishes reset the Data Toggle or Sequence
2915          * Number of an endpoint that isn't in the Halted state, then software
2916          * may issue a Configure Endpoint Command with the Drop and Add bits set
2917          * for the target endpoint. that is in the Stopped state.
2918          */
2919
2920         /* For now just print debug to follow the situation */
2921         xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
2922                  ep->desc.bEndpointAddress);
2923 }
2924
2925 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2926                 struct usb_device *udev, struct usb_host_endpoint *ep,
2927                 unsigned int slot_id)
2928 {
2929         int ret;
2930         unsigned int ep_index;
2931         unsigned int ep_state;
2932
2933         if (!ep)
2934                 return -EINVAL;
2935         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2936         if (ret <= 0)
2937                 return -EINVAL;
2938         if (ep->ss_ep_comp.bmAttributes == 0) {
2939                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2940                                 " descriptor for ep 0x%x does not support streams\n",
2941                                 ep->desc.bEndpointAddress);
2942                 return -EINVAL;
2943         }
2944
2945         ep_index = xhci_get_endpoint_index(&ep->desc);
2946         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2947         if (ep_state & EP_HAS_STREAMS ||
2948                         ep_state & EP_GETTING_STREAMS) {
2949                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2950                                 "already has streams set up.\n",
2951                                 ep->desc.bEndpointAddress);
2952                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2953                                 "dynamic stream context array reallocation.\n");
2954                 return -EINVAL;
2955         }
2956         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2957                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2958                                 "endpoint 0x%x; URBs are pending.\n",
2959                                 ep->desc.bEndpointAddress);
2960                 return -EINVAL;
2961         }
2962         return 0;
2963 }
2964
2965 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2966                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2967 {
2968         unsigned int max_streams;
2969
2970         /* The stream context array size must be a power of two */
2971         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2972         /*
2973          * Find out how many primary stream array entries the host controller
2974          * supports.  Later we may use secondary stream arrays (similar to 2nd
2975          * level page entries), but that's an optional feature for xHCI host
2976          * controllers. xHCs must support at least 4 stream IDs.
2977          */
2978         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2979         if (*num_stream_ctxs > max_streams) {
2980                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2981                                 max_streams);
2982                 *num_stream_ctxs = max_streams;
2983                 *num_streams = max_streams;
2984         }
2985 }
2986
2987 /* Returns an error code if one of the endpoint already has streams.
2988  * This does not change any data structures, it only checks and gathers
2989  * information.
2990  */
2991 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2992                 struct usb_device *udev,
2993                 struct usb_host_endpoint **eps, unsigned int num_eps,
2994                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2995 {
2996         unsigned int max_streams;
2997         unsigned int endpoint_flag;
2998         int i;
2999         int ret;
3000
3001         for (i = 0; i < num_eps; i++) {
3002                 ret = xhci_check_streams_endpoint(xhci, udev,
3003                                 eps[i], udev->slot_id);
3004                 if (ret < 0)
3005                         return ret;
3006
3007                 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3008                 if (max_streams < (*num_streams - 1)) {
3009                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3010                                         eps[i]->desc.bEndpointAddress,
3011                                         max_streams);
3012                         *num_streams = max_streams+1;
3013                 }
3014
3015                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3016                 if (*changed_ep_bitmask & endpoint_flag)
3017                         return -EINVAL;
3018                 *changed_ep_bitmask |= endpoint_flag;
3019         }
3020         return 0;
3021 }
3022
3023 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3024                 struct usb_device *udev,
3025                 struct usb_host_endpoint **eps, unsigned int num_eps)
3026 {
3027         u32 changed_ep_bitmask = 0;
3028         unsigned int slot_id;
3029         unsigned int ep_index;
3030         unsigned int ep_state;
3031         int i;
3032
3033         slot_id = udev->slot_id;
3034         if (!xhci->devs[slot_id])
3035                 return 0;
3036
3037         for (i = 0; i < num_eps; i++) {
3038                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3039                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3040                 /* Are streams already being freed for the endpoint? */
3041                 if (ep_state & EP_GETTING_NO_STREAMS) {
3042                         xhci_warn(xhci, "WARN Can't disable streams for "
3043                                         "endpoint 0x%x\n, "
3044                                         "streams are being disabled already.",
3045                                         eps[i]->desc.bEndpointAddress);
3046                         return 0;
3047                 }
3048                 /* Are there actually any streams to free? */
3049                 if (!(ep_state & EP_HAS_STREAMS) &&
3050                                 !(ep_state & EP_GETTING_STREAMS)) {
3051                         xhci_warn(xhci, "WARN Can't disable streams for "
3052                                         "endpoint 0x%x\n, "
3053                                         "streams are already disabled!",
3054                                         eps[i]->desc.bEndpointAddress);
3055                         xhci_warn(xhci, "WARN xhci_free_streams() called "
3056                                         "with non-streams endpoint\n");
3057                         return 0;
3058                 }
3059                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3060         }
3061         return changed_ep_bitmask;
3062 }
3063
3064 /*
3065  * The USB device drivers use this function (though the HCD interface in USB
3066  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
3067  * coordinate mass storage command queueing across multiple endpoints (basically
3068  * a stream ID == a task ID).
3069  *
3070  * Setting up streams involves allocating the same size stream context array
3071  * for each endpoint and issuing a configure endpoint command for all endpoints.
3072  *
3073  * Don't allow the call to succeed if one endpoint only supports one stream
3074  * (which means it doesn't support streams at all).
3075  *
3076  * Drivers may get less stream IDs than they asked for, if the host controller
3077  * hardware or endpoints claim they can't support the number of requested
3078  * stream IDs.
3079  */
3080 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3081                 struct usb_host_endpoint **eps, unsigned int num_eps,
3082                 unsigned int num_streams, gfp_t mem_flags)
3083 {
3084         int i, ret;
3085         struct xhci_hcd *xhci;
3086         struct xhci_virt_device *vdev;
3087         struct xhci_command *config_cmd;
3088         unsigned int ep_index;