xhci: Fix spurious wakeups after S5 on Haswell
[pandora-kernel.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30
31 #include "xhci.h"
32
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35
36 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 static int link_quirk;
38 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
39 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
40
41 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 /*
43  * handshake - spin reading hc until handshake completes or fails
44  * @ptr: address of hc register to be read
45  * @mask: bits to look at in result of read
46  * @done: value of those bits when handshake succeeds
47  * @usec: timeout in microseconds
48  *
49  * Returns negative errno, or zero on success
50  *
51  * Success happens when the "mask" bits have the specified value (hardware
52  * handshake done).  There are two failure modes:  "usec" have passed (major
53  * hardware flakeout), or the register reads as all-ones (hardware removed).
54  */
55 int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
56                       u32 mask, u32 done, int usec)
57 {
58         u32     result;
59
60         do {
61                 result = xhci_readl(xhci, ptr);
62                 if (result == ~(u32)0)          /* card removed */
63                         return -ENODEV;
64                 result &= mask;
65                 if (result == done)
66                         return 0;
67                 udelay(1);
68                 usec--;
69         } while (usec > 0);
70         return -ETIMEDOUT;
71 }
72
73 /*
74  * Disable interrupts and begin the xHCI halting process.
75  */
76 void xhci_quiesce(struct xhci_hcd *xhci)
77 {
78         u32 halted;
79         u32 cmd;
80         u32 mask;
81
82         mask = ~(XHCI_IRQS);
83         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
84         if (!halted)
85                 mask &= ~CMD_RUN;
86
87         cmd = xhci_readl(xhci, &xhci->op_regs->command);
88         cmd &= mask;
89         xhci_writel(xhci, cmd, &xhci->op_regs->command);
90 }
91
92 /*
93  * Force HC into halt state.
94  *
95  * Disable any IRQs and clear the run/stop bit.
96  * HC will complete any current and actively pipelined transactions, and
97  * should halt within 16 ms of the run/stop bit being cleared.
98  * Read HC Halted bit in the status register to see when the HC is finished.
99  */
100 int xhci_halt(struct xhci_hcd *xhci)
101 {
102         int ret;
103         xhci_dbg(xhci, "// Halt the HC\n");
104         xhci_quiesce(xhci);
105
106         ret = handshake(xhci, &xhci->op_regs->status,
107                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
108         if (!ret) {
109                 xhci->xhc_state |= XHCI_STATE_HALTED;
110                 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
111         } else
112                 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
113                                 XHCI_MAX_HALT_USEC);
114         return ret;
115 }
116
117 /*
118  * Set the run bit and wait for the host to be running.
119  */
120 static int xhci_start(struct xhci_hcd *xhci)
121 {
122         u32 temp;
123         int ret;
124
125         temp = xhci_readl(xhci, &xhci->op_regs->command);
126         temp |= (CMD_RUN);
127         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
128                         temp);
129         xhci_writel(xhci, temp, &xhci->op_regs->command);
130
131         /*
132          * Wait for the HCHalted Status bit to be 0 to indicate the host is
133          * running.
134          */
135         ret = handshake(xhci, &xhci->op_regs->status,
136                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
137         if (ret == -ETIMEDOUT)
138                 xhci_err(xhci, "Host took too long to start, "
139                                 "waited %u microseconds.\n",
140                                 XHCI_MAX_HALT_USEC);
141         if (!ret)
142                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
143         return ret;
144 }
145
146 /*
147  * Reset a halted HC.
148  *
149  * This resets pipelines, timers, counters, state machines, etc.
150  * Transactions will be terminated immediately, and operational registers
151  * will be set to their defaults.
152  */
153 int xhci_reset(struct xhci_hcd *xhci)
154 {
155         u32 command;
156         u32 state;
157         int ret;
158
159         state = xhci_readl(xhci, &xhci->op_regs->status);
160         if ((state & STS_HALT) == 0) {
161                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
162                 return 0;
163         }
164
165         xhci_dbg(xhci, "// Reset the HC\n");
166         command = xhci_readl(xhci, &xhci->op_regs->command);
167         command |= CMD_RESET;
168         xhci_writel(xhci, command, &xhci->op_regs->command);
169
170         ret = handshake(xhci, &xhci->op_regs->command,
171                         CMD_RESET, 0, 10 * 1000 * 1000);
172         if (ret)
173                 return ret;
174
175         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
176         /*
177          * xHCI cannot write to any doorbells or operational registers other
178          * than status until the "Controller Not Ready" flag is cleared.
179          */
180         return handshake(xhci, &xhci->op_regs->status,
181                          STS_CNR, 0, 10 * 1000 * 1000);
182 }
183
184 #ifdef CONFIG_PCI
185 static int xhci_free_msi(struct xhci_hcd *xhci)
186 {
187         int i;
188
189         if (!xhci->msix_entries)
190                 return -EINVAL;
191
192         for (i = 0; i < xhci->msix_count; i++)
193                 if (xhci->msix_entries[i].vector)
194                         free_irq(xhci->msix_entries[i].vector,
195                                         xhci_to_hcd(xhci));
196         return 0;
197 }
198
199 /*
200  * Set up MSI
201  */
202 static int xhci_setup_msi(struct xhci_hcd *xhci)
203 {
204         int ret;
205         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
206
207         ret = pci_enable_msi(pdev);
208         if (ret) {
209                 xhci_dbg(xhci, "failed to allocate MSI entry\n");
210                 return ret;
211         }
212
213         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
214                                 0, "xhci_hcd", xhci_to_hcd(xhci));
215         if (ret) {
216                 xhci_dbg(xhci, "disable MSI interrupt\n");
217                 pci_disable_msi(pdev);
218         }
219
220         return ret;
221 }
222
223 /*
224  * Free IRQs
225  * free all IRQs request
226  */
227 static void xhci_free_irq(struct xhci_hcd *xhci)
228 {
229         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
230         int ret;
231
232         /* return if using legacy interrupt */
233         if (xhci_to_hcd(xhci)->irq >= 0)
234                 return;
235
236         ret = xhci_free_msi(xhci);
237         if (!ret)
238                 return;
239         if (pdev->irq >= 0)
240                 free_irq(pdev->irq, xhci_to_hcd(xhci));
241
242         return;
243 }
244
245 /*
246  * Set up MSI-X
247  */
248 static int xhci_setup_msix(struct xhci_hcd *xhci)
249 {
250         int i, ret = 0;
251         struct usb_hcd *hcd = xhci_to_hcd(xhci);
252         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
253
254         /*
255          * calculate number of msi-x vectors supported.
256          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
257          *   with max number of interrupters based on the xhci HCSPARAMS1.
258          * - num_online_cpus: maximum msi-x vectors per CPUs core.
259          *   Add additional 1 vector to ensure always available interrupt.
260          */
261         xhci->msix_count = min(num_online_cpus() + 1,
262                                 HCS_MAX_INTRS(xhci->hcs_params1));
263
264         xhci->msix_entries =
265                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
266                                 GFP_KERNEL);
267         if (!xhci->msix_entries) {
268                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
269                 return -ENOMEM;
270         }
271
272         for (i = 0; i < xhci->msix_count; i++) {
273                 xhci->msix_entries[i].entry = i;
274                 xhci->msix_entries[i].vector = 0;
275         }
276
277         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
278         if (ret) {
279                 xhci_dbg(xhci, "Failed to enable MSI-X\n");
280                 goto free_entries;
281         }
282
283         for (i = 0; i < xhci->msix_count; i++) {
284                 ret = request_irq(xhci->msix_entries[i].vector,
285                                 (irq_handler_t)xhci_msi_irq,
286                                 0, "xhci_hcd", xhci_to_hcd(xhci));
287                 if (ret)
288                         goto disable_msix;
289         }
290
291         hcd->msix_enabled = 1;
292         return ret;
293
294 disable_msix:
295         xhci_dbg(xhci, "disable MSI-X interrupt\n");
296         xhci_free_irq(xhci);
297         pci_disable_msix(pdev);
298 free_entries:
299         kfree(xhci->msix_entries);
300         xhci->msix_entries = NULL;
301         return ret;
302 }
303
304 /* Free any IRQs and disable MSI-X */
305 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
306 {
307         struct usb_hcd *hcd = xhci_to_hcd(xhci);
308         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
309
310         xhci_free_irq(xhci);
311
312         if (xhci->msix_entries) {
313                 pci_disable_msix(pdev);
314                 kfree(xhci->msix_entries);
315                 xhci->msix_entries = NULL;
316         } else {
317                 pci_disable_msi(pdev);
318         }
319
320         hcd->msix_enabled = 0;
321         return;
322 }
323
324 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
325 {
326         int i;
327
328         if (xhci->msix_entries) {
329                 for (i = 0; i < xhci->msix_count; i++)
330                         synchronize_irq(xhci->msix_entries[i].vector);
331         }
332 }
333
334 static int xhci_try_enable_msi(struct usb_hcd *hcd)
335 {
336         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
337         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
338         int ret;
339
340         /*
341          * Some Fresco Logic host controllers advertise MSI, but fail to
342          * generate interrupts.  Don't even try to enable MSI.
343          */
344         if (xhci->quirks & XHCI_BROKEN_MSI)
345                 goto legacy_irq;
346
347         /* unregister the legacy interrupt */
348         if (hcd->irq)
349                 free_irq(hcd->irq, hcd);
350         hcd->irq = -1;
351
352         ret = xhci_setup_msix(xhci);
353         if (ret)
354                 /* fall back to msi*/
355                 ret = xhci_setup_msi(xhci);
356
357         if (!ret)
358                 /* hcd->irq is -1, we have MSI */
359                 return 0;
360
361         if (!pdev->irq) {
362                 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
363                 return -EINVAL;
364         }
365
366  legacy_irq:
367         /* fall back to legacy interrupt*/
368         ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
369                         hcd->irq_descr, hcd);
370         if (ret) {
371                 xhci_err(xhci, "request interrupt %d failed\n",
372                                 pdev->irq);
373                 return ret;
374         }
375         hcd->irq = pdev->irq;
376         return 0;
377 }
378
379 #else
380
381 static int xhci_try_enable_msi(struct usb_hcd *hcd)
382 {
383         return 0;
384 }
385
386 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
387 {
388 }
389
390 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
391 {
392 }
393
394 #endif
395
396 static void compliance_mode_recovery(unsigned long arg)
397 {
398         struct xhci_hcd *xhci;
399         struct usb_hcd *hcd;
400         u32 temp;
401         int i;
402
403         xhci = (struct xhci_hcd *)arg;
404
405         for (i = 0; i < xhci->num_usb3_ports; i++) {
406                 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
407                 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
408                         /*
409                          * Compliance Mode Detected. Letting USB Core
410                          * handle the Warm Reset
411                          */
412                         xhci_dbg(xhci, "Compliance Mode Detected->Port %d!\n",
413                                         i + 1);
414                         xhci_dbg(xhci, "Attempting Recovery routine!\n");
415                         hcd = xhci->shared_hcd;
416
417                         if (hcd->state == HC_STATE_SUSPENDED)
418                                 usb_hcd_resume_root_hub(hcd);
419
420                         usb_hcd_poll_rh_status(hcd);
421                 }
422         }
423
424         if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
425                 mod_timer(&xhci->comp_mode_recovery_timer,
426                         jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
427 }
428
429 /*
430  * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
431  * that causes ports behind that hardware to enter compliance mode sometimes.
432  * The quirk creates a timer that polls every 2 seconds the link state of
433  * each host controller's port and recovers it by issuing a Warm reset
434  * if Compliance mode is detected, otherwise the port will become "dead" (no
435  * device connections or disconnections will be detected anymore). Becasue no
436  * status event is generated when entering compliance mode (per xhci spec),
437  * this quirk is needed on systems that have the failing hardware installed.
438  */
439 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
440 {
441         xhci->port_status_u0 = 0;
442         init_timer(&xhci->comp_mode_recovery_timer);
443
444         xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
445         xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
446         xhci->comp_mode_recovery_timer.expires = jiffies +
447                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
448
449         set_timer_slack(&xhci->comp_mode_recovery_timer,
450                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
451         add_timer(&xhci->comp_mode_recovery_timer);
452         xhci_dbg(xhci, "Compliance Mode Recovery Timer Initialized.\n");
453 }
454
455 /*
456  * This function identifies the systems that have installed the SN65LVPE502CP
457  * USB3.0 re-driver and that need the Compliance Mode Quirk.
458  * Systems:
459  * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
460  */
461 static bool compliance_mode_recovery_timer_quirk_check(void)
462 {
463         const char *dmi_product_name, *dmi_sys_vendor;
464
465         dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
466         dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
467         if (!dmi_product_name || !dmi_sys_vendor)
468                 return false;
469
470         if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
471                 return false;
472
473         if (strstr(dmi_product_name, "Z420") ||
474                         strstr(dmi_product_name, "Z620") ||
475                         strstr(dmi_product_name, "Z820") ||
476                         strstr(dmi_product_name, "Z1 Workstation"))
477                 return true;
478
479         return false;
480 }
481
482 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
483 {
484         return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
485 }
486
487
488 /*
489  * Initialize memory for HCD and xHC (one-time init).
490  *
491  * Program the PAGESIZE register, initialize the device context array, create
492  * device contexts (?), set up a command ring segment (or two?), create event
493  * ring (one for now).
494  */
495 int xhci_init(struct usb_hcd *hcd)
496 {
497         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
498         int retval = 0;
499
500         xhci_dbg(xhci, "xhci_init\n");
501         spin_lock_init(&xhci->lock);
502         if (xhci->hci_version == 0x95 && link_quirk) {
503                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
504                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
505         } else {
506                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
507         }
508         retval = xhci_mem_init(xhci, GFP_KERNEL);
509         xhci_dbg(xhci, "Finished xhci_init\n");
510
511         /* Initializing Compliance Mode Recovery Data If Needed */
512         if (compliance_mode_recovery_timer_quirk_check()) {
513                 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
514                 compliance_mode_recovery_timer_init(xhci);
515         }
516
517         return retval;
518 }
519
520 /*-------------------------------------------------------------------------*/
521
522
523 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
524 static void xhci_event_ring_work(unsigned long arg)
525 {
526         unsigned long flags;
527         int temp;
528         u64 temp_64;
529         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
530         int i, j;
531
532         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
533
534         spin_lock_irqsave(&xhci->lock, flags);
535         temp = xhci_readl(xhci, &xhci->op_regs->status);
536         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
537         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
538                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
539                 xhci_dbg(xhci, "HW died, polling stopped.\n");
540                 spin_unlock_irqrestore(&xhci->lock, flags);
541                 return;
542         }
543
544         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
545         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
546         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
547         xhci->error_bitmask = 0;
548         xhci_dbg(xhci, "Event ring:\n");
549         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
550         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
551         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
552         temp_64 &= ~ERST_PTR_MASK;
553         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
554         xhci_dbg(xhci, "Command ring:\n");
555         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
556         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
557         xhci_dbg_cmd_ptrs(xhci);
558         for (i = 0; i < MAX_HC_SLOTS; ++i) {
559                 if (!xhci->devs[i])
560                         continue;
561                 for (j = 0; j < 31; ++j) {
562                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
563                 }
564         }
565         spin_unlock_irqrestore(&xhci->lock, flags);
566
567         if (!xhci->zombie)
568                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
569         else
570                 xhci_dbg(xhci, "Quit polling the event ring.\n");
571 }
572 #endif
573
574 static int xhci_run_finished(struct xhci_hcd *xhci)
575 {
576         if (xhci_start(xhci)) {
577                 xhci_halt(xhci);
578                 return -ENODEV;
579         }
580         xhci->shared_hcd->state = HC_STATE_RUNNING;
581         xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
582
583         if (xhci->quirks & XHCI_NEC_HOST)
584                 xhci_ring_cmd_db(xhci);
585
586         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
587         return 0;
588 }
589
590 /*
591  * Start the HC after it was halted.
592  *
593  * This function is called by the USB core when the HC driver is added.
594  * Its opposite is xhci_stop().
595  *
596  * xhci_init() must be called once before this function can be called.
597  * Reset the HC, enable device slot contexts, program DCBAAP, and
598  * set command ring pointer and event ring pointer.
599  *
600  * Setup MSI-X vectors and enable interrupts.
601  */
602 int xhci_run(struct usb_hcd *hcd)
603 {
604         u32 temp;
605         u64 temp_64;
606         int ret;
607         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
608
609         /* Start the xHCI host controller running only after the USB 2.0 roothub
610          * is setup.
611          */
612
613         hcd->uses_new_polling = 1;
614         if (!usb_hcd_is_primary_hcd(hcd))
615                 return xhci_run_finished(xhci);
616
617         xhci_dbg(xhci, "xhci_run\n");
618
619         ret = xhci_try_enable_msi(hcd);
620         if (ret)
621                 return ret;
622
623 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
624         init_timer(&xhci->event_ring_timer);
625         xhci->event_ring_timer.data = (unsigned long) xhci;
626         xhci->event_ring_timer.function = xhci_event_ring_work;
627         /* Poll the event ring */
628         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
629         xhci->zombie = 0;
630         xhci_dbg(xhci, "Setting event ring polling timer\n");
631         add_timer(&xhci->event_ring_timer);
632 #endif
633
634         xhci_dbg(xhci, "Command ring memory map follows:\n");
635         xhci_debug_ring(xhci, xhci->cmd_ring);
636         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
637         xhci_dbg_cmd_ptrs(xhci);
638
639         xhci_dbg(xhci, "ERST memory map follows:\n");
640         xhci_dbg_erst(xhci, &xhci->erst);
641         xhci_dbg(xhci, "Event ring:\n");
642         xhci_debug_ring(xhci, xhci->event_ring);
643         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
644         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
645         temp_64 &= ~ERST_PTR_MASK;
646         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
647
648         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
649         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
650         temp &= ~ER_IRQ_INTERVAL_MASK;
651         temp |= (u32) 160;
652         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
653
654         /* Set the HCD state before we enable the irqs */
655         temp = xhci_readl(xhci, &xhci->op_regs->command);
656         temp |= (CMD_EIE);
657         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
658                         temp);
659         xhci_writel(xhci, temp, &xhci->op_regs->command);
660
661         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
662         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
663                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
664         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
665                         &xhci->ir_set->irq_pending);
666         xhci_print_ir_set(xhci, 0);
667
668         if (xhci->quirks & XHCI_NEC_HOST)
669                 xhci_queue_vendor_command(xhci, 0, 0, 0,
670                                 TRB_TYPE(TRB_NEC_GET_FW));
671
672         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
673         return 0;
674 }
675
676 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
677 {
678         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
679
680         spin_lock_irq(&xhci->lock);
681         xhci_halt(xhci);
682
683         /* The shared_hcd is going to be deallocated shortly (the USB core only
684          * calls this function when allocation fails in usb_add_hcd(), or
685          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
686          */
687         xhci->shared_hcd = NULL;
688         spin_unlock_irq(&xhci->lock);
689 }
690
691 /*
692  * Stop xHCI driver.
693  *
694  * This function is called by the USB core when the HC driver is removed.
695  * Its opposite is xhci_run().
696  *
697  * Disable device contexts, disable IRQs, and quiesce the HC.
698  * Reset the HC, finish any completed transactions, and cleanup memory.
699  */
700 void xhci_stop(struct usb_hcd *hcd)
701 {
702         u32 temp;
703         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
704
705         if (!usb_hcd_is_primary_hcd(hcd)) {
706                 xhci_only_stop_hcd(xhci->shared_hcd);
707                 return;
708         }
709
710         spin_lock_irq(&xhci->lock);
711         /* Make sure the xHC is halted for a USB3 roothub
712          * (xhci_stop() could be called as part of failed init).
713          */
714         xhci_halt(xhci);
715         xhci_reset(xhci);
716         spin_unlock_irq(&xhci->lock);
717
718         xhci_cleanup_msix(xhci);
719
720 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
721         /* Tell the event ring poll function not to reschedule */
722         xhci->zombie = 1;
723         del_timer_sync(&xhci->event_ring_timer);
724 #endif
725
726         /* Deleting Compliance Mode Recovery Timer */
727         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
728                         (!(xhci_all_ports_seen_u0(xhci))))
729                 del_timer_sync(&xhci->comp_mode_recovery_timer);
730
731         if (xhci->quirks & XHCI_AMD_PLL_FIX)
732                 usb_amd_dev_put();
733
734         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
735         temp = xhci_readl(xhci, &xhci->op_regs->status);
736         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
737         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
738         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
739                         &xhci->ir_set->irq_pending);
740         xhci_print_ir_set(xhci, 0);
741
742         xhci_dbg(xhci, "cleaning up memory\n");
743         xhci_mem_cleanup(xhci);
744         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
745                     xhci_readl(xhci, &xhci->op_regs->status));
746 }
747
748 /*
749  * Shutdown HC (not bus-specific)
750  *
751  * This is called when the machine is rebooting or halting.  We assume that the
752  * machine will be powered off, and the HC's internal state will be reset.
753  * Don't bother to free memory.
754  *
755  * This will only ever be called with the main usb_hcd (the USB3 roothub).
756  */
757 void xhci_shutdown(struct usb_hcd *hcd)
758 {
759         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
760
761         if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
762                 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
763
764         spin_lock_irq(&xhci->lock);
765         xhci_halt(xhci);
766         /* Workaround for spurious wakeups at shutdown with HSW */
767         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
768                 xhci_reset(xhci);
769         spin_unlock_irq(&xhci->lock);
770
771         xhci_cleanup_msix(xhci);
772
773         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
774                     xhci_readl(xhci, &xhci->op_regs->status));
775
776         /* Yet another workaround for spurious wakeups at shutdown with HSW */
777         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
778                 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
779 }
780
781 #ifdef CONFIG_PM
782 static void xhci_save_registers(struct xhci_hcd *xhci)
783 {
784         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
785         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
786         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
787         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
788         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
789         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
790         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
791         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
792         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
793 }
794
795 static void xhci_restore_registers(struct xhci_hcd *xhci)
796 {
797         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
798         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
799         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
800         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
801         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
802         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
803         xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
804         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
805         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
806 }
807
808 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
809 {
810         u64     val_64;
811
812         /* step 2: initialize command ring buffer */
813         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
814         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
815                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
816                                       xhci->cmd_ring->dequeue) &
817                  (u64) ~CMD_RING_RSVD_BITS) |
818                 xhci->cmd_ring->cycle_state;
819         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
820                         (long unsigned long) val_64);
821         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
822 }
823
824 /*
825  * The whole command ring must be cleared to zero when we suspend the host.
826  *
827  * The host doesn't save the command ring pointer in the suspend well, so we
828  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
829  * aligned, because of the reserved bits in the command ring dequeue pointer
830  * register.  Therefore, we can't just set the dequeue pointer back in the
831  * middle of the ring (TRBs are 16-byte aligned).
832  */
833 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
834 {
835         struct xhci_ring *ring;
836         struct xhci_segment *seg;
837
838         ring = xhci->cmd_ring;
839         seg = ring->deq_seg;
840         do {
841                 memset(seg->trbs, 0,
842                         sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
843                 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
844                         cpu_to_le32(~TRB_CYCLE);
845                 seg = seg->next;
846         } while (seg != ring->deq_seg);
847
848         /* Reset the software enqueue and dequeue pointers */
849         ring->deq_seg = ring->first_seg;
850         ring->dequeue = ring->first_seg->trbs;
851         ring->enq_seg = ring->deq_seg;
852         ring->enqueue = ring->dequeue;
853
854         /*
855          * Ring is now zeroed, so the HW should look for change of ownership
856          * when the cycle bit is set to 1.
857          */
858         ring->cycle_state = 1;
859
860         /*
861          * Reset the hardware dequeue pointer.
862          * Yes, this will need to be re-written after resume, but we're paranoid
863          * and want to make sure the hardware doesn't access bogus memory
864          * because, say, the BIOS or an SMI started the host without changing
865          * the command ring pointers.
866          */
867         xhci_set_cmd_ring_deq(xhci);
868 }
869
870 /*
871  * Stop HC (not bus-specific)
872  *
873  * This is called when the machine transition into S3/S4 mode.
874  *
875  */
876 int xhci_suspend(struct xhci_hcd *xhci)
877 {
878         int                     rc = 0;
879         unsigned int            delay = XHCI_MAX_HALT_USEC;
880         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
881         u32                     command;
882
883         /* Don't poll the roothubs on bus suspend. */
884         xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
885         clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
886         del_timer_sync(&hcd->rh_timer);
887
888         spin_lock_irq(&xhci->lock);
889         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
890         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
891         /* step 1: stop endpoint */
892         /* skipped assuming that port suspend has done */
893
894         /* step 2: clear Run/Stop bit */
895         command = xhci_readl(xhci, &xhci->op_regs->command);
896         command &= ~CMD_RUN;
897         xhci_writel(xhci, command, &xhci->op_regs->command);
898
899         /* Some chips from Fresco Logic need an extraordinary delay */
900         delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
901
902         if (handshake(xhci, &xhci->op_regs->status,
903                       STS_HALT, STS_HALT, delay)) {
904                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
905                 spin_unlock_irq(&xhci->lock);
906                 return -ETIMEDOUT;
907         }
908         xhci_clear_command_ring(xhci);
909
910         /* step 3: save registers */
911         xhci_save_registers(xhci);
912
913         /* step 4: set CSS flag */
914         command = xhci_readl(xhci, &xhci->op_regs->command);
915         command |= CMD_CSS;
916         xhci_writel(xhci, command, &xhci->op_regs->command);
917         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) {
918                 xhci_warn(xhci, "WARN: xHC save state timeout\n");
919                 spin_unlock_irq(&xhci->lock);
920                 return -ETIMEDOUT;
921         }
922         spin_unlock_irq(&xhci->lock);
923
924         /*
925          * Deleting Compliance Mode Recovery Timer because the xHCI Host
926          * is about to be suspended.
927          */
928         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
929                         (!(xhci_all_ports_seen_u0(xhci)))) {
930                 del_timer_sync(&xhci->comp_mode_recovery_timer);
931                 xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted!\n");
932         }
933
934         /* step 5: remove core well power */
935         /* synchronize irq when using MSI-X */
936         xhci_msix_sync_irqs(xhci);
937
938         return rc;
939 }
940
941 /*
942  * start xHC (not bus-specific)
943  *
944  * This is called when the machine transition from S3/S4 mode.
945  *
946  */
947 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
948 {
949         u32                     command, temp = 0;
950         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
951         struct usb_hcd          *secondary_hcd;
952         int                     retval = 0;
953         bool                    comp_timer_running = false;
954
955         /* Wait a bit if either of the roothubs need to settle from the
956          * transition into bus suspend.
957          */
958         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
959                         time_before(jiffies,
960                                 xhci->bus_state[1].next_statechange))
961                 msleep(100);
962
963         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
964         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
965
966         spin_lock_irq(&xhci->lock);
967         if (xhci->quirks & XHCI_RESET_ON_RESUME)
968                 hibernated = true;
969
970         if (!hibernated) {
971                 /* step 1: restore register */
972                 xhci_restore_registers(xhci);
973                 /* step 2: initialize command ring buffer */
974                 xhci_set_cmd_ring_deq(xhci);
975                 /* step 3: restore state and start state*/
976                 /* step 3: set CRS flag */
977                 command = xhci_readl(xhci, &xhci->op_regs->command);
978                 command |= CMD_CRS;
979                 xhci_writel(xhci, command, &xhci->op_regs->command);
980                 if (handshake(xhci, &xhci->op_regs->status,
981                               STS_RESTORE, 0, 10 * 1000)) {
982                         xhci_warn(xhci, "WARN: xHC restore state timeout\n");
983                         spin_unlock_irq(&xhci->lock);
984                         return -ETIMEDOUT;
985                 }
986                 temp = xhci_readl(xhci, &xhci->op_regs->status);
987         }
988
989         /* If restore operation fails, re-initialize the HC during resume */
990         if ((temp & STS_SRE) || hibernated) {
991
992                 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
993                                 !(xhci_all_ports_seen_u0(xhci))) {
994                         del_timer_sync(&xhci->comp_mode_recovery_timer);
995                         xhci_dbg(xhci, "Compliance Mode Recovery Timer deleted!\n");
996                 }
997
998                 /* Let the USB core know _both_ roothubs lost power. */
999                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1000                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1001
1002                 xhci_dbg(xhci, "Stop HCD\n");
1003                 xhci_halt(xhci);
1004                 xhci_reset(xhci);
1005                 spin_unlock_irq(&xhci->lock);
1006                 xhci_cleanup_msix(xhci);
1007
1008 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
1009                 /* Tell the event ring poll function not to reschedule */
1010                 xhci->zombie = 1;
1011                 del_timer_sync(&xhci->event_ring_timer);
1012 #endif
1013
1014                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1015                 temp = xhci_readl(xhci, &xhci->op_regs->status);
1016                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
1017                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
1018                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
1019                                 &xhci->ir_set->irq_pending);
1020                 xhci_print_ir_set(xhci, 0);
1021
1022                 xhci_dbg(xhci, "cleaning up memory\n");
1023                 xhci_mem_cleanup(xhci);
1024                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1025                             xhci_readl(xhci, &xhci->op_regs->status));
1026
1027                 /* USB core calls the PCI reinit and start functions twice:
1028                  * first with the primary HCD, and then with the secondary HCD.
1029                  * If we don't do the same, the host will never be started.
1030                  */
1031                 if (!usb_hcd_is_primary_hcd(hcd))
1032                         secondary_hcd = hcd;
1033                 else
1034                         secondary_hcd = xhci->shared_hcd;
1035
1036                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1037                 retval = xhci_init(hcd->primary_hcd);
1038                 if (retval)
1039                         return retval;
1040                 comp_timer_running = true;
1041
1042                 xhci_dbg(xhci, "Start the primary HCD\n");
1043                 retval = xhci_run(hcd->primary_hcd);
1044                 if (!retval) {
1045                         xhci_dbg(xhci, "Start the secondary HCD\n");
1046                         retval = xhci_run(secondary_hcd);
1047                 }
1048                 hcd->state = HC_STATE_SUSPENDED;
1049                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1050                 goto done;
1051         }
1052
1053         /* step 4: set Run/Stop bit */
1054         command = xhci_readl(xhci, &xhci->op_regs->command);
1055         command |= CMD_RUN;
1056         xhci_writel(xhci, command, &xhci->op_regs->command);
1057         handshake(xhci, &xhci->op_regs->status, STS_HALT,
1058                   0, 250 * 1000);
1059
1060         /* step 5: walk topology and initialize portsc,
1061          * portpmsc and portli
1062          */
1063         /* this is done in bus_resume */
1064
1065         /* step 6: restart each of the previously
1066          * Running endpoints by ringing their doorbells
1067          */
1068
1069         spin_unlock_irq(&xhci->lock);
1070
1071  done:
1072         if (retval == 0) {
1073                 usb_hcd_resume_root_hub(hcd);
1074                 usb_hcd_resume_root_hub(xhci->shared_hcd);
1075         }
1076
1077         /*
1078          * If system is subject to the Quirk, Compliance Mode Timer needs to
1079          * be re-initialized Always after a system resume. Ports are subject
1080          * to suffer the Compliance Mode issue again. It doesn't matter if
1081          * ports have entered previously to U0 before system's suspension.
1082          */
1083         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1084                 compliance_mode_recovery_timer_init(xhci);
1085
1086         /* Re-enable port polling. */
1087         xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1088         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1089         usb_hcd_poll_rh_status(hcd);
1090
1091         return retval;
1092 }
1093 #endif  /* CONFIG_PM */
1094
1095 /*-------------------------------------------------------------------------*/
1096
1097 /**
1098  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1099  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
1100  * value to right shift 1 for the bitmask.
1101  *
1102  * Index  = (epnum * 2) + direction - 1,
1103  * where direction = 0 for OUT, 1 for IN.
1104  * For control endpoints, the IN index is used (OUT index is unused), so
1105  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1106  */
1107 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1108 {
1109         unsigned int index;
1110         if (usb_endpoint_xfer_control(desc))
1111                 index = (unsigned int) (usb_endpoint_num(desc)*2);
1112         else
1113                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1114                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1115         return index;
1116 }
1117
1118 /* Find the flag for this endpoint (for use in the control context).  Use the
1119  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1120  * bit 1, etc.
1121  */
1122 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1123 {
1124         return 1 << (xhci_get_endpoint_index(desc) + 1);
1125 }
1126
1127 /* Find the flag for this endpoint (for use in the control context).  Use the
1128  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1129  * bit 1, etc.
1130  */
1131 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1132 {
1133         return 1 << (ep_index + 1);
1134 }
1135
1136 /* Compute the last valid endpoint context index.  Basically, this is the
1137  * endpoint index plus one.  For slot contexts with more than valid endpoint,
1138  * we find the most significant bit set in the added contexts flags.
1139  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1140  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1141  */
1142 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1143 {
1144         return fls(added_ctxs) - 1;
1145 }
1146
1147 /* Returns 1 if the arguments are OK;
1148  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1149  */
1150 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1151                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1152                 const char *func) {
1153         struct xhci_hcd *xhci;
1154         struct xhci_virt_device *virt_dev;
1155
1156         if (!hcd || (check_ep && !ep) || !udev) {
1157                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1158                                 func);
1159                 return -EINVAL;
1160         }
1161         if (!udev->parent) {
1162                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1163                                 func);
1164                 return 0;
1165         }
1166
1167         xhci = hcd_to_xhci(hcd);
1168         if (check_virt_dev) {
1169                 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1170                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
1171                                                 "device\n", func);
1172                         return -EINVAL;
1173                 }
1174
1175                 virt_dev = xhci->devs[udev->slot_id];
1176                 if (virt_dev->udev != udev) {
1177                         printk(KERN_DEBUG "xHCI %s called with udev and "
1178                                           "virt_dev does not match\n", func);
1179                         return -EINVAL;
1180                 }
1181         }
1182
1183         if (xhci->xhc_state & XHCI_STATE_HALTED)
1184                 return -ENODEV;
1185
1186         return 1;
1187 }
1188
1189 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1190                 struct usb_device *udev, struct xhci_command *command,
1191                 bool ctx_change, bool must_succeed);
1192
1193 /*
1194  * Full speed devices may have a max packet size greater than 8 bytes, but the
1195  * USB core doesn't know that until it reads the first 8 bytes of the
1196  * descriptor.  If the usb_device's max packet size changes after that point,
1197  * we need to issue an evaluate context command and wait on it.
1198  */
1199 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1200                 unsigned int ep_index, struct urb *urb)
1201 {
1202         struct xhci_container_ctx *in_ctx;
1203         struct xhci_container_ctx *out_ctx;
1204         struct xhci_input_control_ctx *ctrl_ctx;
1205         struct xhci_ep_ctx *ep_ctx;
1206         int max_packet_size;
1207         int hw_max_packet_size;
1208         int ret = 0;
1209
1210         out_ctx = xhci->devs[slot_id]->out_ctx;
1211         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1212         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1213         max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1214         if (hw_max_packet_size != max_packet_size) {
1215                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1216                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1217                                 max_packet_size);
1218                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1219                                 hw_max_packet_size);
1220                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1221
1222                 /* Set up the modified control endpoint 0 */
1223                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1224                                 xhci->devs[slot_id]->out_ctx, ep_index);
1225                 in_ctx = xhci->devs[slot_id]->in_ctx;
1226                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1227                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1228                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1229
1230                 /* Set up the input context flags for the command */
1231                 /* FIXME: This won't work if a non-default control endpoint
1232                  * changes max packet sizes.
1233                  */
1234                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1235                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1236                 ctrl_ctx->drop_flags = 0;
1237
1238                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1239                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1240                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1241                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1242
1243                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1244                                 true, false);
1245
1246                 /* Clean up the input context for later use by bandwidth
1247                  * functions.
1248                  */
1249                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1250         }
1251         return ret;
1252 }
1253
1254 /*
1255  * non-error returns are a promise to giveback() the urb later
1256  * we drop ownership so next owner (or urb unlink) can get it
1257  */
1258 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1259 {
1260         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1261         struct xhci_td *buffer;
1262         unsigned long flags;
1263         int ret = 0;
1264         unsigned int slot_id, ep_index;
1265         struct urb_priv *urb_priv;
1266         int size, i;
1267
1268         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1269                                         true, true, __func__) <= 0)
1270                 return -EINVAL;
1271
1272         slot_id = urb->dev->slot_id;
1273         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1274
1275         if (!HCD_HW_ACCESSIBLE(hcd)) {
1276                 if (!in_interrupt())
1277                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1278                 ret = -ESHUTDOWN;
1279                 goto exit;
1280         }
1281
1282         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1283                 size = urb->number_of_packets;
1284         else
1285                 size = 1;
1286
1287         urb_priv = kzalloc(sizeof(struct urb_priv) +
1288                                   size * sizeof(struct xhci_td *), mem_flags);
1289         if (!urb_priv)
1290                 return -ENOMEM;
1291
1292         buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1293         if (!buffer) {
1294                 kfree(urb_priv);
1295                 return -ENOMEM;
1296         }
1297
1298         for (i = 0; i < size; i++) {
1299                 urb_priv->td[i] = buffer;
1300                 buffer++;
1301         }
1302
1303         urb_priv->length = size;
1304         urb_priv->td_cnt = 0;
1305         urb->hcpriv = urb_priv;
1306
1307         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1308                 /* Check to see if the max packet size for the default control
1309                  * endpoint changed during FS device enumeration
1310                  */
1311                 if (urb->dev->speed == USB_SPEED_FULL) {
1312                         ret = xhci_check_maxpacket(xhci, slot_id,
1313                                         ep_index, urb);
1314                         if (ret < 0) {
1315                                 xhci_urb_free_priv(xhci, urb_priv);
1316                                 urb->hcpriv = NULL;
1317                                 return ret;
1318                         }
1319                 }
1320
1321                 /* We have a spinlock and interrupts disabled, so we must pass
1322                  * atomic context to this function, which may allocate memory.
1323                  */
1324                 spin_lock_irqsave(&xhci->lock, flags);
1325                 if (xhci->xhc_state & XHCI_STATE_DYING)
1326                         goto dying;
1327                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1328                                 slot_id, ep_index);
1329                 if (ret)
1330                         goto free_priv;
1331                 spin_unlock_irqrestore(&xhci->lock, flags);
1332         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1333                 spin_lock_irqsave(&xhci->lock, flags);
1334                 if (xhci->xhc_state & XHCI_STATE_DYING)
1335                         goto dying;
1336                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1337                                 EP_GETTING_STREAMS) {
1338                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1339                                         "is transitioning to using streams.\n");
1340                         ret = -EINVAL;
1341                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1342                                 EP_GETTING_NO_STREAMS) {
1343                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1344                                         "is transitioning to "
1345                                         "not having streams.\n");
1346                         ret = -EINVAL;
1347                 } else {
1348                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1349                                         slot_id, ep_index);
1350                 }
1351                 if (ret)
1352                         goto free_priv;
1353                 spin_unlock_irqrestore(&xhci->lock, flags);
1354         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1355                 spin_lock_irqsave(&xhci->lock, flags);
1356                 if (xhci->xhc_state & XHCI_STATE_DYING)
1357                         goto dying;
1358                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1359                                 slot_id, ep_index);
1360                 if (ret)
1361                         goto free_priv;
1362                 spin_unlock_irqrestore(&xhci->lock, flags);
1363         } else {
1364                 spin_lock_irqsave(&xhci->lock, flags);
1365                 if (xhci->xhc_state & XHCI_STATE_DYING)
1366                         goto dying;
1367                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1368                                 slot_id, ep_index);
1369                 if (ret)
1370                         goto free_priv;
1371                 spin_unlock_irqrestore(&xhci->lock, flags);
1372         }
1373 exit:
1374         return ret;
1375 dying:
1376         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1377                         "non-responsive xHCI host.\n",
1378                         urb->ep->desc.bEndpointAddress, urb);
1379         ret = -ESHUTDOWN;
1380 free_priv:
1381         xhci_urb_free_priv(xhci, urb_priv);
1382         urb->hcpriv = NULL;
1383         spin_unlock_irqrestore(&xhci->lock, flags);
1384         return ret;
1385 }
1386
1387 /* Get the right ring for the given URB.
1388  * If the endpoint supports streams, boundary check the URB's stream ID.
1389  * If the endpoint doesn't support streams, return the singular endpoint ring.
1390  */
1391 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1392                 struct urb *urb)
1393 {
1394         unsigned int slot_id;
1395         unsigned int ep_index;
1396         unsigned int stream_id;
1397         struct xhci_virt_ep *ep;
1398
1399         slot_id = urb->dev->slot_id;
1400         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1401         stream_id = urb->stream_id;
1402         ep = &xhci->devs[slot_id]->eps[ep_index];
1403         /* Common case: no streams */
1404         if (!(ep->ep_state & EP_HAS_STREAMS))
1405                 return ep->ring;
1406
1407         if (stream_id == 0) {
1408                 xhci_warn(xhci,
1409                                 "WARN: Slot ID %u, ep index %u has streams, "
1410                                 "but URB has no stream ID.\n",
1411                                 slot_id, ep_index);
1412                 return NULL;
1413         }
1414
1415         if (stream_id < ep->stream_info->num_streams)
1416                 return ep->stream_info->stream_rings[stream_id];
1417
1418         xhci_warn(xhci,
1419                         "WARN: Slot ID %u, ep index %u has "
1420                         "stream IDs 1 to %u allocated, "
1421                         "but stream ID %u is requested.\n",
1422                         slot_id, ep_index,
1423                         ep->stream_info->num_streams - 1,
1424                         stream_id);
1425         return NULL;
1426 }
1427
1428 /*
1429  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1430  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1431  * should pick up where it left off in the TD, unless a Set Transfer Ring
1432  * Dequeue Pointer is issued.
1433  *
1434  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1435  * the ring.  Since the ring is a contiguous structure, they can't be physically
1436  * removed.  Instead, there are two options:
1437  *
1438  *  1) If the HC is in the middle of processing the URB to be canceled, we
1439  *     simply move the ring's dequeue pointer past those TRBs using the Set
1440  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1441  *     when drivers timeout on the last submitted URB and attempt to cancel.
1442  *
1443  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1444  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1445  *     HC will need to invalidate the any TRBs it has cached after the stop
1446  *     endpoint command, as noted in the xHCI 0.95 errata.
1447  *
1448  *  3) The TD may have completed by the time the Stop Endpoint Command
1449  *     completes, so software needs to handle that case too.
1450  *
1451  * This function should protect against the TD enqueueing code ringing the
1452  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1453  * It also needs to account for multiple cancellations on happening at the same
1454  * time for the same endpoint.
1455  *
1456  * Note that this function can be called in any context, or so says
1457  * usb_hcd_unlink_urb()
1458  */
1459 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1460 {
1461         unsigned long flags;
1462         int ret, i;
1463         u32 temp;
1464         struct xhci_hcd *xhci;
1465         struct urb_priv *urb_priv;
1466         struct xhci_td *td;
1467         unsigned int ep_index;
1468         struct xhci_ring *ep_ring;
1469         struct xhci_virt_ep *ep;
1470
1471         xhci = hcd_to_xhci(hcd);
1472         spin_lock_irqsave(&xhci->lock, flags);
1473         /* Make sure the URB hasn't completed or been unlinked already */
1474         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1475         if (ret || !urb->hcpriv)
1476                 goto done;
1477         temp = xhci_readl(xhci, &xhci->op_regs->status);
1478         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1479                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1480                 urb_priv = urb->hcpriv;
1481                 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1482                         td = urb_priv->td[i];
1483                         if (!list_empty(&td->td_list))
1484                                 list_del_init(&td->td_list);
1485                         if (!list_empty(&td->cancelled_td_list))
1486                                 list_del_init(&td->cancelled_td_list);
1487                 }
1488
1489                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1490                 spin_unlock_irqrestore(&xhci->lock, flags);
1491                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1492                 xhci_urb_free_priv(xhci, urb_priv);
1493                 return ret;
1494         }
1495         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1496                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1497                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1498                                 "non-responsive xHCI host.\n",
1499                                 urb->ep->desc.bEndpointAddress, urb);
1500                 /* Let the stop endpoint command watchdog timer (which set this
1501                  * state) finish cleaning up the endpoint TD lists.  We must
1502                  * have caught it in the middle of dropping a lock and giving
1503                  * back an URB.
1504                  */
1505                 goto done;
1506         }
1507
1508         xhci_dbg(xhci, "Cancel URB %p\n", urb);
1509         xhci_dbg(xhci, "Event ring:\n");
1510         xhci_debug_ring(xhci, xhci->event_ring);
1511         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1512         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1513         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1514         if (!ep_ring) {
1515                 ret = -EINVAL;
1516                 goto done;
1517         }
1518
1519         xhci_dbg(xhci, "Endpoint ring:\n");
1520         xhci_debug_ring(xhci, ep_ring);
1521
1522         urb_priv = urb->hcpriv;
1523
1524         for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1525                 td = urb_priv->td[i];
1526                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1527         }
1528
1529         /* Queue a stop endpoint command, but only if this is
1530          * the first cancellation to be handled.
1531          */
1532         if (!(ep->ep_state & EP_HALT_PENDING)) {
1533                 ep->ep_state |= EP_HALT_PENDING;
1534                 ep->stop_cmds_pending++;
1535                 ep->stop_cmd_timer.expires = jiffies +
1536                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1537                 add_timer(&ep->stop_cmd_timer);
1538                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1539                 xhci_ring_cmd_db(xhci);
1540         }
1541 done:
1542         spin_unlock_irqrestore(&xhci->lock, flags);
1543         return ret;
1544 }
1545
1546 /* Drop an endpoint from a new bandwidth configuration for this device.
1547  * Only one call to this function is allowed per endpoint before
1548  * check_bandwidth() or reset_bandwidth() must be called.
1549  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1550  * add the endpoint to the schedule with possibly new parameters denoted by a
1551  * different endpoint descriptor in usb_host_endpoint.
1552  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1553  * not allowed.
1554  *
1555  * The USB core will not allow URBs to be queued to an endpoint that is being
1556  * disabled, so there's no need for mutual exclusion to protect
1557  * the xhci->devs[slot_id] structure.
1558  */
1559 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1560                 struct usb_host_endpoint *ep)
1561 {
1562         struct xhci_hcd *xhci;
1563         struct xhci_container_ctx *in_ctx, *out_ctx;
1564         struct xhci_input_control_ctx *ctrl_ctx;
1565         struct xhci_slot_ctx *slot_ctx;
1566         unsigned int last_ctx;
1567         unsigned int ep_index;
1568         struct xhci_ep_ctx *ep_ctx;
1569         u32 drop_flag;
1570         u32 new_add_flags, new_drop_flags, new_slot_info;
1571         int ret;
1572
1573         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1574         if (ret <= 0)
1575                 return ret;
1576         xhci = hcd_to_xhci(hcd);
1577         if (xhci->xhc_state & XHCI_STATE_DYING)
1578                 return -ENODEV;
1579
1580         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1581         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1582         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1583                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1584                                 __func__, drop_flag);
1585                 return 0;
1586         }
1587
1588         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1589         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1590         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1591         ep_index = xhci_get_endpoint_index(&ep->desc);
1592         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1593         /* If the HC already knows the endpoint is disabled,
1594          * or the HCD has noted it is disabled, ignore this request
1595          */
1596         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1597              cpu_to_le32(EP_STATE_DISABLED)) ||
1598             le32_to_cpu(ctrl_ctx->drop_flags) &
1599             xhci_get_endpoint_flag(&ep->desc)) {
1600                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1601                                 __func__, ep);
1602                 return 0;
1603         }
1604
1605         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1606         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1607
1608         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1609         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1610
1611         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1612         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1613         /* Update the last valid endpoint context, if we deleted the last one */
1614         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1615             LAST_CTX(last_ctx)) {
1616                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1617                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1618         }
1619         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1620
1621         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1622
1623         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1624                         (unsigned int) ep->desc.bEndpointAddress,
1625                         udev->slot_id,
1626                         (unsigned int) new_drop_flags,
1627                         (unsigned int) new_add_flags,
1628                         (unsigned int) new_slot_info);
1629         return 0;
1630 }
1631
1632 /* Add an endpoint to a new possible bandwidth configuration for this device.
1633  * Only one call to this function is allowed per endpoint before
1634  * check_bandwidth() or reset_bandwidth() must be called.
1635  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1636  * add the endpoint to the schedule with possibly new parameters denoted by a
1637  * different endpoint descriptor in usb_host_endpoint.
1638  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1639  * not allowed.
1640  *
1641  * The USB core will not allow URBs to be queued to an endpoint until the
1642  * configuration or alt setting is installed in the device, so there's no need
1643  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1644  */
1645 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1646                 struct usb_host_endpoint *ep)
1647 {
1648         struct xhci_hcd *xhci;
1649         struct xhci_container_ctx *in_ctx, *out_ctx;
1650         unsigned int ep_index;
1651         struct xhci_ep_ctx *ep_ctx;
1652         struct xhci_slot_ctx *slot_ctx;
1653         struct xhci_input_control_ctx *ctrl_ctx;
1654         u32 added_ctxs;
1655         unsigned int last_ctx;
1656         u32 new_add_flags, new_drop_flags, new_slot_info;
1657         struct xhci_virt_device *virt_dev;
1658         int ret = 0;
1659
1660         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1661         if (ret <= 0) {
1662                 /* So we won't queue a reset ep command for a root hub */
1663                 ep->hcpriv = NULL;
1664                 return ret;
1665         }
1666         xhci = hcd_to_xhci(hcd);
1667         if (xhci->xhc_state & XHCI_STATE_DYING)
1668                 return -ENODEV;
1669
1670         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1671         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1672         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1673                 /* FIXME when we have to issue an evaluate endpoint command to
1674                  * deal with ep0 max packet size changing once we get the
1675                  * descriptors
1676                  */
1677                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1678                                 __func__, added_ctxs);
1679                 return 0;
1680         }
1681
1682         virt_dev = xhci->devs[udev->slot_id];
1683         in_ctx = virt_dev->in_ctx;
1684         out_ctx = virt_dev->out_ctx;
1685         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1686         ep_index = xhci_get_endpoint_index(&ep->desc);
1687         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1688
1689         /* If this endpoint is already in use, and the upper layers are trying
1690          * to add it again without dropping it, reject the addition.
1691          */
1692         if (virt_dev->eps[ep_index].ring &&
1693                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1694                                 xhci_get_endpoint_flag(&ep->desc))) {
1695                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1696                                 "without dropping it.\n",
1697                                 (unsigned int) ep->desc.bEndpointAddress);
1698                 return -EINVAL;
1699         }
1700
1701         /* If the HCD has already noted the endpoint is enabled,
1702          * ignore this request.
1703          */
1704         if (le32_to_cpu(ctrl_ctx->add_flags) &
1705             xhci_get_endpoint_flag(&ep->desc)) {
1706                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1707                                 __func__, ep);
1708                 return 0;
1709         }
1710
1711         /*
1712          * Configuration and alternate setting changes must be done in
1713          * process context, not interrupt context (or so documenation
1714          * for usb_set_interface() and usb_set_configuration() claim).
1715          */
1716         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1717                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1718                                 __func__, ep->desc.bEndpointAddress);
1719                 return -ENOMEM;
1720         }
1721
1722         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1723         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1724
1725         /* If xhci_endpoint_disable() was called for this endpoint, but the
1726          * xHC hasn't been notified yet through the check_bandwidth() call,
1727          * this re-adds a new state for the endpoint from the new endpoint
1728          * descriptors.  We must drop and re-add this endpoint, so we leave the
1729          * drop flags alone.
1730          */
1731         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1732
1733         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1734         /* Update the last valid endpoint context, if we just added one past */
1735         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1736             LAST_CTX(last_ctx)) {
1737                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1738                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1739         }
1740         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1741
1742         /* Store the usb_device pointer for later use */
1743         ep->hcpriv = udev;
1744
1745         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1746                         (unsigned int) ep->desc.bEndpointAddress,
1747                         udev->slot_id,
1748                         (unsigned int) new_drop_flags,
1749                         (unsigned int) new_add_flags,
1750                         (unsigned int) new_slot_info);
1751         return 0;
1752 }
1753
1754 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1755 {
1756         struct xhci_input_control_ctx *ctrl_ctx;
1757         struct xhci_ep_ctx *ep_ctx;
1758         struct xhci_slot_ctx *slot_ctx;
1759         int i;
1760
1761         /* When a device's add flag and drop flag are zero, any subsequent
1762          * configure endpoint command will leave that endpoint's state
1763          * untouched.  Make sure we don't leave any old state in the input
1764          * endpoint contexts.
1765          */
1766         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1767         ctrl_ctx->drop_flags = 0;
1768         ctrl_ctx->add_flags = 0;
1769         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1770         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1771         /* Endpoint 0 is always valid */
1772         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1773         for (i = 1; i < 31; ++i) {
1774                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1775                 ep_ctx->ep_info = 0;
1776                 ep_ctx->ep_info2 = 0;
1777                 ep_ctx->deq = 0;
1778                 ep_ctx->tx_info = 0;
1779         }
1780 }
1781
1782 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1783                 struct usb_device *udev, u32 *cmd_status)
1784 {
1785         int ret;
1786
1787         switch (*cmd_status) {
1788         case COMP_ENOMEM:
1789                 dev_warn(&udev->dev, "Not enough host controller resources "
1790                                 "for new device state.\n");
1791                 ret = -ENOMEM;
1792                 /* FIXME: can we allocate more resources for the HC? */
1793                 break;
1794         case COMP_BW_ERR:
1795         case COMP_2ND_BW_ERR:
1796                 dev_warn(&udev->dev, "Not enough bandwidth "
1797                                 "for new device state.\n");
1798                 ret = -ENOSPC;
1799                 /* FIXME: can we go back to the old state? */
1800                 break;
1801         case COMP_TRB_ERR:
1802                 /* the HCD set up something wrong */
1803                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1804                                 "add flag = 1, "
1805                                 "and endpoint is not disabled.\n");
1806                 ret = -EINVAL;
1807                 break;
1808         case COMP_DEV_ERR:
1809                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1810                                 "configure command.\n");
1811                 ret = -ENODEV;
1812                 break;
1813         case COMP_SUCCESS:
1814                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1815                 ret = 0;
1816                 break;
1817         default:
1818                 xhci_err(xhci, "ERROR: unexpected command completion "
1819                                 "code 0x%x.\n", *cmd_status);
1820                 ret = -EINVAL;
1821                 break;
1822         }
1823         return ret;
1824 }
1825
1826 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1827                 struct usb_device *udev, u32 *cmd_status)
1828 {
1829         int ret;
1830         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1831
1832         switch (*cmd_status) {
1833         case COMP_EINVAL:
1834                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1835                                 "context command.\n");
1836                 ret = -EINVAL;
1837                 break;
1838         case COMP_EBADSLT:
1839                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1840                                 "evaluate context command.\n");
1841         case COMP_CTX_STATE:
1842                 dev_warn(&udev->dev, "WARN: invalid context state for "
1843                                 "evaluate context command.\n");
1844                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1845                 ret = -EINVAL;
1846                 break;
1847         case COMP_DEV_ERR:
1848                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1849                                 "context command.\n");
1850                 ret = -ENODEV;
1851                 break;
1852         case COMP_MEL_ERR:
1853                 /* Max Exit Latency too large error */
1854                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1855                 ret = -EINVAL;
1856                 break;
1857         case COMP_SUCCESS:
1858                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1859                 ret = 0;
1860                 break;
1861         default:
1862                 xhci_err(xhci, "ERROR: unexpected command completion "
1863                                 "code 0x%x.\n", *cmd_status);
1864                 ret = -EINVAL;
1865                 break;
1866         }
1867         return ret;
1868 }
1869
1870 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1871                 struct xhci_container_ctx *in_ctx)
1872 {
1873         struct xhci_input_control_ctx *ctrl_ctx;
1874         u32 valid_add_flags;
1875         u32 valid_drop_flags;
1876
1877         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1878         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1879          * (bit 1).  The default control endpoint is added during the Address
1880          * Device command and is never removed until the slot is disabled.
1881          */
1882         valid_add_flags = ctrl_ctx->add_flags >> 2;
1883         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1884
1885         /* Use hweight32 to count the number of ones in the add flags, or
1886          * number of endpoints added.  Don't count endpoints that are changed
1887          * (both added and dropped).
1888          */
1889         return hweight32(valid_add_flags) -
1890                 hweight32(valid_add_flags & valid_drop_flags);
1891 }
1892
1893 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1894                 struct xhci_container_ctx *in_ctx)
1895 {
1896         struct xhci_input_control_ctx *ctrl_ctx;
1897         u32 valid_add_flags;
1898         u32 valid_drop_flags;
1899
1900         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1901         valid_add_flags = ctrl_ctx->add_flags >> 2;
1902         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1903
1904         return hweight32(valid_drop_flags) -
1905                 hweight32(valid_add_flags & valid_drop_flags);
1906 }
1907
1908 /*
1909  * We need to reserve the new number of endpoints before the configure endpoint
1910  * command completes.  We can't subtract the dropped endpoints from the number
1911  * of active endpoints until the command completes because we can oversubscribe
1912  * the host in this case:
1913  *
1914  *  - the first configure endpoint command drops more endpoints than it adds
1915  *  - a second configure endpoint command that adds more endpoints is queued
1916  *  - the first configure endpoint command fails, so the config is unchanged
1917  *  - the second command may succeed, even though there isn't enough resources
1918  *
1919  * Must be called with xhci->lock held.
1920  */
1921 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1922                 struct xhci_container_ctx *in_ctx)
1923 {
1924         u32 added_eps;
1925
1926         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1927         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1928                 xhci_dbg(xhci, "Not enough ep ctxs: "
1929                                 "%u active, need to add %u, limit is %u.\n",
1930                                 xhci->num_active_eps, added_eps,
1931                                 xhci->limit_active_eps);
1932                 return -ENOMEM;
1933         }
1934         xhci->num_active_eps += added_eps;
1935         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1936                         xhci->num_active_eps);
1937         return 0;
1938 }
1939
1940 /*
1941  * The configure endpoint was failed by the xHC for some other reason, so we
1942  * need to revert the resources that failed configuration would have used.
1943  *
1944  * Must be called with xhci->lock held.
1945  */
1946 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1947                 struct xhci_container_ctx *in_ctx)
1948 {
1949         u32 num_failed_eps;
1950
1951         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1952         xhci->num_active_eps -= num_failed_eps;
1953         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1954                         num_failed_eps,
1955                         xhci->num_active_eps);
1956 }
1957
1958 /*
1959  * Now that the command has completed, clean up the active endpoint count by
1960  * subtracting out the endpoints that were dropped (but not changed).
1961  *
1962  * Must be called with xhci->lock held.
1963  */
1964 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1965                 struct xhci_container_ctx *in_ctx)
1966 {
1967         u32 num_dropped_eps;
1968
1969         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1970         xhci->num_active_eps -= num_dropped_eps;
1971         if (num_dropped_eps)
1972                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1973                                 num_dropped_eps,
1974                                 xhci->num_active_eps);
1975 }
1976
1977 unsigned int xhci_get_block_size(struct usb_device *udev)
1978 {
1979         switch (udev->speed) {
1980         case USB_SPEED_LOW:
1981         case USB_SPEED_FULL:
1982                 return FS_BLOCK;
1983         case USB_SPEED_HIGH:
1984                 return HS_BLOCK;
1985         case USB_SPEED_SUPER:
1986                 return SS_BLOCK;
1987         case USB_SPEED_UNKNOWN:
1988         case USB_SPEED_WIRELESS:
1989         default:
1990                 /* Should never happen */
1991                 return 1;
1992         }
1993 }
1994
1995 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1996 {
1997         if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1998                 return LS_OVERHEAD;
1999         if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2000                 return FS_OVERHEAD;
2001         return HS_OVERHEAD;
2002 }
2003
2004 /* If we are changing a LS/FS device under a HS hub,
2005  * make sure (if we are activating a new TT) that the HS bus has enough
2006  * bandwidth for this new TT.
2007  */
2008 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2009                 struct xhci_virt_device *virt_dev,
2010                 int old_active_eps)
2011 {
2012         struct xhci_interval_bw_table *bw_table;
2013         struct xhci_tt_bw_info *tt_info;
2014
2015         /* Find the bandwidth table for the root port this TT is attached to. */
2016         bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2017         tt_info = virt_dev->tt_info;
2018         /* If this TT already had active endpoints, the bandwidth for this TT
2019          * has already been added.  Removing all periodic endpoints (and thus
2020          * making the TT enactive) will only decrease the bandwidth used.
2021          */
2022         if (old_active_eps)
2023                 return 0;
2024         if (old_active_eps == 0 && tt_info->active_eps != 0) {
2025                 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2026                         return -ENOMEM;
2027                 return 0;
2028         }
2029         /* Not sure why we would have no new active endpoints...
2030          *
2031          * Maybe because of an Evaluate Context change for a hub update or a
2032          * control endpoint 0 max packet size change?
2033          * FIXME: skip the bandwidth calculation in that case.
2034          */
2035         return 0;
2036 }
2037
2038 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2039                 struct xhci_virt_device *virt_dev)
2040 {
2041         unsigned int bw_reserved;
2042
2043         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2044         if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2045                 return -ENOMEM;
2046
2047         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2048         if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2049                 return -ENOMEM;
2050
2051         return 0;
2052 }
2053
2054 /*
2055  * This algorithm is a very conservative estimate of the worst-case scheduling
2056  * scenario for any one interval.  The hardware dynamically schedules the
2057  * packets, so we can't tell which microframe could be the limiting factor in
2058  * the bandwidth scheduling.  This only takes into account periodic endpoints.
2059  *
2060  * Obviously, we can't solve an NP complete problem to find the minimum worst
2061  * case scenario.  Instead, we come up with an estimate that is no less than
2062  * the worst case bandwidth used for any one microframe, but may be an
2063  * over-estimate.
2064  *
2065  * We walk the requirements for each endpoint by interval, starting with the
2066  * smallest interval, and place packets in the schedule where there is only one
2067  * possible way to schedule packets for that interval.  In order to simplify
2068  * this algorithm, we record the largest max packet size for each interval, and
2069  * assume all packets will be that size.
2070  *
2071  * For interval 0, we obviously must schedule all packets for each interval.
2072  * The bandwidth for interval 0 is just the amount of data to be transmitted
2073  * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2074  * the number of packets).
2075  *
2076  * For interval 1, we have two possible microframes to schedule those packets
2077  * in.  For this algorithm, if we can schedule the same number of packets for
2078  * each possible scheduling opportunity (each microframe), we will do so.  The
2079  * remaining number of packets will be saved to be transmitted in the gaps in
2080  * the next interval's scheduling sequence.
2081  *
2082  * As we move those remaining packets to be scheduled with interval 2 packets,
2083  * we have to double the number of remaining packets to transmit.  This is
2084  * because the intervals are actually powers of 2, and we would be transmitting
2085  * the previous interval's packets twice in this interval.  We also have to be
2086  * sure that when we look at the largest max packet size for this interval, we
2087  * also look at the largest max packet size for the remaining packets and take
2088  * the greater of the two.
2089  *
2090  * The algorithm continues to evenly distribute packets in each scheduling
2091  * opportunity, and push the remaining packets out, until we get to the last
2092  * interval.  Then those packets and their associated overhead are just added
2093  * to the bandwidth used.
2094  */
2095 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2096                 struct xhci_virt_device *virt_dev,
2097                 int old_active_eps)
2098 {
2099         unsigned int bw_reserved;
2100         unsigned int max_bandwidth;
2101         unsigned int bw_used;
2102         unsigned int block_size;
2103         struct xhci_interval_bw_table *bw_table;
2104         unsigned int packet_size = 0;
2105         unsigned int overhead = 0;
2106         unsigned int packets_transmitted = 0;
2107         unsigned int packets_remaining = 0;
2108         unsigned int i;
2109
2110         if (virt_dev->udev->speed == USB_SPEED_SUPER)
2111                 return xhci_check_ss_bw(xhci, virt_dev);
2112
2113         if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2114                 max_bandwidth = HS_BW_LIMIT;
2115                 /* Convert percent of bus BW reserved to blocks reserved */
2116                 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2117         } else {
2118                 max_bandwidth = FS_BW_LIMIT;
2119                 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2120         }
2121
2122         bw_table = virt_dev->bw_table;
2123         /* We need to translate the max packet size and max ESIT payloads into
2124          * the units the hardware uses.
2125          */
2126         block_size = xhci_get_block_size(virt_dev->udev);
2127
2128         /* If we are manipulating a LS/FS device under a HS hub, double check
2129          * that the HS bus has enough bandwidth if we are activing a new TT.
2130          */
2131         if (virt_dev->tt_info) {
2132                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2133                                 virt_dev->real_port);
2134                 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2135                         xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2136                                         "newly activated TT.\n");
2137                         return -ENOMEM;
2138                 }
2139                 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
2140                                 virt_dev->tt_info->slot_id,
2141                                 virt_dev->tt_info->ttport);
2142         } else {
2143                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2144                                 virt_dev->real_port);
2145         }
2146
2147         /* Add in how much bandwidth will be used for interval zero, or the
2148          * rounded max ESIT payload + number of packets * largest overhead.
2149          */
2150         bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2151                 bw_table->interval_bw[0].num_packets *
2152                 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2153
2154         for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2155                 unsigned int bw_added;
2156                 unsigned int largest_mps;
2157                 unsigned int interval_overhead;
2158
2159                 /*
2160                  * How many packets could we transmit in this interval?
2161                  * If packets didn't fit in the previous interval, we will need
2162                  * to transmit that many packets twice within this interval.
2163                  */
2164                 packets_remaining = 2 * packets_remaining +
2165                         bw_table->interval_bw[i].num_packets;
2166
2167                 /* Find the largest max packet size of this or the previous
2168                  * interval.
2169                  */
2170                 if (list_empty(&bw_table->interval_bw[i].endpoints))
2171                         largest_mps = 0;
2172                 else {
2173                         struct xhci_virt_ep *virt_ep;
2174                         struct list_head *ep_entry;
2175
2176                         ep_entry = bw_table->interval_bw[i].endpoints.next;
2177                         virt_ep = list_entry(ep_entry,
2178                                         struct xhci_virt_ep, bw_endpoint_list);
2179                         /* Convert to blocks, rounding up */
2180                         largest_mps = DIV_ROUND_UP(
2181                                         virt_ep->bw_info.max_packet_size,
2182                                         block_size);
2183                 }
2184                 if (largest_mps > packet_size)
2185                         packet_size = largest_mps;
2186
2187                 /* Use the larger overhead of this or the previous interval. */
2188                 interval_overhead = xhci_get_largest_overhead(
2189                                 &bw_table->interval_bw[i]);
2190                 if (interval_overhead > overhead)
2191                         overhead = interval_overhead;
2192
2193                 /* How many packets can we evenly distribute across
2194                  * (1 << (i + 1)) possible scheduling opportunities?
2195                  */
2196                 packets_transmitted = packets_remaining >> (i + 1);
2197
2198                 /* Add in the bandwidth used for those scheduled packets */
2199                 bw_added = packets_transmitted * (overhead + packet_size);
2200
2201                 /* How many packets do we have remaining to transmit? */
2202                 packets_remaining = packets_remaining % (1 << (i + 1));
2203
2204                 /* What largest max packet size should those packets have? */
2205                 /* If we've transmitted all packets, don't carry over the
2206                  * largest packet size.
2207                  */
2208                 if (packets_remaining == 0) {
2209                         packet_size = 0;
2210                         overhead = 0;
2211                 } else if (packets_transmitted > 0) {
2212                         /* Otherwise if we do have remaining packets, and we've
2213                          * scheduled some packets in this interval, take the
2214                          * largest max packet size from endpoints with this
2215                          * interval.
2216                          */
2217                         packet_size = largest_mps;
2218                         overhead = interval_overhead;
2219                 }
2220                 /* Otherwise carry over packet_size and overhead from the last
2221                  * time we had a remainder.
2222                  */
2223                 bw_used += bw_added;
2224                 if (bw_used > max_bandwidth) {
2225                         xhci_warn(xhci, "Not enough bandwidth. "
2226                                         "Proposed: %u, Max: %u\n",
2227                                 bw_used, max_bandwidth);
2228                         return -ENOMEM;
2229                 }
2230         }
2231         /*
2232          * Ok, we know we have some packets left over after even-handedly
2233          * scheduling interval 15.  We don't know which microframes they will
2234          * fit into, so we over-schedule and say they will be scheduled every
2235          * microframe.
2236          */
2237         if (packets_remaining > 0)
2238                 bw_used += overhead + packet_size;
2239
2240         if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2241                 unsigned int port_index = virt_dev->real_port - 1;
2242
2243                 /* OK, we're manipulating a HS device attached to a
2244                  * root port bandwidth domain.  Include the number of active TTs
2245                  * in the bandwidth used.
2246                  */
2247                 bw_used += TT_HS_OVERHEAD *
2248                         xhci->rh_bw[port_index].num_active_tts;
2249         }
2250
2251         xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2252                 "Available: %u " "percent\n",
2253                 bw_used, max_bandwidth, bw_reserved,
2254                 (max_bandwidth - bw_used - bw_reserved) * 100 /
2255                 max_bandwidth);
2256
2257         bw_used += bw_reserved;
2258         if (bw_used > max_bandwidth) {
2259                 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2260                                 bw_used, max_bandwidth);
2261                 return -ENOMEM;
2262         }
2263
2264         bw_table->bw_used = bw_used;
2265         return 0;
2266 }
2267
2268 static bool xhci_is_async_ep(unsigned int ep_type)
2269 {
2270         return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2271                                         ep_type != ISOC_IN_EP &&
2272                                         ep_type != INT_IN_EP);
2273 }
2274
2275 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2276 {
2277         return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2278 }
2279
2280 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2281 {
2282         unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2283
2284         if (ep_bw->ep_interval == 0)
2285                 return SS_OVERHEAD_BURST +
2286                         (ep_bw->mult * ep_bw->num_packets *
2287                                         (SS_OVERHEAD + mps));
2288         return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2289                                 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2290                                 1 << ep_bw->ep_interval);
2291
2292 }
2293
2294 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2295                 struct xhci_bw_info *ep_bw,
2296                 struct xhci_interval_bw_table *bw_table,
2297                 struct usb_device *udev,
2298                 struct xhci_virt_ep *virt_ep,
2299                 struct xhci_tt_bw_info *tt_info)
2300 {
2301         struct xhci_interval_bw *interval_bw;
2302         int normalized_interval;
2303
2304         if (xhci_is_async_ep(ep_bw->type))
2305                 return;
2306
2307         if (udev->speed == USB_SPEED_SUPER) {
2308                 if (xhci_is_sync_in_ep(ep_bw->type))
2309                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2310                                 xhci_get_ss_bw_consumed(ep_bw);
2311                 else
2312                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2313                                 xhci_get_ss_bw_consumed(ep_bw);
2314                 return;
2315         }
2316
2317         /* SuperSpeed endpoints never get added to intervals in the table, so
2318          * this check is only valid for HS/FS/LS devices.
2319          */
2320         if (list_empty(&virt_ep->bw_endpoint_list))
2321                 return;
2322         /* For LS/FS devices, we need to translate the interval expressed in
2323          * microframes to frames.
2324          */
2325         if (udev->speed == USB_SPEED_HIGH)
2326                 normalized_interval = ep_bw->ep_interval;
2327         else
2328                 normalized_interval = ep_bw->ep_interval - 3;
2329
2330         if (normalized_interval == 0)
2331                 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2332         interval_bw = &bw_table->interval_bw[normalized_interval];
2333         interval_bw->num_packets -= ep_bw->num_packets;
2334         switch (udev->speed) {
2335         case USB_SPEED_LOW:
2336                 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2337                 break;
2338         case USB_SPEED_FULL:
2339                 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2340                 break;
2341         case USB_SPEED_HIGH:
2342                 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2343                 break;
2344         case USB_SPEED_SUPER:
2345         case USB_SPEED_UNKNOWN:
2346         case USB_SPEED_WIRELESS:
2347                 /* Should never happen because only LS/FS/HS endpoints will get
2348                  * added to the endpoint list.
2349                  */
2350                 return;
2351         }
2352         if (tt_info)
2353                 tt_info->active_eps -= 1;
2354         list_del_init(&virt_ep->bw_endpoint_list);
2355 }
2356
2357 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2358                 struct xhci_bw_info *ep_bw,
2359                 struct xhci_interval_bw_table *bw_table,
2360                 struct usb_device *udev,
2361                 struct xhci_virt_ep *virt_ep,
2362                 struct xhci_tt_bw_info *tt_info)
2363 {
2364         struct xhci_interval_bw *interval_bw;
2365         struct xhci_virt_ep *smaller_ep;
2366         int normalized_interval;
2367
2368         if (xhci_is_async_ep(ep_bw->type))
2369                 return;
2370
2371         if (udev->speed == USB_SPEED_SUPER) {
2372                 if (xhci_is_sync_in_ep(ep_bw->type))
2373                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2374                                 xhci_get_ss_bw_consumed(ep_bw);
2375                 else
2376                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2377                                 xhci_get_ss_bw_consumed(ep_bw);
2378                 return;
2379         }
2380
2381         /* For LS/FS devices, we need to translate the interval expressed in
2382          * microframes to frames.
2383          */
2384         if (udev->speed == USB_SPEED_HIGH)
2385                 normalized_interval = ep_bw->ep_interval;
2386         else
2387                 normalized_interval = ep_bw->ep_interval - 3;
2388
2389         if (normalized_interval == 0)
2390                 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2391         interval_bw = &bw_table->interval_bw[normalized_interval];
2392         interval_bw->num_packets += ep_bw->num_packets;
2393         switch (udev->speed) {
2394         case USB_SPEED_LOW:
2395                 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2396                 break;
2397         case USB_SPEED_FULL:
2398                 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2399                 break;
2400         case USB_SPEED_HIGH:
2401                 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2402                 break;
2403         case USB_SPEED_SUPER:
2404         case USB_SPEED_UNKNOWN:
2405         case USB_SPEED_WIRELESS:
2406                 /* Should never happen because only LS/FS/HS endpoints will get
2407                  * added to the endpoint list.
2408                  */
2409                 return;
2410         }
2411
2412         if (tt_info)
2413                 tt_info->active_eps += 1;
2414         /* Insert the endpoint into the list, largest max packet size first. */
2415         list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2416                         bw_endpoint_list) {
2417                 if (ep_bw->max_packet_size >=
2418                                 smaller_ep->bw_info.max_packet_size) {
2419                         /* Add the new ep before the smaller endpoint */
2420                         list_add_tail(&virt_ep->bw_endpoint_list,
2421                                         &smaller_ep->bw_endpoint_list);
2422                         return;
2423                 }
2424         }
2425         /* Add the new endpoint at the end of the list. */
2426         list_add_tail(&virt_ep->bw_endpoint_list,
2427                         &interval_bw->endpoints);
2428 }
2429
2430 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2431                 struct xhci_virt_device *virt_dev,
2432                 int old_active_eps)
2433 {
2434         struct xhci_root_port_bw_info *rh_bw_info;
2435         if (!virt_dev->tt_info)
2436                 return;
2437
2438         rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2439         if (old_active_eps == 0 &&
2440                                 virt_dev->tt_info->active_eps != 0) {
2441                 rh_bw_info->num_active_tts += 1;
2442                 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2443         } else if (old_active_eps != 0 &&
2444                                 virt_dev->tt_info->active_eps == 0) {
2445                 rh_bw_info->num_active_tts -= 1;
2446                 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2447         }
2448 }
2449
2450 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2451                 struct xhci_virt_device *virt_dev,
2452                 struct xhci_container_ctx *in_ctx)
2453 {
2454         struct xhci_bw_info ep_bw_info[31];
2455         int i;
2456         struct xhci_input_control_ctx *ctrl_ctx;
2457         int old_active_eps = 0;
2458
2459         if (virt_dev->tt_info)
2460                 old_active_eps = virt_dev->tt_info->active_eps;
2461
2462         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2463
2464         for (i = 0; i < 31; i++) {
2465                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2466                         continue;
2467
2468                 /* Make a copy of the BW info in case we need to revert this */
2469                 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2470                                 sizeof(ep_bw_info[i]));
2471                 /* Drop the endpoint from the interval table if the endpoint is
2472                  * being dropped or changed.
2473                  */
2474                 if (EP_IS_DROPPED(ctrl_ctx, i))
2475                         xhci_drop_ep_from_interval_table(xhci,
2476                                         &virt_dev->eps[i].bw_info,
2477                                         virt_dev->bw_table,
2478                                         virt_dev->udev,
2479                                         &virt_dev->eps[i],
2480                                         virt_dev->tt_info);
2481         }
2482         /* Overwrite the information stored in the endpoints' bw_info */
2483         xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2484         for (i = 0; i < 31; i++) {
2485                 /* Add any changed or added endpoints to the interval table */
2486                 if (EP_IS_ADDED(ctrl_ctx, i))
2487                         xhci_add_ep_to_interval_table(xhci,
2488                                         &virt_dev->eps[i].bw_info,
2489                                         virt_dev->bw_table,
2490                                         virt_dev->udev,
2491                                         &virt_dev->eps[i],
2492                                         virt_dev->tt_info);
2493         }
2494
2495         if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2496                 /* Ok, this fits in the bandwidth we have.
2497                  * Update the number of active TTs.
2498                  */
2499                 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2500                 return 0;
2501         }
2502
2503         /* We don't have enough bandwidth for this, revert the stored info. */
2504         for (i = 0; i < 31; i++) {
2505                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2506                         continue;
2507
2508                 /* Drop the new copies of any added or changed endpoints from
2509                  * the interval table.
2510                  */
2511                 if (EP_IS_ADDED(ctrl_ctx, i)) {
2512                         xhci_drop_ep_from_interval_table(xhci,
2513                                         &virt_dev->eps[i].bw_info,
2514                                         virt_dev->bw_table,
2515                                         virt_dev->udev,
2516                                         &virt_dev->eps[i],
2517                                         virt_dev->tt_info);
2518                 }
2519                 /* Revert the endpoint back to its old information */
2520                 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2521                                 sizeof(ep_bw_info[i]));
2522                 /* Add any changed or dropped endpoints back into the table */
2523                 if (EP_IS_DROPPED(ctrl_ctx, i))
2524                         xhci_add_ep_to_interval_table(xhci,
2525                                         &virt_dev->eps[i].bw_info,
2526                                         virt_dev->bw_table,
2527                                         virt_dev->udev,
2528                                         &virt_dev->eps[i],
2529                                         virt_dev->tt_info);
2530         }
2531         return -ENOMEM;
2532 }
2533
2534
2535 /* Issue a configure endpoint command or evaluate context command
2536  * and wait for it to finish.
2537  */
2538 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2539                 struct usb_device *udev,
2540                 struct xhci_command *command,
2541                 bool ctx_change, bool must_succeed)
2542 {
2543         int ret;
2544         int timeleft;
2545         unsigned long flags;
2546         struct xhci_container_ctx *in_ctx;
2547         struct completion *cmd_completion;
2548         u32 *cmd_status;
2549         struct xhci_virt_device *virt_dev;
2550         union xhci_trb *cmd_trb;
2551
2552         spin_lock_irqsave(&xhci->lock, flags);
2553         virt_dev = xhci->devs[udev->slot_id];
2554
2555         if (command)
2556                 in_ctx = command->in_ctx;
2557         else
2558                 in_ctx = virt_dev->in_ctx;
2559
2560         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2561                         xhci_reserve_host_resources(xhci, in_ctx)) {
2562                 spin_unlock_irqrestore(&xhci->lock, flags);
2563                 xhci_warn(xhci, "Not enough host resources, "
2564                                 "active endpoint contexts = %u\n",
2565                                 xhci->num_active_eps);
2566                 return -ENOMEM;
2567         }
2568         if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2569                         xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2570                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2571                         xhci_free_host_resources(xhci, in_ctx);
2572                 spin_unlock_irqrestore(&xhci->lock, flags);
2573                 xhci_warn(xhci, "Not enough bandwidth\n");
2574                 return -ENOMEM;
2575         }
2576
2577         if (command) {
2578                 cmd_completion = command->completion;
2579                 cmd_status = &command->status;
2580                 command->command_trb = xhci->cmd_ring->enqueue;
2581
2582                 /* Enqueue pointer can be left pointing to the link TRB,
2583                  * we must handle that
2584                  */
2585                 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2586                         command->command_trb =
2587                                 xhci->cmd_ring->enq_seg->next->trbs;
2588
2589                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2590         } else {
2591                 cmd_completion = &virt_dev->cmd_completion;
2592                 cmd_status = &virt_dev->cmd_status;
2593         }
2594         init_completion(cmd_completion);
2595
2596         cmd_trb = xhci->cmd_ring->dequeue;
2597         if (!ctx_change)
2598                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2599                                 udev->slot_id, must_succeed);
2600         else
2601                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2602                                 udev->slot_id);
2603         if (ret < 0) {
2604                 if (command)
2605                         list_del(&command->cmd_list);
2606                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2607                         xhci_free_host_resources(xhci, in_ctx);
2608                 spin_unlock_irqrestore(&xhci->lock, flags);
2609                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2610                 return -ENOMEM;
2611         }
2612         xhci_ring_cmd_db(xhci);
2613         spin_unlock_irqrestore(&xhci->lock, flags);
2614
2615         /* Wait for the configure endpoint command to complete */
2616         timeleft = wait_for_completion_interruptible_timeout(
2617                         cmd_completion,
2618                         XHCI_CMD_DEFAULT_TIMEOUT);
2619         if (timeleft <= 0) {
2620                 xhci_warn(xhci, "%s while waiting for %s command\n",
2621                                 timeleft == 0 ? "Timeout" : "Signal",
2622                                 ctx_change == 0 ?
2623                                         "configure endpoint" :
2624                                         "evaluate context");
2625                 /* cancel the configure endpoint command */
2626                 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2627                 if (ret < 0)
2628                         return ret;
2629                 return -ETIME;
2630         }
2631
2632         if (!ctx_change)
2633                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2634         else
2635                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2636
2637         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2638                 spin_lock_irqsave(&xhci->lock, flags);
2639                 /* If the command failed, remove the reserved resources.
2640                  * Otherwise, clean up the estimate to include dropped eps.
2641                  */
2642                 if (ret)
2643                         xhci_free_host_resources(xhci, in_ctx);
2644                 else
2645                         xhci_finish_resource_reservation(xhci, in_ctx);
2646                 spin_unlock_irqrestore(&xhci->lock, flags);
2647         }
2648         return ret;
2649 }
2650
2651 /* Called after one or more calls to xhci_add_endpoint() or
2652  * xhci_drop_endpoint().  If this call fails, the USB core is expected
2653  * to call xhci_reset_bandwidth().
2654  *
2655  * Since we are in the middle of changing either configuration or
2656  * installing a new alt setting, the USB core won't allow URBs to be
2657  * enqueued for any endpoint on the old config or interface.  Nothing
2658  * else should be touching the xhci->devs[slot_id] structure, so we
2659  * don't need to take the xhci->lock for manipulating that.
2660  */
2661 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2662 {
2663         int i;
2664         int ret = 0;
2665         struct xhci_hcd *xhci;
2666         struct xhci_virt_device *virt_dev;
2667         struct xhci_input_control_ctx *ctrl_ctx;
2668         struct xhci_slot_ctx *slot_ctx;
2669
2670         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2671         if (ret <= 0)
2672                 return ret;
2673         xhci = hcd_to_xhci(hcd);
2674         if (xhci->xhc_state & XHCI_STATE_DYING)
2675                 return -ENODEV;
2676
2677         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2678         virt_dev = xhci->devs[udev->slot_id];
2679
2680         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2681         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2682         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2683         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2684         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2685
2686         /* Don't issue the command if there's no endpoints to update. */
2687         if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2688                         ctrl_ctx->drop_flags == 0)
2689                 return 0;
2690
2691         xhci_dbg(xhci, "New Input Control Context:\n");
2692         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2693         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2694                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2695
2696         ret = xhci_configure_endpoint(xhci, udev, NULL,
2697                         false, false);
2698         if (ret) {
2699                 /* Callee should call reset_bandwidth() */
2700                 return ret;
2701         }
2702
2703         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2704         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2705                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2706
2707         /* Free any rings that were dropped, but not changed. */
2708         for (i = 1; i < 31; ++i) {
2709                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2710                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2711                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2712         }
2713         xhci_zero_in_ctx(xhci, virt_dev);
2714         /*
2715          * Install any rings for completely new endpoints or changed endpoints,
2716          * and free or cache any old rings from changed endpoints.
2717          */
2718         for (i = 1; i < 31; ++i) {
2719                 if (!virt_dev->eps[i].new_ring)
2720                         continue;
2721                 /* Only cache or free the old ring if it exists.
2722                  * It may not if this is the first add of an endpoint.
2723                  */
2724                 if (virt_dev->eps[i].ring) {
2725                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2726                 }
2727                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2728                 virt_dev->eps[i].new_ring = NULL;
2729         }
2730
2731         return ret;
2732 }
2733
2734 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2735 {
2736         struct xhci_hcd *xhci;
2737         struct xhci_virt_device *virt_dev;
2738         int i, ret;
2739
2740         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2741         if (ret <= 0)
2742                 return;
2743         xhci = hcd_to_xhci(hcd);
2744
2745         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2746         virt_dev = xhci->devs[udev->slot_id];
2747         /* Free any rings allocated for added endpoints */
2748         for (i = 0; i < 31; ++i) {
2749                 if (virt_dev->eps[i].new_ring) {
2750                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2751                         virt_dev->eps[i].new_ring = NULL;
2752                 }
2753         }
2754         xhci_zero_in_ctx(xhci, virt_dev);
2755 }
2756
2757 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2758                 struct xhci_container_ctx *in_ctx,
2759                 struct xhci_container_ctx *out_ctx,
2760                 u32 add_flags, u32 drop_flags)
2761 {
2762         struct xhci_input_control_ctx *ctrl_ctx;
2763         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2764         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2765         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2766         xhci_slot_copy(xhci, in_ctx, out_ctx);
2767         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2768
2769         xhci_dbg(xhci, "Input Context:\n");
2770         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2771 }
2772
2773 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2774                 unsigned int slot_id, unsigned int ep_index,
2775                 struct xhci_dequeue_state *deq_state)
2776 {
2777         struct xhci_container_ctx *in_ctx;
2778         struct xhci_ep_ctx *ep_ctx;
2779         u32 added_ctxs;
2780         dma_addr_t addr;
2781
2782         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2783                         xhci->devs[slot_id]->out_ctx, ep_index);
2784         in_ctx = xhci->devs[slot_id]->in_ctx;
2785         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2786         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2787                         deq_state->new_deq_ptr);
2788         if (addr == 0) {
2789                 xhci_warn(xhci, "WARN Cannot submit config ep after "
2790                                 "reset ep command\n");
2791                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2792                                 deq_state->new_deq_seg,
2793                                 deq_state->new_deq_ptr);
2794                 return;
2795         }
2796         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2797
2798         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2799         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2800                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2801 }
2802
2803 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2804                 struct usb_device *udev, unsigned int ep_index)
2805 {
2806         struct xhci_dequeue_state deq_state;
2807         struct xhci_virt_ep *ep;
2808
2809         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2810         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2811         /* We need to move the HW's dequeue pointer past this TD,
2812          * or it will attempt to resend it on the next doorbell ring.
2813          */
2814         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2815                         ep_index, ep->stopped_stream, ep->stopped_td,
2816                         &deq_state);
2817
2818         /* HW with the reset endpoint quirk will use the saved dequeue state to
2819          * issue a configure endpoint command later.
2820          */
2821         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2822                 xhci_dbg(xhci, "Queueing new dequeue state\n");
2823                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2824                                 ep_index, ep->stopped_stream, &deq_state);
2825         } else {
2826                 /* Better hope no one uses the input context between now and the
2827                  * reset endpoint completion!
2828                  * XXX: No idea how this hardware will react when stream rings
2829                  * are enabled.
2830                  */
2831                 xhci_dbg(xhci, "Setting up input context for "
2832                                 "configure endpoint command\n");
2833                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2834                                 ep_index, &deq_state);
2835         }
2836 }
2837
2838 /* Deal with stalled endpoints.  The core should have sent the control message
2839  * to clear the halt condition.  However, we need to make the xHCI hardware
2840  * reset its sequence number, since a device will expect a sequence number of
2841  * zero after the halt condition is cleared.
2842  * Context: in_interrupt
2843  */
2844 void xhci_endpoint_reset(struct usb_hcd *hcd,
2845                 struct usb_host_endpoint *ep)
2846 {
2847         struct xhci_hcd *xhci;
2848         struct usb_device *udev;
2849         unsigned int ep_index;
2850         unsigned long flags;
2851         int ret;
2852         struct xhci_virt_ep *virt_ep;
2853
2854         xhci = hcd_to_xhci(hcd);
2855         udev = (struct usb_device *) ep->hcpriv;
2856         /* Called with a root hub endpoint (or an endpoint that wasn't added
2857          * with xhci_add_endpoint()
2858          */
2859         if (!ep->hcpriv)
2860                 return;
2861         ep_index = xhci_get_endpoint_index(&ep->desc);
2862         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2863         if (!virt_ep->stopped_td) {
2864                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2865                                 ep->desc.bEndpointAddress);
2866                 return;
2867         }
2868         if (usb_endpoint_xfer_control(&ep->desc)) {
2869                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2870                 return;
2871         }
2872
2873         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2874         spin_lock_irqsave(&xhci->lock, flags);
2875         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2876         /*
2877          * Can't change the ring dequeue pointer until it's transitioned to the
2878          * stopped state, which is only upon a successful reset endpoint
2879          * command.  Better hope that last command worked!
2880          */
2881         if (!ret) {
2882                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2883                 kfree(virt_ep->stopped_td);
2884                 xhci_ring_cmd_db(xhci);
2885         }
2886         virt_ep->stopped_td = NULL;
2887         virt_ep->stopped_trb = NULL;
2888         virt_ep->stopped_stream = 0;
2889         spin_unlock_irqrestore(&xhci->lock, flags);
2890
2891         if (ret)
2892                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2893 }
2894
2895 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2896                 struct usb_device *udev, struct usb_host_endpoint *ep,
2897                 unsigned int slot_id)
2898 {
2899         int ret;
2900         unsigned int ep_index;
2901         unsigned int ep_state;
2902
2903         if (!ep)
2904                 return -EINVAL;
2905         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2906         if (ret <= 0)
2907                 return -EINVAL;
2908         if (ep->ss_ep_comp.bmAttributes == 0) {
2909                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2910                                 " descriptor for ep 0x%x does not support streams\n",
2911                                 ep->desc.bEndpointAddress);
2912                 return -EINVAL;
2913         }
2914
2915         ep_index = xhci_get_endpoint_index(&ep->desc);
2916         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2917         if (ep_state & EP_HAS_STREAMS ||
2918                         ep_state & EP_GETTING_STREAMS) {
2919                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2920                                 "already has streams set up.\n",
2921                                 ep->desc.bEndpointAddress);
2922                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2923                                 "dynamic stream context array reallocation.\n");
2924                 return -EINVAL;
2925         }
2926         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2927                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2928                                 "endpoint 0x%x; URBs are pending.\n",
2929                                 ep->desc.bEndpointAddress);
2930                 return -EINVAL;
2931         }
2932         return 0;
2933 }
2934
2935 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2936                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2937 {
2938         unsigned int max_streams;
2939
2940         /* The stream context array size must be a power of two */
2941         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2942         /*
2943          * Find out how many primary stream array entries the host controller
2944          * supports.  Later we may use secondary stream arrays (similar to 2nd
2945          * level page entries), but that's an optional feature for xHCI host
2946          * controllers. xHCs must support at least 4 stream IDs.
2947          */
2948         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2949         if (*num_stream_ctxs > max_streams) {
2950                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2951                                 max_streams);
2952                 *num_stream_ctxs = max_streams;
2953                 *num_streams = max_streams;
2954         }
2955 }
2956
2957 /* Returns an error code if one of the endpoint already has streams.
2958  * This does not change any data structures, it only checks and gathers
2959  * information.
2960  */
2961 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2962                 struct usb_device *udev,
2963                 struct usb_host_endpoint **eps, unsigned int num_eps,
2964                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2965 {
2966         unsigned int max_streams;
2967         unsigned int endpoint_flag;
2968         int i;
2969         int ret;
2970
2971         for (i = 0; i < num_eps; i++) {
2972                 ret = xhci_check_streams_endpoint(xhci, udev,
2973                                 eps[i], udev->slot_id);
2974                 if (ret < 0)
2975                         return ret;
2976
2977                 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2978                 if (max_streams < (*num_streams - 1)) {
2979                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2980                                         eps[i]->desc.bEndpointAddress,
2981                                         max_streams);
2982                         *num_streams = max_streams+1;
2983                 }
2984
2985                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2986                 if (*changed_ep_bitmask & endpoint_flag)
2987                         return -EINVAL;
2988                 *changed_ep_bitmask |= endpoint_flag;
2989         }
2990         return 0;
2991 }
2992
2993 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2994                 struct usb_device *udev,
2995                 struct usb_host_endpoint **eps, unsigned int num_eps)
2996 {
2997         u32 changed_ep_bitmask = 0;
2998         unsigned int slot_id;
2999         unsigned int ep_index;
3000         unsigned int ep_state;
3001         int i;
3002
3003         slot_id = udev->slot_id;
3004         if (!xhci->devs[slot_id])
3005                 return 0;
3006
3007         for (i = 0; i < num_eps; i++) {
3008                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3009                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3010                 /* Are streams already being freed for the endpoint? */
3011                 if (ep_state & EP_GETTING_NO_STREAMS) {
3012                         xhci_warn(xhci, "WARN Can't disable streams for "
3013                                         "endpoint 0x%x\n, "
3014                                         "streams are being disabled already.",
3015                                         eps[i]->desc.bEndpointAddress);
3016                         return 0;
3017                 }
3018                 /* Are there actually any streams to free? */
3019                 if (!(ep_state & EP_HAS_STREAMS) &&
3020                                 !(ep_state & EP_GETTING_STREAMS)) {
3021                         xhci_warn(xhci, "WARN Can't disable streams for "
3022                                         "endpoint 0x%x\n, "
3023                                         "streams are already disabled!",
3024                                         eps[i]->desc.bEndpointAddress);
3025                         xhci_warn(xhci, "WARN xhci_free_streams() called "
3026                                         "with non-streams endpoint\n");
3027                         return 0;
3028                 }
3029                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3030         }
3031         return changed_ep_bitmask;
3032 }
3033
3034 /*
3035  * The USB device drivers use this function (though the HCD interface in USB
3036  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
3037  * coordinate mass storage command queueing across multiple endpoints (basically
3038  * a stream ID == a task ID).
3039  *
3040  * Setting up streams involves allocating the same size stream context array
3041  * for each endpoint and issuing a configure endpoint command for all endpoints.
3042  *
3043  * Don't allow the call to succeed if one endpoint only supports one stream
3044  * (which means it doesn't support streams at all).
3045  *
3046  * Drivers may get less stream IDs than they asked for, if the host controller
3047  * hardware or endpoints claim they can't support the number of requested
3048  * stream IDs.
3049  */
3050 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3051                 struct usb_host_endpoint **eps, unsigned int num_eps,
3052                 unsigned int num_streams, gfp_t mem_flags)
3053 {
3054         int i, ret;
3055         struct xhci_hcd *xhci;
3056         struct xhci_virt_device *vdev;
3057         struct xhci_command *config_cmd;
3058         unsigned int ep_index;
3059         unsigned int num_stream_ctxs;
3060         unsigned long flags;
3061         u32 changed_ep_bitmask = 0;
3062
3063         if (!eps)
3064                 return -EINVAL;
3065
3066         /* Add one to the number of streams requested to account for
3067          * stream 0 that is reserved for xHCI usage.
3068          */
3069         num_streams += 1;
3070         xhci = hcd_to_xhci(hcd);
3071         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3072                         num_streams);
3073
3074         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3075         if (!config_cmd) {
3076                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3077                 return -ENOMEM;
3078         }
3079
3080         /* Check to make sure all endpoints are not already configured for
3081          * streams.  While we're at it, find the maximum number of streams that
3082          * all the endpoints will support and check for duplicate endpoints.
3083          */
3084         spin_lock_irqsave(&xhci->lock, flags);
3085         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3086                         num_eps, &num_streams, &changed_ep_bitmask);
3087         if (ret < 0) {