drivers/usb/host/xhci-pci.c

   1 /*
   2  * xHCI host controller driver PCI Bus Glue.
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/pci.h>
  24 #include <linux/slab.h>
  25
  26 #include "xhci.h"
  27
  28 /* Device for a quirk */
  29 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
  30 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
  31
  32 static const char hcd_name[] = "xhci_hcd";
  33
  34 /* called after powerup, by probe or system-pm "wakeup" */
  35 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
  36 {
  37         /*
  38          * TODO: Implement finding debug ports later.
  39          * TODO: see if there are any quirks that need to be added to handle
  40          * new extended capabilities.
  41          */
  42
  43         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
  44         if (!pci_set_mwi(pdev))
  45                 xhci_dbg(xhci, "MWI active\n");
  46
  47         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
  48         return 0;
  49 }
  50
  51 /* called during probe() after chip reset completes */
  52 static int xhci_pci_setup(struct usb_hcd *hcd)
  53 {
  54         struct xhci_hcd         *xhci;
  55         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
  56         int                     retval;
  57         u32                     temp;
  58
  59         hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
  60
  61         if (usb_hcd_is_primary_hcd(hcd)) {
  62                 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
  63                 if (!xhci)
  64                         return -ENOMEM;
  65                 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
  66                 xhci->main_hcd = hcd;
  67                 /* Mark the first roothub as being USB 2.0.
  68                  * The xHCI driver will register the USB 3.0 roothub.
  69                  */
  70                 hcd->speed = HCD_USB2;
  71                 hcd->self.root_hub->speed = USB_SPEED_HIGH;
  72                 /*
  73                  * USB 2.0 roothub under xHCI has an integrated TT,
  74                  * (rate matching hub) as opposed to having an OHCI/UHCI
  75                  * companion controller.
  76                  */
  77                 hcd->has_tt = 1;
  78         } else {
  79                 /* xHCI private pointer was set in xhci_pci_probe for the second
  80                  * registered roothub.
  81                  */
  82                 xhci = hcd_to_xhci(hcd);
  83                 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
  84                 if (HCC_64BIT_ADDR(temp)) {
  85                         xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
  86                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
  87                 } else {
  88                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
  89                 }
  90                 return 0;
  91         }
  92
  93         xhci->cap_regs = hcd->regs;
  94         xhci->op_regs = hcd->regs +
  95                 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
  96         xhci->run_regs = hcd->regs +
  97                 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
  98         /* Cache read-only capability registers */
  99         xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
 100         xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
 101         xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
 102         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
 103         xhci->hci_version = HC_VERSION(xhci->hcc_params);
 104         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
 105         xhci_print_registers(xhci);
 106
 107         /* Look for vendor-specific quirks */
 108         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
 109                         pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
 110                         pdev->revision == 0x0) {
 111                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
 112                         xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
 113                                         " endpoint cmd after reset endpoint\n");
 114         }
 115         if (pdev->vendor == PCI_VENDOR_ID_NEC)
 116                 xhci->quirks |= XHCI_NEC_HOST;
 117
 118         /* AMD PLL quirk */
 119         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
 120                 xhci->quirks |= XHCI_AMD_PLL_FIX;
 121
 122         /* Make sure the HC is halted. */
 123         retval = xhci_halt(xhci);
 124         if (retval)
 125                 goto error;
 126
 127         xhci_dbg(xhci, "Resetting HCD\n");
 128         /* Reset the internal HC memory state and registers. */
 129         retval = xhci_reset(xhci);
 130         if (retval)
 131                 goto error;
 132         xhci_dbg(xhci, "Reset complete\n");
 133
 134         temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
 135         if (HCC_64BIT_ADDR(temp)) {
 136                 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
 137                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
 138         } else {
 139                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
 140         }
 141
 142         xhci_dbg(xhci, "Calling HCD init\n");
 143         /* Initialize HCD and host controller data structures. */
 144         retval = xhci_init(hcd);
 145         if (retval)
 146                 goto error;
 147         xhci_dbg(xhci, "Called HCD init\n");
 148
 149         pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
 150         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
 151
 152         /* Find any debug ports */
 153         retval = xhci_pci_reinit(xhci, pdev);
 154         if (!retval)
 155                 return retval;
 156
 157 error:
 158         kfree(xhci);
 159         return retval;
 160 }
 161
 162 /*
 163  * We need to register our own PCI probe function (instead of the USB core's
 164  * function) in order to create a second roothub under xHCI.
 165  */
 166 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 167 {
 168         int retval;
 169         struct xhci_hcd *xhci;
 170         struct hc_driver *driver;
 171         struct usb_hcd *hcd;
 172
 173         driver = (struct hc_driver *)id->driver_data;
 174         /* Register the USB 2.0 roothub.
 175          * FIXME: USB core must know to register the USB 2.0 roothub first.
 176          * This is sort of silly, because we could just set the HCD driver flags
 177          * to say USB 2.0, but I'm not sure what the implications would be in
 178          * the other parts of the HCD code.
 179          */
 180         retval = usb_hcd_pci_probe(dev, id);
 181
 182         if (retval)
 183                 return retval;
 184
 185         /* USB 2.0 roothub is stored in the PCI device now. */
 186         hcd = dev_get_drvdata(&dev->dev);
 187         xhci = hcd_to_xhci(hcd);
 188         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
 189                                 pci_name(dev), hcd);
 190         if (!xhci->shared_hcd) {
 191                 retval = -ENOMEM;
 192                 goto dealloc_usb2_hcd;
 193         }
 194
 195         /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
 196          * is called by usb_add_hcd().
 197          */
 198         *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
 199
 200         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
 201                         IRQF_DISABLED | IRQF_SHARED);
 202         if (retval)
 203                 goto put_usb3_hcd;
 204         /* Roothub already marked as USB 3.0 speed */
 205         return 0;
 206
 207 put_usb3_hcd:
 208         usb_put_hcd(xhci->shared_hcd);
 209 dealloc_usb2_hcd:
 210         usb_hcd_pci_remove(dev);
 211         return retval;
 212 }
 213
 214 static void xhci_pci_remove(struct pci_dev *dev)
 215 {
 216         struct xhci_hcd *xhci;
 217
 218         xhci = hcd_to_xhci(pci_get_drvdata(dev));
 219         if (xhci->shared_hcd) {
 220                 usb_remove_hcd(xhci->shared_hcd);
 221                 usb_put_hcd(xhci->shared_hcd);
 222         }
 223         usb_hcd_pci_remove(dev);
 224         kfree(xhci);
 225 }
 226
 227 #ifdef CONFIG_PM
 228 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
 229 {
 230         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 231         int     retval = 0;
 232
 233         if (hcd->state != HC_STATE_SUSPENDED ||
 234                         xhci->shared_hcd->state != HC_STATE_SUSPENDED)
 235                 return -EINVAL;
 236
 237         retval = xhci_suspend(xhci);
 238
 239         return retval;
 240 }
 241
 242 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
 243 {
 244         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
 245         int                     retval = 0;
 246
 247         retval = xhci_resume(xhci, hibernated);
 248         return retval;
 249 }
 250 #endif /* CONFIG_PM */
 251
 252 static const struct hc_driver xhci_pci_hc_driver = {
 253         .description =          hcd_name,
 254         .product_desc =         "xHCI Host Controller",
 255         .hcd_priv_size =        sizeof(struct xhci_hcd *),
 256
 257         /*
 258          * generic hardware linkage
 259          */
 260         .irq =                  xhci_irq,
 261         .flags =                HCD_MEMORY | HCD_USB3 | HCD_SHARED,
 262
 263         /*
 264          * basic lifecycle operations
 265          */
 266         .reset =                xhci_pci_setup,
 267         .start =                xhci_run,
 268 #ifdef CONFIG_PM
 269         .pci_suspend =          xhci_pci_suspend,
 270         .pci_resume =           xhci_pci_resume,
 271 #endif
 272         .stop =                 xhci_stop,
 273         .shutdown =             xhci_shutdown,
 274
 275         /*
 276          * managing i/o requests and associated device resources
 277          */
 278         .urb_enqueue =          xhci_urb_enqueue,
 279         .urb_dequeue =          xhci_urb_dequeue,
 280         .alloc_dev =            xhci_alloc_dev,
 281         .free_dev =             xhci_free_dev,
 282         .alloc_streams =        xhci_alloc_streams,
 283         .free_streams =         xhci_free_streams,
 284         .add_endpoint =         xhci_add_endpoint,
 285         .drop_endpoint =        xhci_drop_endpoint,
 286         .endpoint_reset =       xhci_endpoint_reset,
 287         .check_bandwidth =      xhci_check_bandwidth,
 288         .reset_bandwidth =      xhci_reset_bandwidth,
 289         .address_device =       xhci_address_device,
 290         .update_hub_device =    xhci_update_hub_device,
 291         .reset_device =         xhci_discover_or_reset_device,
 292
 293         /*
 294          * scheduling support
 295          */
 296         .get_frame_number =     xhci_get_frame,
 297
 298         /* Root hub support */
 299         .hub_control =          xhci_hub_control,
 300         .hub_status_data =      xhci_hub_status_data,
 301         .bus_suspend =          xhci_bus_suspend,
 302         .bus_resume =           xhci_bus_resume,
 303 };
 304
 305 /*-------------------------------------------------------------------------*/
 306
 307 /* PCI driver selection metadata; PCI hotplugging uses this */
 308 static const struct pci_device_id pci_ids[] = { {
 309         /* handle any USB 3.0 xHCI controller */
 310         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
 311         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
 312         },
 313         { /* end: all zeroes */ }
 314 };
 315 MODULE_DEVICE_TABLE(pci, pci_ids);
 316
 317 /* pci driver glue; this is a "new style" PCI driver module */
 318 static struct pci_driver xhci_pci_driver = {
 319         .name =         (char *) hcd_name,
 320         .id_table =     pci_ids,
 321
 322         .probe =        xhci_pci_probe,
 323         .remove =       xhci_pci_remove,
 324         /* suspend and resume implemented later */
 325
 326         .shutdown =     usb_hcd_pci_shutdown,
 327 #ifdef CONFIG_PM_SLEEP
 328         .driver = {
 329                 .pm = &usb_hcd_pci_pm_ops
 330         },
 331 #endif
 332 };
 333
 334 int xhci_register_pci(void)
 335 {
 336         return pci_register_driver(&xhci_pci_driver);
 337 }
 338
 339 void xhci_unregister_pci(void)
 340 {
 341         pci_unregister_driver(&xhci_pci_driver);
 342 }