2 * xHCI host controller driver PCI Bus Glue.
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/slab.h>
25 #include <linux/module.h>
29 /* Device for a quirk */
30 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
31 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
32 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400
34 #define PCI_VENDOR_ID_ETRON 0x1b6f
35 #define PCI_DEVICE_ID_ASROCK_P67 0x7023
37 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31
38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31
40 static const char hcd_name[] = "xhci_hcd";
42 /* called after powerup, by probe or system-pm "wakeup" */
43 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
46 * TODO: Implement finding debug ports later.
47 * TODO: see if there are any quirks that need to be added to handle
48 * new extended capabilities.
51 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
52 if (!pci_set_mwi(pdev))
53 xhci_dbg(xhci, "MWI active\n");
55 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
59 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
61 struct pci_dev *pdev = to_pci_dev(dev);
63 /* Look for vendor-specific quirks */
64 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
65 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
66 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
67 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
68 pdev->revision == 0x0) {
69 xhci->quirks |= XHCI_RESET_EP_QUIRK;
70 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
71 " endpoint cmd after reset endpoint\n");
73 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
74 pdev->revision == 0x4) {
75 xhci->quirks |= XHCI_SLOW_SUSPEND;
77 "QUIRK: Fresco Logic xHC revision %u"
78 "must be suspended extra slowly",
81 /* Fresco Logic confirms: all revisions of this chip do not
82 * support MSI, even though some of them claim to in their PCI
85 xhci->quirks |= XHCI_BROKEN_MSI;
86 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
87 "has broken MSI implementation\n",
89 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
92 if (pdev->vendor == PCI_VENDOR_ID_NEC)
93 xhci->quirks |= XHCI_NEC_HOST;
95 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
96 xhci->quirks |= XHCI_AMD_0x96_HOST;
99 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
100 xhci->quirks |= XHCI_AMD_PLL_FIX;
102 if (pdev->vendor == PCI_VENDOR_ID_AMD)
103 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
105 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
106 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
107 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
108 xhci->limit_active_eps = 64;
109 xhci->quirks |= XHCI_SW_BW_CHECKING;
111 * PPT desktop boards DH77EB and DH77DF will power back on after
112 * a few seconds of being shutdown. The fix for this is to
113 * switch the ports from xHCI to EHCI on shutdown. We can't use
114 * DMI information to find those particular boards (since each
115 * vendor will change the board name), so we have to key off all
118 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
119 xhci->quirks |= XHCI_AVOID_BEI;
121 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
122 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
123 xhci->quirks |= XHCI_RESET_ON_RESUME;
124 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
125 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
127 if (pdev->vendor == PCI_VENDOR_ID_VIA)
128 xhci->quirks |= XHCI_RESET_ON_RESUME;
131 /* called during probe() after chip reset completes */
132 static int xhci_pci_setup(struct usb_hcd *hcd)
134 struct xhci_hcd *xhci;
135 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
138 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
142 xhci = hcd_to_xhci(hcd);
143 if (!usb_hcd_is_primary_hcd(hcd))
146 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
147 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
149 /* Find any debug ports */
150 retval = xhci_pci_reinit(xhci, pdev);
159 * We need to register our own PCI probe function (instead of the USB core's
160 * function) in order to create a second roothub under xHCI.
162 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
165 struct xhci_hcd *xhci;
166 struct hc_driver *driver;
169 driver = (struct hc_driver *)id->driver_data;
170 /* Register the USB 2.0 roothub.
171 * FIXME: USB core must know to register the USB 2.0 roothub first.
172 * This is sort of silly, because we could just set the HCD driver flags
173 * to say USB 2.0, but I'm not sure what the implications would be in
174 * the other parts of the HCD code.
176 retval = usb_hcd_pci_probe(dev, id);
181 /* USB 2.0 roothub is stored in the PCI device now. */
182 hcd = dev_get_drvdata(&dev->dev);
183 xhci = hcd_to_xhci(hcd);
184 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
186 if (!xhci->shared_hcd) {
188 goto dealloc_usb2_hcd;
191 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
192 * is called by usb_add_hcd().
194 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
196 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
200 /* Roothub already marked as USB 3.0 speed */
204 usb_put_hcd(xhci->shared_hcd);
206 usb_hcd_pci_remove(dev);
210 static void xhci_pci_remove(struct pci_dev *dev)
212 struct xhci_hcd *xhci;
214 xhci = hcd_to_xhci(pci_get_drvdata(dev));
215 if (xhci->shared_hcd) {
216 usb_remove_hcd(xhci->shared_hcd);
217 usb_put_hcd(xhci->shared_hcd);
219 usb_hcd_pci_remove(dev);
221 /* Workaround for spurious wakeups at shutdown with HSW */
222 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
223 pci_set_power_state(dev, PCI_D3hot);
229 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
231 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
234 if (hcd->state != HC_STATE_SUSPENDED ||
235 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
238 retval = xhci_suspend(xhci, do_wakeup);
243 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
245 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
246 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
249 /* The BIOS on systems with the Intel Panther Point chipset may or may
250 * not support xHCI natively. That means that during system resume, it
251 * may switch the ports back to EHCI so that users can use their
252 * keyboard to select a kernel from GRUB after resume from hibernate.
254 * The BIOS is supposed to remember whether the OS had xHCI ports
255 * enabled before resume, and switch the ports back to xHCI when the
256 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
259 * Unconditionally switch the ports back to xHCI after a system resume.
260 * We can't tell whether the EHCI or xHCI controller will be resumed
261 * first, so we have to do the port switchover in both drivers. Writing
262 * a '1' to the port switchover registers should have no effect if the
263 * port was already switched over.
265 if (usb_is_intel_switchable_xhci(pdev))
266 usb_enable_xhci_ports(pdev);
268 retval = xhci_resume(xhci, hibernated);
271 #endif /* CONFIG_PM */
273 static const struct hc_driver xhci_pci_hc_driver = {
274 .description = hcd_name,
275 .product_desc = "xHCI Host Controller",
276 .hcd_priv_size = sizeof(struct xhci_hcd *),
279 * generic hardware linkage
282 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
285 * basic lifecycle operations
287 .reset = xhci_pci_setup,
290 .pci_suspend = xhci_pci_suspend,
291 .pci_resume = xhci_pci_resume,
294 .shutdown = xhci_shutdown,
297 * managing i/o requests and associated device resources
299 .urb_enqueue = xhci_urb_enqueue,
300 .urb_dequeue = xhci_urb_dequeue,
301 .alloc_dev = xhci_alloc_dev,
302 .free_dev = xhci_free_dev,
303 .alloc_streams = xhci_alloc_streams,
304 .free_streams = xhci_free_streams,
305 .add_endpoint = xhci_add_endpoint,
306 .drop_endpoint = xhci_drop_endpoint,
307 .endpoint_reset = xhci_endpoint_reset,
308 .check_bandwidth = xhci_check_bandwidth,
309 .reset_bandwidth = xhci_reset_bandwidth,
310 .address_device = xhci_address_device,
311 .update_hub_device = xhci_update_hub_device,
312 .reset_device = xhci_discover_or_reset_device,
317 .get_frame_number = xhci_get_frame,
319 /* Root hub support */
320 .hub_control = xhci_hub_control,
321 .hub_status_data = xhci_hub_status_data,
322 .bus_suspend = xhci_bus_suspend,
323 .bus_resume = xhci_bus_resume,
325 * call back when device connected and addressed
327 .update_device = xhci_update_device,
328 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
331 /*-------------------------------------------------------------------------*/
333 /* PCI driver selection metadata; PCI hotplugging uses this */
334 static const struct pci_device_id pci_ids[] = { {
335 /* handle any USB 3.0 xHCI controller */
336 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
337 .driver_data = (unsigned long) &xhci_pci_hc_driver,
339 { /* end: all zeroes */ }
341 MODULE_DEVICE_TABLE(pci, pci_ids);
343 /* pci driver glue; this is a "new style" PCI driver module */
344 static struct pci_driver xhci_pci_driver = {
345 .name = (char *) hcd_name,
348 .probe = xhci_pci_probe,
349 .remove = xhci_pci_remove,
350 /* suspend and resume implemented later */
352 .shutdown = usb_hcd_pci_shutdown,
355 .pm = &usb_hcd_pci_pm_ops
360 int __init xhci_register_pci(void)
362 return pci_register_driver(&xhci_pci_driver);
365 void __exit xhci_unregister_pci(void)
367 pci_unregister_driver(&xhci_pci_driver);